ATE183251T1 - Verfahren zur senkung der phasenübergangstemperatur eines metallsilizids - Google Patents

Verfahren zur senkung der phasenübergangstemperatur eines metallsilizids

Info

Publication number
ATE183251T1
ATE183251T1 AT94115744T AT94115744T ATE183251T1 AT E183251 T1 ATE183251 T1 AT E183251T1 AT 94115744 T AT94115744 T AT 94115744T AT 94115744 T AT94115744 T AT 94115744T AT E183251 T1 ATE183251 T1 AT E183251T1
Authority
AT
Austria
Prior art keywords
metal
refractory metal
precursory
wafer
layer
Prior art date
Application number
AT94115744T
Other languages
English (en)
Inventor
Cyril Cabral Jr
Lawrence Alfred Clevenger
Heurle Francois Max D
James Mckell Edwin Harper
Randy William Mann
Glen Lester Miles
Donald Walter Douglas Rakowski
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE183251T1 publication Critical patent/ATE183251T1/de

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42—Silicides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B1/00—Single-crystal growth directly from the solid state
    • C30B1/02—Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H10D64/0112—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/04—Dopants, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides

Landscapes

  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Thermal Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Silicon Compounds (AREA)
  • Chemical Vapour Deposition (AREA)
  • Catalysts (AREA)
  • Chemically Coating (AREA)
AT94115744T 1993-10-29 1994-10-06 Verfahren zur senkung der phasenübergangstemperatur eines metallsilizids ATE183251T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/145,921 US5510295A (en) 1993-10-29 1993-10-29 Method for lowering the phase transformation temperature of a metal silicide

Publications (1)

Publication Number Publication Date
ATE183251T1 true ATE183251T1 (de) 1999-08-15

Family

ID=22515130

Family Applications (1)

Application Number Title Priority Date Filing Date
AT94115744T ATE183251T1 (de) 1993-10-29 1994-10-06 Verfahren zur senkung der phasenübergangstemperatur eines metallsilizids

Country Status (10)

Country Link
US (1) US5510295A (de)
EP (1) EP0651076B1 (de)
JP (1) JP2673103B2 (de)
KR (1) KR0155587B1 (de)
AT (1) ATE183251T1 (de)
BR (1) BR9404247A (de)
CA (1) CA2118147C (de)
DE (1) DE69420004T2 (de)
ES (1) ES2136148T3 (de)
TW (1) TW262573B (de)

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JPH0982812A (ja) * 1995-09-08 1997-03-28 Sony Corp 半導体装置の製造方法
KR0164072B1 (ko) * 1995-11-13 1999-02-01 김주용 반도체 소자의 얕은 접합 형성방법
JP2956583B2 (ja) * 1996-05-31 1999-10-04 日本電気株式会社 半導体装置とその製造方法
JP3393465B2 (ja) * 1996-11-13 2003-04-07 東京エレクトロン株式会社 半導体装置の製造方法
US5997634A (en) * 1996-11-14 1999-12-07 Micron Technology, Inc. Method of forming a crystalline phase material
KR100220253B1 (ko) * 1996-12-27 1999-09-15 김영환 Mosfet 제조 방법
US6284633B1 (en) * 1997-11-24 2001-09-04 Motorola Inc. Method for forming a tensile plasma enhanced nitride capping layer over a gate electrode
US6242333B1 (en) * 1998-01-06 2001-06-05 Texas Instruments Incorporated Method to enhance the formation of nucleation sites on silicon structures and an improved silicon structure
US6022801A (en) * 1998-02-18 2000-02-08 International Business Machines Corporation Method for forming an atomically flat interface for a highly disordered metal-silicon barrier film
US6048791A (en) * 1998-03-31 2000-04-11 Kabushiki Kaisha Toshiba Semiconductor device with electrode formed of conductive layer consisting of polysilicon layer and metal-silicide layer and its manufacturing method
US6492266B1 (en) 1998-07-09 2002-12-10 Advanced Micro Devices, Inc. Method of forming reliable capped copper interconnects
US6156615A (en) * 1998-09-30 2000-12-05 Advanced Micro Devices, Inc. Method for decreasing the contact resistance of silicide contacts by retrograde implantation of source/drain regions
US6204177B1 (en) 1998-11-04 2001-03-20 Advanced Micro Devices, Inc. Method of forming junction leakage free metal silicide in a semiconductor wafer by alloying refractory metal
US6165903A (en) * 1998-11-04 2000-12-26 Advanced Micro Devices, Inc. Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation
US5970370A (en) * 1998-12-08 1999-10-19 Advanced Micro Devices Manufacturing capping layer for the fabrication of cobalt salicide structures
KR100329769B1 (ko) * 1998-12-22 2002-07-18 박종섭 티타늄폴리사이드게이트전극형성방법
US6180521B1 (en) 1999-01-06 2001-01-30 International Business Machines Corporation Process for manufacturing a contact barrier
US6274511B1 (en) 1999-02-24 2001-08-14 Advanced Micro Devices, Inc. Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of refractory metal layer
US6255214B1 (en) 1999-02-24 2001-07-03 Advanced Micro Devices, Inc. Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of source and drain regions
US6187617B1 (en) 1999-07-29 2001-02-13 International Business Machines Corporation Semiconductor structure having heterogeneous silicide regions and method for forming same
US6383906B1 (en) 1999-08-19 2002-05-07 Advanced Micro Devices, Inc. Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption
US6297148B1 (en) 1999-08-19 2001-10-02 Advanced Micro Devices, Inc. Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation
US6440851B1 (en) 1999-10-12 2002-08-27 International Business Machines Corporation Method and structure for controlling the interface roughness of cobalt disilicide
US6096647A (en) * 1999-10-25 2000-08-01 Chartered Semiconductor Manufacturing Ltd. Method to form CoSi2 on shallow junction by Si implantation
US6281117B1 (en) 1999-10-25 2001-08-28 Chartered Semiconductor Manufacturing Ltd. Method to form uniform silicide features
US6323130B1 (en) 2000-03-06 2001-11-27 International Business Machines Corporation Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging
US6331486B1 (en) 2000-03-06 2001-12-18 International Business Machines Corporation Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
US6413859B1 (en) 2000-03-06 2002-07-02 International Business Machines Corporation Method and structure for retarding high temperature agglomeration of silicides using alloys
US20020031909A1 (en) * 2000-05-11 2002-03-14 Cyril Cabral Self-aligned silicone process for low resistivity contacts to thin film silicon-on-insulator mosfets
TW531803B (en) * 2000-08-31 2003-05-11 Agere Syst Guardian Corp Electronic circuit structure with improved dielectric properties
US6972932B2 (en) * 2000-09-06 2005-12-06 Seagate Technology Llc High-efficiency single-turn write head for high-speed recording
US6645861B2 (en) 2001-04-18 2003-11-11 International Business Machines Corporation Self-aligned silicide process for silicon sidewall source and drain contacts
US6534871B2 (en) * 2001-05-14 2003-03-18 Sharp Laboratories Of America, Inc. Device including an epitaxial nickel silicide on (100) Si or stable nickel silicide on amorphous Si and a method of fabricating the same
US20040050319A1 (en) 2002-09-13 2004-03-18 Semiconductor Technology Academic Research Center Nickel-silicon compound forming method, semiconductor device manufacturing method, and semiconductor device
BE1015721A3 (nl) * 2003-10-17 2005-07-05 Imec Inter Uni Micro Electr Werkwijze voor het reduceren van de contactweerstand van de aansluitgebieden van een halfgeleiderinrichting.
US20060175664A1 (en) * 2005-02-07 2006-08-10 Micron Technology, Inc. Semiconductor constructions, and methods of forming metal silicides
US7790617B2 (en) * 2005-11-12 2010-09-07 Chartered Semiconductor Manufacturing, Ltd. Formation of metal silicide layer over copper interconnect for reliability enhancement
JP5887848B2 (ja) * 2011-11-10 2016-03-16 トヨタ自動車株式会社 半導体装置の製造方法
CN104779271B (zh) * 2014-01-09 2018-05-01 北大方正集团有限公司 Mos结构及其制作方法、以及制作金属硅化物的方法

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JPS6014475A (ja) * 1983-07-05 1985-01-25 Mitsubishi Electric Corp 半導体装置
JPH079893B2 (ja) * 1984-10-18 1995-02-01 松下電子工業株式会社 半導体装置の製造方法
FR2578272B1 (fr) * 1985-03-01 1987-05-22 Centre Nat Rech Scient Procede de formation sur un substrat d'une couche de siliciure de tungstene, utilisable notamment pour la realisation de couches d'interconnexion des circuits integres.
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JPH039530A (ja) * 1989-06-07 1991-01-17 Matsushita Electron Corp Ｍｏｓ電界効果トランジスタの製造方法
JPH0727880B2 (ja) * 1989-11-10 1995-03-29 株式会社東芝 半導体装置の製造方法
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Also Published As

Publication number Publication date
DE69420004D1 (de) 1999-09-16
KR0155587B1 (ko) 1998-11-16
BR9404247A (pt) 1995-06-20
CA2118147A1 (en) 1995-04-30
JP2673103B2 (ja) 1997-11-05
TW262573B (de) 1995-11-11
JPH07169711A (ja) 1995-07-04
EP0651076A1 (de) 1995-05-03
US5510295A (en) 1996-04-23
ES2136148T3 (es) 1999-11-16
KR950011644A (ko) 1995-05-15
EP0651076B1 (de) 1999-08-11
DE69420004T2 (de) 2000-03-30
CA2118147C (en) 2000-05-16

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