ZA981131B - Flash memory VDS compensation techniques to reduce programming variability. - Google Patents

Flash memory VDS compensation techniques to reduce programming variability.

Info

Publication number
ZA981131B
ZA981131B ZA9801131A ZA981131A ZA981131B ZA 981131 B ZA981131 B ZA 981131B ZA 9801131 A ZA9801131 A ZA 9801131A ZA 981131 A ZA981131 A ZA 981131A ZA 981131 B ZA981131 B ZA 981131B
Authority
ZA
South Africa
Prior art keywords
flash memory
compensation techniques
reduce programming
variability
vds compensation
Prior art date
Application number
ZA9801131A
Other languages
English (en)
Inventor
Stephen N Keeney
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of ZA981131B publication Critical patent/ZA981131B/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
ZA9801131A 1997-03-31 1998-02-11 Flash memory VDS compensation techniques to reduce programming variability. ZA981131B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/828,873 US5798966A (en) 1997-03-31 1997-03-31 Flash memory VDS compensation techiques to reduce programming variability

Publications (1)

Publication Number Publication Date
ZA981131B true ZA981131B (en) 1999-08-11

Family

ID=25252981

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA9801131A ZA981131B (en) 1997-03-31 1998-02-11 Flash memory VDS compensation techniques to reduce programming variability.

Country Status (9)

Country Link
US (1) US5798966A (zh)
JP (1) JP4173555B2 (zh)
KR (1) KR100313746B1 (zh)
CN (1) CN100392759C (zh)
AU (1) AU6252398A (zh)
DE (1) DE19882265B4 (zh)
TW (1) TW425557B (zh)
WO (1) WO1998044510A1 (zh)
ZA (1) ZA981131B (zh)

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Also Published As

Publication number Publication date
TW425557B (en) 2001-03-11
JP2001517350A (ja) 2001-10-02
KR20010005825A (ko) 2001-01-15
JP4173555B2 (ja) 2008-10-29
AU6252398A (en) 1998-10-22
KR100313746B1 (ko) 2001-11-16
US5798966A (en) 1998-08-25
WO1998044510A1 (en) 1998-10-08
CN1251683A (zh) 2000-04-26
CN100392759C (zh) 2008-06-04
DE19882265B4 (de) 2005-02-10
DE19882265T1 (de) 2000-05-25

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