WO2023248658A1 - 回路モジュール及び回路モジュールの製造方法 - Google Patents

回路モジュール及び回路モジュールの製造方法 Download PDF

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Publication number
WO2023248658A1
WO2023248658A1 PCT/JP2023/018518 JP2023018518W WO2023248658A1 WO 2023248658 A1 WO2023248658 A1 WO 2023248658A1 JP 2023018518 W JP2023018518 W JP 2023018518W WO 2023248658 A1 WO2023248658 A1 WO 2023248658A1
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WO
WIPO (PCT)
Prior art keywords
interlayer connection
region
conductor
mounting electrode
circuit module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/018518
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English (en)
French (fr)
Japanese (ja)
Inventor
伸郎 池本
英一 高田
和裕 山地
英樹 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
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Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202380039154.9A priority Critical patent/CN119096356A/zh
Priority to JP2024528399A priority patent/JPWO2023248658A1/ja
Publication of WO2023248658A1 publication Critical patent/WO2023248658A1/ja
Priority to US18/925,509 priority patent/US20250048542A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10287—Metal wires as connectors or conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/10886—Other details
    • H05K2201/10909—Materials of terminal, e.g. of leads or electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding

Definitions

  • a semiconductor device described in Patent Document 1 As an invention related to a conventional circuit module, for example, a semiconductor device described in Patent Document 1 is known.
  • a semiconductor device includes an IC chip and a multilayer wiring board.
  • a plurality of IC connection terminals are provided on the upper main surface of the multilayer wiring board.
  • a plurality of via connection terminals and a plurality of support vias are provided inside the multilayer wiring board. Each of the plurality of support vias connects the plurality of IC connection terminals and the plurality of via connection terminals.
  • the IC chip has a plurality of solder bumps. Each of the plurality of solder bumps is connected to a plurality of IC connection terminals.
  • an object of the present invention is to provide a circuit module and a method for manufacturing a circuit module that can suppress damage to the connection portion between an interlayer connection conductor and an internal conductor layer.
  • the first interlayer connecting conductor includes a first region and a second region, The first region and the second region are arranged in this order toward the negative direction of the Z axis, The Young's modulus of the second region is lower than the Young's modulus of the first region.
  • a third interlayer connecting conductor the end of the third interlayer connecting conductor in the negative direction of the Z axis is in contact with the inner conductor layer; a fourth interlayer connecting conductor that penetrates the resin layer in the Z-axis direction and overlaps the mounting electrode when viewed in the Z-axis direction, the fourth interlayer connecting conductor a fourth interlayer connection conductor whose positive end is in contact with the internal conductor layer; It is equipped with The said article is A connecting member to be solid-phase bonded to the mounting electrode, We are equipped with The fourth interlayer connection conductor includes a third region and a fourth region arranged in the Z-axis direction, The material of the third interlayer connection conductor and the material of the third region are the same as the material of the mounting electrode, The Young's modulus of the fourth region is lower than the Young's modulus of the third region.
  • circuit module According to the circuit module according to the present invention, it is possible to suppress damage to the connection portion between the interlayer connection conductor and the internal conductor layer.
  • the conductor layers 18a to 18c are arranged in this order from left to right.
  • the conductor layer 18a extends in the left-right direction.
  • the mounting electrode E1 is located at the right end of the conductor layer 18a.
  • the conductor layer 18b has a square shape.
  • the mounting electrode E2 is located at the center of the conductor layer 18b.
  • the conductor layer 18c extends in the left-right direction.
  • the mounting electrode E3 is located at the left end of the conductor layer 18c.
  • the internal conductor layers 19a to 19c are provided in the laminate 12. Internal conductor layers 19a to 19c are located on the upper main surface of resin layer 14b. The internal conductor layers 19a to 19c are arranged in this order from left to right. Internal conductor layers 19a to 19c extend in the left-right direction. Moreover, each of the internal conductor layers 19a and 19b overlaps with the mounting electrodes E1 and E2 when viewed in the vertical direction (Z-axis direction). In this embodiment, the right end portion of the internal conductor layer 19a overlaps the mounting electrode E1 when viewed in the vertical direction. The left end portion of the internal conductor layer 19b overlaps the mounting electrode E2 when viewed in the vertical direction.
  • the internal conductor layers 19d to 19f are provided in the laminate 12. Internal conductor layers 19d to 19f are located on the lower main surface of resin layer 14c. The internal conductor layers 19d to 19f are arranged in this order from left to right.
  • the conductor layers 20a to 20c are provided on the laminate 12.
  • the conductor layers 20a to 20c are located on the lower main surface of the resin layer 14d.
  • the conductor layers 20a to 20c are arranged in this order from left to right.
  • the conductor layers 20a to 20c have a rectangular shape when viewed in the vertical direction.
  • the conductor layers 20a to 20c are, for example, external electrodes.
  • the conductor layers 18a to 18c, 20a to 20c and internal conductor layers 19a to 19f as described above are formed by patterning metal foils pasted on the upper main surfaces of the resin layers 14a and 14b and the lower main surfaces of the resin layers 14c and 14d. It is formed by The metal foil is, for example, copper foil.
  • the mounting electrodes E1 to E3 have a structure in which the surface of copper foil is plated with nickel and gold.
  • the material of the surfaces of the mounting electrodes E1 to E3 is gold.
  • the first interlayer connection conductors V1a and V1b are provided in the laminate 12.
  • the first interlayer connection conductors V1a and V1b penetrate the resin layer 14a in the vertical direction (Z-axis direction).
  • the first interlayer connection conductor V1a overlaps with the mounting electrode E1 and the right end portion of the internal conductor layer 19a when viewed in the vertical direction. Therefore, the upper end (end in the positive direction of the Z axis) of the first interlayer connection conductor V1a is in contact with the mounting electrode E1.
  • the lower end (end in the negative direction of the Z-axis) of the first interlayer connection conductor V1a is in contact with the internal conductor layer 19a.
  • the first interlayer connection conductor V1b overlaps with the mounting electrode E2 and the left end portion of the internal conductor layer 19b when viewed in the vertical direction. Therefore, the upper end (end in the positive direction of the Z axis) of the first interlayer connection conductor V1b is in contact with the mounting electrode E2. The lower end (end in the negative direction of the Z-axis) of the first interlayer connection conductor V1b is in contact with the internal conductor layer 19b.
  • the first interlayer connection conductors V1a and V1b have a shape in which the cross-sectional area perpendicular to the vertical direction decreases from the bottom to the top. Specifically, the first interlayer connection conductors V1a and V1b have a truncated cone shape. The area of the upper end of the first interlayer connection conductor V1a, V1b is smaller than the area of the lower end of the first interlayer connection conductor V1a, V1b.
  • Each of the first interlayer connection conductors V1a and V1b includes a first region A1 and a second region A2.
  • the first area A1 and the second area A2 are arranged in this order downward (negative direction of the Z axis). Therefore, the second area A2 is located below the first area A1 (in the negative direction of the Z-axis).
  • the volume of the first region A1 is 30% or more of the volume of the first interlayer connection conductors V1a and V1b.
  • the Young's modulus of the second region A2 is lower than the Young's modulus of the first region A1.
  • the Young's modulus of the lower half of the first interlayer connecting conductors V1a, V1b is different from the Young's modulus of the upper half of the first interlayer connecting conductors V1a, V1b.
  • the second region A2 has a lower heat transfer coefficient than the heat transfer coefficient of the first region A1.
  • the material of the first region A1 is the same as the material of the mounting electrodes E1 and E2. Therefore, the material of the first region A1 and the material of the mounting electrodes E1, E2 are, for example, copper, aluminum, or silver.
  • the material of the second region A2 is an alloy containing tin as a main component.
  • the alloy containing tin as a main component is, for example, an alloy of tin and copper or an alloy of tin and silver.
  • the second region A2 is formed by sintering a conductive paste that is a mixture of metal powder and resin.
  • the interlayer connection conductor v1 is provided in the laminate 12.
  • the interlayer connection conductor v1 penetrates the resin layer 14a in the vertical direction (Z-axis direction).
  • the upper end of the interlayer connection conductor v1 is in contact with the right end portion of the conductor layer 18c.
  • the lower end of the interlayer connection conductor v1 is in contact with the left end of the internal conductor layer 19c.
  • the structure of the interlayer connection conductor v1 is the same as that of the first interlayer connection conductors V1a and V1b, so a description thereof will be omitted.
  • the second interlayer connection conductors v2a to v2c are located below the first interlayer connection conductors V1a and V1b (in the negative direction of the Z axis).
  • the second interlayer connection conductors v2a to v2c penetrate the resin layer 14b in the vertical direction (Z-axis direction).
  • the upper end of the second interlayer connection conductor v2a is in contact with the left end of the internal conductor layer 19a.
  • the upper end of the second interlayer connection conductor v2b is in contact with the right end portion of the internal conductor layer 19b.
  • the upper end of the second interlayer connection conductor v2c is in contact with the right end of the internal conductor layer 19c.
  • the second interlayer connection conductors v2d to v2f are located below the first interlayer connection conductors V1a and V1b (in the negative direction of the Z axis).
  • the second interlayer connection conductors v2d to v2f penetrate the resin layer 14c in the vertical direction (Z-axis direction).
  • the upper end of the second interlayer connection conductor v2d is in contact with the second interlayer connection conductor v2a.
  • the lower end of the second interlayer connection conductor v2d is in contact with the inner conductor layer 19d.
  • the upper end of the second interlayer connection conductor v2e is in contact with the second interlayer connection conductor v2b.
  • the lower end of the second interlayer connection conductor v2e is in contact with the right end portion of the internal conductor layer 19e.
  • the upper end of the second interlayer connection conductor v2f is in contact with the second interlayer connection conductor v2c.
  • the lower end of the second interlayer connection conductor v2f is in contact with the internal conductor layer 19f.
  • the step of forming the first interlayer connection conductors V1a, V1b and the interlayer connection conductors v1, v3a to v3c through holes are formed that penetrate the resin layers 14a, 14d in the vertical direction (Z-axis direction). Furthermore, the first region A1 is formed by plating the through hole. After forming the first region A1, the second region A2 is formed by filling the through hole with a conductive paste and solidifying the conductive paste by heating.
  • Solid phase bonding is bonding in which a bonding boundary is formed by contact between the solid phase of the connecting members B1 to B3 and the solid phase of the mounting electrodes E1 to E3.
  • two metals are bonded without using a low melting point metal.
  • the first interlayer connection conductor V1a is too hard, there is a possibility that the connection between the first interlayer connection conductor V1a and the internal conductor layer 19a will be damaged. More specifically, the upper end of the first interlayer connection conductor V1a is in contact with the mounting electrode E1. The lower end of the first interlayer connection conductor V1a is in contact with the internal conductor layer 19a. Therefore, the ultrasonic vibration is transmitted to the first interlayer connection conductor V1a and the internal conductor layer 19a via the mounting electrode E1. If the first interlayer connection conductor V1a is too hard, ultrasonic vibrations are likely to be applied to the joint between the first interlayer connection conductor V1a and the internal conductor layer 19a.
  • the occurrence of warpage in the circuit board 11 is suppressed. More specifically, the first interlayer connection conductors V1a, V1b and the interlayer connection conductor v1 vertically penetrate the resin layer 14a. The interlayer connection conductors v3a to v3c vertically penetrate the resin layer 14d. The first interlayer connection conductors V1a, V1b and the interlayer connection conductors v1, v3a to v3c include a first area A1 and a second area A2. As a result, the circuit board 11 approaches a vertically symmetrical structure. Therefore, the linear expansion coefficient near the upper main surface of the circuit board 11 approaches the linear expansion coefficient near the lower main surface of the circuit board 11. As described above, in the circuit module 10, occurrence of warpage in the circuit board 11 is suppressed.
  • the circuit module 10b differs from the circuit module 10 in the structure of the article 100. More specifically, the connecting members B1 and B3 are gold wires. The rest of the structure of the circuit module 10b is the same as that of the circuit module 10, so a description thereof will be omitted.
  • the circuit module 10b can achieve the effects (a) to (e).
  • the connecting member B3 is ultrasonically bonded to the mounting electrode E3. Connect through technology. In this way, since each of the connecting members B1 and B3 is connected to the mounting electrodes E1 and E3 in a plurality of times, each of the connecting members B1 and B3 is reliably connected to the mounting electrodes E1 and E3.
  • FIG. 4 is a cross-sectional view of the circuit module 10c.
  • the lower end (end in the negative direction of the Z axis) of the third interlayer connection conductor v13b is in contact with the internal conductor layer 19b.
  • the upper end (end in the positive direction of the Z axis) of the third interlayer connection conductor v13c is in contact with the conductor layer 18c.
  • the lower end (end in the negative direction of the Z axis) of the third interlayer connection conductor v13c is in contact with the internal conductor layer 19c.
  • the Young's modulus of the third interlayer connection conductors v13a to v13c as described above is higher than the Young's modulus of the fourth region A4, which will be described later.
  • the Young's modulus of the third interlayer connection conductors v13a to v13c is equal to the Young's modulus of the third region A3, which will be described later.
  • the material of the third interlayer connection conductors v13a to v13c is the same as the material of the mounting electrodes E1 to E3. Therefore, the material of the third interlayer connection conductors v13a to v13c is, for example, copper, aluminum, or silver.
  • the fourth interlayer connection conductor V4 includes a third region A3 and a fourth region A4 that are arranged in the vertical direction (Z-axis direction).
  • the fourth area A4 is located below the third area A3.
  • the volume of the third region A3 is 30% or more of the volume of the fourth interlayer connection conductor V4.
  • the Young's modulus of the fourth region A4 is lower than the Young's modulus of the third region A3.
  • the material of the third region A3 is the same as the material of the mounting electrodes E1 to E3. Therefore, the material of the third region A3 and the material of the mounting electrodes E1 to E3 are, for example, copper, aluminum, or silver.
  • the material of the fourth region A4 is an alloy containing tin as a main component.
  • the alloy containing tin as a main component is, for example, an alloy of tin and copper or an alloy of tin and silver.
  • the fourth region A4 is formed by sintering a conductive paste that is a mixture of metal powder and resin.
  • the rest of the structure of the circuit module 10c is the same as that of the circuit module 10, so a description thereof will be omitted.
  • the circuit module 10c can achieve the effect (b).
  • the circuit module 10c it is possible to suppress damage to the connection portion between the third interlayer connection conductor v13a and the internal conductor layer 19a.
  • the material of the surface of the connecting member B2 is gold. Therefore, the connecting member B2 is bonded to the mounting electrode E2 by ultrasonic bonding technology.
  • the mounting electrode E2 In order to firmly connect the connecting member B2 to the mounting electrode E2, the mounting electrode E2 only needs to be supported by the hard third interlayer connection conductor v13b.
  • the material of the third interlayer connection conductor v13b may be the same as the material of the mounting electrode E2. Thereby, ultrasonic vibrations can be efficiently transmitted to the connecting member B2 and the mounting electrode E2. As a result, the connecting member B2 is firmly joined to the mounting electrode E2.
  • the third interlayer connection conductor v13b is too hard, there is a possibility that the connection between the third interlayer connection conductor v13b and the internal conductor layer 19b will be damaged. More specifically, the upper end of the third interlayer connection conductor v13b is in contact with the mounting electrode E2. The lower end of the third interlayer connection conductor v13b is in contact with the internal conductor layer 19b. Therefore, the ultrasonic vibration is transmitted to the third interlayer connection conductor v13b and the internal conductor layer 19b via the mounting electrode E2. If the third interlayer connection conductor v13b is too hard, ultrasonic vibrations are likely to be applied to the joint between the third interlayer connection conductor v13b and the internal conductor layer 19b.
  • the fourth interlayer connection conductor V4 includes a third region A3 and a fourth region A4 that are arranged in the vertical direction (Z-axis direction).
  • the Young's modulus of the fourth region A4 is lower than the Young's modulus of the third region A3.
  • the internal conductor layer 19b comes to be supported by the fourth interlayer connection conductor V4 including the soft fourth region A4. Therefore, when ultrasonic vibration is applied to the third interlayer connection conductor v13b and the internal conductor layer 19b, the fourth region A4 absorbs the ultrasonic vibration.
  • a through hole is formed that penetrates the resin layer 14b in the vertical direction (Z-axis direction).
  • the third region A3 is formed by plating the through hole. After forming the third region A3, the through holes are filled with conductive paste and the conductive paste is solidified by heating to form the fourth region A4.
  • the multilayer board according to the present invention is not limited to the circuit modules 10, 10a to 10c, and can be modified within the scope of the gist. Furthermore, the structures of the circuit modules 10, 10a to 10c may be combined arbitrarily.
  • article 100 is not limited to electronic components.
  • Article 100 may be a circuit board.
  • the connecting members B1 to B3 are mounting electrodes of a circuit board. Gold is present on the surfaces of the connecting members B1 to B3.
  • the material of the surfaces of the connecting members B1 to B3 may be other than gold.
  • the material of the surfaces of the connecting members B1 to B3 may be, for example, aluminum or silver.
  • the material of the first region A1 may be different from the material of the mounting electrodes E1 to E3.
  • the multilayer substrate may further include a protective layer that covers the lower main surface of the laminate 12.
  • the material of the conductor layers 18a to 18c and 20a to 20c, the material of the internal conductor layers 19a to 19f, the material of the first region A1, and the material of the third region A3 may be aluminum or silver.
  • fourth area A4 may be located above the third area A3.
  • first area A1 and the second area A2 are arranged in this order downward, in addition to the case where the first area A1 is located above the second area A2. This includes the case where at least a portion of the area is located below the first area A1.
  • the first region A1 and the second region A2 may be in contact with the conductor layers 18a, 18b.
  • the area where the first region A1 is in contact with the conductor layers 18a, 18b is larger than the area where the second region A2 is in contact with the conductor layers 18a, 18b.
  • the lower main surface of the conductor layer 18a has a uniform structure.
  • a uniform structure means a planar shape or a shape provided with periodic irregularities.
  • the boundary between the first region A1 and the conductor layer 18a is a lower main surface where the lower main surface of the conductor layer 18a is in a uniform state. That is, due to the presence of the unevenness on the lower main surface of the conductor layer 18a, the protrusion projecting downward from the conductor layer 18a is a part of the conductor layer 18a and not a part of the first region A1.
  • the present invention has the following structure.
  • the material of the first region and the material of the mounting electrode are copper, aluminum or silver, The circuit module according to (3).
  • the circuit board includes: a second interlayer connection conductor located in the negative direction of the Z axis from the first interlayer connection conductor and penetrating the resin layer in the Z axis direction; Furthermore, we are equipped with The Young's modulus of the second interlayer connection conductor is lower than the Young's modulus of the first region.
  • the circuit module according to any one of (1) to (5).
  • the material of the second interlayer connection conductor is an alloy containing tin as a main component.
  • the circuit board includes: A protective layer that covers the positive main surface of the resin layer located in the positive direction of the Z axis among the plurality of resin layers, Furthermore, we have The circuit module according to any one of (1) to (7).
  • the material of the resin layer is a thermoplastic resin,
  • the Young's modulus of the lower half of the first interlayer connecting conductor is different from the Young's modulus of the upper half of the first interlayer connecting conductor.
  • the circuit module according to any one of (1) to (10).
  • a third interlayer connecting conductor the end of the third interlayer connecting conductor in the negative direction of the Z axis is in contact with the inner conductor layer; a fourth interlayer connecting conductor that penetrates the resin layer in the Z-axis direction and overlaps the mounting electrode when viewed in the Z-axis direction, the fourth interlayer connecting conductor a fourth interlayer connection conductor whose positive end is in contact with the internal conductor layer; It is equipped with The said article is A connecting member to be solid-phase bonded to the mounting electrode, We are equipped with The fourth interlayer connection conductor includes a third region and a fourth region arranged in the Z-axis direction, The material of the third interlayer connection conductor and the material of the third region are the same as the material of the mounting electrode, The Young's modulus of the fourth region is lower than the Young's modulus of the third region. circuit module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
PCT/JP2023/018518 2022-06-23 2023-05-18 回路モジュール及び回路モジュールの製造方法 Ceased WO2023248658A1 (ja)

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CN202380039154.9A CN119096356A (zh) 2022-06-23 2023-05-18 电路模块以及电路模块的制造方法
JP2024528399A JPWO2023248658A1 (https=) 2022-06-23 2023-05-18
US18/925,509 US20250048542A1 (en) 2022-06-23 2024-10-24 Circuit module and manufacturing method therefor

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004179362A (ja) * 2002-11-27 2004-06-24 Kyocera Corp 配線基板およびこれを用いた電子装置
JP2005310934A (ja) * 2004-04-20 2005-11-04 Dainippon Printing Co Ltd 多層配線基板およびその製造方法
JP2006261167A (ja) * 2005-03-15 2006-09-28 Murata Mfg Co Ltd 配線基板およびその製造方法
JP2009239224A (ja) * 2008-03-28 2009-10-15 Ngk Spark Plug Co Ltd 多層配線基板
JP2016086057A (ja) * 2014-10-24 2016-05-19 富士通株式会社 配線構造

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017107934A (ja) * 2015-12-08 2017-06-15 富士通株式会社 回路基板、電子機器、及び回路基板の製造方法
CN212463677U (zh) * 2017-05-26 2021-02-02 株式会社村田制作所 多层布线基板以及电子设备
WO2020122156A1 (ja) * 2018-12-13 2020-06-18 株式会社村田製作所 樹脂多層基板、および樹脂多層基板の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004179362A (ja) * 2002-11-27 2004-06-24 Kyocera Corp 配線基板およびこれを用いた電子装置
JP2005310934A (ja) * 2004-04-20 2005-11-04 Dainippon Printing Co Ltd 多層配線基板およびその製造方法
JP2006261167A (ja) * 2005-03-15 2006-09-28 Murata Mfg Co Ltd 配線基板およびその製造方法
JP2009239224A (ja) * 2008-03-28 2009-10-15 Ngk Spark Plug Co Ltd 多層配線基板
JP2016086057A (ja) * 2014-10-24 2016-05-19 富士通株式会社 配線構造

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CN119096356A (zh) 2024-12-06
US20250048542A1 (en) 2025-02-06

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