WO2023116634A1 - 一种混合键合结构及其制备方法 - Google Patents

一种混合键合结构及其制备方法 Download PDF

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Publication number
WO2023116634A1
WO2023116634A1 PCT/CN2022/140072 CN2022140072W WO2023116634A1 WO 2023116634 A1 WO2023116634 A1 WO 2023116634A1 CN 2022140072 W CN2022140072 W CN 2022140072W WO 2023116634 A1 WO2023116634 A1 WO 2023116634A1
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Prior art keywords
bonding
copper
layer
substrate
microns
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PCT/CN2022/140072
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English (en)
French (fr)
Inventor
刘志权
李晓
李哲
高丽茵
孙蓉
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中国科学院深圳先进技术研究院
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Publication of WO2023116634A1 publication Critical patent/WO2023116634A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25C—PROCESSES FOR THE ELECTROLYTIC PRODUCTION, RECOVERY OR REFINING OF METALS; APPARATUS THEREFOR
    • C25C1/00—Electrolytic production, recovery or refining of metals by electrolysis of solutions
    • C25C1/12—Electrolytic production, recovery or refining of metals by electrolysis of solutions of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]

Definitions

  • the invention relates to the technical fields of microelectronic packaging and integrated circuit packaging, in particular to a hybrid bonding structure and a preparation method thereof.
  • Commonly used bonding methods include oxide bonding, solder bonding, copper-copper bonding, organic polymer bonding, and hybrid bonding.
  • the hybrid bonding is that while copper and copper are bonded, the gaps between the bumps are filled with a dielectric layer and bonded to each other.
  • hybrid bonding effectively improves the bonding force between chips, and at the same time ensures better electrical connection, so it has a better application prospect.
  • copper bumps are prone to recrystallization during thermocompression bonding and subsequent processes such as reflow soldering or heat treatment, which reduces the mechanical strength of copper bumps and increases the risk of device failure.
  • the object of the present invention is to provide a hybrid bonding structure and a preparation method thereof.
  • the present invention provides a hybrid bonding structure, the hybrid bonding structure includes a first substrate and a second substrate oppositely arranged, and a first bonding layer is provided on the first substrate, so A second bonding layer is provided on the second substrate, and the first bonding layer is bonded to the second bonding layer to form a bonding interface;
  • Copper bonding points are provided in the first bonding layer and/or the second bonding layer, and the copper bonding points have a preferred orientation of (110) crystal plane, and the twinned copper material includes a twin structure, so The twinned crystal structure includes a twinned crystal layer, and the twinned crystal layer is mainly distributed at an angle of 45° along the grain growth direction; the proportion of crystal grains with the twinned crystal layer in the total number of crystal grains of the twinned copper material ⁇ 50%, and/or the ratio of the volume of the twin structure to the total volume of the twin copper material is ⁇ 50%.
  • twinned crystal layer is mainly distributed along the grain growth direction at an angle of 45°” refers to more than 50% (such as 52%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, 92%, 95%, 96%, 98%, 99% or 100%, etc.) of the twinned wafer layer.
  • the “included angle” refers to the acute angle included in the grain growth direction of the twinned lamellar layer.
  • the proportion of grains having the twinned wafer layer in the total number of grains of the twinned copper material can be, for example, 50%, 55%, 60%, 65%, 70%, 75%, 80% %, 85%, 90%, 95%, 97%, 98% or 99%, etc.
  • the ratio of the volume of the twinned structure to the total volume of the twinned copper material can be, for example, 50%, 52%, 55%, 60%, 63%, 65%, 70%, 75%, 80% %, 85%, 88%, 90%, 95%, 97%, 98% or 99%, etc.
  • the hybrid bonding structure provided by the present invention can effectively improve the bonding force between chips, and at the same time ensure better electrical connection, and the copper bonding point has excellent tissue thermal stability and mechanical properties (especially high-temperature mechanical properties). It has high mechanical strength and toughness, which improves service reliability.
  • the use of the copper bonding point of the specific composition of the present invention avoids recrystallization of the copper bonding point during the thermocompression bonding process and subsequent processes such as reflow soldering or heat treatment, thereby solving the resulting insufficient mechanical strength and reliable service gender issues.
  • the height of the copper bonding point is 0.5-500 microns, such as 0.5 microns, 0.8 microns, 1 micron, 2 microns, 3 microns, 5 microns, 8 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 microns, 40 microns, 45 microns, 50 microns, 55 microns, 60 microns, 65 microns, 70 microns, 80 microns, 90 microns, 100 microns, 115 microns, 130 microns, 140 microns, 150 microns, 160 microns , 180 microns, 200 microns, 220 microns, 240 microns, 265 microns, 280 microns, 300 microns, 320 microns, 340 microns, 350 microns, 375 microns, 385 microns, 400 microns, 405 microns, 420 microns, 450 micron
  • the present invention does not specifically limit the materials of the first substrate and the second substrate, and the materials of the first substrate and the second substrate independently include silicon, compound, ceramics or glass.
  • the first bonding layer includes a dielectric layer and copper bonding points arranged at intervals in the dielectric layer, and the surface of the first bonding layer is exposed The copper bond points are used for bonding.
  • the second bonding layer includes a dielectric layer and copper bonding points arranged at intervals in the dielectric layer, and the copper on the surface of the second bonding layer exposes the bumps for bonding.
  • the material of the dielectric layer in the first bonding layer and the dielectric layer in the second bonding layer is independently selected from at least one of organic polymers or oxides, preferably including benzo At least one of cyclobutene, SU-8, polyimide or SiO2 .
  • the present invention provides a method for preparing the hybrid bonding structure as described in the first aspect, the method comprising the following steps:
  • a first substrate and a second substrate are provided, a first bonding layer is formed on the first substrate, a second bonding layer is formed on the second substrate, and the first bonding layer Copper bumps are provided in the layer and/or the second bonding layer, and the copper bumps are pre-electroplated copper materials with a preferred orientation of (111) crystal planes;
  • the first substrate and the second substrate are arranged oppositely, bonded by thermocompression, the first bonding layer is bonded to the second bonding layer to form a bonding interface, and the mixed bonding structure;
  • thermocompression bonding is ⁇ 200°C.
  • the first substrate and the second substrate are arranged oppositely, which means that the first bonding layer on the first substrate and the second bonding layer on the second substrate are arranged oppositely.
  • the copper bumps in the first bonding layer correspond to and are in contact with the copper bumps in the second bonding layer.
  • the thermocompression bonding temperature is ⁇ 200°C, such as 200°C, 220°C, 240°C, 260°C, 300°C, 350°C, 400°C or 450°C.
  • Thermocompression bonding at this temperature is equivalent to annealing treatment, and annealing twin structure (that is, twin structure) can be continuously formed during annealing treatment under this temperature condition.
  • the set copper bumps have a certain (111) crystal plane preferred orientation and growth twin boundaries parallel to the deposition direction, after thermal compression bonding (for example, the temperature of thermal compression bonding is 200°C)
  • An annealing twin structure can be formed to obtain copper bonding points.
  • the copper bonding points have a preferred orientation of (110) crystal planes, and the twin crystal layers are distributed at an angle of 45° along the grain growth direction.
  • the crystal grains with the twin crystal layers are in the The proportion of the total number of grains of the copper bonding points is ⁇ 50%, and/or the ratio of the volume of the twin structure to the total volume of the copper bonding points is ⁇ 50%.
  • the copper bonding point with a certain preferred orientation of (111) crystal plane is transformed into a preferred orientation of (110) crystal plane, which has excellent thermal stability of the structure and is used in microelectronic interaction.
  • the commonly used heat treatment temperature range about 200 to 400°C
  • the increase of annealing temperature no abnormal grain growth is seen, the proportion of annealing twins in the grain increases, and the strength and toughness of copper bumps are enhanced. Therefore, it is different from the "annealing softening and toughening" microcrystalline structure and the growth twin structure bump, showing a unique "annealing strengthening and toughening" characteristic.
  • the method of the invention improves the structural thermal stability and high-temperature mechanical properties of the bonded copper bump (that is, the copper bonding point), so that the service reliability of the hybrid bonding structure is increased.
  • the first substrate and/or the second substrate are prepared according to the following method, and the method includes the following steps:
  • the substrate in step (i) is the first substrate or the second substrate.
  • the photolithography process in step (ii) uses photoresist to form a pattern through exposure.
  • the pattern refers to the area covered by the photoresist, and the area not covered by the photoresist is subsequently used to fill and form copper bumps , for example, a pre-electroplated copper material with a preferred orientation of (111) crystal plane can be formed by electroplating as a copper bump.
  • the purpose of performing CMP treatment on the surface of the wafer in step (v) is to grind away the excess dielectric layer to expose the surface of copper bumps (such as copper pillars), and another important function is to make the bonding surface completely coherent. surface while meeting the roughness requirements required for bonding.
  • the conductive layer in step (i) may be an adhesion layer and a seed layer obtained by vapor deposition; it may also be the top of a through silicon via (TSV) filled with conductive metal.
  • TSV through silicon via
  • the material of the adhesion layer may be at least one of tantalum, titanium or their nitrides.
  • the material of the seed layer is copper.
  • the conductive metal is copper.
  • the TSV is circular in shape with a diameter of 15-100 microns, such as 15 microns, 20 microns, 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns or 100 microns etc.
  • each substrate contains one or more independent TSV structures, and the TSV structures are arranged in a certain order on the substrate.
  • the thickness of the photoresist formed in step (ii) is 1-500 microns, such as 1 micron, 3 microns, 5 microns, 8 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 microns , 40 microns, 45 microns, 50 microns, 60 microns, 80 microns, 100 microns, 120 microns, 130 microns, 140 microns, 150 microns, 165 microns, 180 microns, 200 microns, 220 microns, 240 microns, 260 microns, 280 Micron, 300 micron, 325 micron, 350 micron, 375 micron, 400 micron, 430 micron, 460 micron or 500 micron etc.
  • microns such as 1 micron, 3 microns, 5 microns, 8 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 micron
  • the present invention does not specifically limit the method for depositing the dielectric layer in step (v).
  • the material of the dielectric layer is benzocyclobutene (Benzocyclobutene, BCB), SU-8, polyimide (Polyimide, PI) etc.
  • the deposition method is spin coating; as another example, the dielectric layer is SiO 2 , and the deposition method is physical vapor deposition.
  • the thickness of the dielectric layer should be slightly higher than the copper bumps (such as copper pillars).
  • step (v) after the CMP treatment, the wafer is subjected to plasma cleaning treatment.
  • plasma cleaning treatment the residues produced by CMP can be eliminated, and at the same time, the bonding surface can be activated to reduce the difficulty of bonding.
  • the parameters of plasma cleaning are: argon gas 70-100 sccm (such as 70 sccm, 80 sccm, 85 sccm, 90 sccm or 100 sccm, etc.), oxygen 10-50 sccm (such as 10 sccm, 20 sccm, 30 sccm, 40 sccm or 50 sccm, etc.
  • power 500-800W such as 500W, 550W, 600W, 650W, 700W or 800W, etc.
  • time 60-600s such as 60s, 80s, 100s, 125s, 150s, 160s, 180s, 200s, 220s, 260s, 300s, 320s, 350s, 400s, 425s, 450s, 480s, 500s, 550s or 600s, etc.
  • the first substrate and/or the second substrate are prepared according to the following method, and the method includes the following steps:
  • the silicon substrate in step (I) is the first substrate or the second substrate.
  • step (II) of the present invention it is a prior art to use a photolithography process to open a window, and those skilled in the art can refer to the content disclosed in the prior art to open a window by photolithography.
  • step (IV) carries out CMP treatment on the surface of the wafer, so that the copper bumps and the dielectric layer can be coplanar, and lower roughness can be achieved.
  • the TSV in the silicon substrate with a TSV structure provided in step (I), is circular in shape with a diameter of 15-100 microns, such as 15 microns, 20 microns, 30 microns, 40 microns , 50 microns, 60 microns, 70 microns, 80 microns, 90 microns or 100 microns, etc.
  • each substrate contains one or more independent TSV structures, and the TSV structures are arranged in a certain order on the substrate.
  • the conductive metal is copper.
  • step (1) direct current electroplating technology is used to fill copper bumps, and the pre-electroplated copper material in step (1) is prepared by electroplating, and the electroplating method includes the following steps:
  • the plating solution contains copper ions, sulfuric acid, chloride ions, additives and water, the additives include inhibitors and auxiliary agents, and the auxiliary agents are selected from at least one of organic sulfonates;
  • the anode and the cathode as the conductive base are immersed in the plating solution, and electroplated to obtain a pre-electroplated copper material.
  • the pre-plating copper material exhibits a certain (111) crystal plane preferred orientation and does not form a high proportion of growth twins perpendicular to the growth direction.
  • the twinned wafer layers are mainly distributed along the angle of 45° between the grain growth direction. There is no abnormal grain growth in the temperature range of common thermocompression bonding, thus showing excellent thermal stability.
  • the pre-plating additive combination has an important influence on the structure of the pre-plating material: by adding inhibitors to the plating solution, the deposition rate can be reduced to avoid coarse and dense crystals; by adding auxiliary agents to the plating solution, it can improve The deposition rate, through the competitive effect of the auxiliary agent and the inhibitor, realizes the dynamic and controllable desorption of the electric double layer inhibitor, and introduces the necessary concentration of electric crystallization defects to incubate the annealing twin boundary.
  • the organic sulfonate in step (a) includes at least one of polystyrene sulfonate, polyethylene sulfonate, alkyl sulfonate and alkylbenzene sulfonate.
  • the molecular weight of the polystyrene sulfonate and the polyethylene sulfonate is independently 1000-100000, such as 1000, 3000, 5000, 8000, 10000, 12500, 15000, 17000, 20000, 25000, 35000 , 40000, 50000, 60000, 70000, 80000 or 100000 etc.
  • the number of carbon atoms of the alkyl sulfonate and alkylbenzene sulfonate is ⁇ 12, for example, the number of carbon atoms may be 12, 13, 14, 15, 16, 17 or 20, etc. It should be noted that the number of carbon atoms of the alkylsulfonate and the alkylbenzenesulfonate may be the same or different.
  • the concentration of the auxiliary agent in the plating solution in step (a) is 10-500ppm, such as 10ppm, 20ppm, 30ppm, 40ppm, 50ppm, 60ppm, 70ppm, 80ppm, 100ppm, 150ppm, 200ppm, 230ppm, 260ppm, 300ppm, 350ppm, 400ppm or 500ppm etc.
  • the inhibitor in step (a) is gelatin.
  • the coagulation value of the gelatin is 10-300 bloom, such as 10 bloom, 20 bloom, 30 bloom, 50 bloom, 70 bloom, 80 bloom, 100 bloom, 125 bloom, 150 bloom, 180 bloom, 200 bloom, 225 bloom , 240 bloom, 260 bloom or 300 bloom, etc.
  • the concentration of the inhibitor in the plating solution in step (a) is 5-200ppm, such as 5ppm, 10ppm, 20ppm, 30ppm, 40ppm, 50ppm, 60ppm, 70ppm, 80ppm, 100ppm, 120ppm, 150ppm, 180ppm or 200ppm, etc. .
  • the concentration of copper ions in the plating solution is 20-70g/L, such as 20g/L, 30g/L, 40g/L, 50g/L, 60g/L or 70g/L wait.
  • the concentration of sulfuric acid in the plating solution is 20-200g/L, such as 20g/L, 25g/L, 30g/L, 35g/L, 40g/L, 50g/L, 60g /L, 70g/L, 80g/L, 100g/L, 120g/L, 150g/L, 160g/L, 180g/L or 200g/L etc.
  • the concentration of chloride ions in the plating solution is 20-80ppm, such as 20ppm, 30ppm, 40ppm, 45ppm, 50ppm, 60ppm, 70ppm or 80ppm.
  • the anode is selected from phosphor copper anodes.
  • the phosphorus content in the phosphor copper anode is 0.03-0.075 wt.%, such as 0.03 wt.%, 0.04 wt.%, 0.05 wt.%, 0.06 wt.% or 0.07 wt.%.
  • the electroplating temperature is 20-50°C, such as 20°C, 23°C, 25°C, 28°C, 30°C, 35°C, 40°C, 45°C or 50°C.
  • step (b) the electroplating is performed under constant temperature conditions.
  • the current density of the electroplating is 0.5-25 A/dm 2 such as 0.5A/dm 2 , 1A/dm 2 , 1.5A/dm 2 , 2A/dm 2 , 3A/dm 2 , 4A/dm 2 , 5A/dm 2 , 6A/dm 2 , 7A/dm 2 or 8A/dm 2 , 8.5A/dm 2 , 9A/dm 2 , 10A/dm 2 , 11A/dm 2 , 12A/dm 2 2 , 15A/dm 2 , 16A/dm 2 , 17A/dm 2 , 18A/dm 2 , 19A/dm 2 , 20A/dm 2 , 22A/dm 2 , 23A/dm 2 or 25A/dm 2 , etc.
  • A/dm 2 such as 0.5A/dm 2 , 1A/dm 2 , 1.5A/dm 2 , 2A/dm 2
  • the electroplating time is 20-1800min, such as 20min, 30min, 40min, 60min, 80min, 90min, 120min, 150min, 180min, 200min, 240min, 280min, 300min, 350min, 450min , 500min, 550min, 600min, 700min, 800min, 850min, 900min, 1000min, 11000min, 1200min, 1250min, 1300min, 1400min, 1500min, 1600min, 1700min or 1750min
  • stirring is also applied to the electroplating solution during the electroplating process described in step (b);
  • the agitation includes at least one of circulating jet flow, air agitation, magnetic agitation and mechanical agitation.
  • the temperature of the thermocompression bonding is 200-400°C.
  • the heating rate to the temperature of the thermocompression bonding is 0.5-20°C/min, such as 0.5°C/min, 1°C/min, 2°C/min, 3°C/min, 5°C/min, 8°C/min, 10°C/min, 12°C/min, 15°C/min, 17°C/min or 20°C/min, etc.
  • the applied pressure is 0.5-3MPa, such as 0.5MPa, 1MPa, 1.5MPa, 2MPa, 2.5MPa or 3MPa, etc.
  • the thermocompression bonding atmosphere is an inert atmosphere or a vacuum.
  • the gas in the inert atmosphere may be one or a mixture of nitrogen, helium, and argon.
  • thermocompression bonding time is 1-2 hours, such as 1 hour, 1.2 hours, 1.5 hours, 1.7 hours or 2 hours.
  • the present invention has the following beneficial effects:
  • the copper bonding points have a high proportion of annealing twins and exhibit "annealing strengthening" characteristics, that is, the strength and toughness of the interconnection material increase with the increase of the annealing temperature.
  • the increase is different from the "annealing softening" of the general microcrystalline structure of electroplated copper bumps, which improves the overall mechanical properties of the bonded interconnection structure.
  • the annealed twin layer also has the characteristics of high thermal stability. In the heat treatment temperature range commonly used in microelectronic interconnection (about 200 to 400 ° C), the proportion of annealed twin grain boundaries does not decrease but increases, and the grains grow without abnormality. . Therefore, the technical solution of the present invention can reduce the risk of failure of the bonding point during the bonding process or after multiple reflow and heat treatment processes, thereby enhancing the service reliability of the interconnection structure and devices.
  • the preparation method of the hybrid bonding structure of the present invention is based on copper bump electroplating filling and thermocompression bonding technology, and the mechanical properties of the copper bump interconnection structure are only enhanced through microscopic tissue engineering of electroplated copper materials, which has the advantages of easy operation and low cost.
  • the advantages of low cost and process compatibility are suitable for industrial promotion in the field of microelectronic packaging.
  • Fig. 1 is the flow chart of preparing hybrid bonding structure in one embodiment of the present invention
  • Fig. 2 is a flow chart of preparing a hybrid bonding structure in another embodiment of the present invention.
  • This embodiment provides a hybrid bonded structure and a preparation method thereof, as shown in Figure 1, the preparation method includes the following steps:
  • S1 Deposit an adhesion layer of titanium and a seed layer of copper on the upper surface of the first substrate 01 to form a composite layer 02 of the adhesion layer and the seed layer.
  • the thicknesses of the adhesion layer and the seed layer are 100nm and 400nm respectively.
  • S2 Spin-coat a layer of photoresist 03 with a thickness of 15 microns on the upper surface of the composite layer 02 of the adhesion layer and the seed layer, perform exposure and development, and pattern at a specific position on the first substrate 01 to expose the adhesion Composite layer 02 of layer and seed layer.
  • the DC electroplating process includes:
  • S5 Cover the upper surface of the first substrate 01 with a layer of polyimide dielectric layer 05 by spin coating, the thickness of the polyimide dielectric layer 05 is 20 microns, and then apply the polyimide dielectric layer 05 Semi-cured treatment.
  • S6 Use CMP to grind the upper surface of the polyimide dielectric layer 05 until the upper surface of the first copper bump 04 is exposed. Continue grinding to make the first copper bump 04 and the polyimide dielectric layer 05 coplanar and achieve a lower roughness. After the CMP is completed, plasma cleaning is performed on the upper surface of the first copper bump 04 and the polyimide dielectric layer 05, in order to clean and activate the bonding surface.
  • the parameters of the plasma cleaning are argon 70 sccm, oxygen 20 sccm, power 500W, and time 360s.
  • the bonding parameters are: a heating temperature of 300° C., an applied pressure of 1 MPa, and a heating time of 1 hour.
  • the bonding process is also a process of annealing the first copper bump 04 , so an annealing twin structure is formed in the first copper bump 04 after the bonding is completed.
  • the shear strength test and temperature cycle test are carried out on the bonding point.
  • the results show that the bonding point prepared according to this example has a shear strength of 38MPa, and the contact resistance increase rate is ⁇ 10% after 1000 cycles from -55°C to 70°C. .
  • This embodiment provides a hybrid bonded structure and a preparation method thereof, as shown in Figure 2, the preparation method includes the following steps:
  • S1 Prepare a first silicon substrate 07 with a TSV structure, the TSV has a diameter of 60 microns and a depth of 300 microns.
  • the TSV is filled with conductive metal 08, and the material is copper.
  • S2 spin-coat a layer of benzocyclobutene dielectric layer 09 on one side of the first silicon substrate 07, and the thickness of the benzocyclobutene dielectric layer 09 is 60 microns.
  • the electroplating process includes:
  • S6 Repeat steps S1 to S4 for the second silicon substrate 11 and the second silicon substrate 12 respectively, and then place the corresponding bonding positions of the first silicon substrate 07, the second silicon substrate 11 and the second silicon substrate 12 Alignment is performed, and bonding is performed in a nitrogen atmosphere.
  • the bonding parameters are as follows: the heating temperature is 200° C., the applied pressure is 2 MPa, and the heating time is 2 hours.
  • the shear strength test and temperature cycle test are carried out on the bonding point.
  • the results show that the bonding point prepared according to this example has a shear strength of 45MPa, and the contact resistance increase rate is ⁇ 10% after 1000 cycles from -55°C to 70°C. .
  • the difference between this embodiment and embodiment 1 is that the heating temperature in the bonding parameters is 400°C.
  • the proportion of annealing twins increases and the grains do not grow significantly, and the strength and toughness of the bumps are improved.
  • the shear strength test and temperature cycle test are carried out on the bonding point.
  • the results show that the bonding point prepared according to this example has a shear strength of 50 MPa, and the contact resistance increase rate is ⁇ 10% after 1000 cycles from -55°C to 70°C. .
  • the DC electroplating process in S3 includes:
  • the bonding point does not form an annealing twin structure.
  • the shear strength test and temperature cycle test were carried out on the bonding point.
  • the results showed that the bonding point prepared according to this comparative example had a shear strength of 22MPa, and the contact resistance increased by 10 ⁇ 20 after 1000 cycles from -55°C to 70°C. %.
  • the hybrid bonding structure provided by the present invention can effectively improve the bonding force between chips, and at the same time ensure better electrical connection, and the copper bonding point has excellent tissue thermal stability and mechanical properties (especially high-temperature mechanical properties ), which has high mechanical strength and toughness, which improves service reliability.
  • the use of the specific composition of the copper bonding points of the present invention avoids recrystallization of the copper bonding points during the thermocompression bonding process and subsequent processes such as reflow soldering or heat treatment, thereby solving the resulting insufficient mechanical strength , poor service reliability and other issues.
  • the present invention illustrates the detailed methods of the present invention through the above-mentioned examples, but the present invention is not limited to the above-mentioned detailed methods, that is, it does not mean that the present invention must rely on the above-mentioned detailed methods to be implemented.
  • Those skilled in the art should understand that any improvement of the present invention, the equivalent replacement of each raw material of the product of the present invention, the addition of auxiliary components, the selection of specific methods, etc., all fall within the scope of protection and disclosure of the present invention.

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Abstract

本发明公开了一种混合键合结构及其制备方法。所述混合键合结构包括相对设置的第一衬底和第二衬底，所述第一衬底和第二衬底上分别设置第一键合层和第二键合层，二者键合形成键合界面；第一键合层和/或所述第二键合层中设置有具有（110）晶面择优取向的铜键合点，所述铜键合点包括孪晶组织，孪晶组织包括孪晶片层，孪晶片层主要沿晶粒生长方向夹角45°分布；具有所述孪晶片层的晶粒在所述铜键合点的晶粒总数中的占比≥50%，和/或所述孪晶组织的体积占所述铜键合点总体积的比值≥50%。本发明的混合键合结构能够有效地提高芯片间的结合力，同时能保证较好的电气连接，而且铜键合点具有优异的组织热稳定性和力学性能，提升了服役可靠性。

Description

一种混合键合结构及其制备方法 技术领域
本发明涉及微电子封装和集成电路封装技术领域，具体涉及一种混合键合结构及其制备方法。
 背景技术
近年来，越来越多的微电子封装领域技术人员开始研究新兴的2.5D或3D封装技术，以应对电子产品小型化、高性能和高可靠性的要求。这项技术可以将两个或多个芯片或晶圆通过凸点键合的方式堆叠起来，实现了芯片的立体排布，从而显著减小了信号传输距离，实现了高速传输和低功耗。作为其中关键技术之一的键合技术，是保证芯片间具有可靠电气连接和机械支撑的根本。
常用的键合方法有氧化物键合、钎料键合、铜铜键合、有机聚合物键合以及混合键合。其中混合键合是在铜铜键合的同时，在凸点间的空隙由介电层进行填充并相互键合。相比于其他方法，混合键合有效地提高了芯片间的结合力，同时能保证较好的电气连接，因此具有较好的应用前景。但是，铜凸点在热压键合过程中以及后续制程如回流焊或热处理时容易发生再结晶，使得铜凸点的机械强度下降，从而增加了器件的失效风险。
 技术问题
针对现有技术中存在是上述问题，本发明的目的在于提供一种混合键合结构及其制备方法。
 技术解决方案
为达上述目的，本发明采用以下技术方案：
第一方面，本发明提供一种混合键合结构，所述混合键合结构包括相对设置的第一衬底和第二衬底，所述第一衬底上设置有第一键合层，所述第二衬底上设置有第二键合层，所述第一键合层与所述第二键合层键合形成键合界面；
所述第一键合层和/或所述第二键合层中设置有铜键合点，所述铜键合点具有（110）晶面择优取向，所述孪晶铜材料包括孪晶组织，所述孪晶组织包括孪晶片层，所述孪晶片层主要沿晶粒生长方向夹角45°分布；具有所述孪晶片层的晶粒在所述孪晶铜材料的晶粒总数中的占比≥50%，和/或所述孪晶组织的体积占所述孪晶铜材料总体积的比值≥50%。
本发明中，“所述孪晶片层主要沿晶粒生长方向夹角45°分布”中的“主要”指的是50%以上（例如52%、55%、60%、65%、70%、75%、80%、85%、90%、92%、95%、96%、98%、99%或100%等）的孪晶片层。其中的“夹角”指的是孪晶片层晶粒生长方向的锐角夹角。
本发明中，具有所述孪晶片层的晶粒在所述孪晶铜材料的晶粒总数中的占比例如可以是50%、55%、60%、65%、70%、75%、80%、85%、90%、95%、97%、98%或99%等。
本发明中，所述孪晶组织的体积占所述孪晶铜材料总体积的比值例如可以是50%、52%、55%、60%、63%、65%、70%、75%、80%、85%、88%、90%、95%、97%、98%或99%等。
本发明提供的混合键合结构能够有效地提高芯片间的结合力，同时能保证较好的电气连接，而且铜键合点具有优异的组织热稳定性和力学性能（尤其是高温力学性能），其具有高的机械强度和韧性，提升了服役可靠性。
本发明的特定组成的铜键合点的使用，避免了铜键合点在热压键合过程中以及后续制程如回流焊或热处理时发生再结晶，从而解决了由此导致的机械强度不足、服役可靠性差等问题。
以下作为本发明优选的技术方案，但不作为对本发明提供的技术方案的限制，通过以下优选的技术方案，可以更好的达到和实现本发明的技术目的和有益效果。
优选地，所述铜键合点的高度为0.5-500微米，例如0.5微米、0.8微米、1微米、2微米、3微米、5微米、8微米、10微米、15微米、20微米、25微米、30微米、35微米、40微米、45微米、50微米、55微米、60微米、65微米、70微米、80微米、90微米、100微米、115微米、130微米、140微米、150微米、160微米、180微米、200微米、220微米、240微米、265微米、280微米、300微米、320微米、340微米、350微米、375微米、385微米、400微米、405微米、420微米、450微米、470微米、480微米或490微米等，优选为30-300微米，在此窗口内电结晶微观组织均匀稳定，保障高比例退火孪晶产生。
本发明对第一衬底和第二衬底的材质不作具体限定，所述第一衬底和第二衬底的材质独立地包括硅、化合物、陶瓷或者玻璃。
作为本发明所述混合键合结构的优选技术方案，所述第一键合层包括介电层和间隔设置于所述介电层内的铜键合点，所述第一键合层的表面露出所述铜键合点用于键合。
优选地，所述第二键合层包括介电层和间隔设置于所述介电层内的铜键合点，所述第二键合层的表面铜露出所述凸点用于键合。
优选地，所述第一键合层中的介电层和所述第二键合层中的介电层的材质独立地选自有机聚合物或氧化物中的至少一种，优选包括苯并环丁烯、SU-8、聚酰亚胺或SiO 2中的至少一种。
第二方面，本发明提供一种如第一方面所述的混合键合结构的制备方法，所述方法包括以下步骤：
（1）提供第一衬底和第二衬底，在所述第一衬底上形成第一键合层，在所述第二衬底上形成第二键合层，所述第一键合层和/或所述第二键合层中设置铜凸点，所述铜凸点为具有（111）晶面择优取向的预电镀铜材料；
（2）将所述第一衬底和所述第二衬底相对设置，热压键合，第一键合层与所述第二键合层键合形成键合界面，得到所述的混合键合结构；
其中，所述热压键合的温度≥200℃。
本发明的方法中，第一衬底和第二衬底相对设置，指的是第一衬底上的第一键合层和第二衬底上的第二键合层相对设置。
在一个可选的实施方式中，第一键合层中的铜凸点与第二键合层中的铜凸点一一对应并接触。
本发明的方法中，热压键合的温度≥200℃，例如200℃、220℃、240℃、260℃、300℃、350℃、400℃或450℃等。在此温度下进行热压键合相当于进行退火处理，在该温度条件下退火处理的过程中可持续形成退火孪晶结构（也即孪晶组织）。
本发明的方法中，设置的铜凸点具有一定（111）晶面择优取向和平行于沉积方向的生长孪晶界，在经过热压键合（例如热压键合的温度为200℃）后可形成退火孪晶结构，得到铜键合点，铜键合点具有（110）晶面择优取向，其中的孪晶片层沿晶粒生长方向夹角45°分布，具有所述孪晶片层的晶粒在所述铜键合点的晶粒总数中的占比≥50%，和/或所述孪晶组织的体积占所述铜键合点总体积的比值≥50%。
本发明的方法中，经过热压键合处理，具有一定（111）晶面择优取向转变为具有（110）晶面择优取向的铜键合点，其具有优异的组织热稳定性，在微电子互连常用热处理温度范围内（约200到400℃），随着退火温度的提升，未见晶粒异常长大，晶粒内退火孪晶的比例增加，铜凸点的强度和韧性均有增强，从而区别于“退火软化韧化”的微米晶组织和生长孪晶组织凸点，表现出独特的“退火强化韧化”特性。
本发明的方法提高了键合后的铜凸点（也即铜键合点）的组织热稳定性和高温力学性能，使得混合键合结构的服役可靠性增加。
作为本发明所述方法的一个优选技术方案，步骤（1）中，按照下述方法制备第一衬底和/或第二衬底，所述方法包括以下步骤：
（i）制备具有导电层的衬底；
（ii）在衬底的导电层的表面利用光刻工艺进行图形化处理，导电层上形成光刻胶的图形，未设置光刻胶的部分暴露出导电层；
（iii）在未设置光刻胶的部分填充形成铜凸点；
（iv）去除多余的光刻胶和导电层；
（v）沉积介电层，并对晶圆表面进行化学机械抛光（CMP）处理，暴露出铜凸点。
其中，步骤（i）中的衬底为第一衬底或第二衬底。
本发明中，步骤（ii）所述光刻工艺是使用光刻胶通过曝光而形成图形，图形指的是覆盖光刻胶的区域，未覆盖光刻胶的区域后续用于填充形成铜凸点，例如可以通过电镀的方式形成具有（111）晶面择优取向的预电镀铜材料，作为铜凸点。
本发明中，步骤（v）对晶圆表面进行CMP处理的目的，一是研磨掉多余的介质层，露出铜凸点（例如铜柱）表面，另一个重要的作用是使键合表面完全共面，同时达到键合所需的粗糙度要求。
在一个可选的实施方式中，步骤（i）中的导电层可以为通过气相沉积得到的粘附层以及种子层；也可以为充满导电金属的通孔硅（TSV）顶部。示例性地，粘附层的材质可以为钽、钛或其氮化物中的至少一种。所述种子层的材质为铜。所述导电金属为铜。
在一个可选的实施方式中，TSV的形状为圆形，直径为15-100微米，例如15微米、20微米、30微米、40微米、50微米、60微米、70微米、80微米、90微米或100微米等。
在一个可选的实施方式中，每个衬底上含有1个及以上的独立TSV结构，所述TSV结构在衬底上以一定的顺序排列。
优选地，步骤（ii）形成的光刻胶的厚度为1-500微米，例如1微米、3微米、5微米、8微米、10微米、15微米、20微米、25微米、30微米、35微米、40微米、45微米、50微米、60微米、80微米、100微米、120微米、130微米、140微米、150微米、165微米、180微米、200微米、220微米、240微米、260微米、280微米、300微米、325微米、350微米、375微米、400微米、430微米、460微米或500微米等。
本发明对步骤（v）沉积介电层的方法不作具体限定，例如，所述介电层材质为苯并环丁烯(Benzocyclobutene，BCB)、SU-8、聚酰亚胺(Polyimide，PI)等，沉积方法为旋涂；又如，所述介电层为SiO 2，沉积方法为物理气相沉积。
优选地，所述介电层的厚度应略高于铜凸点（例如铜柱）。
在一个可选的实施方式中，步骤（v）中，在CMP处理后，对晶圆进行等离子清洗处理。通过等离子清洗处理，可以消除CMP产生的遗留物，同时可以活化键合表面，降低键合难度。
在一个可选的实施方式中，等离子清洗的参数为：氩气70-100sccm（例如70sccm、80sccm、85sccm、90sccm或100sccm等），氧气10-50sccm（例如10sccm、20sccm、30sccm、40sccm或50sccm等），功率500-800W（例如500W、550W、600W、650W、700W或800W等），时间60-600s（例如60s、80s、100s、125s、150s、160s、180s、200s、220s、260s、300s、320s、350s、400s、425s、450s、480s、500s、550s或600s等）。
作为本发明所述方法的一个优选技术方案，步骤（1）中，按照下述方法制备第一衬底和/或第二衬底，所述方法包括以下步骤：
（I）提供具有TSV结构的硅衬底，TSV中填充导电金属；
（II）在硅衬底的一面涂覆介电层，使用光刻工艺在具有TSV结构的位置进行开窗，暴露出导电金属；
（III）在暴露导电金属的位置填充形成铜凸点；
（IV）对晶圆表面进行CMP处理；
其中，步骤（I）中的硅衬底为第一衬底或第二衬底。
本发明步骤（II）中，使用光刻工艺进行开窗是现有技术，本领域技术人员可参照现有技术公开的内容进行光刻开窗。
本发明中，步骤（IV）对晶圆表面进行CMP处理，可以使铜凸点和介电层共面，并达到较低的粗糙度。
在一个可选的实施方式中，步骤（I）提供的具有TSV结构的硅衬底中，TSV的形状为圆形，直径为15-100微米，例如15微米、20微米、30微米、40微米、50微米、60微米、70微米、80微米、90微米或100微米等。
在一个可选的实施方式中，每个衬底上含有1个及以上的独立TSV结构，所述TSV结构在衬底上以一定的顺序排列。
在一个可选的实施方式中，导电金属为铜。
作为本发明所述方法的优选技术方案，采用直流电镀技术进行铜凸点的填充，步骤（1）所述预电镀铜材料通过电镀制备得到，所述电镀的方法包括以下步骤：
（a）配制镀液
所述镀液包含铜离子、硫酸、氯离子、添加剂和水，所述添加剂包括抑制剂和辅助剂，所述辅助剂选自有机磺酸盐中的至少一种；
（b）直流电镀
将阳极和作为导电基底的阴极浸入镀液中，电镀，得到预电镀铜材料。
此优选方案利用预电镀添加剂组合的化学调控，预电镀铜材料表现为一定（111）晶面择优取向且不形成高比例垂直于生长方向的生长孪晶，经过≥200℃热处理（例如退火1小时）后再转变为（110）晶面择优取向，并伴随高比例退火孪晶的形成，孪晶片层主要沿晶粒生长方向夹角45°分布。在常见热压键合的温度范围晶粒无异常长大，从而表现出优异的热稳定性。
该方法中，预电镀的添加剂组合对于预电镀材料的结构有重要影响：通过在镀液中添加抑制剂，能够降低沉积速率，避免结晶粗大不致密；通过在镀液中添加辅助剂，能提升沉积速率，通过辅助剂与抑制剂的竞争作用，实现双电层抑制剂的动态可控脱附，引入孵化退火孪晶界所必要的电结晶缺陷浓度。优选地，步骤（a）所述有机磺酸盐包括聚苯乙烯磺酸盐、聚乙烯磺酸盐、烷基磺酸盐和烷基苯磺酸盐中的至少一种。
优选地，所述聚苯乙烯磺酸盐和所述聚乙烯磺酸盐的分子量独立地为1000-100000，例如1000、3000、5000、8000、10000、12500、15000、17000、20000、25000、35000、40000、50000、60000、70000、80000或100000等。
优选地，所述烷基磺酸盐和烷基苯磺酸盐的碳原子数≥12，示例性地，碳原子数可以是12、13、14、15、16、17或20等。需要说明的是，烷基磺酸盐和烷基苯磺酸盐的碳原子数可以相同，也可以不同。
优选地，步骤（a）所述镀液中辅助剂的浓度为10-500ppm，例如10ppm、20ppm、30ppm、40ppm、50ppm、60ppm、70ppm、80ppm、100ppm、150ppm、200ppm、230ppm、260ppm、300ppm、350ppm、400ppm或500ppm等。
优选地，步骤（a）所述抑制剂为明胶。
优选地，所述明胶的凝结值为10-300bloom，例如10 bloom、20 bloom、30 bloom、50 bloom、70 bloom、80 bloom、100 bloom、125 bloom、150 bloom、180 bloom、200 bloom、225 bloom、240 bloom、260 bloom或300 bloom等。
优选地，步骤（a）所述镀液中抑制剂的浓度为5-200ppm，例如5ppm、10ppm、20ppm、30ppm、40ppm、50ppm、60ppm、70ppm、80ppm、100ppm、120ppm、150ppm、180ppm或200ppm等。
优选地，步骤（a）中，所述镀液中铜离子的浓度为20-70g/L，例如20 g/L、30g/L、40g/L、50g/L、60g/L或70g/L等。
优选地，步骤（a）中，所述镀液中硫酸的浓度为20-200g/L，例如20g/L、25g/L、30g/L、35g/L、40g/L、50g/L、60g/L、70g/L、80g/L、100g/L、120g/L、150g/L、160g/L、180g/L或200g/L等。
优选地，步骤（a）中，所述镀液中氯离子的浓度为20-80ppm，例如20ppm、30ppm、40ppm、45ppm、50ppm、60ppm、70ppm或80ppm等。
优选地，步骤（b）中，所述阳极选自磷铜阳极。
优选地，所述磷铜阳极中的磷含量为0.03-0.075 wt.%，例如0.03wt.%、0.04wt.%、0.05wt.%、0.06wt.%或0.07wt.%等。
优选地，步骤（b）中，所述电镀的温度为20-50℃，例如20℃、23℃、25℃、28℃、30℃、35℃、40℃、45℃或50℃等。
优选地，步骤（b）中，所述电镀在恒温条件下进行。
优选地，步骤（b）中，所述电镀的电流密度为0.5-25 A/dm 2例如0.5A/dm 2、1A/dm 2、1.5A/dm 2、2A/dm 2、3A/dm 2、4A/dm 2、5A/dm 2、6A/dm 2、7A/dm 2或8A/dm 2、8.5A/dm 2、9A/dm 2、10A/dm 2、11A/dm 2、12A/dm 2、15A/dm 2、16A/dm 2、17A/dm 2、18A/dm 2、19A/dm 2、20A/dm 2、22A/dm 2、23A/dm 2或25A/dm 2等。
优选地，步骤（b）中，所述电镀的时间为20-1800min，例如20 min、30min、40min、60min、80min、90min、120min、150min、180min、200min、240min、280min、300min、350min、450min、500min、550min、600min、700min、800min、850min、900min、1000min、11000min、1200min、1250min、1300min、1400min、1500min、1600min、1700min或1750min等。
优选地，步骤（b）所述电镀过程中还对电镀液施加搅拌；
优选地，所述搅拌包括循环喷流、空气搅拌、磁力搅拌和机械搅拌中的至少一种。
作为本发明所述制备方法的又一优选技术方案，所述热压键合的温度为200-400℃。
优选地，升温至所述热压键合的温度的升温速率为0.5-20℃/min，例如0.5℃/min、1℃/min、2℃/min、3℃/min、5℃/min、8℃/min、10℃/min、12℃/min、15℃/min、17℃/min或20℃/min等。
优选地，所述热压键合的过程中，施加的压强为0.5-3MPa，例如0.5MPa、1MPa、1.5MPa、2MPa、2.5MPa或3MPa等。
优选地，所述热压键合的气氛为惰性气氛或真空。示例性地，惰性气氛中的气体可以是氮气、氦气、氩气中的一种或多种的混合气。
优选地，所述热压键合时间为1-2小时，例如1小时、1.2小时、1.5小时、1.7小时或2小时等。
 有益效果
与已有技术相比，本发明具有如下有益效果：
（1）本发明提供的混合键合结构中，铜键合点具有高比例具有高比例退火孪晶而表现出“退火强化”特性，即互连材料的强度和韧性均随退火温度的升高而增大，与“退火软化”的一般微米晶组织的电镀铜凸点不同，提升了键合互连结构整体力学性能。同时，该退火孪晶片层还具有较高热稳定性的特点，在微电子互连常用热处理温度范围内（大约200至400℃），退火孪晶界比例不降反增，晶粒无异常长大。因此，本发明的技术方案可以降低键合点在键合过程中或多次回流及热处理工艺后的失效风险，从而增强互连结构和器件的服役可靠性。
（2）本发明的混合键合结构的制备方法基于铜凸点电镀填充和热压键合技术，仅通过电镀铜材料的微观组织工程增强铜凸点互连结构力学性能，具有操作容易、成本低廉、工艺兼容等优点，适用于在微电子封装领域产业化推广。
 附图说明
图1是本发明一个实施例中制备混合键合结构的流程图；
图2是本发明另一个实施例中制备混合键合结构的流程图；
其中，01-第一衬底，02-粘附层和种子层的复合层，03-光刻胶，04-第一铜凸点，05-聚酰亚胺介电层，06-第二衬底，07-第一硅衬底，08-导电金属，09-苯并环丁烯介电层，10-第二铜凸点，11-第二硅衬底，12-第二硅衬底。
 本发明的实施方式
下面结合附图并通过具体实施方式来进一步说明本发明的技术方案。
实施例1
本实施例提供了一种混合键合结构及其制备方法，如图1所示，所述制备方法包括以下步骤：
S1：在第一衬底01的上表面沉积粘附层钛和种子层铜，形成粘附层和种子成的复合层02，粘附层和种子层的厚度分别为100nm和400nm。
S2：在粘附层和种子层的复合层02的上表面旋涂一层厚度为15微米的光刻胶03，进行曝光显影在第一衬底01的特定位置进行图形化，暴露出粘附层和种子层的复合层02。
S3：使用直流电镀工艺进行第一铜凸点04的填充，第一铜凸点04的镀层高度为15微米；
其中，直流电镀工艺包括：
（a）镀液配制
采用如下组分比例配制电镀液并分散均匀：铜离子30 g/L，硫酸50 g/L，氯离子30 ppm，明胶100ppm（凝结值为200 bloom），聚乙烯磺酸钠（分子量50000）100ppm以及水。
（b）直流电镀
在镀液中浸入钛板阴极、高纯磷铜阳极(磷含量0.04 wt.%)，控制镀液25℃恒温。然后接入整流器，以3 A/dm 2电流密度施镀。
S4：使用去胶液将光刻胶03去除，并使用湿法刻蚀的方法将粘附层和种子层的复合层02去除。
S5：使用旋涂的方法在第一衬底01的上表面覆盖一层聚酰亚胺介电层05，聚酰亚胺介电层05的厚度20微米，然后对聚酰亚胺介电层05进行半固化处理。
S6：使用CMP对聚酰亚胺介电层05上表面进行研磨，直至暴露出第一铜凸点04的上表面。继续研磨使得第一铜凸点04和聚酰亚胺介电层05共面并达到较低的粗糙度。CMP完毕后对第一铜凸点04和聚酰亚胺介电层05上表面进行等离子清洗，目的是清洁并活化键合表面。等离子清洗的参数为氩气70sccm，氧气20sccm，功率500W，时间360s。
S7：在第二衬底06的上表面重复上述步骤，然后将第二衬底06与第一衬底01相应键合位置对准，在氮气气氛中进行铜凸点间的键合和介电层间的粘附。键合参数为：加热温度300℃，施加的压强1MPa，加热时间为1小时。键合的过程也是对第一铜凸点04进行退火的过程，因此在键合完毕后第一铜凸点04内形成退火孪晶组织。
工艺实施完毕后对键合点进行剪切强度测试以及温循测试，结果显示依据本实施例制备的键合点剪切强度为38MPa，-55℃至70℃循环1000次后接触电阻增加率<10%。
实施例2
本实施例提供了一种混合键合结构及其制备方法，如图2所示，所述制备方法包括以下步骤：
S1：准备一个具有TSV结构的第一硅衬底07，TSV的直径为60微米，深度300微米。TSV中填充了导电金属08，材质为铜。
S2：在第一硅衬底07的一面旋涂一层苯并环丁烯介电层09，苯并环丁烯介电层09的厚度60微米。使用光刻技术在具有TSV结构的位置进行开窗，暴露出导电金属08的表面。
S3：在导电金属08的表面电镀第二铜凸点10，使得第二铜凸点10的镀层高度为60微米；
其中，电镀的工艺包括：
（a）镀液配制
采用如下组分比例配制电镀液并分散均匀：铜离子50 g/L，硫酸150 g/L，氯离子70 ppm，明胶20ppm（凝结值为100 bloom），聚苯乙烯磺酸钠（分子量40000）300ppm以及水。
（b）直流电镀
在镀液中浸入钛板阴极、高纯磷铜阳极(磷含量0.07 wt.%)，控制镀液25℃恒温。然后接入整流器，以6A/dm 2电流密度施镀。
S4：由于第一硅衬底07表面没有多余的光刻胶和导电层，因此直接对第二铜凸点10和苯并环丁烯介电层09上表面进行CMP处理，使得第二铜凸点10和苯并环丁烯介电层09共面并达到较低的粗糙度。CMP完毕后对第二铜凸点10和苯并环丁烯介电层09上表面进行等离子清洗，参数为氩气60sccm，氧气30sccm，功率700W，时间180s。
S5：对第一硅衬底07的另一个表面重复进行上述步骤，得到上下对称的结构。
S6：对第二硅衬底11和第二硅衬底12分别重复步骤S1~S4，然后将第一硅衬底07、第二硅衬底11和第二硅衬底12的相应键合位置进行对准，在氮气气氛中进行键合。键合参数为：加热温度为200℃，施加的压强为2MPa，加热时间为2小时。
工艺实施完毕后对键合点进行剪切强度测试以及温循测试，结果显示依据本实施例制备的键合点剪切强度为45MPa，-55℃至70℃循环1000次后接触电阻增加率<10%。
实施例3
本实施例与实施例1的区别在于，键合参数中的加热温度为400℃。
随着退火温度的提升，退火孪晶比例提升且晶粒未见明显长大，凸点的强度和韧性均有所提升。
工艺实施完毕后对键合点进行剪切强度测试以及温循测试，结果显示依据本实施例制备的键合点剪切强度为50MPa，-55℃至70℃循环1000次后接触电阻增加率<10%。
对比例1
本对比例与实施例1的S1~S2和S4~S7步骤一致，区别在于：
1. S3中直流电镀工艺包括：
（a）镀液配制
采用如下组分比例配制电镀液并分散均匀：铜离子50g/L，硫酸100 g/L，氯离子50ppm，二硫二丙烷磺酸钠10ppm，聚乙二醇200ppm，健那绿20ppm以及水。
（b）直流电镀
在镀液中浸入钛板阴极、高纯磷铜阳极(磷含量0.04 wt.%)，控制镀液25℃恒温。然后接入整流器，以3 A/dm 2电流密度施镀。
2. 在S7中键合点并不会形成退火孪晶组织。
工艺实施完毕后对键合点进行剪切强度测试以及温循测试，结果显示依据本对比例制备的键合点剪切强度为22MPa，-55℃至70℃循环1000次后接触电阻增加了10~20%。
综上，本发明提供的混合键合结构能够有效地提高芯片间的结合力，同时能保证较好的电气连接，而且铜键合点具有优异的组织热稳定性和力学性能（尤其是高温力学性能），其具有高的机械强度和韧性，提升了服役可靠性。
本发明的本发明的特定组成的铜键合点的使用，避免了铜键合点在热压键合过程中以及后续制程如回流焊或热处理时发生再结晶，从而解决了由此导致的机械强度不足、服役可靠性差等问题。
以上所述仅为本发明的较佳实施例，并不用于限制本发明，凡在本发明的精神和原则之内，所做的任何修改、改进等，均应包含在本发明的保护之内。
申请人声明，本发明通过上述实施例来说明本发明的详细方法，但本发明并不局限于上述详细方法，即不意味着本发明必须依赖上述详细方法才能实施。所属技术领域的技术人员应该明了，对本发明的任何改进，对本发明产品各原料的等效替换及辅助成分的添加、具体方式的选择等，均落在本发明的保护范围和公开范围之内。

Claims (10)

  1. 一种混合键合结构，其特征在于，所述混合键合结构包括相对设置的第一衬底和第二衬底，所述第一衬底上设置有第一键合层，所述第二衬底上设置有第二键合层，所述第一键合层与所述第二键合层键合形成键合界面；
    所述第一键合层和/或所述第二键合层中设置有铜键合点，所述铜键合点具有（110）晶面择优取向，所述铜键合点包括孪晶组织，所述孪晶组织包括孪晶片层，所述孪晶片层主要沿晶粒生长方向夹角45°分布；具有所述孪晶片层的晶粒在所述铜键合点的晶粒总数中的占比≥50%，和/或所述孪晶组织的体积占所述铜键合点总体积的比值≥50%。
  2. 根据权利要求1所述的混合键合结构，其特征在于，所述铜键合点的高度为0.5-500微米，优选为30-300微米。
  3. 根据权利要求1或2所述的混合键合结构，其特征在于，所述第一衬底和第二衬底的材质独立地包括硅、化合物、陶瓷或者玻璃。
  4. 根据权利要求1-3任一项所述的混合键合结构，其特征在于，所述第一键合层包括介电层和间隔设置于所述介电层内的铜键合点，所述第一键合层的表面露出所述铜键合点用于键合；
    优选地，所述第二键合层包括介电层和间隔设置于所述介电层内的铜键合点，所述第二键合层的表面铜露出所述凸点用于键合。
  5. 根据权利要求1-4任一项所述的混合键合结构，其特征在于，所述第一键合层中的介电层和所述第二键合层中的介电层的材质独立地选自有机聚合物或氧化物中的至少一种，优选包括苯并环丁烯、SU-8、聚酰亚胺或SiO 2中的至少一种。
  6. 一种根据权利要求1-5任一项所述的混合键合结构的制备方法，其特征在于，所述方法包括以下步骤：
    （1）提供第一衬底和第二衬底，在所述第一衬底上形成第一键合层，在所述第二衬底上形成第二键合层，所述第一键合层和/或所述第二键合层中设置铜凸点，所述铜凸点为具有（111）晶面择优取向的预电镀铜材料；
    （2）将所述第一衬底和所述第二衬底相对设置，热压键合，第一键合层与所述第二键合层键合形成键合界面，得到所述的混合键合结构；
    其中，所述热压键合的温度≥200℃。
  7. 根据权利要求6所述的制备方法，其特征在于，步骤（1）所述预电镀铜材料通过电镀制备得到，所述电镀的方法包括以下步骤：
    （a）配制镀液
    所述镀液包含铜离子、硫酸、氯离子、添加剂和水，所述添加剂包括抑制剂和辅助剂，所述辅助剂选自有机磺酸盐中的至少一种；
    （b）直流电镀
    将阳极和作为导电基底的阴极浸入镀液中，电镀，得到预电镀铜材料。
  8. 根据权利要求7所述的制备方法，其特征在于，步骤（a）所述有机磺酸盐包括聚苯乙烯磺酸盐、聚乙烯磺酸盐、烷基磺酸盐和烷基苯磺酸盐中的至少一种；
    优选地，所述聚苯乙烯磺酸盐和所述聚乙烯磺酸盐的分子量独立地为1000-100000；
    优选地，所述烷基磺酸盐和烷基苯磺酸盐的碳原子数≥12；
    优选地，步骤（a）所述镀液中辅助剂的浓度为10-500ppm；
    优选地，步骤（a）所述抑制剂为明胶；
    优选地，所述明胶的凝结值为10-300bloom；
    优选地，步骤（a）所述镀液中抑制剂的浓度为5-200ppm。
    优选地，步骤（a）中，所述镀液中铜离子的浓度为20-70g/L；
    优选地，步骤（a）中，所述镀液中硫酸的浓度为20-200g/L；
    优选地，步骤（a）中，所述镀液中氯离子的浓度为20-80ppm。
  9. 根据权利要求6-8任一项所述的制备方法，其特征在于，
    步骤（b）中，所述阳极选自磷铜阳极；
    优选地，所述磷铜阳极中的磷含量为0.03-0.075 wt.%；
    优选地，步骤（b）中，所述电镀的温度为20-50℃；
    优选地，步骤（b）中，所述电镀在恒温条件下进行；
    优选地，步骤（b）中，所述电镀的电流密度为0.5-25 A/dm 2；
    优选地，步骤（b）中，所述电镀的时间为20-1800min；
    优选地，步骤（b）所述电镀过程中还对电镀液施加搅拌；
    优选地，所述搅拌包括循环喷流、空气搅拌、磁力搅拌和机械搅拌中的至少一种。
  10. 根据权利要求6-9任一项所述的制备方法，其特征在于，所述热压键合的温度为200-400℃；
    优选地，升温至所述热压键合的温度的升温速率为0.5-20℃/min；
    优选地，所述热压键合的过程中，施加的压强为0.5-3MPa；
    优选地，所述热压键合的气氛为惰性气氛或真空；
    优选地，所述热压键合时间为1-2小时。
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