WO2023095798A1 - プリント配線板 - Google Patents

プリント配線板 Download PDF

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Publication number
WO2023095798A1
WO2023095798A1 PCT/JP2022/043215 JP2022043215W WO2023095798A1 WO 2023095798 A1 WO2023095798 A1 WO 2023095798A1 JP 2022043215 W JP2022043215 W JP 2022043215W WO 2023095798 A1 WO2023095798 A1 WO 2023095798A1
Authority
WO
WIPO (PCT)
Prior art keywords
holes
ground pattern
pattern
wiring board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/043215
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
俊 五十嵐
一郎 桑山
傑 山岸
宏 上田
聡志 木谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Original Assignee
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd, Sumitomo Electric Printed Circuits Inc filed Critical Sumitomo Electric Industries Ltd
Priority to US18/711,599 priority Critical patent/US20250031299A1/en
Priority to DE112022005576.6T priority patent/DE112022005576T5/de
Priority to JP2023563704A priority patent/JPWO2023095798A1/ja
Priority to CN202280077682.9A priority patent/CN118451790A/zh
Publication of WO2023095798A1 publication Critical patent/WO2023095798A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0228Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09236Parallel layout
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09618Via fence, i.e. one-dimensional array of vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09636Details of adjacent, not connected vias

Definitions

  • Patent Document 1 A wiring board is described in Japanese Patent Application Laid-Open No. 2006-24618 (Patent Document 1).
  • the wiring board described in Patent Document 1 includes a first dielectric layer, a first wiring pattern, a second wiring pattern and a coplanar ground pattern, a second dielectric layer, a first ground pattern and a second ground pattern. , and a conductor layer.
  • the first dielectric layer has a first principal surface and a second principal surface opposite to the first principal surface.
  • the first wiring pattern, the second wiring pattern and the coplanar ground pattern are arranged on the second main surface.
  • the first wiring pattern, the second wiring pattern and the coplanar ground pattern extend along the first direction.
  • the coplanar ground pattern is arranged between the first wiring pattern and the second wiring pattern in a second direction orthogonal to the first direction.
  • the second dielectric layer is arranged on the second main surface so as to cover the first wiring pattern, the second wiring pattern and the coplanar ground pattern.
  • the second dielectric layer has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface.
  • the first ground pattern and the second ground pattern are arranged on the first main surface and the fourth main surface, respectively.
  • a plurality of through holes are formed in the wiring board described in Patent Document 1.
  • the plurality of through holes are arranged along the first direction in plan view.
  • the through hole penetrates the first dielectric layer, the second dielectric layer and the coplanar ground pattern.
  • the through hole is circular in plan view.
  • the through hole is filled with a conductor layer.
  • the conductor layer electrically connects the coplanar ground pattern to the first ground pattern and the second ground pattern. In the wiring board described in Patent Document 1, crosstalk between the first wiring pattern and the second wiring pattern is suppressed by the conductor layer.
  • a printed wiring board of the present disclosure includes a first insulating layer having a first main surface and a second main surface opposite to the first main surface; A first wiring pattern, a second wiring pattern, and a first ground pattern extending along one direction, and a second ground pattern, the first wiring pattern, and the second wiring, which are arranged on the first main surface.
  • the first ground pattern is between the first wiring pattern and the second wiring pattern in a second direction orthogonal to the first direction and is separated from the first wiring pattern and the second wiring pattern.
  • the ground pattern penetrates the first insulating layer and the second ground pattern in a thickness direction perpendicular to the first direction and the second direction, and is the same as the first ground pattern in plan view.
  • a plurality of overlapping first through holes are formed. The plurality of first through-holes are arranged at intervals so as to form a row along the first direction.
  • a plurality of third ground patterns that penetrate the adhesive layer, the second insulating layer and the third ground pattern in the thickness direction and overlap the first ground pattern in a plan view.
  • 2 through holes are formed.
  • the plurality of second through-holes are arranged at intervals so as to form a row along the first direction.
  • the first conductor layer is arranged on the inner wall surface of each of the plurality of first through holes and electrically connected to the first ground pattern and the second ground pattern.
  • the second conductor layer is arranged on the inner wall surface of each of the plurality of second through holes and electrically connected to the first ground pattern and the third ground pattern.
  • Each of the plurality of first through holes and each of the plurality of second through holes has a width in the first direction greater than the width in the second direction.
  • FIG. 1 is a plan view of a printed wiring board 100.
  • FIG. FIG. 2 is a cross-sectional view along II-II in FIG. 3A to 3C are process diagrams showing a method for manufacturing printed wiring board 100.
  • FIG. 4 is a cross-sectional view for explaining the preparation step S1.
  • FIG. 5 is a cross-sectional view for explaining the patterning step S2.
  • FIG. 6 is a cross-sectional view for explaining the bonding step S3.
  • FIG. 7 is a cross-sectional view for explaining the through-hole forming step S4.
  • FIG. 8 is a plan view of printed wiring board 200 .
  • 9 is a cross-sectional view taken along line IX-IX in FIG. 8.
  • FIG. 10 is a plan view of printed wiring board 100A.
  • 11 is a cross-sectional view along XI-XI in FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 10.
  • FIG. 13 is a plan view of printed wiring board 100B.
  • FIG. 14 is a bottom view of printed wiring board 100B.
  • FIG. 15 is a plan view of printed wiring board 100C.
  • FIG. 16 is a bottom view of printed wiring board 100C.
  • FIG. 17 is a plan view of printed wiring board 100D.
  • 18 is a cross-sectional view taken along line XVIII-XVIII of FIG. 17.
  • FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 17.
  • FIG. 20 is a plan view of a printed wiring board (100D) according to a modification.
  • FIG. 21 is a plan view of printed wiring board 100E.
  • 22 is a cross-sectional view along XXII-XXII in FIG. 21.
  • FIG. 23 is a cross-sectional view along XXIII-XXIII of FIG. 21.
  • FIG. 24 is a plan view of printed wiring board 100F.
  • 25 is a cross-sectional view along XXV-XXV of FIG. 24.
  • FIG. 26 is a cross-sectional view along XXVI-XXVI in FIG. 24.
  • the present disclosure has been made in view of the problems of the prior art as described above. More specifically, the present disclosure provides a printed wiring board capable of suppressing crosstalk between the first wiring pattern and the second wiring pattern.
  • a printed wiring board includes a first insulating layer having a first main surface and a second main surface opposite to the first main surface, a first insulating layer disposed on the second main surface, and , a first wiring pattern, a second wiring pattern, and a first ground pattern extending along the first direction in plan view, a second ground pattern disposed on the first main surface, and the first wiring An adhesive layer arranged on the second main surface so as to cover the pattern, the second wiring pattern and the first ground pattern, and a third main surface arranged on the adhesive layer and facing the adhesive layer.
  • the first ground pattern is between the first wiring pattern and the second wiring pattern in a second direction orthogonal to the first direction and is separated from the first wiring pattern and the second wiring pattern.
  • the ground pattern penetrates the first insulating layer and the second ground pattern in a thickness direction perpendicular to the first direction and the second direction, and is the same as the first ground pattern in plan view.
  • a plurality of overlapping first through holes are formed. The plurality of first through-holes are arranged at intervals so as to form a row along the first direction.
  • a plurality of third ground patterns that penetrate the adhesive layer, the second insulating layer and the third ground pattern in the thickness direction and overlap the first ground pattern in a plan view.
  • 2 through holes are formed.
  • the plurality of second through-holes are arranged at intervals so as to form a row along the first direction.
  • the first conductor layer is arranged on the inner wall surface of each of the plurality of first through holes and electrically connected to the first ground pattern and the second ground pattern.
  • the second conductor layer is arranged on the inner wall surface of each of the plurality of second through holes and electrically connected to the first ground pattern and the third ground pattern.
  • Each of the plurality of first through holes and each of the plurality of second through holes has a width in the first direction greater than the width in the second direction.
  • each of the plurality of first through holes and each of the plurality of second through holes may extend along the first direction in plan view.
  • the first insulating layer and the second ground pattern penetrate through the first insulating layer and the second ground pattern in the thickness direction, and the first ground pattern in plan view
  • a plurality of third through-holes may be further formed to overlap with each other.
  • the plurality of third through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of first through holes and the second wiring pattern.
  • the adhesive layer, the second insulating layer and the third ground pattern there are provided a plurality of third ground patterns that penetrate the adhesive layer, the second insulating layer and the third ground pattern in the thickness direction and overlap the first ground pattern in a plan view. 4 through holes may be further formed.
  • the plurality of fourth through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of second through holes and the second wiring pattern.
  • Each of the plurality of third through holes may be displaced from each of the plurality of first through holes in the first direction.
  • Each of the plurality of fourth through holes may be displaced from each of the plurality of second through holes in the first direction.
  • the first conductor layer may be further arranged on the inner wall surface of each of the plurality of third through holes and electrically connected to the first ground pattern and the second ground pattern.
  • the second conductor layer may be further arranged on the inner wall surface of each of the plurality of fourth through holes and electrically connected to the first ground pattern and the third ground pattern.
  • Each of the plurality of third through holes and each of the plurality of fourth through holes may have a width in the first direction greater than a width in the second direction.
  • each of the plurality of first through holes, each of the plurality of second through holes, each of the plurality of third through holes, and each of the plurality of fourth through holes In plan view, it may extend along the first direction.
  • each of the plurality of first through holes, each of the plurality of second through holes, each of the plurality of third through holes, and each of the plurality of fourth through holes In plan view, it may have a first portion extending along the first direction and a second portion connected to a central portion of the first portion in the first direction.
  • the second portion In each of the plurality of first through holes and each of the plurality of second through holes, the second portion extends from the first portion along the direction from the first wiring pattern side to the second wiring pattern side.
  • the second portion extends from the first portion along the direction from the second wiring pattern side to the first wiring pattern side.
  • each of the plurality of first through holes, each of the plurality of second through holes, each of the plurality of third through holes, and each of the plurality of fourth through holes Planar view WHEREIN: You may have the 3rd part and 4th part which extend linearly.
  • One end of the third portion and one end of the fourth portion may be connected to each other.
  • the one end of the third portion may be located on the one side in the first direction with respect to the other end of the third portion.
  • the one end of the fourth portion may be on the other side in the first direction than the other end of the fourth portion.
  • the other end of the third portion and the other end of the fourth portion are located further than the one end of the third portion and the one end of the fourth portion, respectively. It may be on the second wiring pattern side.
  • the other end of the third portion and the other end of the fourth portion are positioned further than the one end of the third portion and the one end of the fourth portion, respectively. It may be on the side of the first wiring pattern.
  • each of the plurality of first through holes and each of the plurality of second through holes may extend along the first direction in plan view.
  • a position in the second direction of each of the plurality of first through holes may overlap a position in the second direction of each of the plurality of second through holes.
  • Each of the plurality of first through holes may be between two of the plurality of adjacent second through holes in the first direction.
  • the first insulating layer and the second ground pattern penetrate through the first insulating layer and the second ground pattern in the thickness direction, and the first ground pattern in plan view
  • a plurality of third through-holes may be further formed to overlap with each other.
  • the plurality of third through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of first through holes and the second wiring pattern.
  • the adhesive layer, the second insulating layer, and the third ground pattern have a plurality of fourth through holes that penetrate the second insulating layer and the adhesive layer in the thickness direction and overlap the first ground pattern in plan view. Further, it may be formed.
  • the plurality of fourth through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of second through holes and the second wiring pattern.
  • Each of the plurality of third through holes and each of the plurality of fourth through holes may extend along the first direction in plan view.
  • a position in the second direction of each of the plurality of third through holes may overlap a position in the second direction of each of the plurality of fourth through holes.
  • Each of the plurality of third through holes may be between two of the plurality of adjacent fourth through holes in the first direction.
  • the first conductor layer may be further arranged on the inner wall surface of each of the plurality of third through holes and electrically connected to the first ground pattern and the second ground pattern.
  • the second conductor layer may be further arranged on the inner wall surface of each of the plurality of fourth through holes and electrically connected to the first ground pattern and the third ground pattern.
  • the first ground pattern exposed from the first through hole, the first ground pattern exposed from the second through hole, and the first ground pattern exposed from the third through hole Damage to the first ground pattern exposed from the ground pattern and the fourth through hole can be suppressed.
  • each of the plurality of third through holes may be displaced from each of the plurality of first through holes in the first direction.
  • Each of the plurality of fourth through holes may be displaced from each of the plurality of second through holes in the first direction.
  • each of the plurality of first through holes and each of the plurality of second through holes may extend along the first direction in plan view.
  • a position of each of the plurality of first through holes may overlap a position of each of the plurality of second through holes in the first direction and the second direction.
  • the length in the first direction of each of the plurality of first through holes may be greater than the length in the first direction of the plurality of second through holes.
  • the first insulating layer and the second ground pattern penetrate through the first insulating layer and the second ground pattern in the thickness direction, and in plan view, the first ground pattern
  • a plurality of overlapping third through holes may be further formed.
  • the plurality of third through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of first through holes and the second wiring pattern.
  • the plurality of fourth through holes may be arranged at intervals so as to form a row along the first direction between the row of the plurality of second through holes and the second wiring pattern.
  • Each of the plurality of third through holes and each of the plurality of fourth through holes may extend along the first direction in plan view.
  • a position of each of the plurality of third through holes may overlap a position of each of the plurality of fourth through holes in the first direction and the second direction.
  • a length in the first direction of each of the plurality of fourth through holes may be greater than a length in the first direction of the plurality of third through holes.
  • the first conductor layer may be further arranged on the inner wall surface of each of the plurality of third through holes and electrically connected to the first ground pattern and the second ground pattern.
  • the second conductor layer may be further arranged on the inner wall surface of each of the plurality of fourth through holes and electrically connected to the first ground pattern and the third ground pattern.
  • the first ground pattern exposed from the first through hole and the second through hole and the first ground pattern exposed from the third through hole and the fourth through hole are damaged. can be suppressed.
  • a printed wiring board according to the first embodiment will be described.
  • the printed wiring board according to the first embodiment is referred to as printed wiring board 100 .
  • FIG. 1 is a plan view of the printed wiring board 100.
  • FIG. FIG. 2 is a cross-sectional view along II-II in FIG.
  • printed wiring board 100 includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22 and first ground pattern 23, and second ground pattern 30. , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the first insulating layer 10 is made of an electrically insulating material.
  • the first insulating layer 10 is made of, for example, polyimide, fluorine resin, or the like.
  • the first insulating layer 10 has a first major surface 10a and a second major surface 10b.
  • the first main surface 10a and the second main surface 10b are end surfaces in the thickness direction of the first insulating layer 10 .
  • the second principal surface 10b is the opposite surface of the first principal surface 10a.
  • the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 are arranged on the second main surface 10b.
  • the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 are made of an electrically conductive material.
  • the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 are made of copper, for example.
  • the first wiring pattern 21, the second wiring pattern 22, and the first ground pattern 23 extend along the first direction DR1 in plan view.
  • the first ground pattern 23 is between the first wiring pattern 21 and the second wiring pattern 22 and is separated from the first wiring pattern 21 and the second wiring pattern 22 in the second direction DR2.
  • the second direction DR2 is a direction orthogonal to the first direction DR1.
  • the width of the first ground pattern 23 in the second direction DR2 is preferably larger than the width of the first wiring pattern 21 in the second direction DR2 and the width of the second wiring pattern 22 in the second direction DR2.
  • the second ground pattern 30 is made of an electrically conductive material.
  • the second ground pattern 30 is made of copper, for example.
  • the second ground pattern 30 is arranged on the first main surface 10a.
  • the second ground pattern 30 overlaps the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 in plan view.
  • the second ground pattern 30 preferably covers the entire first main surface 10a.
  • the adhesive layer 40 is made of, for example, a thermosetting resin material such as epoxy resin.
  • the adhesive layer 40 is arranged on the second main surface 10 b so as to cover the first wiring pattern 21 , the second wiring pattern 22 and the first ground pattern 23 .
  • the second insulating layer 50 is made of an electrically insulating material.
  • the second insulating layer 50 is made of, for example, polyimide, fluorine resin, or the like.
  • the second insulating layer 50 is preferably made of the same material as the first insulating layer 10 .
  • the second insulating layer 50 has a third main surface 50a and a fourth main surface 50b.
  • the third main surface 50a and the fourth main surface 50b are end surfaces in the thickness direction of the second insulating layer 50 .
  • the third main surface 50a faces the adhesive layer 40 side.
  • the fourth principal surface 50b is the opposite surface of the third principal surface 50a.
  • the third ground pattern 60 is made of an electrically conductive material.
  • the third ground pattern 60 is made of copper, for example.
  • the third ground pattern 60 is arranged on the fourth main surface 50b.
  • the third ground pattern 60 overlaps the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 in plan view.
  • the third ground pattern 60 preferably covers the entire fourth main surface 50b.
  • the first insulating layer 10 and the second ground pattern 30 are formed with a plurality of first through holes 10c.
  • the first through hole 10c penetrates the first insulating layer 10 and the second ground pattern 30 in the thickness direction DR3.
  • a thickness direction DR3 is a direction orthogonal to the first direction DR1 and the second direction DR2.
  • the plurality of first through holes 10c are arranged in a row along the first direction DR1 at intervals in plan view.
  • the interval between the first through holes 10c adjacent in the first direction DR1 is constant, for example.
  • the first through hole 10c overlaps the first ground pattern 23 in plan view. That is, the first ground pattern 23 is exposed from the first through hole 10c.
  • the width of the first through hole 10c in the first direction DR1 is greater than the width of the first through hole 10c in the second direction DR2.
  • the first through hole 10c extends, for example, along the first direction DR1.
  • the first through hole 10c preferably has an oval shape whose longitudinal direction is along the first direction DR1 in plan view.
  • a plurality of second through holes 50 c are formed in the adhesive layer 40 , the second insulating layer 50 and the third ground pattern 60 .
  • the second through hole 50c penetrates the adhesive layer 40, the second insulating layer 50 and the third ground pattern 60 in the thickness direction DR3.
  • the plurality of second through holes 50c are arranged in a row along the first direction DR1 at intervals in plan view.
  • the interval between the second through holes 50c adjacent in the first direction DR1 is constant, for example.
  • the second through hole 50c overlaps the first ground pattern 23 in plan view. That is, the first ground pattern 23 is exposed from the second through hole 50c.
  • the width of the second through hole 50c in the first direction DR1 is greater than the width of the second through hole 50c in the second direction DR2.
  • the second through hole 50c extends, for example, along the first direction DR1.
  • the second through hole 50c preferably has an oval shape whose longitudinal direction is along the first direction DR1 in plan view.
  • the width of the first through hole 10c in the first direction DR1 is equal to the width of the second through hole 50c in the first direction DR1
  • the width of the first through hole 10c in the second direction DR2 is the second direction of the second through hole 50c. Equal to the width in DR2.
  • the position in the first direction DR1 and the position in the second direction DR2 of the first through hole 10c overlap the position in the first direction DR1 and the position in the second direction DR2 of the second through hole 50c, respectively.
  • the first conductor layer 70 is, for example, a layer formed by plating.
  • the first conductor layer 70 is made of copper, for example.
  • the first conductor layer 70 is arranged on the inner wall surface of the first through hole 10c.
  • the first conductor layer 70 may also be arranged on the first ground pattern 23 exposed from the first through hole 10c.
  • the first ground pattern 23 exposed from the first through hole 10 c is electrically connected to the second ground pattern 30 by the first conductor layer 70 .
  • the second conductor layer 80 is, for example, a layer formed by plating.
  • the second conductor layer 80 is made of copper, for example.
  • the second conductor layer 80 is arranged on the inner wall surface of the second through hole 50c.
  • the second conductor layer 80 may also be arranged on the first ground pattern 23 exposed from the second through hole 50c.
  • the first ground pattern 23 exposed from the second through hole 50 c is electrically connected to the third ground pattern 60 by the second conductor layer 80 .
  • FIG. 3 is a process diagram showing a method for manufacturing the printed wiring board 100.
  • the method for manufacturing printed wiring board 100 includes preparation step S1, patterning step S2, bonding step S3, through-hole forming step S4, and plating step S5. .
  • FIG. 4 is a cross-sectional view explaining the preparation step S1.
  • the first insulating layer 10 is prepared in the preparation step S1.
  • a copper foil 31 and a copper foil 24 are respectively arranged on the first main surface 10a and the second main surface 10b of the first insulating layer 10 prepared in the preparation step S1. Note that the copper foil 31 becomes the second ground pattern 30 .
  • FIG. 5 is a cross-sectional view explaining the patterning step S2. As shown in FIG. 5, in the patterning step S2, the copper foil 24 is patterned to form the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23. As shown in FIG. 5, in the patterning step S2, the copper foil 24 is patterned to form the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23. As shown in FIG. 5, in the patterning step S2, the copper foil 24 is patterned to form the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23. As shown in FIG.
  • the copper foil 24 In the patterning of the copper foil 24, first, for example, a dry film resist is attached on the copper foil 24. Second, the applied dry film resist is developed and exposed. Thirdly, the first wiring pattern 21, the second wiring pattern 22 and the first ground pattern 23 are formed by etching the copper foil 24 using the developed and exposed dry film resist as a mask.
  • FIG. 6 is a cross-sectional view for explaining the bonding step S3.
  • the second insulating layer 50 having the copper foil 61 disposed on the fourth main surface 50b is attached to the first insulating layer 10 using the adhesive layer 40. be.
  • the copper foil 61 becomes the third ground pattern 60 .
  • FIG. 7 is a cross-sectional view for explaining the through-hole forming step S4.
  • the first through-hole 10c and the second through-hole 50c are formed. Formation of the first through-hole 10c and formation of the second through-hole 50c are performed, for example, by irradiating laser light.
  • plating step S5 plating is performed to form the first conductor layer 70 on the inner wall surface of the first through hole 10c and on the first ground pattern 23 exposed from the first through hole 10c, A second conductor layer 80 is formed on the inner wall surface of the second through hole 50c and on the first ground pattern 23 exposed from the second through hole 50c.
  • This plating is performed by an electroless plating method or an electrolytic plating method.
  • the printed wiring board 100 having the structure shown in FIGS. 1 and 2 is manufactured.
  • printed wiring board 100 The effect of printed wiring board 100 will be described below in comparison with a printed wiring board according to a comparative example.
  • a printed wiring board according to the comparative example is referred to as printed wiring board 200 .
  • FIG. 8 is a plan view of the printed wiring board 200.
  • FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 8.
  • printed wiring board 200 includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22 and first ground pattern 23, and second ground pattern 30. , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the first through holes 10c and the second through holes 50c are circular in plan view. That is, in printed wiring board 200, the width of first through hole 10c in second direction DR2 and the width of second through hole 50c in second direction DR2 are respectively the width of first through hole 10c in first direction DR1 and It is equal to the width in the first direction DR1 of the second through hole 50c.
  • the first wiring pattern 21 and the second wiring pattern 22 When signals are transmitted through the first wiring pattern 21 and the second wiring pattern 22 (when current flows through the first wiring pattern 21 and the second wiring pattern 22), the first wiring pattern 21 and the second wiring pattern 22 emits electromagnetic waves.
  • the electromagnetic wave radiated from the first wiring pattern 21 becomes noise for the signal transmitted through the second wiring pattern 22, and the electromagnetic wave radiated from the second wiring pattern 22 becomes noise for the signal transmitted through the first wiring pattern 21. . That is, crosstalk occurs between the first wiring pattern 21 and the second wiring pattern 22 .
  • the first conductor layer 70 electrically connects the first ground pattern 23 and the second ground pattern 30 .
  • the second conductor layer 80 electrically connects the first ground pattern 23 and the third ground pattern 60 . Therefore, in the printed wiring board 200 , part of the electromagnetic waves radiated from the first wiring pattern 21 and directed to the second wiring pattern 22 and part of the electromagnetic waves radiated from the second wiring pattern 22 and directed to the first wiring pattern 21 A portion is shielded by the first conductor layer 70 and the second conductor layer 80 .
  • the above electromagnetic waves may pass through between two adjacent first through holes 10c and between two adjacent second through holes 50c. Therefore, it is effective for shielding electromagnetic waves by the first conductor layer 70 and the second conductor layer 80 to form the first through holes 10c and the second through holes 50c densely in the first direction DR1.
  • the first through holes 10c and the second through holes 50c are circular in plan view. , the distance between adjacent first through holes 10c and the distance between two adjacent second through holes 50c need to be reduced. However, from the viewpoint of processing accuracy of the first through-holes 10c and the second through-holes 50c, there is a limit to reducing the interval between the adjacent first through-holes 10c.
  • the width of first through hole 10c in first direction DR1 and the width of second through hole 50c in first direction DR1 are respectively the width of first through hole 10c in second direction DR2 and the width of second through hole 50c in second direction DR2. Since it is larger than the width in the second direction DR2 of the two through-holes 50c, the interval between two adjacent first through-holes 10c and the interval between two adjacent second through-holes 50c are reduced.
  • the first through holes 10c and the second through holes 50c can be formed densely in the first direction DR1.
  • crosstalk between first wiring pattern 21 and second wiring pattern 22 is further suppressed as compared with printed wiring board 200 .
  • a printed wiring board according to the second embodiment will be described.
  • a printed wiring board according to the second embodiment is referred to as a printed wiring board 100A.
  • points different from printed wiring board 100 will be mainly described, and redundant description will not be repeated.
  • FIG. 10 is a plan view of the printed wiring board 100A.
  • 11 is a cross-sectional view along XI-XI in FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 10.
  • FIG. 10A includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22 and first ground pattern 23, and second ground pattern. 30 , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board 100A is common to the configuration of printed wiring board 100 .
  • a plurality of third through holes 10d are formed in the first insulating layer 10 and the second ground pattern 30 in the printed wiring board 100A.
  • the third through hole 10d penetrates the first insulating layer 10 and the second ground pattern 30 in the thickness direction DR3.
  • the third through hole 10d overlaps the first ground pattern 23 in plan view. That is, the first ground pattern 23 is exposed from the third through hole 10d.
  • the plurality of third through holes 10d are arranged at intervals so as to form a row along the first direction DR1.
  • the interval between two adjacent third through holes 10d is constant, for example.
  • the row of the third through holes 10d is arranged between the row of the first through holes 10c and the second wiring pattern 22 in plan view.
  • the position of the third through hole 10d in the first direction DR1 is shifted from the position of the first through hole 10c in the first direction DR1.
  • the width of the third through hole 10d in the first direction DR1 is greater than the width of the third through hole 10d in the second direction DR2.
  • the third through hole 10d extends, for example, along the first direction DR1.
  • the third through hole 10d preferably has an oval shape whose longitudinal direction is along the first direction DR1 in plan view.
  • a plurality of fourth through holes 50d are formed in the adhesive layer 40, the second insulating layer 50 and the third ground pattern 60 in the printed wiring board 100A.
  • the fourth through hole 50d penetrates the adhesive layer 40, the second insulating layer 50 and the third ground pattern 60 in the thickness direction DR3.
  • the fourth through hole 50d overlaps the first ground pattern 23 in plan view. That is, the first ground pattern 23 is exposed from the fourth through hole 50d.
  • the plurality of fourth through holes 50d are arranged at intervals so as to form a row along the first direction DR1.
  • the interval between two adjacent fourth through holes 50d is constant, for example.
  • the row of the fourth through holes 50d is arranged between the row of the second through holes 50c and the second wiring pattern 22 in plan view.
  • the position of the fourth through hole 50d in the first direction DR1 is shifted from the position of the second through hole 50c in the first direction DR1.
  • the width of the fourth through hole 50d in the first direction DR1 is greater than the width of the fourth through hole 50d in the second direction DR2.
  • the fourth through hole 50d extends, for example, along the first direction DR1.
  • the fourth through hole 50d preferably has an oval shape whose longitudinal direction is along the first direction DR1 in plan view.
  • the position of the third through hole 10d in the first direction DR1 and the position in the second direction DR2 respectively overlap the position of the fourth through hole 50d in the first direction DR1 and the position in the second direction DR2.
  • the first conductor layer 70 is also arranged on the inner wall surface of the third through hole 10d.
  • the first conductor layer 70 may also be arranged on the first ground pattern 23 exposed from the third through hole 10d.
  • second conductor layer 80 is also arranged on the inner wall surface of fourth through hole 50d.
  • the second conductor layer 80 may also be arranged on the first ground pattern 23 exposed from the fourth through hole 50d.
  • the first ground pattern 23 exposed from the third through hole 10 d is electrically connected to the second ground pattern 30 by the first conductor layer 70 .
  • the second conductor layer 80 electrically connects the first ground pattern 23 exposed from the fourth through hole 50 d to the third ground pattern 60 .
  • the configuration of printed wiring board 100A differs from that of printed wiring board 100 in these respects.
  • the method for manufacturing the printed wiring board 100A includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board 100A is common to the method for manufacturing printed wiring board 100.
  • the third through-hole 10d and the fourth through-hole 50d are formed in addition to the first through-hole 10c and the second through-hole 50c.
  • the first conductor layer 70 is also formed on the inner wall surfaces of the third through holes 10d and on the first ground pattern 23 exposed from the third through holes 10d. be done.
  • the second conductor layer 80 is also formed on the inner wall surfaces of the fourth through holes 50d and on the first ground pattern 23 exposed from the fourth through holes 50d. be done. Regarding these points, the method for manufacturing printed wiring board 100A is different from the method for manufacturing printed wiring board 100 .
  • the electromagnetic wave emitted from first wiring pattern 21 and the electromagnetic wave emitted from second wiring pattern 22 pass between two adjacent first through holes 10c and between adjacent second through holes 10c. It may pass through between the holes 50c.
  • the position of third through hole 10d in first direction DR1 is displaced from the position of first through hole 10c in first direction DR1, and the position of fourth through hole 50d in first direction DR1 is displaced. It is shifted from the position of the second through hole 50c in the first direction DR1.
  • the electromagnetic waves radiated from first wiring pattern 21 passed between two adjacent first through holes 10c and between two adjacent second through holes 50c. However, it is blocked by the first conductor layer 70 arranged on the inner wall surface of the third through hole 10d and the second conductor layer 80 arranged on the inner wall surface of the fourth through hole 50d.
  • electromagnetic waves radiated from second wiring pattern 22 pass between two adjacent third through holes 10d and between two adjacent fourth through holes 50d. Even if it is, it is blocked by the first conductor layer 70 arranged on the inner wall surface of the first through hole 10c and the second conductor layer 80 arranged on the inner wall surface of the second through hole 50c.
  • crosstalk between the first wiring pattern 21 and the second wiring pattern 22 is further suppressed as compared with the printed wiring board 100 .
  • a printed wiring board according to the third embodiment will be described.
  • a printed wiring board according to the third embodiment is referred to as a printed wiring board 100B.
  • points different from printed wiring board 100A will be mainly described, and duplicate description will not be repeated.
  • FIG. 13 is a plan view of the printed wiring board 100B.
  • FIG. 14 is a bottom view of printed wiring board 100B.
  • the printed wiring board 100B includes a first insulating layer 10, a first wiring pattern 21, a second wiring pattern 22 and a first ground pattern 23, a second ground pattern 30, It has an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board 100B is common to the configuration of printed wiring board 100A.
  • first through hole 10c and third through hole 10d have first portion 10e and second portion 10f
  • second through hole 50c and fourth through hole 50d have first portion 50e. and a second portion 50f.
  • the first portion 10e and the first portion 50e extend along the first direction DR1.
  • the second portion 10f and the second portion 50f extend along the second direction DR2.
  • the second portion 10f and the second portion 50f are respectively connected to the central portion of the first portion 10e in the first direction DR1 and the central portion of the first portion 50e in the first direction DR1.
  • the second portion 10f extends from the first portion 10e along the direction from the first wiring pattern 21 toward the second wiring pattern 22.
  • the second portion 10 f extends from the first portion 10 e along the direction from the second wiring pattern 22 toward the first wiring pattern 21 .
  • the second portion 50f extends from the first portion 50e along the direction from the first wiring pattern 21 toward the second wiring pattern 22.
  • the second portion 50 f extends from the first portion 50 e along the direction from the second wiring pattern 22 toward the first wiring pattern 21 .
  • the configuration of printed wiring board 100B is different from that of printed wiring board 100A.
  • the method for manufacturing the printed wiring board 100B includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board 100B is common to the method for manufacturing printed wiring board 100A.
  • first through-hole 10c, second through-hole 50c, third through-hole 10d, and fourth through-hole 50d formed in through-hole forming step S4 are the same as those of printed wiring board 100A. It is different from the manufacturing method.
  • the electromagnetic waves radiated from the first wiring pattern 21 and the electromagnetic waves radiated from the second wiring pattern 22 pass between two adjacent first through holes 10c and between two adjacent second through holes 10c. It passes through between two through holes 50c, between two adjacent third through holes 10d, and between two adjacent fourth through holes 50d along a direction inclined with respect to the second direction DR2.
  • the electromagnetic waves radiated from the first wiring pattern 21 and the electromagnetic waves radiated from the second wiring pattern 22 pass between two adjacent first through holes 10c and between two adjacent second through holes 10c. It passes through between two through holes 50c, between two adjacent third through holes 10d, and between two adjacent fourth through holes 50d along a direction inclined with respect to the second direction DR2.
  • third through hole 10d has second portion 10f and fourth through hole 50d has second portion 50f. , even if it passes between two adjacent first through-holes 10c and between adjacent second through-holes 50c, the first It is likely to be blocked by the conductor layer 70 and the second conductor layer 80 on the inner wall surface of the fourth through hole 50d in the second portion 50f.
  • first through hole 10c has second portion 10f and second through hole 50c has second portion 50f. Even if the electromagnetic wave passes between the two adjacent third through holes 10d and between the adjacent fourth through holes 50d, it does not reach the inner wall surface of the first through hole 10c in the second portion 10f. and the second conductor layer 80 on the inner wall surface of the second through hole 50c in the second portion 50f.
  • crosstalk between the first wiring pattern 21 and the second wiring pattern 22 is further suppressed as compared with the printed wiring board 100A.
  • a printed wiring board according to the fourth embodiment will be described.
  • a printed wiring board according to the fourth embodiment is referred to as a printed wiring board 100C.
  • points different from printed wiring board 100A will be mainly described, and duplicate description will not be repeated.
  • FIG. 15 is a plan view of the printed wiring board 100C.
  • FIG. 16 is a bottom view of printed wiring board 100C.
  • the printed wiring board 100C includes a first insulating layer 10, a first wiring pattern 21, a second wiring pattern 22, a first ground pattern 23, a second ground pattern 30, It has an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board 100C is common to the configuration of printed wiring board 100A.
  • the first through hole 10c and the third through hole 10d have a third portion 10g and a fourth portion 10h extending linearly in plan view.
  • the second through hole 50c and the fourth through hole 50d have a third portion 50g and a fourth portion 50h extending linearly in plan view.
  • One end of the third portion 10g and one end of the fourth portion 10h are connected to each other.
  • One end of the third portion 10g is on one side in the first direction DR1 relative to the other end of the third portion 10g.
  • One end of the fourth portion 10h is on the other side in the first direction DR1 than the other end of the fourth portion 10h.
  • One end of the third portion 50g and one end of the fourth portion 50h are connected to each other.
  • One end of the third portion 50g is on one side in the first direction DR1 relative to the other end of the third portion 50g.
  • One end of the fourth portion 50h is on the other side in the first direction DR1 of the other end of the fourth portion 50h.
  • the other end of the third portion 10g and the other end of the fourth portion 10h are closer to the second wiring pattern 22 than the one end of the third portion 10g and the one end of the fourth portion 10h, respectively. be.
  • the third through hole 10d the other end of the third portion 10g and the other end of the fourth portion 10h are closer to the first wiring pattern 21 than the one end of the third portion 10g and the one end of the fourth portion 10h, respectively. be. That is, the first through hole 10c and the third through hole 10d are L-shaped in plan view.
  • the other end of the third portion 50g and the other end of the fourth portion 50h are closer to the second wiring pattern 22 than the one end of the third portion 50g and the one end of the fourth portion 50h, respectively. be.
  • the fourth through hole 50d the other end of the third portion 50g and the other end of the fourth portion 50h are closer to the first wiring pattern 21 than the one end of the third portion 50g and the one end of the fourth portion 50h, respectively. be. That is, the second through hole 50c and the fourth through hole 50d are L-shaped in plan view. In these respects, the configuration of printed wiring board 100C differs from that of printed wiring board 100A.
  • the method for manufacturing the printed wiring board 100C includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board 100C is common to the method for manufacturing printed wiring board 100B.
  • first through-hole 10c, second through-hole 50c, third through-hole 10d, and fourth through-hole 50d formed in through-hole forming step S4 are the same as those of printed wiring board 100A. It is different from the manufacturing method.
  • the electromagnetic waves radiated from the first wiring pattern 21 and the electromagnetic waves radiated from the second wiring pattern 22 pass between two adjacent first through holes 10c and between two adjacent second through holes 10c. It passes through between two through holes 50c, between two adjacent third through holes 10d, and between two adjacent fourth through holes 50d along a direction inclined with respect to the second direction DR2.
  • the electromagnetic waves radiated from the first wiring pattern 21 and the electromagnetic waves radiated from the second wiring pattern 22 pass between two adjacent first through holes 10c and between two adjacent second through holes 10c. It passes through between two through holes 50c, between two adjacent third through holes 10d, and between two adjacent fourth through holes 50d along a direction inclined with respect to the second direction DR2.
  • third through hole 10d has third portion 10g and fourth portion 10h
  • fourth through hole 50d has third portion 50g and fourth portion 50h. Even if an electromagnetic wave radiated from one wiring pattern 21 passes between two adjacent first through holes 10c and between adjacent second through holes 50c, the inner wall surface of the third through hole 10d It is easily blocked by the upper first conductor layer 70 and the second conductor layer 80 on the inner wall surface of the fourth through hole 50d.
  • first through hole 10c has third portion 10g and fourth portion 10h
  • second through hole 50c has third portion 50g and fourth portion 50h. Therefore, even if the electromagnetic wave radiated from the second wiring pattern 22 passes between the two adjacent third through holes 10d and between the adjacent fourth through holes 50d, and the second conductor layer 80 on the inner wall surface of the second through-hole 50c.
  • crosstalk between the first wiring pattern 21 and the second wiring pattern 22 is further suppressed as compared with the printed wiring board 100A.
  • a printed wiring board according to the fifth embodiment will be described.
  • the printed wiring board according to the fifth embodiment is referred to as printed wiring board 100D.
  • points different from printed wiring board 100 will be mainly described, and redundant description will not be repeated.
  • FIG. 17 is a plan view of the printed wiring board 100D.
  • 18 is a cross-sectional view taken along line XVIII-XVIII of FIG. 17.
  • FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 17.
  • printed wiring board 100D includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22, first ground pattern 23, and second ground pattern. 30 , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board (100D) is common to the configuration of printed wiring board (100).
  • first through hole 10c is between two adjacent second through holes 50c in first direction DR1. It differs from the 100 configuration.
  • the method for manufacturing the printed wiring board 100D includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board (100D) is common to the method for manufacturing printed wiring board (100).
  • the method for manufacturing printed wiring board 100D differs from the method for manufacturing printed wiring board 100 in the position of second through hole 50c formed in through hole forming step S4.
  • first ground pattern 23 is exposed from both the first through hole 10c and the second through hole 50c. Therefore, in printed wiring board 100 , first ground pattern 23 may be damaged.
  • the first ground pattern 23 is exposed only from either the first through hole 10c or the second through hole 50c.
  • first ground pattern 23 exposed from first through hole 10c is supported by adhesive layer 40, second insulating layer 50 and third ground pattern 60.
  • the first ground pattern 23 exposed from the second through hole 50 c is supported by the first insulating layer 10 and the second ground pattern 30 . Therefore, in printed wiring board 100 ⁇ /b>D, damage to first ground pattern 23 can be suppressed as compared with printed wiring board 100 .
  • FIG. 20 is a plan view of a printed wiring board (100D) according to a modification.
  • first through hole 10c and second through hole 50c are circular in plan view. That is, in the printed wiring board 100D, the width in the first direction DR1 and the width in the second direction DR2 of the first through hole 10c may be equal to each other, and the width in the first direction DR1 and the width in the second direction DR2 of the second through hole 50c may be equal to each other. The widths in the two directions DR2 may be equal to each other.
  • FIG. 100E A printed wiring board according to the sixth embodiment will be described.
  • the printed wiring board according to the sixth embodiment is referred to as printed wiring board 100E.
  • points different from printed wiring board 100A will be mainly described, and duplicate description will not be repeated.
  • FIG. 21 is a plan view of printed wiring board 100E.
  • 22 is a cross-sectional view along XXII-XXII in FIG. 21.
  • FIG. 23 is a cross-sectional view along XXIII-XXIII of FIG. 21.
  • printed wiring board 100E includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22, first ground pattern 23, and second ground pattern. 30 , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board 100E is common to the configuration of printed wiring board 100A.
  • first through-hole 10c is located between two adjacent second through-holes 50c in first direction DR1
  • third through-hole 10d is located between two adjacent second through-holes 50c in first direction DR1. between two fourth through holes 50d.
  • the configuration of printed wiring board 100E is common to the configuration of printed wiring board 100A.
  • the method for manufacturing the printed wiring board 100E includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board 100E is common to the method for manufacturing printed wiring board 100A.
  • the method for manufacturing printed wiring board 100E differs from the method for manufacturing printed wiring board 100A in the positions of second through-hole 50c and fourth through-hole 50d formed in through-hole forming step S4.
  • first ground pattern 23 is exposed from both first through hole 10c and second through hole 50c, and is exposed from both third through hole 10d and fourth through hole 50d. there is Therefore, in printed wiring board 100A, first ground pattern 23 may be damaged.
  • first ground pattern 23 is exposed only from either first through hole 10c or second through hole 50c or from third through hole 10d or fourth through hole 50d. do not have.
  • first ground pattern 23 exposed from first through-hole 10c or third through-hole 10d consists of adhesive layer 40, second insulating layer 50 and third ground pattern 23.
  • the first ground pattern 23 supported by the ground pattern 60 and exposed from the second through hole 50 c or the fourth through hole 50 d is supported by the first insulating layer 10 and the second ground pattern 30 . Therefore, in printed wiring board 100E, damage to first ground pattern 23 can be suppressed as compared with printed wiring board 100A.
  • a printed wiring board according to the seventh embodiment will be described.
  • a printed wiring board according to the seventh embodiment is referred to as a printed wiring board 100F.
  • points different from printed wiring board 100A will be mainly described, and duplicate description will not be repeated.
  • FIG. 24 is a plan view of the printed wiring board 100F.
  • 25 is a cross-sectional view along XXV-XXV of FIG. 24.
  • FIG. 26 is a cross-sectional view along XXVI-XXVI in FIG. 24.
  • printed wiring board 100F includes first insulating layer 10, first wiring pattern 21, second wiring pattern 22, first ground pattern 23, and second ground pattern. 30 , an adhesive layer 40 , a second insulating layer 50 , a third ground pattern 60 , a first conductor layer 70 and a second conductor layer 80 .
  • the configuration of printed wiring board 100F is common to the configuration of printed wiring board 100A.
  • the width of the first through hole 10c in the first direction DR1 and the width of the second through hole 50c in the first direction DR1 are different from each other. More specifically, the width of first through hole 10c in first direction DR1 is greater than the width of second through hole 50c in first direction DR1.
  • the width of the third through hole 10d in the first direction DR1 and the width of the fourth through hole 50d in the first direction DR1 are different from each other. More specifically, the width of the fourth through hole 50d in the first direction DR1 is greater than the width of the third through hole 10d in the first direction DR1. Regarding these points, the configuration of printed wiring board 100F is common to the configuration of printed wiring board 100A.
  • the method for manufacturing the printed wiring board 100F includes a preparation step S1, a patterning step S2, a bonding step S3, a through-hole forming step S4, and a plating step S5.
  • the method for manufacturing printed wiring board (100F) is common to the method for manufacturing printed wiring board (100A).
  • the method for manufacturing printed wiring board 100F differs from the method for manufacturing printed wiring board 100A in the positions of second through-hole 50c and fourth through-hole 50d formed in through-hole forming step S4.
  • first ground pattern 23 is exposed from both first through hole 10c and second through hole 50c, and is exposed from both third through hole 10d and fourth through hole 50d. there is Therefore, in printed wiring board 100A, first ground pattern 23 may be damaged.
  • the first ground pattern 23 is exposed from both the first through hole 10c and the second through hole 50c, and is also exposed from both the third through hole 10d and the fourth through hole 50d.
  • the area of first ground pattern 23 exposed from second through hole 50c is smaller, and the area of first ground pattern 23 exposed from third through hole 10d is smaller.
  • the area of the first ground pattern 23 is reduced. Therefore, in printed wiring board 100F, damage to first ground pattern 23 can be suppressed as compared with printed wiring board 100A.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
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  • Structure Of Printed Boards (AREA)
PCT/JP2022/043215 2021-11-24 2022-11-22 プリント配線板 Ceased WO2023095798A1 (ja)

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US18/711,599 US20250031299A1 (en) 2021-11-24 2022-11-22 Printed wiring board
DE112022005576.6T DE112022005576T5 (de) 2021-11-24 2022-11-22 Leiterplatte
JP2023563704A JPWO2023095798A1 (https=) 2021-11-24 2022-11-22
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118888451A (zh) * 2024-03-26 2024-11-01 芯爱科技(南京)有限公司 封装基板的制法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212439A (ja) * 2009-03-10 2010-09-24 Sumitomo Bakelite Co Ltd 回路基板
JP2018200982A (ja) * 2017-05-29 2018-12-20 東洋インキScホールディングス株式会社 フレキシブルプリント配線板、フレキシブルプリント配線板の製造方法及び電子機器
WO2021230215A1 (ja) * 2020-05-13 2021-11-18 住友電工プリントサーキット株式会社 高周波回路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3905546B2 (ja) * 2003-06-09 2007-04-18 富士通株式会社 プリント基板およびプリント基板ユニット
JP2006024618A (ja) 2004-07-06 2006-01-26 Toshiba Corp 配線基板
JP6021504B2 (ja) * 2012-08-08 2016-11-09 キヤノン株式会社 プリント配線板、プリント回路板及びプリント回路板の製造方法
JP6691495B2 (ja) * 2017-03-06 2020-04-28 株式会社ソニー・インタラクティブエンタテインメント 電子機器
JP7396200B2 (ja) 2020-05-27 2023-12-12 トヨタ自動車株式会社 膜電極接合体及び固体高分子型燃料電池

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212439A (ja) * 2009-03-10 2010-09-24 Sumitomo Bakelite Co Ltd 回路基板
JP2018200982A (ja) * 2017-05-29 2018-12-20 東洋インキScホールディングス株式会社 フレキシブルプリント配線板、フレキシブルプリント配線板の製造方法及び電子機器
WO2021230215A1 (ja) * 2020-05-13 2021-11-18 住友電工プリントサーキット株式会社 高周波回路

Cited By (1)

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