WO2023042372A1 - 半導体装置、及び半導体装置の製造方法 - Google Patents

半導体装置、及び半導体装置の製造方法 Download PDF

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Publication number
WO2023042372A1
WO2023042372A1 PCT/JP2021/034308 JP2021034308W WO2023042372A1 WO 2023042372 A1 WO2023042372 A1 WO 2023042372A1 JP 2021034308 W JP2021034308 W JP 2021034308W WO 2023042372 A1 WO2023042372 A1 WO 2023042372A1
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Prior art keywords
lead electrode
bonding material
semiconductor device
bonding
electrode pieces
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Ceased
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PCT/JP2021/034308
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English (en)
French (fr)
Japanese (ja)
Inventor
佑樹 矢野
洋二 河内
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2023548058A priority Critical patent/JP7592180B2/ja
Priority to PCT/JP2021/034308 priority patent/WO2023042372A1/ja
Priority to CN202180102301.3A priority patent/CN117957649A/zh
Priority to DE112021008238.8T priority patent/DE112021008238T5/de
Priority to US18/577,884 priority patent/US20240321720A1/en
Publication of WO2023042372A1 publication Critical patent/WO2023042372A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/60—Securing means for detachable heating or cooling arrangements, e.g. clamps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Definitions

  • the present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.
  • a semiconductor device having a DLB (Direct Lead Bonding) structure in which lead electrodes are directly soldered to a semiconductor element to connect the semiconductor element and internal circuit within the module with an external circuit outside the module.
  • DLB Direct Lead Bonding
  • a semiconductor device having a DLB structure can achieve a large current, a long life, and high reliability because the cross-sectional area of the electrode can be increased compared to the case of using fine bonding wires.
  • Patent Document 1 an opening is provided in the lead electrode corresponding to the mounting position of the semiconductor element, a bonding component is arranged in this opening, and the outer periphery of the semiconductor element is bonded to the inner periphery of the opening.
  • the structure is less susceptible to the warping of the insulating substrate on which the semiconductor element is mounted.
  • Patent Document 1 Although the joint parts are movable during heating, movement of the joint parts is restricted when the steps near the opening of the lead electrode support the steps of the joint parts in the opening. In particular, when the warp deformation of the insulating substrate is large, there is a problem that a sufficient bonding area between the semiconductor element and the lead electrodes cannot be secured.
  • the present disclosure has been made to solve the above-described problems, and aims to provide a semiconductor device and a manufacturing method in which a sufficient bonding area between a semiconductor element and a lead electrode is ensured.
  • a semiconductor device includes an insulating substrate having a circuit pattern, a plurality of semiconductor elements bonded onto the circuit pattern via a first bonding portion, and each of the plurality of semiconductor elements bonded via a second bonding portion. and a joined lead electrode, wherein the lead electrode comprises a plurality of lead electrode pieces straddling at least one semiconductor element, and the plurality of lead electrode pieces are each joined via a third joint portion.
  • a method for manufacturing a semiconductor device includes a first bonding material placing step of placing a first bonding material at a position where a semiconductor element on a circuit pattern provided on an insulating substrate is to be mounted; A semiconductor element mounting step of mounting a plurality of semiconductor elements on a material, a second bonding material mounting step of mounting a second bonding material on each of the semiconductor elements, and on the second bonding material, A lead electrode piece placing step of placing a plurality of lead electrode pieces constituting a lead electrode, a third bonding material placing step of placing a third bonding material on the plurality of lead electrode pieces, and a first bonding material. , the second bonding material, and the third bonding material.
  • the lead electrode to be bonded to the upper surface of the semiconductor element is formed of a plurality of lead electrode pieces, and the plurality of lead electrode pieces are bonded together with a bonding material, thereby following the warpage of the insulating substrate. Since the lead electrode piece can move, a sufficient bonding area can be secured between the semiconductor element and the lead electrode.
  • FIG. 1 is a cross-sectional view showing a schematic configuration of a semiconductor device according to a first embodiment
  • FIG. 1 is a top view showing part of the configuration of a semiconductor device according to a first embodiment
  • FIG. 4 is a flow chart showing manufacturing steps of the semiconductor device according to the first embodiment
  • 4 is a schematic diagram showing a state in which the semiconductor device according to Embodiment 1 is heated
  • FIG. 3 is a schematic diagram showing a state in which a semiconductor device for comparison is heated
  • FIG. 10 is a top view showing a schematic configuration of a semiconductor device according to a second embodiment
  • FIG. 11 is a top view showing an end portion of a lead electrode piece according to Embodiment 2;
  • FIG. 11 is a top view showing a schematic configuration of a semiconductor device according to a third embodiment
  • FIG. 11 is a top view showing a schematic configuration of a semiconductor device according to a fourth embodiment
  • FIG. 13 is a schematic diagram showing a state in which the semiconductor device according to the fourth embodiment is heated
  • FIG. 11 is a top view showing an end portion of a lead electrode piece according to Embodiment 4;
  • FIG. 1 is a cross-sectional view showing a schematic configuration of a semiconductor device according to Embodiment 1.
  • FIG. FIG. 2 is a top view showing part of the configuration of the semiconductor device according to the first embodiment. 1 shows a cross section taken along the line AA' in FIG. 1 and 2 show a schematic configuration of the semiconductor device 1000, and signal lines, wires, signal terminals, etc. for electrical connection with the semiconductor element 4 are omitted.
  • the semiconductor device 1000 includes a base plate 1, an insulating substrate 2, a semiconductor element 4, lead electrodes 8, and a case 7.
  • the base plate 1 is made of a material with excellent heat conductivity, such as aluminum alloy or copper. It has a flat plate-like surface and a back surface, and supports the insulating substrate 2 and the case 7 on which a plurality of semiconductor elements 4 are mounted. For example, a fin or the like may be provided on the back surface of the base plate 1 in order to improve cooling performance of the semiconductor device 1000 .
  • the insulating substrate 2 is bonded to the surface of the base plate 1 using a base plate bonding bonding material 1a.
  • the insulating substrate 2 has circuit patterns 21 and 23 made of metal such as aluminum alloy and copper formed on an insulating layer 22 made of ceramic such as aluminum nitride or silicon nitride or resin such as epoxy resin. .
  • the back surface of the insulating substrate 2 is joined to the front surface of the base plate 1 by plate solder, solder paste, soft solder, or the like to form a base plate joining portion 1b.
  • a plurality of semiconductor elements 4 are bonded to a circuit pattern 21 on an insulating substrate 2 via a first bonding material 2a such as plate solder, solder paste, soft solder, etc. is formed with a first joint portion 2b.
  • the semiconductor element 4 is, for example, an IGBT (Insulated Gate Bipolar Transistor) made of silicon (Si) material, a diode, or a reverse conducting IGBT.
  • IGBT Insulated Gate Bipolar Transistor
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • a Schottky diode, or the like made of a material having a larger bandgap than Si such as silicon carbide (SiC) or gallium nitride (GaN) may be used.
  • the number of semiconductor elements 4 mounted on the insulating substrate 2 is not limited, and the required number of semiconductor elements 4 may be mounted according to the application.
  • the lead electrode 8 is composed of lead electrode pieces 81, 82, and 83 separated at positions where the semiconductor element 4 is not mounted when viewed from above. is bonded to the semiconductor element 4 via the second bonding portion 4b. It is also electrically connected to the circuit pattern 21 on the insulating substrate 2 .
  • the lead electrode pieces 81, 82, and 83 constituting the lead electrode 8 are formed by, for example, separating the elongated lead electrode 8 in the lateral direction. The separation plane is perpendicular to the top surface of the lead electrode 8 .
  • the lead electrode pieces 81, 82, 83 are joined at the separation surfaces by a third joint material 8a such as plate solder or solder paste, and the third joint portions 8b are formed between the separation surfaces.
  • the third joint portion 8 b has a joint surface with the lead electrode pieces 81 , 82 , 83 in the lateral direction of the lead electrode 8 , and the joint surface is orthogonal to the upper surface of the lead electrode 8 .
  • the lead electrode pieces 81 , 82 , 83 are made of, for example, copper, copper alloy, etc., and electrically connect the semiconductor element 4 and the external electrode 80 to each other.
  • the lead electrodes 8 may be separated for each semiconductor element 4 to form lead electrode pieces 81, 82, and 83. 83 may be separated. That is, one lead electrode piece may exist on a plurality of semiconductor elements 4 .
  • the external electrode 80 is joined to the lead electrode piece 81 of the lead electrode 8 using a joint material 80a for joining the external electrode, such as plate solder, solder paste, or soft solder. , an external electrode connection portion 80b is formed.
  • the case 7 houses the insulating substrate 2 on which the semiconductor element 4 is mounted, plays a role of a framework when the sealing resin 6a is poured, and is made of, for example, PPS (Polyphenylene sulfide).
  • the case 7 is, for example, insert-molded with the external electrode 80 as an insert part, and has a form in which the external electrode 80 is inserted into the case 7 .
  • the case 7 is adhered onto the base plate with a silicone-based or epoxy-based adhesive 5a.
  • step S1 a base plate 1, an insulating substrate 2 having circuit patterns 21 and 23 formed on both sides of an insulating layer 22, and a semiconductor element 4 are prepared.
  • a bonding material 1a for bonding the base plate such as plate solder is placed on the base plate 1
  • an insulating substrate 2 is mounted on the bonding material 1a for bonding the base plate, and a semiconductor element 4 on the insulating substrate 2 is mounted.
  • First bonding materials 2a such as plate solder, for example, are placed on the mounting positions in the same number as the semiconductor elements 4, and the semiconductor elements 4 are mounted on each of the first bonding materials 2a.
  • the semiconductor element 4 is placed on the electrode pads of the circuit pattern 21 on the surface of the insulating substrate 2 .
  • a liquid solder paste may be used and applied to the required locations by screen printing.
  • a liquid solder paste may be used and dropped onto the required location by a dispenser.
  • a first assembly is formed by assembling the base plate 1, the bonding material 1a for bonding the base plate, the insulating substrate 2, the first bonding material 2a, and the semiconductor element 4. As shown in FIG.
  • step S2 the first assembly assembled in step S1 is placed in a reflow furnace and heated to a temperature equal to or higher than the melting point of the base plate bonding bonding material 1a and the first bonding material 2a.
  • the temperature of the reflow furnace is increased to, for example, about 270° C., which is higher than the melting points of the base plate bonding bonding material 1a and the first bonding material 2a, thereby melting the base plate bonding bonding material 1a and the first bonding material 2a.
  • the base plate bonding bonding material 1a and the first bonding material 2a are solidified by cooling. In this manner, a second assembly is produced in which the base plate 1, the insulating substrate 2, and the semiconductor element 4 are joined to form the base plate joint portion 1b and the first joint portion 2b.
  • step S3 a case 7 in which the external electrodes 80 are insert-molded on the base plate 1 such that the insulating substrate 2 of the second assembly produced in step S2 is surrounded and the external electrodes 80 are positioned at predetermined positions is formed.
  • Glue the bottom for the adhesive 5a, for example, a silicone-based or epoxy-based material may be used.
  • a bonding portion 5 b is formed between the base plate 1 and the case 7 .
  • the base plate 1 and the case 7 may be fastened with fasteners such as screws. Thus, the base plate 1 and the case 7 are assembled.
  • step S4 a second bonding material 4a such as a solder paste is applied onto the plurality of semiconductor elements 4, and the lead electrode pieces 81, 82, 82, 82, 82, 82, 82, 82, 82, 82 are applied to the positions of the external electrodes 80 attached in step S3.
  • 83 is placed on the portion where the second bonding material 4a is applied.
  • solder paste or the like is applied to each end so that the external electrode 80 and the lead electrode piece 81, the lead electrode piece 81 and the lead electrode piece 82, and the lead electrode piece 82 and the lead electrode piece 83 are connected.
  • the third bonding material 8a and the external electrode bonding bonding material 80a are applied by dispensing.
  • the lead electrode pieces 81, 82, and 83 are connected to form the lead electrode 8, and may be separately prepared by previously cutting a plate of copper, copper alloy, or the like with a press. 81, 82, and 83 may be cut by embossing so that they are partially connected. Thus, a third assembly is formed by assembling the semiconductor element 4 and the lead electrode pieces 81, 82, 83. FIG.
  • step S5 the third assembly formed in step S4 is heated to harden the adhesive 5a and melt the second bonding material 4a, the third bonding material 8a, and the external electrode bonding bonding material 80a. to form the bonding portion 5b, the second joint portion 4b, the third joint portion 8b, and the external electrode joint portion 80b.
  • step S6 after performing wire bonding for signal circuit connection, the insulating substrate 2, the semiconductor element 4, the lead electrode pieces 81, 82, 83, etc. in the case 7 are sealed using the sealing resin 6a.
  • the sealing resin 6a is cured by heating in an oven at 100° C. for 2 hours and at 140° C. for 2 to 3 hours to form the sealing portion 6b.
  • an epoxy resin can be used as the sealing resin 6a, but the sealing resin 6a is not limited to this.
  • a material that satisfies desired physical properties such as elastic modulus, heat resistance, adhesion, and coefficient of linear expansion may be used.
  • steps S1 to S6 necessary electrical characteristics are inspected, and the semiconductor device 1000 is completed.
  • the lead electrodes 8 can move while following the warp deformation caused in the heating process. It is possible to secure a sufficient bonding area with the lead electrode 8 for bonding.
  • step S5 warping deformation occurs due to the difference in coefficient of linear expansion of each member, and the distances between the semiconductor elements 4 and the lead electrodes 8 in the z-axis direction are not constant.
  • a series of long lead electrodes 800 are placed on the upper surfaces of a plurality of semiconductor elements 4, as shown in FIG.
  • the cross-sectional area of the part may become smaller or the wire may break.
  • the lead electrode 8 is composed of a plurality of lead electrode pieces 81, 82 and 83 and the lead electrode pieces 81, 82 and 83 are joined together by the third joint material 8a, the warpage of the insulating substrate 2 during heating can be prevented. Since the respective lead electrode pieces 81, 82, 83 move individually in the z-axis direction following the deformation, as shown in FIG. In other words, a sufficient bonding area with the lead electrode 8 can be ensured, and stable bonding can be achieved.
  • step S1 The base plate bonding bonding material 1a and the first bonding material 2a of the first assembly assembled in step S1 are melted in step S2, and the second bonding material 4a and third bonding material 4a of the third assembly assembled in step S4 are melted in step S2.
  • step S2 the example of melting the joint material 8a and the external electrode joint portion 80b in step S5 has been described, the first to third assemblies may be assembled first and heated in the same step.
  • step S4 an example in which solder paste is applied as the third bonding material 8a by a dispenser has been described, but plate solder may be used.
  • step S4 the lead electrode pieces 81, 82, 83 and the third joint material 8a are placed on the second joint material 4a on the plurality of semiconductor elements 4, and the external electrode 80 and the lead electrode piece 81 are connected to the external electrodes.
  • the process of heating the third bonding material 8a and the external electrode bonding material 80a in step S5 after the bonding material 80a for bonding is made to be connected the external electrode 80 and the lead electrode piece 81 are heated in advance. , 82 and 83 may be inserted into the case 7 in advance.
  • the melting points of the third bonding materials 8a may be the same or may be different. It is preferable that the melting point of the third bonding material 8a is lower than those of the first bonding material 2a and the second bonding material 4a because the bonding state of the semiconductor element 4 is not damaged in the heating process of the third bonding material 8a.
  • the third joint portion 8b has a rectangular parallelepiped shape having a plane perpendicular to the upper surfaces of the lead electrode pieces 81, 82, and 83 and a horizontal plane. It may be T-shaped so as to cover the upper surfaces of 81, 82, and 83. The upper surface may be spherical.
  • the semiconductor device 1000 is configured using the base plate 1 and the case 7 has been described, but the insulating substrate 2, the semiconductor element 4, and the plurality of lead electrode pieces 81, 82, and 83 are transfer-molded to form the sealing portion 6b. may be formed.
  • the external electrode joint portion 80b is provided between the end portion of the lead electrode piece 81 and the external electrode 80. If the electrode piece 82 and the third joint portion 8b provided between the lead electrode piece 82 and the lead electrode piece 83 can follow, the external electrode 80 and the lead electrode piece 81 can be continuous without the third joint portion 8b. good. As described above, the number of third joints 8b may be one or two or more.
  • the lead electrode pieces 81 , 82 , and 83 constituting the lead electrode 8 are formed by separating the long lead electrode 8 in the lateral direction, and the separated planes are perpendicular to the upper surface of the lead electrode 8 .
  • the separation plane may be slightly inclined from the direction orthogonal to the longitudinal direction of the lead electrode 8 .
  • the first bonding material 2a is placed at the position where the semiconductor element 4 is to be mounted on the circuit patterns 21 and 23 provided on the insulating substrate 2.
  • the third bonding material placing step of placing the third bonding material 8a on 82 and 83 and the bonding material heating step of heating the first bonding material 2a, the second bonding material 4a, and the third bonding material 8a A semiconductor device 1000 can be manufactured.
  • heating of at least one of the first bonding material 2a, the second bonding material 4a, and the third bonding material 8a in the bonding material heating process may be performed as a separate process to fabricate the assembly sequentially.
  • a third bonding material placing step of placing the third bonding material 8a on the plurality of lead electrode pieces 81, 82, and 83 is performed first, and the lead electrode pieces 81, 82, and 83 are prepared in a state of being connected, and then the third bonding material is prepared.
  • the connected lead electrode pieces 81, 82, and 83 may be placed after the first bonding material placing step, the semiconductor element placing step, and the second bonding material placing step. .
  • FIG. 6 is a top view showing part of the configuration of the semiconductor device 1000 according to the second embodiment.
  • the elongated lead electrode 8 is linearly separated into lead electrode pieces 81, 82, and 83 in the width direction, and has a third joint portion 8b on the separated surface orthogonal to the upper surface of the lead electrode 8.
  • the second embodiment differs in that the end portions of the lead electrode pieces 91, 92, and 93 are concave or convex. Other configurations are the same as those of the first embodiment.
  • one end of lead electrode pieces 91, 92, and 93 of adjacent lead electrodes 9 has a concave portion 9a and the other has a convex portion 9b in top view, and the concave portion 9a and the convex portion 9b are formed. are joined by a third joining material 8a at a separation plane orthogonal to the upper surface of the lead electrode 9.
  • a third joining material 8a is joined by a third joining material 8a at a separation plane orthogonal to the upper surface of the lead electrode 9.
  • the recess 9a at the right end of the lead electrode piece 91 and the projection 9b at the left end of the lead electrode piece 92 are engaged with each other, so that the recess 9a at the right end of the lead electrode piece 92 and the lead electrode piece 92 are engaged with each other.
  • the protrusions 9b on the left end of the lead electrodes 93 are engaged with each other, and are joined by the third joining material 8a at the separation plane perpendicular to the upper surface of the lead electrode 9.
  • the lead electrodes 9 bonded to the upper surface of the semiconductor element 4 are configured by the plurality of lead electrode pieces 91, 92, and 93, and the plurality of lead electrode pieces 91, 93, and 93 are formed.
  • the lead electrode pieces 92 and 93 By bonding the lead electrode pieces 92 and 93 together with the third bonding material 8a, the lead electrode pieces 91, 92 and 93 individually move in the z-axis direction following the warp deformation of the insulating substrate 2 during heating. Therefore, it is possible to secure a sufficient bonding area between the semiconductor element 4 and the lead electrode 8 .
  • the joint area of the third joint portion 8b is increased. Therefore, it is possible to prevent the melted third bonding material 8a from dropping onto the insulating substrate 2 due to the surface tension when the third bonding material 8a melts.
  • the lead electrode piece 91 does not move because the concave portion 9a and the convex portion 9b are engaged with each other. , 92 and 93 are restricted, and the displacement of the lead electrode pieces 91, 92 and 93 in the y-axis direction can be prevented.
  • FIG. 6 Although an example in which a pair of concave portions 9a and convex portions 9b are engaged with each other is shown in FIG. 6, a plurality of concave portions 9a and convex portions 9b may be engaged with each other as shown in FIG.
  • the bonding area of the third joint portion 8b is increased compared to the case where a pair of concave portions 9a and convex portions 9b are meshed with each other. Therefore, it is possible to prevent the melted third bonding material 8a from dropping onto the insulating substrate 2 due to the surface tension when the third bonding material 8a melts.
  • the right end portions of the lead electrode pieces 91 and 92 have the concave portion 9a and the left end portions of the lead electrode pieces 92 and 93 have the convex portion 9b, the right and left sides may be interchanged.
  • FIG. 8 is a top view showing part of the configuration of a semiconductor device 1000 according to the third embodiment.
  • the elongated lead electrode 8 is linearly separated into lead electrode pieces 81, 82, and 83 in the width direction, and joined by the third joint material 8a at the separation plane orthogonal to the upper surface of the lead electrode 8.
  • the third embodiment is different in that the ends of lead electrode pieces 101, 102, and 103 are hook-shaped.
  • Other configurations are the same as those of the first embodiment.
  • one of the ends of the lead electrode pieces 101, 102, and 103 of the adjacent lead electrodes 10 has a hook shape 10a, and the other has a hook shape 10b for hooking the hook shape 10a.
  • the hook shape 10a and the hook shape 10b for hooking the hook shape 10a are engaged with each other, and the lead electrodes 10 are joined at a separation plane perpendicular to the upper surface of the lead electrode 10 via a third joint portion 8b.
  • the hook shape 10a at the right end of the lead electrode piece 101 and the hook shape 10b at the left end of the lead electrode piece 102 are engaged with each other.
  • the left end portion of the lead electrode piece 103 is engaged with the hook shape 10b, and is joined to the lead electrode 10 via the third joint portion 8b at the separation plane orthogonal to the upper surface of the lead electrode 10.
  • the lead electrodes 10 bonded to the upper surface of the semiconductor element 4 are configured by the plurality of lead electrode pieces 101, 102, and 103, and the plurality of lead electrode pieces 101, 103, and 103 are formed.
  • the lead electrode pieces 102 and 103 By bonding the lead electrode pieces 102 and 103 together with the third bonding material 8a, the lead electrode pieces 101, 102 and 103 individually move in the z-axis direction following the warp deformation of the insulating substrate 2 and the base plate 1 during heating. Moving. Therefore, it is possible to secure a sufficient bonding area between the semiconductor element 4 and the lead electrode 8 .
  • the bonding area of the third bonding portion 8b is increased. Therefore, it is possible to prevent the melted third bonding material 8a from dropping onto the insulating substrate 2 due to the surface tension when the third bonding material 8a melts.
  • the hook shape 10a and the hook shape 10b are engaged with each other.
  • the movement of the lead electrode pieces 101, 102, and 103 can be prevented from being shifted in the x-axis direction by restricting the movement of the lead electrode pieces 103.
  • the hook shape 10b for hooking the hook shape 10a has the same shape as the hook shape 10a. Moreover, although the right end portions of the lead electrode pieces 101 and 102 have the hook shape 10a and the left end portions of the lead electrode pieces 102 and 103 have the hook shape 10b, the right and left sides may be interchanged.
  • FIG. 9 is a top view showing part of the configuration of a semiconductor device 1000 according to the fourth embodiment.
  • FIG. 10 is a schematic diagram showing a state in which the semiconductor device according to the fourth embodiment is heated.
  • Embodiment 2 an example in which the end portion of the lead electrode piece has a concave or convex shape
  • Embodiment 3 an example in which the end portion of the lead electrode piece has a hook shape has been described.
  • the lead electrode pieces 111 , 112 , and 113 are provided with rotating shafts 11 d at their ends.
  • Other configurations are the same as those of the second or third embodiment.
  • the lead electrode pieces 111, 112, and 113 of the adjacent lead electrodes 11 are provided with a rotating shaft 11d at the ends thereof, and the lead electrode pieces 111, 112, and 113 are connected to each other. there is Moreover, they are joined via a third joint portion 8b on a separation plane orthogonal to the upper surface of the lead electrode 11 . More specifically, as shown in FIGS. 9 and 10, the right end of the lead electrode piece 111 is formed with a concave portion 11a, and the left end portion of the lead electrode piece 112 is formed with a convex portion 11b.
  • a concave portion 11a is formed at the right end of the lead electrode piece 112, and a convex portion 11b is formed at the left end portion of the lead electrode piece 113.
  • the concave portion 11a of the lead electrode piece 112 and the convex portion 11b of the lead electrode piece 113 are formed.
  • a penetrating portion 11c that penetrates the recessed portion 11a of the lead electrode piece 112 and the convex portion 11b of the lead electrode piece 113 is provided, into which the rotating shaft 11d is inserted.
  • Each of them is joined by a third joining material 8a at a separation plane orthogonal to the upper surface of the lead electrode 11 .
  • the lead electrode 11 bonded to the upper surface of the semiconductor element 4 is composed of a plurality of lead electrode pieces 111, 112, and 113, and the plurality of lead electrode pieces 111, 112 are connected to each other. , 113 with the third bonding material 8a, the lead electrode pieces 111, 112, and 113 individually rotate and move in the Z-axis direction following the warp deformation of the insulating substrate 2 during heating. . Therefore, it is possible to secure a sufficient bonding area between the semiconductor element 4 and the lead electrode 8 .
  • the area to be joined by the third joining material 8a is increased. Therefore, it is possible to prevent the melted third bonding material 8a from dropping onto the insulating substrate 2 due to the surface tension when the third bonding material 8a melts.
  • the concave portion 11a and the convex portion 11b rotate due to the hinge structure. Since the lead electrodes 111, 112, and 113 are fixed by the shaft 11d, the movement of the lead electrodes 111, 112, and 113 is restricted, and the displacement of the lead electrodes 111, 112, and 113 in the x- and y-axis directions can be prevented.
  • FIG. 9 shows an example in which the concave portion 11a and the convex portion 11b are paired, as shown in FIG.
  • the lead electrode pieces 111 and 112 is the recess 11a and the left end of the lead electrode pieces 112 and 113 is the projection 11b
  • the lead electrode pieces 111, 112 and 113 provided with the recess 11a and the projection 11b are not shown.
  • the left and right ends of the may be interchanged.
  • the rotating shaft 11d may be provided at the portion where the hook shape 10a and the hook shape 10b are engaged, or other shapes may be used.
  • the adjacent lead electrode pieces 111, 112 and 113 are connected by providing the through portions 11c at the ends of the lead electrode pieces 111, 112 and 113 and inserting the rotating shaft 11d.
  • the lead electrode pieces 111, 112, and 113 may be connected so as to rotate with each other.

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
PCT/JP2021/034308 2021-09-17 2021-09-17 半導体装置、及び半導体装置の製造方法 Ceased WO2023042372A1 (ja)

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JP2023548058A JP7592180B2 (ja) 2021-09-17 2021-09-17 半導体装置、及び半導体装置の製造方法
PCT/JP2021/034308 WO2023042372A1 (ja) 2021-09-17 2021-09-17 半導体装置、及び半導体装置の製造方法
CN202180102301.3A CN117957649A (zh) 2021-09-17 2021-09-17 半导体装置及半导体装置的制造方法
DE112021008238.8T DE112021008238T5 (de) 2021-09-17 2021-09-17 Halbleitervorrichtung und Verfahren für eine Fertigung einer Halbleitervorrichtung
US18/577,884 US20240321720A1 (en) 2021-09-17 2021-09-17 Semiconductor device and method of manufacturing semiconductor device

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JP2003197861A (ja) * 2001-12-06 2003-07-11 Abb Res Ltd 電力用半導体サブモジュール及び電力用半導体モジュール
JP2008235651A (ja) * 2007-03-22 2008-10-02 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法
JP2012059876A (ja) * 2010-09-08 2012-03-22 Sanken Electric Co Ltd 半導体モジュール及びその製造方法
JP2014082275A (ja) * 2012-10-15 2014-05-08 Toyota Industries Corp 半導体装置
WO2015079600A1 (ja) * 2013-11-26 2015-06-04 三菱電機株式会社 パワーモジュール、及びパワーモジュールの製造方法
WO2018185974A1 (ja) * 2017-04-06 2018-10-11 三菱電機株式会社 半導体装置およびその製造方法、ならびに電力変換装置
WO2021075016A1 (ja) * 2019-10-17 2021-04-22 三菱電機株式会社 半導体装置および半導体装置の製造方法

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Publication number Priority date Publication date Assignee Title
JP7190985B2 (ja) * 2019-08-05 2022-12-16 三菱電機株式会社 半導体装置

Patent Citations (7)

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Publication number Priority date Publication date Assignee Title
JP2003197861A (ja) * 2001-12-06 2003-07-11 Abb Res Ltd 電力用半導体サブモジュール及び電力用半導体モジュール
JP2008235651A (ja) * 2007-03-22 2008-10-02 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法
JP2012059876A (ja) * 2010-09-08 2012-03-22 Sanken Electric Co Ltd 半導体モジュール及びその製造方法
JP2014082275A (ja) * 2012-10-15 2014-05-08 Toyota Industries Corp 半導体装置
WO2015079600A1 (ja) * 2013-11-26 2015-06-04 三菱電機株式会社 パワーモジュール、及びパワーモジュールの製造方法
WO2018185974A1 (ja) * 2017-04-06 2018-10-11 三菱電機株式会社 半導体装置およびその製造方法、ならびに電力変換装置
WO2021075016A1 (ja) * 2019-10-17 2021-04-22 三菱電機株式会社 半導体装置および半導体装置の製造方法

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JP7592180B2 (ja) 2024-11-29
US20240321720A1 (en) 2024-09-26

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