WO2022133674A1 - 负载片及其制备方法 - Google Patents

负载片及其制备方法 Download PDF

Info

Publication number
WO2022133674A1
WO2022133674A1 PCT/CN2020/138082 CN2020138082W WO2022133674A1 WO 2022133674 A1 WO2022133674 A1 WO 2022133674A1 CN 2020138082 W CN2020138082 W CN 2020138082W WO 2022133674 A1 WO2022133674 A1 WO 2022133674A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
substrate
layer
resistance
sheet according
Prior art date
Application number
PCT/CN2020/138082
Other languages
English (en)
French (fr)
Inventor
洪哲
唐浩
陆达富
薛文惠
王文杰
Original Assignee
深圳顺络电子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳顺络电子股份有限公司 filed Critical 深圳顺络电子股份有限公司
Priority to PCT/CN2020/138082 priority Critical patent/WO2022133674A1/zh
Publication of WO2022133674A1 publication Critical patent/WO2022133674A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C1/00Details
    • H01C1/14Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/22Attenuating devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type

Definitions

  • the present application relates to the technical field of surface assembly, in particular to a carrier sheet and a preparation method thereof.
  • the load chip is mainly used to absorb the reverse input power in the communication component in the communication base station. If it cannot withstand the required power, the load chip will be damaged, which may lead to the failure of the entire equipment.
  • most communication base stations use load chips to absorb the reverse input power in the communication components, and the size of the load chips is required to become smaller and smaller.
  • the electrical characteristics of the product such as VSWR (VoltageStandingWaveRatio, voltage standing wave ratio) The smaller Well, it is necessary to meet the standing wave ratio within 1.25:1, that is, to maintain a small return loss.
  • each electrode is respectively arranged at both ends of the resistor, forming a shape like a rectangle. If the load chip with a relatively large aspect ratio is used, the load chip design scheme in the prior art can ensure a low occupancy. In the case of wave ratio, the electrode needs to occupy a large area, thus reducing the area of the resistor, resulting in the heat dissipation area of the resistor unable to meet the requirements of high power, so it is impossible to maintain the power and maintain a low VSWR.
  • the present application provides a carrier sheet and a preparation method thereof, so as to solve the problem that the existing carrier sheet cannot be applied to a scene with a large aspect ratio.
  • a first aspect of the present application provides a load sheet, comprising:
  • a first electrode disposed at one end of the front surface of the substrate, and one side of the first electrode is flush with one long side of the substrate;
  • the second electrode includes a ground portion and an extension portion, the ground portion is disposed at one end of the front surface of the substrate away from the first electrode, and the extension portion extends to the first electrode and the substrate along the length direction of the substrate between the long sides of the other side;
  • a resistance layer disposed between the first electrode and the second electrode, and conducting the grounding portion of the first electrode and the second electrode;
  • the electrode layer is disposed on the back of the substrate, and the electrode layer is in conduction with the second electrode.
  • a method for preparing a loaded sheet comprising:
  • a first electrode and a second electrode are respectively printed on both ends of the front side of the substrate in the longitudinal direction, and an electrode layer is printed on the back side of the substrate, dried and then sintered, wherein one side of the first electrode and the One long side of the substrate is flush, the second electrode includes a ground portion and an extension portion, and the extension portion extends along the length direction of the substrate to between the first electrode and the other long side of the substrate;
  • a resistance layer is printed between the first electrode and the second electrode, and sintered after drying;
  • a glass protective layer is printed on the surface of the resistance layer, and the glass protective layer is dried and sintered;
  • the resistance value of the resistance layer is adjusted to the target value by using laser repairing resistance
  • An end surface layer is formed on the end surface of the substrate by printing or sputtering, so as to conduct the electrode layer and the second electrode to form the support sheet.
  • the above-mentioned support sheet and its preparation method of the present application by arranging an extension portion on the second electrode, so that the length direction of the second electrode is longer than the width direction to form an "L"-like structure, and a semi-enclosed structure is formed between the second electrode and the first electrode.
  • the standing wave of the electrode structure is relatively low, the area occupied by the electrode is reduced, thereby ensuring the maximum area of the resistor, and the heat dissipation area of the resistor is increased, so that the load chip can withstand higher rated power. Suitable for scenes with large aspect ratios.
  • FIG. 1 is a schematic structural diagram of a load plate provided by an embodiment of the present application.
  • FIG. 2 is a schematic exploded view of the structure of the load sheet provided by the embodiment of the application;
  • FIG. 3 is a schematic diagram of the product standing wave ratio of the load sheet provided by the embodiment of the present application.
  • FIG. 4 is a schematic schematic diagram of the basic flow of the preparation method of the carrier sheet provided by the embodiment of the present application.
  • the load sheet includes a substrate 11, a first electrode 21, a second electrode 22, a resistance layer 31 and an electrode layer 41;
  • the two planes of symmetry are called the front and back, and the front or back is only used to illustrate the relativity of the two planes.
  • the first electrode 21 is disposed at one end of the front surface of the substrate 11 , and one side of the first electrode 21 is flush with one long side of the substrate 11 .
  • the size of the first electrode 21 is smaller than that of the substrate 11 , That is, there is a certain interval between the other side of the first electrode 21 and the other side of the long side of the substrate 11.
  • the first electrode 21 serves as an input pad for welding input leads;
  • the second electrode 22 includes a ground portion 221 and an extension part 222, the ground part 221 is provided at one end of the front surface of the substrate 11 away from the first electrode 21, that is, the first electrode 21 and the ground part 221 are respectively provided at both ends in the length direction of the substrate 11, and in the width direction of the substrate 11, the ground part
  • the size of the 221 is larger than the size of the first electrode 21
  • the extension portion 222 is arranged on the part of the grounding portion 221 beyond the first electrode 21 , and extends along the length direction of the substrate 11 to the interval between the first electrode 21 and the long side of the other side of the substrate 11 .
  • a semi-enclosed structure is formed between the ground portion 221 and the extension portion 222 of the first electrode 21 and the second electrode 22 .
  • the resistance layer 31 is disposed between the first electrode 21 and the second electrode 22 , that is, in the semi-enclosed structure formed by the first electrode 21 and the second electrode 22 , the two ends of the resistance in the length direction of the substrate 11 are respectively connected to the first electrode 21 . It is connected to the grounding portion 221 of the second electrode 22, and conducts the grounding portion 221 of the first electrode 21 and the second electrode 22 to form a load circuit; the electrode layer 41 is arranged on the back of the substrate 11, and is electrically connected to the grounding portion 221 of the second electrode 22.
  • the first electrode 21, the resistance layer 31, the second electrode 22 and the electrode layer 41 are electrically connected to form a path, which can be a direct electrical connection, or a path connecting the two can be provided, such as covering a printed conductive line, etc. Electrical connections are achieved through vias.
  • the side surface of the substrate 11 is provided with an end surface layer 51, and the end surface layer 51 contains sintered conductive silver powder, which has conductive properties and is used for electrically connecting the electrode layer 41 and the second electrode 22,
  • the end surface layer 51 is disposed on the side surface of the substrate 11 where the ground portion 221 of the second electrode 22 is close to, for example, the side surface away from the first electrode 21 .
  • the above-mentioned support sheet and its preparation method of the present application by arranging an extension portion on the second electrode, so that the length direction of the second electrode is longer than the width direction to form an "L"-like structure, and a semi-enclosed structure is formed between the second electrode and the first electrode.
  • the standing wave of the electrode structure is relatively low, the area occupied by the electrode is reduced, thereby ensuring the maximum area of the resistor, and the heat dissipation area of the resistor is increased, so that the load chip can withstand higher rated power. Suitable for scenes with large aspect ratios.
  • the load sheet further includes a glass protective layer 61 , which is disposed on the surface of the resistive layer 31 and covers the resistive layer 31 to protect the resistive layer 31 .
  • the support sheet further includes a resin protective layer 62, or black protective layer, disposed on the surface of the glass protective layer 61, covering the glass protective layer 61 and at least partially covering the first electrode 21 and the second electrode 22;
  • the resin protection layer 62 covers the entire front surface of the substrate 11 except for the part of the first electrode 21 , exposing part of the first electrode 21 so that the input lead can be soldered on the first electrode 21 .
  • the size of the substrate 11 is 4.0mm*1.6mm*0.635mm, where 4.0mm is the size in the length direction, that is, the first electrode 21 points to the direction of the ground portion 221 of the second electrode 22 , and 0.635mm is the thickness
  • the dimension of the direction, that is, the direction from the front to the back, 1.6mm is the dimension in the width direction, that is, the direction perpendicular to the length direction and perpendicular to the thickness direction, compared with 5.0mm*2.5mm and 3.0mm*1.5 used in the prior art mm, and a load sheet with an aspect ratio of 2.
  • the aspect ratio of the substrate used in this embodiment is greater than 2, and the load sheet can be applied to scenarios with a high aspect ratio.
  • the cross section of the extension portion 222 in the thickness direction of the substrate 11 is a periodic curve shape, such as a rectangle, a wave shape or a broken line, so that the extension portion 222 is a periodic curve shape, and the length of the extension portion 222 is 3.25 ⁇ 0.1 mm, the width is 0.11 ⁇ 0.02mm, the length of the extension part 222 is the dimension of the extension part 222 in the length direction of the substrate 11, that is, the distance from one end of the extension part 222 away from the ground part 221 to the ground part 221 in the length direction of the substrate 11, The width is the dimension of the extension portion 222 in the width direction of the substrate 11 .
  • the length and width are the length and width of the cross-section.
  • the distance between the extension portion 222 and the first electrode 21 is equal to the distance between the extension portion 222 and the long side of the substrate 11 away from the first electrode 21 .
  • the substrate 11 is an aluminum nitride ceramic substrate, and in other embodiments, the substrate 11 can also be an aluminum oxide substrate or a beryllium oxide substrate.
  • the two ends of the resistance layer 31 are respectively overlapped with the grounding portion 221 of the second electrode 22 and the first electrode 21 .
  • the overlap in this application means that both ends of the resistance layer 31 are partially covered on the second electrode 22 .
  • the effective resistance portion of the resistance layer 31 has a length of 2.2 ⁇ 0.05mm, a width of 1.2 ⁇ 0.05mm, and a resistance value of 50 ⁇ 3% ⁇ , wherein , the effective resistance part is the part located between the first electrode 21 and the second electrode 22, excluding the overlapping part, the length of the effective resistance part is the distance between the ground part 221 of the first electrode 11 and the second electrode 22,
  • the length is the dimension in the length direction of the substrate 11, and the width is the dimension in the width direction of the substrate 11;
  • the width of the overlapping portion is the dimension in the length direction of the substrate 11 , that is, the total length of the resistance layer 31 is the length of the effective resistance portion plus the width of the overlapping portion at both
  • the end face layer 51 is a silver paste layer or a sputtered alloy layer.
  • the thickness of the first electrode 21 and the second electrode 22 is 5-20 micrometers, and the thickness is the dimension in the thickness direction of the substrate 11 .
  • the substrate 11 of the load plate is an aluminum nitride ceramic substrate
  • the size is 4.0mm*1.6mm*0.635mm
  • the length of the extension part 222 is 3.25 ⁇ 0.1mm
  • the width is 0.11 ⁇ 0.02mm
  • the effective resistance part of the layer 31 has a length of 2.2 ⁇ 0.05mm, a width of 1.2 ⁇ 0.05mm, and a resistance value of 50 ⁇ 3% ⁇ .
  • the standing wave ratio of the product obtained from the experiment is shown in the curve 302 in FIG.
  • the extension part 222 on the second electrode 22 can effectively reduce the VSWR of the product, so that the VSWR of the product is less than 1.2:1.
  • the present application provides a method for preparing a carrier sheet, as shown in Figure 4, comprising:
  • the first electrode and the second electrode are respectively printed on both ends of the front side of the substrate in the longitudinal direction, the electrode layer is printed on the back side of the substrate, and sintered after drying, wherein one side of the first electrode is flush with one long side of the substrate , the second electrode includes a ground portion and an extension portion, and the extension portion extends along the length direction of the substrate to between the first electrode and the long side of the other side of the substrate;
  • a resistance layer is printed between the first electrode and the second electrode, and sintered after drying;
  • the resistance value of the resistance layer is adjusted to the target value by laser repairing resistance
  • the end surface layer is formed on the end surface of the substrate by printing or sputtering, and the electrode layer and the second electrode are connected to each other to form a support sheet.
  • the end surface layer is formed by printing, a low-temperature curing silver paste is used, the mixed paste is printed on the end surface of the substrate, and dried, and the end surface layer is formed after curing at 200-300 °C;
  • the end surface layer is formed by the method, the sputtering alloy material in the art is used, and the sputtering alloy layer is formed on the end surface of the substrate by the sputtering process as the end surface layer.
  • sintering is performed after drying the protective glass layer, including:
  • the method further includes:
  • a resin protective layer is printed on the surface of the glass protective layer by screen printing, covering the glass protective layer and at least partially covering the first electrode and the second electrode;
  • the method of printing the electrode layer is thick film screen printing
  • the tension of the screen used is 15-25N
  • the mesh number of the screen is 100-500.
  • sintering is performed after printing the first electrode, the second electrode and the electrode layer, including:
  • the preparation method of the carrier sheet comprises:
  • the electrode layer is printed on the back of the substrate by thick film screen printing, the screen tension is 15-25N, the screen mesh number is 100-500, and after printing, it is dried at 150-200 °C for 15-20min;
  • the first electrode and the second electrode are respectively printed on both ends of the front length direction of the substrate, and are dried at 150-200°C for 15-20min after printing;
  • the substrate printed with the electrode layer, the first electrode and the second electrode is sintered at 840°C-880°C for 30-40min;
  • a resistance layer is printed between the first electrode and the second electrode, after printing, it is dried at 150-200°C for 15-20min, and then sintered at 840°C-880°C for 30-40min after drying;
  • the glass protective layer is printed on the surface of the resistance layer. After printing, it is dried at 150-200°C for 15-20min, and then sintered at 640°C-680°C for 30-40min after drying;
  • the resin protective layer is printed on the surface of the glass protective layer by screen printing, covering the glass protective layer and at least partially covering the first electrode and the second electrode. °C-200°C curing 120-150min;
  • the end surface layer is formed on the end surface of the substrate by printing or sputtering, and the electrode layer and the second electrode are connected to each other to form a support sheet.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more features.
  • plurality means two or more, unless otherwise expressly and specifically defined.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Details Of Resistors (AREA)

Abstract

本申请公开一种负载片及其制备方法,通过在第二电极设置延伸部,保证了电阻的面积最大化,能够承受较高的额定功率,同时,设置延伸部能够有效降低大长宽比的情况下的信号的回损,驻波比参数符合要求。

Description

负载片及其制备方法 技术领域
本申请涉及表面组装技术领域,具体涉及一种负载片及其制备方法。
背景技术
负载片主要用于在通信基站中吸收通信部件中反向输入的功率,如果不能承受要求的功率,负载片就会损坏,可能导致整个设备失效。目前大多数通讯基站都是应用负载片来吸收通信部件中反向输入功率,并要求负载片的尺寸越来越小,产品的电性特性例如VSWR(VoltageStandingWaveRatio,电压驻波比)要越小越好,需要满足驻波比在1.25:1以内,即维持较小的回波损耗。
随着5G的FR1(410MHz-7125MHz)频段的应用,频率在4G基础上进一步提升,最高频率扩展到7125MHz,产品尺寸在小型化的基础上,功率并未进行大幅缩减,因此负载片更高的设计挑战,小型化,大功率,宽频段,低驻波将是未来趋势。
现有的负载片采用的设计方案,各个电极分别设置在电阻的两端,围成类矩形的形状,如果针对长宽比比较大的负载片,现有技术的负载片设计方案在确保低驻波比的情况下电极需要占用较大的面积,从而缩小了电阻的面积,导致电阻的散热面积无法满足高功率的需求,因此无法做到既保持功率又维持较低的驻波比。
发明内容
鉴于此,本申请提供一种负载片及其制备方法,以解决现有的负载片无法适用于大长宽比的场景的问题。
本申请的第一方面,提供的一种负载片,包括:
基板;
第一电极,设置在所述基板正面的一端,所述第一电极的一侧与所述基板的一侧长边平齐;
第二电极,包括接地部和延伸部,所述接地部设置在所述基板正面远离 所述第一电极的一端,所述延伸部沿所述基板的长度方向延伸至所述第一电极与基板的另一侧长边之间;
电阻层,设置在所述第一电极与第二电极之间,导通所述第一电极与第二电极的接地部;
电极层,设置在所述基板的背面,所述电极层与第二电极导通。
第二方面,提供一种负载片的制备方法,包括:
准备一基板,采用无水乙醇超声清洗后烘干;
在所述基板的正面长度方向的两端分别印刷第一电极及第二电极,在所述基板的背面印刷电极层,烘干后进行烧结,其中,所述第一电极的一侧与所述基板的一侧长边平齐,所述第二电极包括接地部和延伸部,所述延伸部沿所述基板的长度方向延伸至所述第一电极与基板的另一侧长边之间;
在所述第一电极及第二电极之间印刷电阻层,烘干后进行烧结;
在所述电阻层表面印刷玻璃保护层,烘干所述玻璃保护层后进行烧结;
采用镭射激光修阻将所述电阻层的阻值调整至目标值;
在所述基板的端面采用印刷或溅射的方式形成端面层,以导通所述电极层及第二电极,形成所述负载片。
本申请上述负载片及其制备方法,通过在第二电极设置延伸部,使第二电极长度方向长于宽度方向形成了类“L”形结构,第二电极与第一电极之间形成的半包围结构,在电极结构的驻波比较低的前提下,减少了电极所占用的面积,从而保证了电阻的面积最大化,电阻的散热面积增大,使负载片能够承受较高的额定功率,可以适用于大长宽比的场景。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的负载片的结构示意图;
图2为本申请实施例提供的负载片的结构爆炸示意图;
图3为本申请实施例提供的负载片的产品驻波比示意图;
图4为本申请实施例提供的负载片的制备方法的基本流程示意图。
具体实施方式
下面结合附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本申请一部分实施例,而非全部实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。在不冲突的情况下,下述各个实施例及其技术特征可以相互组合。
如图1及图2所示,负载片包括基板11、第一电极21、第二电极22、电阻层31及电极层41;基板11为薄片形长方体,为方便描述,将其中面积最大的两个对称面分别称为正面与背面,正面或背面仅用于说明两个面的相对性。第一电极21设置在基板11正面的一端,第一电极21的一侧与基板11的一侧长边平齐,在基板11的宽度方向上,第一电极21的尺寸小于基板11的尺寸,即第一电极21的另一侧与基板11长边的另一侧之间存在一定的间隔,第一电极21作为输入焊盘,用于焊接输入引线;第二电极22包括接地部221和延伸部222,接地部221设置在基板11正面远离第一电极21的一端,即第一电极21和接地部221分别设置有基板11长度方向上的两端,在基板11的宽度方向上,接地部221的尺寸大于第一电极21的尺寸,延伸部222设置在接地部221超出第一电极21的部分,沿基板11长度方向延伸至第一电极21与基板11另一侧长边之间的间隔中,第一电极21、第二电极22的接地部221和延伸部222之间形成半包围结构。电阻层31设置在第一电极21与第二电极22之间,即第一电极21与第二电极22形成的半包围结构中,电阻在基板11长度方向上的两端分别与第一电极21和第二电极22的接地部221连接,导通第一电极21和第二电极22的接地部221形成负载电路;电极层41设置在基板11的背面,与第二电极22的接地部221电性连接,使第一电极21、电阻层31、第二电极22和电极层41形成通路,可以是直接电性连接,也可以通过设置连接两者的通路,例如覆盖印刷导通线路等方式,通过通路实现电性连接。具体的,在一些实施方式中,基板11的侧面设置有端面层51,端面层51包含有烧结的导电银粉,具有导电性性质,用于电性 连接电极层41和第二电极22,端面层51设置在第二电极22的接地部221所靠近的基板11侧面,例如远离第一电极21的侧面。
本申请上述负载片及其制备方法,通过在第二电极设置延伸部,使第二电极长度方向长于宽度方向形成了类“L”形结构,第二电极与第一电极之间形成的半包围结构,在电极结构的驻波比较低的前提下,减少了电极所占用的面积,从而保证了电阻的面积最大化,电阻的散热面积增大,使负载片能够承受较高的额定功率,可以适用于大长宽比的场景。
在一些实方式中,负载片还包括玻璃保护层61,设置在电阻层31的表面,覆盖电阻层31,以实现对电阻层31的保护。
在一些实施方式中,负载片还包括要树脂保护层62,或称黑色保护层,设置在玻璃保护层61表面,覆盖玻璃保护层61且至少部分覆盖第一电极21和第二电极22;在另一些实施方式中,树脂保护层62覆盖整个基板11正面除第一电极21的部分,露出部分第一电极21以便在第一电极21上焊接输入引线。
在一些实施方式中,基板11的尺寸为4.0mm*1.6mm*0.635mm,其中4.0mm为长度方向的尺寸,即第一电极21指向第二电极22的接地部221的方向,0.635mm为厚度方向的尺寸,即正面指向背面的方向,1.6mm为宽度方向尺寸,即垂直于长度方向且垂直于厚度方向的方向,相较于现有技术中采用的5.0mm*2.5mm与3.0mm*1.5mm,长宽比为2的负载片,本实施方式采用的基板长宽比大于2,负载片可以应用于长宽比较高的场景。
在一些实施方式中,延伸部222在基板11厚度方向上的截面为周期曲线形,如长方形、波浪形或折线形等,使延伸部222呈周期曲线状,延伸部222的长度为3.25±0.1mm,宽度为0.11±0.02mm,延伸部222的长度为延伸部222在基板11长度方向上的尺寸,即基板11长度方向上延伸部222远离接地部221的一个端点到接地部221的距离,宽度为延伸部222在基板11宽度方向上的尺寸,例如当延伸部222在基板11厚度方向上的截面为长方形时,长度和宽度即该截面的长和宽。
在一些实施方式中,延伸部222与第一电极21的距离等于延伸部222与基板11远离第一电极21的长边的距离。
在一些实施方式中,基板11为氮化铝陶瓷基板,在另一些实施方式中, 基板11也可以采用氧化铝基板或氧化铍基板。
在一些实施方式中,电阻层31的两端分别搭接第二电极22的接地部221及第一电极21,本申请的搭接是指电阻层31的两端部分覆盖在第二电极22的接地部221及第一电极21之上,在一个具体的实施方式中,电阻层31的有效电阻部分长度为2.2±0.05mm,宽度为1.2±0.05mm,阻值为50±3%Ω,其中,有效电阻部分为位于第一电极21与第二电极22之间的部分,不包括搭接部分,有效电阻部分的长度即第一电极11与第二电极22的接地部221之间的距离,长度为基板11长度方向上的尺寸,宽度为基板11宽度方向上的尺寸;电阻层31搭接部分宽度为不小于0.05mm,以确保电阻层31与第一电极21和第二电极22的搭接效果,搭接部分的宽度为基板11长度方向上的尺寸,即电阻层31的总长度为有效电阻部分的长度加上两端搭接部分的宽度。
在一些实施方式中,端面层51为银浆层或溅射合金层。
在一些实施方式中,第一电极21和第二电极22的厚度为5-20微米,厚度为基板11厚度方向上的尺寸。
在一个具体的实施方式中,负载片的基板11采用氮化铝陶瓷基板,尺寸为4.0mm*1.6mm*0.635mm,延伸部222的长度为3.25±0.1mm,宽度为0.11±0.02mm,电阻层31的有效电阻部分长度为2.2±0.05mm,宽度为1.2±0.05mm,阻值为50±3%Ω,实验得到产品的驻波比如图3的曲线302所示,其中,曲线301为产品未添加延伸部222时的驻波比曲线图,可以看出,相较于传统的电极结构,在第二电极22设置延伸部222,可以有效减少产品的驻波比,使产品驻波比小于1.2:1。
基于同样的发明构思,本申请提供一种负载片的制备方法,如图4所示,包括:
准备一基板,采用无水乙醇超声清洗后烘干;
在基板的正面长度方向的两端分别印刷第一电极及第二电极,在基板的背面印刷电极层,烘干后进行烧结,其中,第一电极的一侧与基板的一侧长边平齐,第二电极包括接地部和延伸部,延伸部沿基板的长度方向延伸至第一电极与基板的另一侧长边之间;
在第一电极及第二电极之间印刷电阻层,烘干后进行烧结;
采用镭射激光修阻将电阻层的阻值调整至目标值;
在基板的端面采用印刷或溅射的方式形成端面层,以导通电极层及第二电极,形成负载片。具体的,使用印刷的方式形成端面层时,采用低温固化银浆,将混合的浆料在基板端面印刷,并进行烘干,在200-300℃固化后形成端面层;采用溅射的方式形成端面层时,采用的是本领域中的溅射合金材料,以溅射工艺在基板端面形成溅射合金层,作为端面层。
在一些实施方式中,烘干所述玻璃保护层后进行烧结,,包括:
采用150-200℃烘干15-20min;
采用640℃-680℃烧结30-40min,以烧结玻璃保护层。
在一些实施方式中,采用镭射激光修阻将电阻层的阻值调整至目标值之后,还包括:
采用丝网印刷的方式在玻璃保护层表面印刷树脂保护层,覆盖玻璃保护层及至少部分覆盖第一电极及第二电极;
采用150-200℃烘干15-20min;
采用180℃-200℃固化120min。
在一些实施方式中,印刷电极层的方式为厚膜丝网印刷,采用的丝网张力为15-25N,丝网目数为100-500。
在一些实施方式中,印刷第一电极、第二电极及电极层之后的烘干后进行烧结,包括:
采用150-200℃烘干15-20min;
采用840℃-880℃烧结30-40min。
在一个具体的实施方式中,负载片的制备方法包括:
准备一基板,采用无水乙醇超声清洗10-30min后烘干;
采用厚膜丝网印刷的方式在基板的背面印刷电极层,丝网张力为15-25N,丝网目数为100-500,印刷后经过150-200℃烘干15-20min;
在基板的正面长度方向的两端分别印刷第一电极及第二电极,印刷后经过150-200℃烘干15-20min;
将印刷有电极层、第一电极和第二电极的基板经过840℃-880℃烧结30-40min;
在第一电极及第二电极之间印刷电阻层,印刷后经过150-200℃烘干 15-20min,烘干后经过840℃-880℃烧结30-40min;
在电阻层表面印刷玻璃保护层,印刷后采用150-200℃烘干15-20min,烘干后经过640℃-680℃烧结30-40min;
采用丝网印刷的方式在玻璃保护层表面印刷树脂保护层,覆盖玻璃保护层及至少部分覆盖第一电极及第二电极,印刷后经过150-200℃烘干15-20min,烘干后经过180℃-200℃固化120-150min;
在基板的端面采用印刷或溅射的方式形成端面层,以导通电极层及第二电极,形成负载片。
尽管已经相对于一个或多个实现方式示出并描述了本申请,但是本领域技术人员基于对本说明书和附图的阅读和理解将会想到等价变型和修改。本申请包括所有这样的修改和变型,并且仅由所附权利要求的范围限制。特别地关于由上述组件执行的各种功能,用于描述这样的组件的术语旨在对应于执行所述组件的指定功能(例如其在功能上是等价的)的任意组件(除非另外指示),即使在结构上与执行本文所示的本说明书的示范性实现方式中的功能的公开结构不等同。
即,以上所述仅为本申请的实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,例如各实施例之间技术特征的相互结合,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。
另外,在本申请的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。另外,对于特性相同或相似的结构元件,本申请可采用相同或者不相同的标号进行标识。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个特征。在本申请的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本申请中,“示例性”一词是用来表示“用作例子、例证或说明”。本申请中被描述为“示例性”的任何一个实施例不一定被解释为比其它实施例更加优选或更加具优势。为了使本领域任何技术人员能够实现和使用本申请,本申请给出了以上描述。在以上描述中,为了解释的目的而列出了各个细节。应当明白的是,本领域普通技术人员可以认识到,在不使用这些特定细节的情况下也可以实现本申请。在其它实施例中,不会对公知的结构和过程进行详细阐述,以避免不必要的细节使本申请的描述变得晦涩。因此,本申请并非旨在限于所示的实施例,而是与符合本申请所公开的原理和特征的最广范围相一致。

Claims (20)

  1. 一种负载片,其特征在于,包括:
    基板;
    第一电极,设置在所述基板正面的一端,所述第一电极的一侧与所述基板的一侧长边平齐;
    第二电极,包括接地部和延伸部,所述接地部设置在所述基板正面远离所述第一电极的一端,所述延伸部沿所述基板的长度方向延伸至所述第一电极与基板的另一侧长边之间;
    电阻层,设置在所述第一电极与第二电极之间,导通所述第一电极与第二电极的接地部;
    电极层,设置在所述基板的背面,所述电极层与第二电极导通。
  2. 根据权利要求1所述的负载片,其特征在于,所述基板的侧面设置有端面层,所述电极层通过所述端面层与第二电极导通。
  3. 根据权利要求1所述的负载片,其特征在于,所述负载片还包括玻璃保护层,设置在所述电阻层的表面,覆盖所述电阻层。
  4. 根据权利要求3所述的负载片,其特征在于,所述负载片还包括树脂保护层,设置在所述玻璃保护层表面,覆盖所述玻璃保护层及至少部分覆盖所述第一电极和第二电极。
  5. 根据权利要求1所述的负载片,其特征在于,所述基板的尺寸为4.0mm*1.6mm*0.635mm。
  6. 根据权利要求1所述的负载片,其特征在于,所述延伸部的长度为3.25±0.1mm,宽度为0.11±0.02mm。
  7. 根据权利要求1所述的负载片,其特征在于,所述电阻层的两端分别搭接所述第二电极的接地部及所述第一电极。
  8. 根据权利要求1所述的负载片,其特征在于,所述电阻层的有效电阻部分长度为2.2±0.05mm,宽度为1.2±0.05mm。
  9. 根据权利要求1所述的负载片,其特征在于,所述电阻层的阻值为50±3%Ω。
  10. 根据权利要求1所述的负载片,其中,所述基板为氮化铝陶瓷基板。
  11. 根据权利要求2所述的负载片,其中,所述端面层为银浆层或溅射 合金层。
  12. 根据权利要求1所述的负载片,其中,延伸部与第一电极的距离等于延伸部与基板远离所述第一电极的长边的距离。
  13. 根据权利要求1所述的负载片,其中,所述第一电极与第二电极的厚度为5-20微米。
  14. 根据权利要求1所述的负载片,其中,所述延伸部为周期曲线状。
  15. 根据权利要求7所述的负载片,其中,所述电阻层搭接的部分宽度不小于0.05mm。
  16. 一种负载片的制备方法,其特征在于,包括:
    准备一基板,采用无水乙醇超声清洗后烘干;
    在所述基板的正面长度方向的两端分别印刷第一电极及第二电极,在所述基板的背面印刷电极层,烘干后进行烧结,其中,所述第一电极的一侧与所述基板的一侧长边平齐,所述第二电极包括接地部和延伸部,所述延伸部沿所述基板的长度方向延伸至所述第一电极与基板的另一侧长边之间;
    在所述第一电极及第二电极之间印刷电阻层,烘干后进行烧结;
    在所述电阻层表面印刷玻璃保护层,烘干所述玻璃保护层后进行烧结;
    采用镭射激光修阻将所述电阻层的阻值调整至目标值;
    在所述基板的端面采用印刷或溅射的方式形成端面层,以导通所述电极层及第二电极,形成所述负载片。
  17. 根据权利要求16所述的负载片的制备方法,其中,所述烘干所述玻璃保护层后进行烧结,包括:
    采用150-200℃烘干15-20min;
    采用640℃-680℃烧结30-40min,以烧结所述玻璃保护层。
  18. 根据权利要求16所述的负载片的制备方法,其中,所述采用镭射激光修阻将所述电阻层的阻值调整至目标值之后,还包括:
    采用丝网印刷的方式在所述玻璃保护层表面印刷树脂保护层,覆盖所述玻璃保护层及至少部分覆盖所述第一电极及第二电极;
    采用150-200℃烘干15-20min;
    采用180℃-200℃固化120-150min。
  19. 根据权利要求16所述的负载片的制备方法,其中,印刷所述电极层 的方式为厚膜丝网印刷,采用的丝网张力为15-25N,丝网目数为100-500。
  20. 根据权利要求16所述的负载片的制备方法,其中,所述烘干后进行烧结,包括:
    采用150-200℃烘干15-20min;
    采用840℃-880℃烧结30-40min。
PCT/CN2020/138082 2020-12-21 2020-12-21 负载片及其制备方法 WO2022133674A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/138082 WO2022133674A1 (zh) 2020-12-21 2020-12-21 负载片及其制备方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/138082 WO2022133674A1 (zh) 2020-12-21 2020-12-21 负载片及其制备方法

Publications (1)

Publication Number Publication Date
WO2022133674A1 true WO2022133674A1 (zh) 2022-06-30

Family

ID=82156948

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/138082 WO2022133674A1 (zh) 2020-12-21 2020-12-21 负载片及其制备方法

Country Status (1)

Country Link
WO (1) WO2022133674A1 (zh)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5968960A (ja) * 1982-10-12 1984-04-19 Fujitsu Ltd 膜抵抗体の製造方法
SU1305797A1 (ru) * 1985-12-30 1987-04-23 Предприятие П/Я А-1490 Микрополоскова нагрузка
JP2002367801A (ja) * 2001-06-04 2002-12-20 Kamaya Denki Kk チップ形抵抗器およびその製造方法
JP2005101977A (ja) * 2003-09-25 2005-04-14 Akita Prefecture 高周波用終端抵抗器およびその周波数特性調整方法
CN101243524A (zh) * 2005-08-18 2008-08-13 罗姆股份有限公司 芯片电阻器
CN211062545U (zh) * 2019-12-18 2020-07-21 光颉科技股份有限公司 薄膜电阻元件
CN112054273A (zh) * 2020-08-26 2020-12-08 广东风华高新科技股份有限公司 一种片式衰减器的制备方法
CN112701433A (zh) * 2020-12-21 2021-04-23 深圳顺络电子股份有限公司 负载片及其制备方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5968960A (ja) * 1982-10-12 1984-04-19 Fujitsu Ltd 膜抵抗体の製造方法
SU1305797A1 (ru) * 1985-12-30 1987-04-23 Предприятие П/Я А-1490 Микрополоскова нагрузка
JP2002367801A (ja) * 2001-06-04 2002-12-20 Kamaya Denki Kk チップ形抵抗器およびその製造方法
JP2005101977A (ja) * 2003-09-25 2005-04-14 Akita Prefecture 高周波用終端抵抗器およびその周波数特性調整方法
CN101243524A (zh) * 2005-08-18 2008-08-13 罗姆股份有限公司 芯片电阻器
CN211062545U (zh) * 2019-12-18 2020-07-21 光颉科技股份有限公司 薄膜电阻元件
CN112054273A (zh) * 2020-08-26 2020-12-08 广东风华高新科技股份有限公司 一种片式衰减器的制备方法
CN112701433A (zh) * 2020-12-21 2021-04-23 深圳顺络电子股份有限公司 负载片及其制备方法

Similar Documents

Publication Publication Date Title
KR101659151B1 (ko) 적층 세라믹 커패시터 및 그 실장 기판
US7385286B2 (en) Semiconductor module
US10593481B2 (en) Multilayer ceramic capacitor
JP4809264B2 (ja) コイル内蔵基板
US10593473B2 (en) Multilayer ceramic capacitor and board having the same
KR20170074470A (ko) 적층 세라믹 전자부품 및 그 제조방법
KR20140081360A (ko) 적층 세라믹 커패시터, 그 제조방법 및 적층 세라믹 커패시터가 실장된 회로기판
JPWO2004023597A1 (ja) ストリップ線路型素子、印刷配線基板積載部材、回路基板、半導体パッケージ、及びその形成方法
US9336951B2 (en) Multilayer ceramic capacitor and board for mounting the same
JP4818198B2 (ja) コイル内蔵基板
US10187970B2 (en) Multilayer substrate
JP4925838B2 (ja) コイル内蔵基板
CN112701433B (zh) 负载片及其制备方法
US8310806B2 (en) Multilayer capacitor having high ESR
WO2022133674A1 (zh) 负载片及其制备方法
JP2006100451A (ja) 3端子積層コンデンサ及び実装構造
JPH1140459A (ja) 複合電子部品
JP2003060107A (ja) 半導体モジュール
CN213988456U (zh) 一种散热式无感厚膜功率电阻器
KR102145316B1 (ko) 적층 세라믹 커패시터 및 그 실장 기판
CN210272623U (zh) 200w片式负载片
CN112789764B (zh) 一种基于氮化铝基板的高频负载片及其制作方法
CN210272622U (zh) 60w片式负载片
TWI709987B (zh) 積層陶瓷電容器及其製造方法
JP5692469B2 (ja) 電子部品およびその製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20966255

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20966255

Country of ref document: EP

Kind code of ref document: A1