WO2022107719A1 - 実装基板、及び回路基板 - Google Patents

実装基板、及び回路基板 Download PDF

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Publication number
WO2022107719A1
WO2022107719A1 PCT/JP2021/041912 JP2021041912W WO2022107719A1 WO 2022107719 A1 WO2022107719 A1 WO 2022107719A1 JP 2021041912 W JP2021041912 W JP 2021041912W WO 2022107719 A1 WO2022107719 A1 WO 2022107719A1
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WO
WIPO (PCT)
Prior art keywords
dimension
wall
electronic component
terminal
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2021/041912
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English (en)
French (fr)
Japanese (ja)
Inventor
桐生 池部
智久 水戸瀬
映子 関
晋 谷口
寿之 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to KR1020257030090A priority Critical patent/KR20250139410A/ko
Priority to CN202180077763.4A priority patent/CN116569325A/zh
Priority to KR1020237018238A priority patent/KR102908056B1/ko
Priority to JP2022563740A priority patent/JP7779853B2/ja
Priority to US18/037,130 priority patent/US12439519B2/en
Priority to DE112021005387.6T priority patent/DE112021005387T5/de
Publication of WO2022107719A1 publication Critical patent/WO2022107719A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/8506—Containers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H10H20/853—Encapsulations characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H10H20/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10106—Light emitting diode [LED]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10189—Non-printed connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts

Definitions

  • the present invention relates to a mounting board and a circuit board.
  • Electrical appliances include, for example, smartphones, smart watches, handheld game consoles, etc., and are becoming more and more important.
  • Electronic components are used in many electrical products, and the electronic components are mounted on a substrate. Since many of these electric products are carried around, miniaturization is extremely important, and along with this, there is an increasing demand for miniaturization and thinning of electronic components and substrates.
  • Many technologies have been developed to further promote this miniaturization and thinning. For example, as in Patent Document 1, a recess having a size substantially the same as that of the electronic component to be mounted is formed on one surface of the base material, and the electrode terminal protruding from the wiring circuit formed on the back surface is passed through and connected to the wiring circuit. A technique for obtaining a thin substrate with improved mounting accuracy is disclosed.
  • An object of the present invention is to provide a mounting board and a circuit board that can improve reliability.
  • the mounting board according to the present invention is a mounting board including an electronic component having at least a pair of first terminals and a circuit board having at least a pair of second terminals, the first terminal and the second.
  • the terminals are electrically bonded by a bonding material containing a metal element, the electronic component and the bonding material are arranged in a wall formed by an insulator, and the lower surface of the electronic component is lower than the upper surface of the wall and is surrounded by the wall.
  • the long side of the region is the dimension d1 and the long side of the electronic component is the dimension d2, the value of (dimension d1-dimension d2) is 10 ⁇ m or less.
  • the electronic components and the joining material are arranged in the wall formed by the insulator, and are surrounded by the wall.
  • a shock absorbing structure by a wall can be provided around the electronic component and the joining material.
  • the gap between the electronic component and the wall can be sufficiently reduced. Therefore, when the mounting board receives an external force in the long side direction of the electronic component, the wall easily protects the electronic component. From the above, the reliability of the mounting board can be improved.
  • a constituent material may be arranged between the electronic component and the joining material and the wall.
  • Glulam may be above the top surface of the wall.
  • the electronic component is surrounded higher than the upper surface of the wall by the laminated wood, so that the force applied to the electronic component is further relaxed and the reliability can be improved.
  • a first spacer lower than the top surface of the wall may be placed between the pair of second terminals. As described above, the presence of the first spacer between the terminals makes it difficult for the force applied to the electronic component to be applied to the joining material, and the reliability can be improved.
  • the constituent material may be placed between the bottom and the circuit board.
  • the inner surface of the wall may have a tapered shape. Due to the difference in the coefficient of thermal expansion between the wall and the substrate, a force is applied to the joint material from the wall when a thermal shock is applied. It becomes difficult for the electronic components to come off from the circuit board in the thermal shock test.
  • the circuit board according to the present invention is a circuit board having at least a pair of second terminals, in which a bonding material containing a metal element is arranged on the second terminal, and the pair of second terminals and the bonding material are
  • the dimension h3 is 1 ⁇ m or more and 20 ⁇ m or less when the total height of the second terminal and the bonding material is the dimension h3, which is arranged in the wall formed by the insulator and is formed by the wall.
  • the dimension d5 is 8 ⁇ m or more and 68 ⁇ m or less.
  • circuit board according to the present invention it is possible to obtain a mounting board that exhibits the same operations and effects as described above when electronic components are mounted.
  • FIG. 1 It is a schematic sectional drawing which shows the mounting substrate which concerns on embodiment of this invention. It is a schematic plan view which looked at the mounting board from the upper side. It is a schematic sectional drawing which shows the circuit board which concerns on embodiment of this invention. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is a schematic cross-sectional view which shows the mounting board which concerns on the modification. It is
  • FIG. 1 is a schematic cross-sectional view showing a mounting board 1 according to an embodiment of the present invention.
  • the mounting board 1 includes an electronic component 2 and a circuit board 3.
  • the mounting board 1 is configured by mounting the electronic component 2 on the circuit board 3 via the joining material 4.
  • the electronic component 2 includes a main body 6 and a pair of terminals 7 (first terminal).
  • the main body 6 is a member for exerting a function as an electronic component 2.
  • the terminal 7 is a metal portion formed on the main surface of the main body 6.
  • the electronic component 2 is composed of, for example, a micro LED or the like.
  • the micro LED is a component that emits light in response to an input from the circuit board 3.
  • the circuit board 3 includes a base material 8, a wall 9, and a pair of terminals 10 (second terminals).
  • the base material 8 is a flat plate-shaped main body of the circuit board 3.
  • the wall 9 is a resin layer formed on the upper surface of the base material 8.
  • epoxy resin, acrylic resin, phenol resin, melamine resin, urea resin, alkyd resin, SiOx, ceramics and the like are adopted.
  • an epoxy resin or an acrylic resin is adopted as the material of the wall 9.
  • the terminal 10 is a metal portion formed on the main surface of the base material 8.
  • Ni, Cu, Ti, Cr, Al, Mo, Pt, Au, an alloy selected from at least two of these, and the like are adopted.
  • the joining material 4 is a member that electrically joins the terminal 7 of the electronic component 2 and the terminal 10 of the circuit board 3.
  • the joining material 4 contains a metal element and is composed of an alloy containing the metal element.
  • the metal element of the bonding material 4 is composed of an alloy containing, for example, Sn, Bi, Au and the like.
  • the joining material 4 functions as a solder.
  • the terminal 10, the joining material 4, and the terminal 7 are laminated in order from the upper surface of the base material 8 between the base material 8 and the main body portion 6. At this location, solder bonding is performed after the terminal 10, the bonding material 4, and the terminal 7 are laminated. Therefore, a structure is formed in which the metals of the terminal 10, the joining material 4, and the terminal 7 are melted and diffused.
  • the structure after such solder bonding may be a structure containing a brittle intermetallic compound (IMC).
  • IMC brittle intermetallic compound
  • a pair of recesses 11 are formed on the wall 9.
  • the recess 11 is formed by a through hole penetrating the wall 9.
  • the upper surface of the base material 8 is exposed on the bottom side of the recess 11.
  • the recess 11 has a rectangular shape when viewed from the thickness direction of the circuit board 3 (see FIG. 2).
  • the lower surface 6f of the main body 6 of the electronic component 2 is lower than the upper surface 9a of the wall 9.
  • the electronic component 2, the joining material 4, and the terminal 10 are arranged in the recess 11 formed in the wall 9, and are surrounded by the wall 9.
  • FIG. 2 is a schematic plan view of the mounting board 1 as viewed from above.
  • the recess 11 of the wall 9 has a pair of long sides 11a and 11b and a pair of short sides 11c and 11d.
  • the area surrounded by the wall 9 is defined by the sides 11a, 11b, 11c, 11d.
  • the main body 6 of the electronic component 2 has a pair of long sides 6a and 6b and a pair of short sides 6c and 6d.
  • a slight gap is formed between the sides 11a, 11b, 11c, 11d of the recess 11 and the sides 6a, 6b, 6c, 6d of the main body 6.
  • FIG. 1 is a schematic plan view of the mounting board 1 as viewed from above.
  • the recess 11 of the wall 9 has a pair of long sides 11a and 11b and a pair of short sides 11c and 11d.
  • the area surrounded by the wall 9 is defined by the sides 11a, 11b, 11c, 11d.
  • the height of the upper surface 9a of the wall 9 is defined as the dimension h1
  • the height of the upper surface 6e of the main body 6 of the electronic component 2 is defined as the dimension h2.
  • the dimension h1 is preferably 3 ⁇ m or more, and more preferably 4 ⁇ m or more. Further, the dimension h1 is preferably 30 ⁇ m or less, and more preferably 15 ⁇ m or less.
  • the dimension h2 is preferably 9 ⁇ m or more, and more preferably 10 ⁇ m or more. Further, the dimension h2 is preferably 39 ⁇ m or less, more preferably 15 ⁇ m or less.
  • the value of (dimension h2-dimension h1) is preferably 9 ⁇ m or less, and more preferably 6 ⁇ m or less.
  • the lower limit of the value of (dimension h2-dimension h1) is not particularly limited, and 0 ⁇ m may be set as the lower limit value or -3 ⁇ m may be set as the lower limit value if the production is not affected.
  • the dimensions h1 and h2 can be measured by vertically cutting the mounting substrate 1 and observing the cross section by SEM.
  • the region surrounded by the wall 9, that is, the long sides 11a and 11b of the recess 11 is the dimension d1
  • the long sides 6a and 6b of the main body 6 of the electronic component 2 are the dimensions d2.
  • the dimension d1 is preferably 8 ⁇ m or more, and more preferably 16 ⁇ m or more.
  • the dimension d1 is preferably 68 ⁇ m or less, more preferably 35 ⁇ m or less.
  • the dimension d2 is preferably 7 ⁇ m or more, and more preferably 15 ⁇ m or more.
  • the dimension d2 is preferably 58 ⁇ m or less, and more preferably 25 ⁇ m or less.
  • the dimension d3 is preferably 5 ⁇ m or more, and more preferably 9 ⁇ m or more. Further, the dimension d3 is preferably 44 ⁇ m or less, and more preferably 35 ⁇ m or less.
  • the dimension d4 is preferably 4 ⁇ m or more, and more preferably 8 ⁇ m or more. Further, the dimension d4 is preferably 58 ⁇ m or less, and more preferably 25 ⁇ m or less.
  • the value of (dimension d3-dimension d4) is preferably 10 ⁇ m or less, and more preferably 6 ⁇ m or less.
  • the lower limit of the value of (dimension d3-dimension d4) is not particularly limited, and 0 ⁇ m may be set as the lower limit if the production is not affected.
  • Corners R may be formed at the corners of the recess 11 of the wall 9, the main body 6, and the corners of the terminals 7 and 10.
  • the angle R may be set to, for example, 1 ⁇ m, 5 ⁇ m, 10 ⁇ m, or the like.
  • the dimension of the long side corresponds to the dimension d1.
  • the recess 11 of the wall 9 is square, the dimension of either side corresponds to the dimension d1.
  • the recess 11 of the wall 9 is circular, the diameter corresponds to the dimension d1.
  • the recess 11 of the wall 9 is elliptical, the major axis corresponds to the dimension d1.
  • the recess 11 of the wall 9 is a polygon having a pentagon or more, the distance between each vertex and the side facing the vertex is measured, and the one having the longest distance is defined as the dimension d1.
  • the method of determining the dimension d2 according to the shape of the main body 6 is the same as that of the dimension d1.
  • the joining material 4 is arranged on the terminal 10. Since the bonding material 4 is in a state before being bonded to the electronic component 2, it is thicker than the bonding material 4 in the state of the mounting substrate 1 of FIG. 1 at least.
  • the joining material 4 may be a metal containing a metal element to be a low-temperature solder, and may have any fine structure as long as its overall composition has a low melting point.
  • the joining material 4 may have a laminated structure having two or more metal layers.
  • the circuit board 3 may be distributed in a state of being preheated to form an alloy composed of two or more kinds of metals.
  • the terminal 10 and the joining material 4 are arranged in the recess 11 formed in the wall 9, and are surrounded by the wall 9.
  • the dimension h3 is preferably 1 ⁇ m or more, and more preferably 3 ⁇ m or more.
  • the dimension h3 is preferably 20 ⁇ m or less, and more preferably 9 ⁇ m or less.
  • the width of the space formed by the wall 9 is dimension d5.
  • the space formed by the wall 9 corresponds to the internal space of the recess 11. Therefore, the width of the space is defined by the width of the recess 11.
  • the dimension d5 is preferably 8 ⁇ m or more, and more preferably 16 ⁇ m or more. Further, the dimension d5 is preferably 68 ⁇ m or less, and more preferably 35 ⁇ m or less.
  • the electronic component 2 is mounted on the circuit board 3. At this time, the pair of terminals 7 of the electronic component 2 are placed on the pair of joining materials 4, respectively. Soldering is performed by heating the circuit board 3 and the electronic component 2 in this state.
  • the heating method may be any of a reflow method of heating in a furnace or the like, a thermocompression bonding method of heating while crimping the electronic component 2, and a light heating method of heating by shining light, and these may be combined.
  • the electronic component 2 is mounted on the circuit board 3, and the mounting board 1 is completed.
  • the electronic component 2 and the joining material 4 are arranged in the wall 9 formed by the insulator, and are surrounded by the wall 9. Thereby, a shock absorbing structure by the wall 9 can be provided around the electronic component 2 and the joining material 4. Further, by setting the value of (dimension d1-dimension d2) to 10 ⁇ m or less, the gap between the electronic component 2 and the wall 9 can be sufficiently reduced. Therefore, when the mounting board 1 receives a force from the outside in the long side direction of the electronic component 2, the wall 9 can easily protect the electronic component 2. From the above, the reliability of the mounting board 1 can be improved.
  • the value of (dimension h2-dimension h1) may be 9 ⁇ m or less.
  • the height relationship between the electronic component 2 and the wall 9 is within such a range, it becomes difficult for a force to be applied to the electronic component 2, and reliability can be improved.
  • the mounting board 1 when the electronic component 2 is mounted, the mounting board 1 having the same operation and effect as described above can be obtained.
  • the present invention is not limited to the above-described embodiment.
  • the constituent material 20 may be arranged between the electronic component 2 and the bonding material 4 and the wall 9.
  • the electronic component 2 can be prevented from peeling off from the circuit board 3 by being supported by the constituent material 20.
  • the force applied to the electronic component 2, the joining material 4, and the terminals 7 and 10 is alleviated, and the reliability can be improved.
  • the upper surface 20a of the laminated wood 20 is arranged at a position lower than the upper surface 9a of the wall 9.
  • the material of the constituent material 20 for example, epoxy resin, acrylic resin, phenol resin, melamine resin, urea resin, alkyd resin, SiOx, ceramics and the like are adopted.
  • an epoxy resin or an acrylic resin is adopted as the material of the laminated wood 20.
  • the constituent material 20 may be present above the upper surface 9a of the wall 9.
  • the upper surface 20a of the constituent member 20 is arranged above the upper surface 9a of the wall 9.
  • the electronic component 2 is surrounded by the constituent material 20 higher than the upper surface 9a of the wall 9, so that the force applied to the electronic component 2 is further relaxed and the reliability can be improved.
  • a spacer 40 (second spacer) lower than the upper surface 9a of the wall 9 may be arranged on the inner circumference of the wall 9. Since the spacer 40 exists between the terminal 10 and the wall 9, the force applied to the electronic component 2 is less likely to be applied to the joining material 4, and the reliability can be improved.
  • the spacer 40 may be provided over the entire inner circumference of the wall 9, or may be provided partially.
  • the material of the spacers 30 and 40 the same material as the constituent material 20 may be adopted.
  • the width dimension of the spacers 30 and 40 may be 10 ⁇ m or less, more preferably 9 ⁇ m or less.
  • the relationship of the hardness of the material the relationship of "base material 8> wall 9 ⁇ spacer 30, 40 ⁇ laminated wood 20" may be established.
  • a step 50 is formed in the lower part of the main body 6 of the electronic component 2 by a lower surface 6f and a step surface 6g.
  • the component 20 is arranged between the lower portion and the circuit board 3.
  • the upper surface 20a of the laminated wood 20 reaches the lower surface 6f and the stepped surface 6g.
  • the four wall surfaces of the wall 9 do not have to be connected.
  • the wall 9 the portion corresponding to the long sides 11a, 11b
  • the electronic component 2 it suffices if there is a portion that overlaps with the short sides 6c and 6d.
  • the wall surfaces on the short sides 11c and 11d As shown in FIG. 9B, when the laminated wood 20 is provided, the short sides 11c and 11d of the projection and the electronic component 2 do not have to overlap, but the laminated wood 20 is the wall 9. It is necessary to have a structure that can be caught in.
  • one electronic component 2 is arranged in the wall 9, but a plurality of electronic components 2 may be arranged.
  • the arrangement mode of the plurality of electronic components 2 is not particularly limited.
  • the width dimension at the upper end of the recess 11 (that is, the position of the upper surface of the wall 9) is defined as the dimension d5. That is, the dimension d5 is determined at the position where the width dimension is the largest in the recess 11.
  • the mounting boards of Examples 1 to 7 and Comparative Example 1 were prepared by the following manufacturing methods.
  • the base material 8 on which the terminal 10 was formed was prepared.
  • a glass epoxy substrate was used as the base material 8.
  • As the terminal 10 a Cu terminal coated with a Ni film was adopted. 100 pairs of terminals 10 were formed on the base material 8.
  • a pair of Bi / Sn laminated pads were formed on the terminal 10 as the joining material 4 to a desired thickness.
  • the paired joining materials 4 were formed at 100 positions.
  • d5-s is the dimension of the width of the space formed by the wall in the lateral direction
  • d5-l is the dimension of the width of the space formed by the wall in the longitudinal direction.
  • the following tests were performed on the mounting boards of Examples 1 to 7 and Comparative Example 1 as described above.
  • the obtained mounting board was freely dropped 10 times from a height of 30 cm.
  • the ratio of the number of LED chips remaining after the test to the total number of LED chips on the mounting board before the test was examined as the "LED residual ratio".
  • the number ratio of the LED chips that emit light was investigated as the "light emission rate of the remaining LED”.
  • the light emission rate of the remaining LED was OK when it was 50% or more.
  • the ratio of the number of light emitting LED chips to the number of LED chips before the test was examined as the "OK ratio after the test". The test results at this time are shown in the table of FIG.
  • Comparative Example 1 it was confirmed that the LED chip could not be protected from the impact of the test because (dimension d1-dimension d2) became too wide, and the LED chip could be easily removed from the circuit board. .. On the other hand, in Examples 1 to 7, it was confirmed that there were many remaining LED chips and that the remaining LED chips could also emit light at a high rate.
  • (dimension d1-dimension d2) is within an appropriate range, so that a part of the LED chip comes into contact with the wall, and the impact on the LED chip and the joint in the test is applied to the wall. It is understood that the LDE residual rate and the LED generation rate increase as a result of the relaxation. From Example 4, since (dimension h2-dimension h1) is larger than that of Example 2, the contact property between the LED chip and the wall is slightly lowered, and the impact of the LED chip is transmitted to the bonding material. It is understood that the number of LED chips that can withstand is slightly reduced.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
PCT/JP2021/041912 2020-11-19 2021-11-15 実装基板、及び回路基板 Ceased WO2022107719A1 (ja)

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KR1020257030090A KR20250139410A (ko) 2020-11-19 2021-11-15 실장 기판, 및 회로 기판
CN202180077763.4A CN116569325A (zh) 2020-11-19 2021-11-15 安装基板及电路基板
KR1020237018238A KR102908056B1 (ko) 2020-11-19 2021-11-15 실장 기판, 및 회로 기판
JP2022563740A JP7779853B2 (ja) 2020-11-19 2021-11-15 実装基板、及び回路基板
US18/037,130 US12439519B2 (en) 2020-11-19 2021-11-15 Mounting board and circuit board
DE112021005387.6T DE112021005387T5 (de) 2020-11-19 2021-11-15 Montageplatte und leiterplatte

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JP2020192498 2020-11-19

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WO2025110020A1 (ja) * 2023-11-21 2025-05-30 Tdk株式会社 回路基板、及び実装基板の製造方法
WO2025110022A1 (ja) * 2023-11-21 2025-05-30 Tdk株式会社 回路基板、及び実装基板の製造方法

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TWI698968B (zh) 2016-07-04 2020-07-11 大陸商蘇州晶方半導體科技股份有限公司 封裝結構以及封裝方法
KR20180032985A (ko) * 2016-09-23 2018-04-02 삼성전자주식회사 집적회로 패키지 및 그 제조 방법과 집적회로 패키지를 포함하는 웨어러블 디바이스
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WO2025110022A1 (ja) * 2023-11-21 2025-05-30 Tdk株式会社 回路基板、及び実装基板の製造方法

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KR102908056B1 (ko) 2026-01-06
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US12439519B2 (en) 2025-10-07
JP7779853B2 (ja) 2025-12-03
TWI826866B (zh) 2023-12-21
US20240008183A1 (en) 2024-01-04
TW202230637A (zh) 2022-08-01
JPWO2022107719A1 (https=) 2022-05-27
KR20250139410A (ko) 2025-09-23
KR20230096090A (ko) 2023-06-29

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