WO2022077771A1 - 显示面板及其制作方法 - Google Patents

显示面板及其制作方法 Download PDF

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Publication number
WO2022077771A1
WO2022077771A1 PCT/CN2020/140211 CN2020140211W WO2022077771A1 WO 2022077771 A1 WO2022077771 A1 WO 2022077771A1 CN 2020140211 W CN2020140211 W CN 2020140211W WO 2022077771 A1 WO2022077771 A1 WO 2022077771A1
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Prior art keywords
layer
light
display panel
pixel
light extraction
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PCT/CN2020/140211
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English (en)
French (fr)
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苗洋
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2022077771A1 publication Critical patent/WO2022077771A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof.
  • OLED Organic Light-Emitting Diode, Organic Light Emitting Diode
  • OLED display panels have the advantages of self-illumination, no need for backlight, high contrast, wide color gamut, thin thickness, fast response speed and can be used for flexible panels, especially top emission.
  • OLED display panels are considered to be the next-generation flat-panel display technology due to their high aperture ratio.
  • the embodiments of the present application provide a display panel and a manufacturing method thereof, which can solve the problem in the prior art that the top-emission OLED display panel has serious microcavity effect and total reflection effect, and has a cathode layer with a large sheet resistance, and further Technical issues affecting the display effect of the display panel.
  • an embodiment of the present application provides a display panel, including:
  • a substrate layer including a substrate and a thin film transistor device layer disposed on the substrate;
  • a light-emitting functional layer is disposed on the substrate layer, the light-emitting functional layer includes a light-emitting device layer, a pixel definition layer and a cathode layer located on the pixel definition layer, the pixel definition layer has a plurality of pixel openings, and the Each of the plurality of pixel openings is provided with the light-emitting device layer, and the cathode layer at least continuously covers the plurality of pixel openings and overlaps with the light-emitting device layer;
  • the conduction layer is disposed on the cathode layer, and the projection of the conduction layer on the pixel definition layer is staggered from the plurality of pixel openings.
  • the material of the light extraction film includes hydrophilic nanoparticles, and the light extraction film has an ordered micro-nano structure, wherein the crystals formed by the hydrophilic nanoparticles The particle size is between 10 nm and 100 nm.
  • the material of the light extraction film includes hydrophilic metal oxide nanoparticles.
  • the material of the conduction layer includes a hydrophobic conductive material, and the hydrophobic conductive material includes nanosilver or graphene.
  • a display panel which includes:
  • a substrate layer including a substrate and a thin film transistor device layer disposed on the substrate;
  • a light-emitting functional layer is disposed on the substrate layer, the light-emitting functional layer includes a light-emitting device layer, a pixel definition layer and a cathode layer located on the pixel definition layer, the pixel definition layer has a plurality of pixel openings, and the Each of the plurality of pixel openings is provided with the light-emitting device layer, and the cathode layer at least continuously covers the plurality of pixel openings and overlaps with the light-emitting device layer;
  • a conduction layer disposed on the cathode layer, and the projection of the conduction layer on the pixel definition layer is staggered from the plurality of pixel openings;
  • the light extraction film has hydrophilicity
  • the conduction layer has hydrophobicity
  • the material of the light extraction film includes hydrophilic nanoparticles, and the light extraction film has an ordered micro-nano structure, wherein the crystals formed by the hydrophilic nanoparticles The particle size is between 10 nm and 100 nm.
  • the material of the light extraction film includes hydrophilic metal oxide nanoparticles.
  • the material of the conduction layer includes a hydrophobic conductive material, and the hydrophobic conductive material includes nanosilver or graphene.
  • a method for manufacturing a display panel comprising the following steps:
  • the light-emitting functional layer includes a light-emitting device layer, a pixel definition layer, and a cathode layer located on the pixel definition layer, and the pixel definition layer has a plurality of pixel openings, and each of the plurality of pixel openings is provided with the light-emitting device layer, and the cathode layer at least continuously covers the plurality of pixel openings and overlaps with the light-emitting device layer;
  • a conduction layer is prepared on the cathode layer, and the projection of the conduction layer on the pixel definition layer is staggered from the plurality of pixel openings.
  • the light extraction film has hydrophilicity
  • the conduction layer has hydrophobicity
  • the step S30 includes:
  • the hydrophilic nanoparticles include metal oxide nanoparticles with hydrophilicity, and the light extraction film has ordered micro-nano structures, wherein the hydrophilicity Nanoparticles are formed with grain sizes ranging from 10 nm to 100 nm.
  • the conductive layer is prepared on the entire surface of the cathode layer by using a hydrophobic conductive material.
  • the conduction layer is prepared by a whole-surface transfer process, and the hydrophobic conductive material includes nano-silver or graphene.
  • the step S40 further includes: preparing an encapsulation layer to cover the pixel definition layer, the light extraction film and the conduction layer, and the encapsulation layer faces away from the liner
  • a cover plate is provided on one side of the bottom layer, and the cover plate is attached to the side of the encapsulation layer facing away from the substrate layer through an adhesive layer.
  • a light extraction film is arranged at the pixel opening, and a conduction layer is arranged at a position other than the pixel opening, and the light extraction film can improve the light extraction efficiency of the display panel and expand the viewing angle range of the display panel.
  • the conducting layer can reduce the sheet resistance of the cathode layer, thereby avoiding the occurrence of the voltage drop phenomenon, and improving the display uniformity of the display panel.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a plane distribution of a display panel according to an embodiment of the present application.
  • FIG. 3 is a flowchart of a method for fabricating a display panel provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a manufacturing process of a display panel according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a manufacturing process of a display panel according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a manufacturing process of a display panel according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a manufacturing process of a display panel according to an embodiment of the present application.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present application, “plurality” means two or more, unless otherwise expressly and specifically defined.
  • the terms “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • installed should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
  • the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
  • the embodiments of the present application provide a display panel and a manufacturing method thereof.
  • the top-emission OLED display panel has serious microcavity effect and total reflection effect, and has a cathode layer with a large sheet resistance, which further affects the The technical problem of the display effect of the display panel.
  • the display panel includes: a substrate layer 101 , including a substrate 1011 and a thin film transistor device layer disposed on the substrate 1011 1012; a light-emitting functional layer 102, disposed on the substrate layer 101, the light-emitting functional layer 102 includes a light-emitting device layer 1023, a pixel definition layer 1021 and a cathode layer 1024 on the pixel definition layer 1021, the pixel definition layer 1024
  • the layer 1021 has a plurality of pixel openings 1022, and each of the plurality of pixel openings 1022 is provided with the light-emitting device layer 1023, and the cathode layer 1024 at least continuously covers the plurality of pixel openings 1022 and overlap with the light emitting device layer 1023; the light extraction film 103 is disposed on the cathode layer 1024 corresponding to the plurality of pixel openings 10
  • the light extraction film 103 is provided corresponding to the plurality of pixel openings 1022, corresponding to the The conduction layer 104 is disposed in the area other than the plurality of pixel openings 1022, wherein the light extraction film 103 can improve the light extraction efficiency and viewing angle range of the display panel, and the conduction layer 104 can reduce the cathode layer 1024.
  • the surface resistance of the pixel opening 1022 is higher than that of the surface resistance, thereby avoiding the occurrence of voltage drop and improving the display uniformity of the display panel, and the conducting layer 104 is located outside the light output range of the pixel opening 1022, and will not affect the light emission of the display panel.
  • the display effect of the display panel is further improved.
  • the display panel includes a substrate layer 101 , a light-emitting functional layer 102 disposed on the substrate layer 101 , and a light-emitting functional layer 102 covering the light-emitting functional layer 102 .
  • the encapsulation layer 105 is disposed on the cover plate 107 on the encapsulation layer 105 , and the cover plate 107 is attached to the side of the encapsulation layer 105 facing away from the substrate layer 101 through the adhesive layer 106 .
  • the substrate layer 101 includes a substrate 1011 and a thin film transistor device layer 1012 disposed on the substrate 1011 , and the thin film transistor device of the thin film transistor device layer 1012 is not limited to metal oxide transistor devices or silicon transistor devices.
  • the light-emitting functional layer 102 is disposed on the substrate layer 101 , and the light-emitting functional layer 102 includes a light-emitting device layer 1023 disposed on the substrate layer 101 , a pixel definition layer 1021 , and a pixel definition layer 1021 disposed on the substrate layer 101 .
  • the above cathode layer 1024 wherein the pixel definition layer 1021 has a plurality of pixel openings 1022, and each of the pixel openings 1022 is provided with the light emitting device layer 1023, and the cathode layer 1024 is at least continuous and secure. It covers the plurality of pixel openings 1022 and overlaps with the light-emitting device layer 1023.
  • the light-emitting functional layer 102 further includes an anode layer (not shown in the figure), and the anode A layer can be disposed under the pixel definition layer 1021, and the anode layer is exposed through the plurality of pixel openings 1022, so that the light emitting device layer 1023 is also overlapped with the anode layer, wherein the light emission
  • the device layer 1023 may sequentially include a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, and an electron injection layer along the direction from the anode layer to the cathode layer 1024, in cooperation with the anode layer and the cathode layer 1024 to complete the transport of electrons and holes, and to form electron-hole pairs in the organic light-emitting layer to complete light emission.
  • the light extraction film 103 is disposed on the cathode layer 1024 corresponding to the plurality of pixel openings 1024, and the material of the light extraction film 103 includes hydrophilic nanoparticles, that is, the light extraction provided by the embodiment of the present application.
  • the thin film 103 has hydrophilicity.
  • the material of the light extraction film 103 may include hydrophilic metal oxide nanoparticles, such as zinc oxide nanoparticles or titanium dioxide nanoparticles, and the light extraction film 103 has short-range ordered micro-nano structures, wherein, The particle size of the hydrophilic nanoparticles ranges from 1 nm to 100 nm, and the size of the crystallites formed by the hydrophilic nanoparticles is between 10 nm and 100 nm, so that the light extraction film 103 can reduce the display The micro-cavity effect and total reflection effect of the panel further improve the light extraction efficiency and viewing angle range of the display panel.
  • the conduction layer 104 is disposed on the cathode layer 1024, and the material of the conduction layer 104 includes a hydrophobic conductive material, that is, the conductive layer provided by the embodiment of the present application.
  • the conduction layer 104 is hydrophobic, and the hydrophobic conductive material includes nano-silver or graphene.
  • the light extraction film 103 is hydrophilic and the conduction layer 104 is hydrophobic, in the manufacturing process, when the conduction layer 104 is prepared, the hydrophobic conductive material will automatically avoid the light extraction
  • the thin film 103 is formed in areas other than the pixel openings 1022 , so that the conduction layer 104 is staggered from the pixel openings 1022 , which can prevent the conduction layer 104 from affecting the light output of the light emitting device layer 1023 .
  • a hydrophilic light extraction film is arranged corresponding to the pixel opening, and a hydrophobic conduction layer is arranged corresponding to the non-pixel opening, so that the conduction layer can automatically avoid the pixels during the film formation process.
  • the opening simplifies the process flow, and the light extraction film can reduce the microcavity effect and total reflection effect of the display panel, improve the light extraction efficiency of the display panel, and expand the viewing angle range of the display panel.
  • the surface resistance of the cathode layer can avoid the occurrence of voltage drop and improve the display uniformity of the display panel.
  • the conduction layer is arranged to avoid the pixel opening, thereby preventing the conduction layer from affecting the light output of the light emitting device layer.
  • a method for fabricating the display panel described in the above-mentioned embodiment is also provided.
  • the method includes the following steps:
  • a substrate 1011 is provided, and the substrate 1011 is not limited to a flexible substrate or a rigid substrate, and a thin film transistor device layer 1012 is prepared on the substrate 1011, and the transistor devices in the thin film transistor device layer 1012 are not limited to metal oxide transistors or Silicon transistors.
  • the light-emitting functional layer 102 includes a light-emitting device layer 1023, a pixel definition layer 1021, and a cathode layer 1024 on the pixel definition layer 1021, the pixel definition layer 1024.
  • the layer 1021 has a plurality of pixel openings 1022, and each of the plurality of pixel openings 1022 is provided with the light-emitting device layer 1023, and the cathode layer 1024 at least continuously covers the plurality of pixel openings 1022 and It is overlapped with the light emitting device layer 1023 .
  • An anode layer (not shown in the figure) and the pixel definition layer 1021 are prepared on the substrate layer 101 , and the pixel definition layer 1021 is patterned to form the plurality of pixel openings 1022 .
  • a plurality of pixel openings 1022 expose the upper surface of the anode layer, and a light-emitting device layer 1023 is prepared on the anode layer corresponding to each of the pixel openings 1022 , and the light-emitting device layer 1023 includes sequentially disposed on the anode layer.
  • a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer and an electron injection layer of A plurality of pixel openings 1022 are overlapped with the light-emitting device layer 1023 to complete the transport of electrons and holes, and electron-hole pairs are formed in the organic light-emitting layer to complete light emission.
  • the step S30 includes:
  • hydrophilic nanoparticles include a hydrophilic metal oxide Nanoparticles, such as zinc oxide nanoparticles or titanium dioxide nanoparticles, have short-range ordered micro-nano structures in the light extraction film 103 , wherein the size of the hydrophilic nanoparticles ranges from 1 nm to 100 nm.
  • the nanoparticle solution can be formed on the cathode layer 1024 to form the nanoparticle film by an inkjet printing method, and the cathode layer 1024 can conformally cover the plurality of pixel openings 1022, That is, the undulations along the pixel opening 1022 are arranged on the pixel definition layer 1021 , and the nanoparticle film is also arranged in the pixel opening 1022 to facilitate the implementation of the inkjet printing process.
  • the nanoparticle film is annealed or plasma treated to remove the solvent in the nanoparticle film, and the hydrophilic nanoparticles are complexed to form crystal grains, and the hydrophilic nanoparticles are formed
  • the grain size of the nanoparticle film is between 10 nm and 100 nm, so that the nanoparticle film forms a stable film layer morphology, so as to obtain the light extraction film 103 .
  • a conductive layer 104 is prepared on the cathode layer 1024 , and the projection of the conductive layer 104 on the pixel definition layer 1021 is staggered from the plurality of pixel openings 1022 .
  • the conductive layer 104 is prepared on the cathode layer 1024 by using a hydrophobic conductive material, and the hydrophobic conductive material includes nano-silver or graphene, wherein, the hydrophobic transfer roller can be used to transfer the whole surface
  • the conductive layer 104 is obtained by using the conductive material. Since the conductive layer 104 is hydrophobic and the light extraction film 103 is hydrophilic, when the hydrophobic conductive material is transferred to the entire surface, The hydrophobic conductive material will automatically avoid the light extraction film 103 to form a film, that is, the hydrophobic conductive material will automatically avoid the pixel opening 1022 to form a film, so that the conductive layer 104 is formed in the film.
  • the projection on the pixel definition layer 1021 is staggered from the plurality of pixel openings 1022 , preventing the conduction layer 104 from affecting the light output of the light emitting device layer 1023 .
  • the encapsulation layer 105 is prepared to cover the pixel definition layer 1021 , the light extraction film 103 and the conduction layer 104 , and the encapsulation layer 105 may include a laminated structure of a water vapor barrier layer and a stress buffer layer for effective encapsulation
  • the material of the water vapor barrier layer includes one or more combination materials of Al 2 O 3 , TiO 2 , SiN x , SiCN x and SiO x
  • the material of the stress buffer layer includes acrylic, hexagonal One or more combination materials of methyl dimethylsilyl ether, polyacrylates, polycarbonates and polystyrene.
  • a cover plate 107 is disposed on the side of the encapsulation layer 105 facing away from the substrate layer 101 , and the cover plate 107 is attached to the side of the encapsulation layer 105 facing away from the substrate layer 101 through the adhesive layer 106 ,
  • the adhesive layer 106 can be coated on one side of the cover plate 107 first, and then the side coated with the adhesive layer 106 and the side of the encapsulation layer 105 facing away from the substrate layer 101 can be pasted. combined, and finally UV-curing or heat-curing to obtain the display panel.
  • a hydrophilic light extraction film is arranged corresponding to the pixel opening, and a hydrophobic conduction layer is arranged corresponding to the non-pixel opening, so that the conduction layer can automatically avoid the pixels during the film formation process.
  • the opening simplifies the process flow, and the light extraction film can reduce the microcavity effect and total reflection effect of the display panel, improve the light extraction efficiency of the display panel, and expand the viewing angle range of the display panel.
  • the surface resistance of the cathode layer can avoid the occurrence of voltage drop and improve the display uniformity of the display panel.
  • the conduction layer is arranged to avoid the pixel opening, thereby preventing the conduction layer from affecting the light output of the light emitting device layer.
  • a display panel and a manufacturing method thereof provided by the embodiments of the present application have been described in detail above.
  • the principles and implementations of the present application are described with specific examples in this article.
  • the technical solution of the application and its core idea; those of ordinary skill in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements to some of the technical features; and these modifications or replacements,
  • the essence of the corresponding technical solutions does not deviate from the scope of the technical solutions of the embodiments of the present application.

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Abstract

本申请公开了一种显示面板及其制作方法，包括：像素定义层与阴极层，所述像素定义层具有多个像素开口，阴极层至少连续地覆盖多个像素开口；光提取薄膜，对应多个像素开口设置于阴极层上；以及导通层，设置于阴极层上，且导通层在像素定义层上的投影与多个像素开口相错开。

Description

显示面板及其制作方法 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制作方法。
 背景技术
OLED（Organic Light-Emitting Diode，有机发光二极管）显示面板由于具备自发光、不需要背光源、对比度高、色域宽、厚度薄、反应速度快和可用于柔性面板等优点，特别是顶发射的OLED显示面板由于具有开口率高等优势，被认为是下一代平面显示新型技术。
但是，对于现有的顶发射的OLED显示面板，存在一些较为严重的问题：存在严重的微腔效应和全反射作用，使得OLED显示面板的光取出效率和视角范围受到较大的影响；阴极层的面电阻较大，存在电压降的现象，使得OLED显示面板显示不均一；且上述问题均对显示面板的显示效果产生了较大的影响。
 技术问题
本申请实施例提供一种显示面板及其制作方法，能够解决现有技术中，由于顶发射的OLED显示面板存在严重的微腔效应和全反射作用，以及具有面电阻较大的阴极层，进而影响显示面板的显示效果的技术问题。
 技术解决方案
为解决上述技术问题，本申请实施例提供一种显示面板，包括：
衬底层，包括基板以及设置于所述基板上的薄膜晶体管器件层；
发光功能层，设置于所述衬底层上，所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
光提取薄膜，对应所述多个像素开口设置于所述阴极层上；以及
导通层，设置于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开。
在本申请的一种实施例中，所述光提取薄膜的材料包括亲水性纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
在本申请的一种实施例中，所述光提取薄膜的材料包括具有亲水性的金属氧化物纳米颗粒。
在本申请的一种实施例中，所述导通层的材料包括疏水性导电材料，且所述疏水性导电材料包括纳米银或石墨烯。
根据本申请的上述目的，提供一种显示面板，其包括：
衬底层，包括基板以及设置于所述基板上的薄膜晶体管器件层；
发光功能层，设置于所述衬底层上，所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
光提取薄膜，对应所述多个像素开口设置于所述阴极层上；以及
导通层，设置于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开；
其中，所述光提取薄膜具有亲水性，所述导通层具有疏水性。
在本申请的一种实施例中，所述光提取薄膜的材料包括亲水性纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
在本申请的一种实施例中，所述光提取薄膜的材料包括具有亲水性的金属氧化物纳米颗粒。
在本申请的一种实施例中，所述导通层的材料包括疏水性导电材料，且所述疏水性导电材料包括纳米银或石墨烯。
根据本申请的上述目的，提供一种显示面板的制作方法，所述方法包括以下步骤：
S10、制备薄膜晶体管器件层于基板上，以形成衬底层；
S20、制备发光功能层于所述衬底层上，且所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
S30、对应所述多个像素开口制备光提取薄膜于所述阴极层上；以及
S40、制备导通层于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开。
在本申请的一种实施例中，所述光提取薄膜具有亲水性，所述导通层具有疏水性。
在本申请的一种实施例中，所述步骤S30包括：
S301、对应所述多个像素开口将亲水性纳米颗粒溶液制于所述阴极层上，以形成纳米颗粒薄膜；以及
S302、对所述纳米颗粒薄膜进行退火处理或等离子处理，以形成所述光提取薄膜。
在本申请的一种实施例中，所述亲水性纳米颗粒包括具有亲水性的金属氧化物纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
在本申请的一种实施例中，所述步骤S40中，采用疏水性导电材料于所述阴极层上整面制备所述导通层。
在本申请的一种实施例中，所述步骤S40中，采用整面转印工艺制备所述导通层，且所述疏水性导电材料包括纳米银或石墨烯。
在本申请的一种实施例中，所述步骤S40还包括：制备封装层覆盖所述像素定义层、所述光提取薄膜以及所述导通层，并于所述封装层背向所述衬底层一侧设置盖板，且所述盖板通过粘附层贴附于所述封装层背向所述衬底层的一侧。
 有益效果
相较于现有技术，本申请通过在像素开口处设置光提取薄膜，并在非像素开口的位置设置导通层，且光提取薄膜可以提高显示面板的光提取效率，扩大显示面板的视角范围，导通层可以降低阴极层的面电阻，进而避免电压降现象的产生，提高了显示面板的显示均一性。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为本申请实施例提供的显示面板的结构示意图。
图2为本申请实施例提供的显示面板平面分布的结构示意图。
图3为本申请实施例提供的显示面板制作方法的流程图。
图4为本申请实施例提供的显示面板制作流程的结构示意图。
图5为本申请实施例提供的显示面板制作流程的结构示意图。
图6为本申请实施例提供的显示面板制作流程的结构示意图。
图7为本申请实施例提供的显示面板制作流程的结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本申请实施例提供一种显示面板及其制作方法，针对现有技术中，由于顶发射的OLED显示面板存在严重的微腔效应和全反射作用，以及具有面电阻较大的阴极层，进而影响显示面板的显示效果的技术问题。
为解决上述技术问题，本申请实施例提供一种显示面板，请参照图1以及图2，所述显示面板包括：衬底层101，包括基板1011以及设置于所述基板1011上的薄膜晶体管器件层1012；发光功能层102，设置于所述衬底层101上，所述发光功能层102包括发光器件层1023、像素定义层1021以及位于所述像素定义层1021上的阴极层1024，所述像素定义层1021具有多个像素开口1022，且所述多个像素开口1022中的每一者内皆设置有所述发光器件层1023，所述阴极层1024至少连续地覆盖所述多个像素开口1022并与所述发光器件层1023搭接；光提取薄膜103，对应所述多个像素开口1022设置于所述阴极层1024上；以及导通层104，设置于所述阴极层1024上，且所述导通层104在所述像素定义层1021上的投影与所述多个像素开口1022相错开。
在实施应用过程中，由于现有的顶发射的OLED显示面板，存在一些较为严重的问题：存在严重的微腔效应和全反射作用，使得OLED显示面板的光取出效率和视角范围受到较大的影响；阴极层的面电阻较大，存在电压降的现象，使得OLED显示面板显示不均一；而本申请实施例中，通过对应所述多个像素开口1022设置所述光提取薄膜103，对应所述多个像素开口1022以外的区域设置所述导通层104，其中，所述光提取薄膜103可以提高显示面板的光提取效率和视角范围，所述导通层104可以降低所述阴极层1024的面电阻，进而避免电压降现象的产生，提高了显示面板的显示均一性，且所述导通层104位于所述像素开口1022的出光范围之外，不会影响所述显示面板的发光，进一步地提高了显示面板的显示效果。
更进一步地，请继续参照图1以及图2，本申请实施例中，所述显示面板包括衬底层101，设置于所述衬底层101上的发光功能层102，覆盖所述发光功能层102的封装层105，设置于所述封装层105上的盖板107，且所述盖板107通过粘附层106贴附于所述封装层105背向所述衬底层101的一侧。
所述衬底层101包括基板1011以及设置于所述基板1011上的薄膜晶体管器件层1012，且所述薄膜晶体管器件层1012的薄膜晶体管器件不限于金属氧化物晶体管器件或硅材料晶体管器件。
所述发光功能层102设置于所述衬底层101上，且所述发光功能层102包括设置于所述衬底层101上的发光器件层1023、像素定义层1021以及设置于所述像素定义层1021上的阴极层1024，其中，所述像素定义层1021具有多个像素开口1022，且每个所述像素开口1022内皆设置有所述发光器件层1023，所述阴极层1024至少连续地、保形地覆盖所述多个像素开口1022，并与所述发光器件层1023搭接，需要说明的是，所述发光功能层102还包括阳极层（图中并未示出），且所述阳极层可设置于所述像素定义层1021下，并藉由所述多个像素开口1022暴露所述阳极层，以使得所述发光器件层1023还与所述阳极层搭接，其中，所述发光器件层1023沿所述阳极层到所述阴极层1024的方向可依次包括空穴注入层、空穴传输层、有机发光层、电子传输层以及电子注入层，配合所述阳极层以及所述阴极层1024，以完成电子与空穴的传输，并在所述有机发光层形成电子空穴对，完成发光。
对应所述多个像素开口1024将所述光提取薄膜103设置于所述阴极层1024上，所述光提取薄膜103的材料包括亲水性纳米颗粒，即本申请实施例提供的所述光提取薄膜103具有亲水性。
所述光提取薄膜103的材料可包括具有亲水性的金属氧化物纳米颗粒，例如氧化锌纳米颗粒或二氧化钛纳米颗粒，且所述光提取薄膜103内具有短程有序的微纳米结构，其中，所述亲水性纳米颗粒的粒径范围包括1nm-100nm，且所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间，以使得所述光提取薄膜103能降低所述显示面板的微腔效应以及全反射作用，进而提高所述显示面板的光提取效率和视角范围。
对应所述多个像素开口1024以外的区域，将所述导通层104设置于所述阴极层1024上，所述导通层104的材料包括疏水性导电材料，即本申请实施例提供的所述导通层104具有疏水性，且所述疏水性导电材料包括纳米银或石墨烯。
由于所述光提取薄膜103具有亲水性，所述导通层104具有疏水性，那么在制程中，制备所述导通层104时，所述疏水性导电材料将自动避开所述光提取薄膜103，以在所述像素开口1022以外的区域成膜，使得所述导通层104与所述像素开口1022相错开，可以防止所述导通层104影响所述发光器件层1023的出光。
综上所述，本申请实施例通过对应像素开口设置具有亲水性的光提取薄膜，对应非像素开口设置具有疏水性的导通层，使得导通层在成膜过程中可以自动避开像素开口，简化了工艺流程，且光提取薄膜可以降低显示面板的微腔效应和全反射作用，提高显示面板的光提取效率，扩大显示面板的视角范围，导通层与阴极层搭接，可以降低阴极层的面电阻，进而避免电压降现象的产生，提高了显示面板的显示均一性，另外，导通层避开像素开口设置，进而防止了导通层影响发光器件层的出光。
在本申请实施例中，还提供一种上述实施例中所述的显示面板的制作方法，具体请参照图1、图2、图3、图4、图5、图6以及图7，且所述方法包括以下步骤：
S10、制备薄膜晶体管器件层1012于基板1011上，以形成衬底层101。
提供基板1011，且所述基板1011不限于柔性基板或刚性基板，并制备薄膜晶体管器件层1012于所述基板1011上，且所述薄膜晶体管器件层1012内的晶体管器件不限于金属氧化物晶体管或硅材料晶体管。
S20、制备发光功能层102于所述衬底层101上，且所述发光功能层102包括发光器件层1023、像素定义层1021以及位于所述像素定义层1021上的阴极层1024，所述像素定义层1021具有多个像素开口1022，且所述多个像素开口1022中的每一者内皆设置有所述发光器件层1023，所述阴极层1024至少连续地覆盖所述多个像素开口1022并与所述发光器件层1023搭接。
在所述衬底层101上制备阳极层（图中并未示出）以及所述像素定义层1021，且所述像素定义层1021经图案化处理以形成所述多个像素开口1022，所述多个像素开口1022暴露所述阳极层的上表面，并对应每个所述像素开口1022在所述阳极层上制备发光器件层1023，且所述发光器件层1023包括依次设置于所述阳极层上的空穴注入层、空穴传输层、有机发光层、电子传输层以及电子注入层，然后在所述像素定义层1021上设置所述阴极层1024，所述阴极层1024至少连续地覆盖所述多个像素开口1022，并与所述发光器件层1023搭接，以完成电子与空穴的传输，并在所述有机发光层形成电子空穴对，完成发光。
S30、对应所述多个像素开口1022制备光提取薄膜103于所述阴极层104上。
具体地，所述步骤S30包括：
S301、对应所述多个像素开口1022将亲水性纳米颗粒溶液制于所述阴极层1024上，以形成纳米颗粒薄膜，其中，所述亲水性纳米颗粒包括具有亲水性的金属氧化物纳米颗粒，例如氧化锌纳米颗粒或二氧化钛纳米颗粒，且所述光提取薄膜103内具有短程有序的微纳米结构，其中，所述亲水性纳米颗粒的粒径范围包括1nm-100nm。
需要说明的是，可采用喷墨打印的方法将所述纳米颗粒溶液在所述阴极层1024上形成所述纳米颗粒薄膜，所述阴极层1024可保形地覆盖所述多个像素开口1022，即沿所述像素开口1022的起伏贴合的设置于所述像素定义层1021上，且所述纳米颗粒薄膜也对应设置于所述像素开口1022内，以便于喷墨打印工艺的实施。
S302、对所述纳米颗粒薄膜进行退火处理或等离子处理，以形成所述光提取薄膜103。
对所述纳米颗粒薄膜进行退火处理或等离子处理，去除所述纳米颗粒薄膜内的溶剂，并使得所述亲水性纳米颗粒之间发生络合形成晶粒，且所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间，以使得所述纳米颗粒薄膜形成稳定的膜层形貌，以得到所述光提取薄膜103。
S40、制备导通层104于所述阴极层1024上，且所述导通层104在所述像素定义层1021上的投影与所述多个像素开口1022相错开。
采用疏水性导电材料整面制备所述导通层104于所述阴极层1024上，且所述疏水性导电材料包括纳米银或石墨烯，其中，可采用转印辊整面转印所述疏水性导电材料以得到所述导通层104，由于所述导通层104具有疏水性，且所述光提取薄膜103具有亲水性，因此，在整面转印所述疏水性导电材料时，所述疏水性导电材料会自动避开所述光提取薄膜103而成膜，即所述疏水性导电材料会自动避开所述像素开口1022而成膜，使得所述导通层104在所述像素定义层1021上的投影与所述多个像素开口1022相错开，防止了所述导通层104影响所述发光器件层1023的出光。
制备封装层105覆盖所述像素定义层1021、所述光提取薄膜103以及所述导通层104，且所述封装层105可以包括水汽阻挡层和应力缓冲层的层叠结构，以起到有效封装的作用，所述水汽阻挡层的材料包括Al 2O 3、TiO 2、SiN x、SiCN x以及SiO x中的一种或一种以上的组合材料，所述应力缓冲层的材料包括亚克力、六甲基二甲硅醚、聚丙烯酸酯类、聚碳酸酯类以及聚苯乙烯中的一种或一种以上的组合材料。
在所述封装层105背向所述衬底层101一侧设置盖板107，且所述盖板107通过粘附层106贴附于所述封装层105背向所述衬底层101的一侧，可先在所述盖板107的一侧涂布所述粘附层106，再将涂布有所述粘附层106的一面与所述封装层105背向所述衬底层101的一侧贴合，最后进行紫外光固化或加热固化，以得到所述显示面板。
综上所述，本申请实施例通过对应像素开口设置具有亲水性的光提取薄膜，对应非像素开口设置具有疏水性的导通层，使得导通层在成膜过程中可以自动避开像素开口，简化了工艺流程，且光提取薄膜可以降低显示面板的微腔效应和全反射作用，提高显示面板的光提取效率，扩大显示面板的视角范围，导通层与阴极层搭接，可以降低阴极层的面电阻，进而避免电压降现象的产生，提高了显示面板的显示均一性，另外，导通层避开像素开口设置，进而防止了导通层影响发光器件层的出光。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示面板及其制作方法进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (15)

  1. 一种显示面板，其包括：
    衬底层，包括基板以及设置于所述基板上的薄膜晶体管器件层；
    发光功能层，设置于所述衬底层上，所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
    光提取薄膜，对应所述多个像素开口设置于所述阴极层上；以及
    导通层，设置于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开。
  2. 根据权利要求1所述的显示面板，其中，所述光提取薄膜的材料包括亲水性纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
  3. 根据权利要求2所述的显示面板，其中，所述光提取薄膜的材料包括具有亲水性的金属氧化物纳米颗粒。
  4. 根据权利要求1所述的显示面板，其中，所述导通层的材料包括疏水性导电材料，且所述疏水性导电材料包括纳米银或石墨烯。
  5. 一种显示面板，其包括：
    衬底层，包括基板以及设置于所述基板上的薄膜晶体管器件层；
    发光功能层，设置于所述衬底层上，所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
    光提取薄膜，对应所述多个像素开口设置于所述阴极层上；以及
    导通层，设置于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开；
    其中，所述光提取薄膜具有亲水性，所述导通层具有疏水性。
  6. 根据权利要求5所述的显示面板，其中，所述光提取薄膜的材料包括亲水性纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
  7. 根据权利要求6所述的显示面板，其中，所述光提取薄膜的材料包括具有亲水性的金属氧化物纳米颗粒。
  8. 根据权利要求5所述的显示面板，其中，所述导通层的材料包括疏水性导电材料，且所述疏水性导电材料包括纳米银或石墨烯。
  9. 一种显示面板的制作方法，所述方法包括以下步骤：
    S10、制备薄膜晶体管器件层于基板上，以形成衬底层；
    S20、制备发光功能层于所述衬底层上，且所述发光功能层包括发光器件层、像素定义层以及位于所述像素定义层上的阴极层，所述像素定义层具有多个像素开口，且所述多个像素开口中的每一者内皆设置有所述发光器件层，所述阴极层至少连续地覆盖所述多个像素开口并与所述发光器件层搭接；
    S30、对应所述多个像素开口制备光提取薄膜于所述阴极层上；以及
    S40、制备导通层于所述阴极层上，且所述导通层在所述像素定义层上的投影与所述多个像素开口相错开。
  10. 根据权利要求9所述的显示面板的制作方法，其中，所述光提取薄膜具有亲水性，所述导通层具有疏水性。
  11. 根据权利要求9所述的显示面板的制作方法，其中，所述步骤S30包括：
    S301、对应所述多个像素开口将亲水性纳米颗粒溶液制于所述阴极层上，以形成纳米颗粒薄膜；以及
    S302、对所述纳米颗粒薄膜进行退火处理或等离子处理，以形成所述光提取薄膜。
  12. 根据权利要求11所述的显示面板的制作方法，其中，所述亲水性纳米颗粒包括具有亲水性的金属氧化物纳米颗粒，且所述光提取薄膜内具有有序的微纳米结构，其中所述亲水性纳米颗粒形成的晶粒尺寸介于10nm至100nm之间。
  13. 根据权利要求9所述的显示面板的制作方法，其中，所述步骤S40中，采用疏水性导电材料于所述阴极层上整面制备所述导通层。
  14. 根据权利要求13所述的显示面板的制作方法，其中，所述步骤S40中，采用整面转印工艺制备所述导通层，且所述疏水性导电材料包括纳米银或石墨烯。
  15. 根据权利要求9所述的显示面板的制作方法，其中，所述步骤S40还包括：制备封装层覆盖所述像素定义层、所述光提取薄膜以及所述导通层，并于所述封装层背向所述衬底层一侧设置盖板，且所述盖板通过粘附层贴附于所述封装层背向所述衬底层的一侧。
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