WO2022188275A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2022188275A1
WO2022188275A1 PCT/CN2021/096484 CN2021096484W WO2022188275A1 WO 2022188275 A1 WO2022188275 A1 WO 2022188275A1 CN 2021096484 W CN2021096484 W CN 2021096484W WO 2022188275 A1 WO2022188275 A1 WO 2022188275A1
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WIPO (PCT)
Prior art keywords
pixel
bank
thickness
electrode
pixel bank
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PCT/CN2021/096484
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English (en)
French (fr)
Inventor
陈远鹏
徐源竣
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Priority to US17/419,733 priority Critical patent/US20230157080A1/en
Publication of WO2022188275A1 publication Critical patent/WO2022188275A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/173—Passive-matrix OLED displays comprising banks or shadow masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel, a method for manufacturing the same, and a display device.
  • AMOLED Active Matrix Organic Light Emitting Display
  • LCD Liquid Crystal Display
  • AMOLED Active Matrix Organic Light Emitting Display
  • the preparation of AMOLED can be divided into evaporation type and ink jet printing (Ink jet Print, IJP) type.
  • IJP Ink jet Print
  • evaporation technology requires white light OLED (WOLED) combined with color filter (Color Filter, CF) to achieve color display, while the CF-free display corresponding to fine reticle cannot be applied to large Mass production of high-end generation lines.
  • WOLED white light OLED
  • CF color filter
  • the inkjet printing process overcomes the shortcomings of the evaporation technology to a certain extent, can directly realize the printing of full-color pixels of the large-generation line, and greatly improves the use efficiency of OLED materials.
  • the inkjet printing process needs to rely on a specially designed pixel definition layer.
  • the traditional side by side (SBS) type pixel definition layer design performs pixel openings on the entire pixel definition layer pattern, and the OLED material is printed in the openings.
  • SBS side by side
  • the OLED materials of the same color are separated by the pixel definition layer, and continuous printing by the inkjet printing process cannot be realized, which greatly limits the advantages of the printing technology and reduces the printing efficiency.
  • the present application provides a display panel, a method for manufacturing the same, and a display device to alleviate the technical problem that the design of the existing SBS type pixel definition layer affects the printing efficiency.
  • An embodiment of the present application provides a display panel, wherein a pixel definition layer of the display panel includes: a plurality of first pixel banks arranged along a first direction; a plurality of second pixel banks arranged along a second direction, adjacent to The two first pixel banks and the adjacent two second pixel banks are surrounded to form a light emitting area; the first direction and the second direction form an angle; wherein, in the second direction, The light-emitting materials in the light-emitting area are the same; the thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the material of the first pixel bank includes a hydrophilic organic material.
  • the material of the second pixel bank includes a hydrophobic organic material.
  • the first pixel bank and the second pixel bank are integrally provided.
  • the luminescent materials in the two adjacent light-emitting regions are different.
  • the display panel includes an array substrate and a plurality of first electrodes.
  • a plurality of first electrode arrays are arranged on the array substrate, and adjacent first electrodes form a first space in the first direction, and a second space is formed in the second direction;
  • the pixel definition A layer is arranged on the first electrode and the array substrate, and the first pixel bank is arranged in the first interval and covers part of the first electrode;
  • the second pixel bank is arranged on within the second interval and covering the first pixel bank and part of the first electrode; wherein, the light emitting area formed by the pixel definition layer corresponds to the first electrode, and the luminescent material covers the first electrode.
  • a light-emitting layer is formed on the first electrode.
  • the thickness of the first pixel bank is greater than or equal to the thickness of the light emitting layer.
  • the thickness of the first pixel bank is greater than the thickness of the first electrode.
  • the thickness of the first pixel bank ranges from 0.1 micrometer to 0.6 micrometer, and the thickness of the second pixel bank ranges from 0.8 micrometer to 2 micrometers.
  • An embodiment of the present application further provides a method for fabricating a display panel, which includes the following steps: providing an array substrate, preparing first electrodes arranged in an array on the array substrate, and forming adjacent first electrodes in a first direction a first interval, a second interval is formed adjacent to the first electrode in the second direction; a first pixel bank is prepared in the first interval, and the thickness of the first pixel bank is greater than that of the first electrode , so that the first pixel bank covers part of the first electrode; a second pixel bank is prepared in the second interval to form a pixel definition layer, and the thickness of the second pixel bank is greater than The thickness of the first pixel bank, and the second pixel bank covers part of the first pixel bank and part of the first electrode, so that the adjacent second pixel banks are formed between Printing grooves; continuously printing luminescent materials of the same color in the same printing groove, and printing luminescent materials of different colors in different printing grooves to form a luminescent layer, the luminescent layer is formed in a place not
  • the material of the first pixel bank includes a hydrophilic organic material
  • the material of the second pixel bank includes a hydrophobic organic material
  • An embodiment of the present application further provides a display device including the display panel of one of the foregoing embodiments.
  • a display panel and a manufacturing method thereof provided in the present application are provided with a plurality of first electrodes on an array substrate, a first interval and a second interval between the plurality of first electrodes, and a first pixel is arranged corresponding to the first interval a bank, a second pixel bank is arranged corresponding to the second interval, the second pixel bank spans the first pixel bank, the thicknesses of the first pixel bank and the second pixel bank are both greater than the thickness of the first electrode, and The thickness of the second pixel bank is greater than the thickness of the first pixel bank, so that the same color luminescent material can be continuously printed between adjacent second pixel banks, which solves the problem that the existing SBS type pixel definition layer design cannot continuously print And the problem that affects the printing efficiency.
  • the first pixel bank is made of hydrophilic organic material, which can quickly disperse the printed luminescent material in the area defined by the first pixel bank, which further improves the printing efficiency;
  • the second pixel bank is made of hydrophobic organic material, which can prevent Printed luminescent material spills causing color mixing.
  • FIG. 1 is a schematic top-view structure diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a schematic top-view structural diagram of a first electrode array arrangement provided in an embodiment of the present application.
  • Fig. 3 is a schematic diagram of a cross-sectional structure along the A-A' direction in Fig. 1 .
  • Fig. 4 is a schematic diagram of a cross-sectional structure along the B-B' direction in Fig. 1 .
  • Fig. 5 is a schematic diagram of a cross-sectional structure along the C-C' direction in Fig. 1 .
  • FIG. 6 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present application.
  • FIG. 7 is a schematic cross-sectional structure diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 8 is another schematic top-view structure diagram of a display panel provided by an embodiment of the present application.
  • FIG. 9 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present application.
  • FIGS. 10 to 12 are partial top-view structural schematic diagrams of the display panel manufactured by each step in the display panel manufacturing method provided by the embodiment of the present application.
  • FIG. 1 is a schematic top-view structure diagram of a display panel provided by an embodiment of the present application.
  • the display panel 100 includes an OLED display panel and the like, for example, an AMOLED display panel.
  • the display panel 100 includes an array substrate 10, a plurality of first electrodes 20, a pixel definition layer 30, a light emitting layer 50, etc., wherein the pixel definition layer 30 includes a plurality of first pixel banks 31 arranged along the first direction X ; A plurality of second pixel banks 32 arranged along the second direction Y, the thickness of the second pixel banks 32 is greater than the thickness of the first pixel banks 31 . And two adjacent first pixel banks 31 and two adjacent second pixel banks 32 surround to form a light emitting area.
  • a light-emitting material is disposed in the light-emitting region to form the light-emitting layer 50 .
  • the first direction X and the second direction Y form an included angle a, and the included angle a may be greater than 0 degrees and less than 180 degrees.
  • the first direction X is parallel to the array On the horizontal side of the substrate 10
  • the second direction Y is parallel to the vertical side of the array substrate 10
  • the included angle a is 90 degrees.
  • the light-emitting materials in the light-emitting region are the same.
  • FIG. 2 is a schematic top-view structural diagram of the arrangement of the first electrode array provided by the embodiment of the present application.
  • a plurality of first electrodes 20 are arranged in an array on the array substrate 10 , a first space 211 is formed in the first direction X adjacent to the first electrodes 20 , and the second direction Y is formed in the adjacent first electrodes 20 A second spacer 222 is formed thereon.
  • the first electrode 20 includes a short side 21 and a long side 22 , the short side 21 is arranged along the first direction X, and the long side 22 is arranged along the second direction Y.
  • the short side 21 of the first electrode 20 refers to the short side of the first electrode 20 in a top view.
  • the shape of the short side 21 can be a straight line, a broken line, an arc, etc., as shown in FIG. 2 .
  • the length of the short side 21 of the first electrode 20 is a circular arc.
  • the long side 22 of the first electrode 20 refers to the longer side of the first electrode 20 in a top view.
  • the first electrodes 20 are arrayed on the array substrate 10 in multiple rows and columns, where a row refers to an arrangement along the first direction X, and a column refers to an array along the second direction In the arrangement of Y, the first electrodes 20 in each row are parallel to each other, and the first electrodes 20 in each column are also parallel to each other.
  • the included angle a between the first direction X and the second direction Y is 90 degrees
  • each row and each column are perpendicular to each other, so that the first interval 211 and the second interval 222 also intersect each other perpendicularly.
  • the present application is not limited to this, and the rows and columns of the first electrodes 20 of the present application may also be arranged at a certain angle, so the first interval 211 and the second interval 222 are also arranged to intersect at a certain angle.
  • FIG. 3 is a schematic cross-sectional structure diagram along the AA' direction in FIG. 1
  • FIG. 4 is a cross-sectional structure schematic diagram along the BB' direction in FIG. 1
  • the first pixel bank 31 is disposed in the first spacer 211 and covers part of the first electrode 20 .
  • the thickness of the first pixel bank 31 is greater than the thickness of the first electrode 20 , so the first pixel bank 31 fills the first space 211 and exceeds the thickness of the first electrode 20 and covers all Part of the short side 21 of the first electrode 20 is described.
  • the short side 21 of the first electrode 20 is an arc
  • the first pixel bank 31 covers part of the arc.
  • the second pixel banks 32 are disposed in the second spacers 222 and cover the first pixel banks 31 and part of the first electrodes 20 .
  • the thickness of the second pixel bank 32 is greater than the thickness of the first electrode 20 , so the second pixel bank 32 fills the second space 222 and exceeds the thickness of the first electrode 20 and covers the entire thickness of the first electrode 20 .
  • the long side 22 of the first electrode 20 and the part of the short side 21 not covered by the first pixel bank 31 so that the light emitting area is defined by the first pixel bank 31 and the second pixel bank 32 .
  • the thickness of the second pixel bank 32 is also greater than the thickness of the first pixel bank 31, and the area where the second pixel bank 32 and the first pixel bank 31 intersect, the second pixel The bank 32 covers the first pixel bank 31 , as shown in FIG. 5 .
  • the thickness of the first pixel bank 31 is in the range of 0.1 to 0.6 microns, and the thickness of the second pixel bank 32 is in the range of 0.8 to 2 microns.
  • the short side 21 of the first electrode 20 is an arc
  • the first pixel bank 31 covers part of the short side 21 of the first electrode 20
  • the second pixel bank 32 covers The long side 22 of the first electrode 20 and the part of the short side 21 not covered by the first pixel bank 31, so as shown in FIG. 5, the second pixel bank 32 is close to the light emitting area The position still covers the first pixel bank 31 .
  • the extending direction of the luminescent material can continuously print the luminescent material to form the luminescent layer 50 .
  • the light-emitting layer 50 is disposed on the first electrode 20 not covered by the second pixel bank 32, the light-emitting layer 50 is formed by printing light-emitting materials of different colors in different printing grooves 321, and The luminescent materials of the same color are printed in the same printing groove 321, so that the luminescent materials of the same color are arranged between the adjacent second pixel banks 32, so that in the second direction Y, the luminescent materials in the light-emitting area are The luminescent material is the same.
  • the light-emitting material of the light-emitting layer 50 includes a red light-emitting material 51 , a green light-emitting material 52 and a blue light-emitting material 53 .
  • the red light-emitting material 51 , the green light-emitting material 52 and the blue light-emitting material 53 are respectively arranged in different printing grooves 321 .
  • FIG. 4 schematically shows three printings grooves 321, but the display panel 100 may include more first electrodes 20, so that more second pixel banks 32 are arranged to form more printing grooves 321, then the red light-emitting material 51, The green light-emitting material 52 and the blue light-emitting material 53 are arranged in more printing grooves 321 in sequence and cyclically.
  • the thickness of the second pixel bank 32 is greater than the thickness of the light emitting layer 50 .
  • the luminescent materials of the same color printed between the adjacent second pixel banks 32 are spaced apart by the first pixel banks 31 , so that the luminescent material only covers the light-emitting area. on the first electrode 20 , but not on the first pixel bank 31 .
  • different color luminescent materials are printed in different printing grooves 321, so the adjacent first pixel banks 31 are spaced with different color luminescent materials, so in the first direction X, adjacent The light-emitting materials in the two light-emitting regions are different. That is, the first pixel banks 31 are used to define luminescent materials of the same color, and the second pixel banks 32 are used to define luminescent materials of different colors.
  • the thickness of the first pixel bank 31 is greater than or equal to the thickness of the light emitting layer 50 .
  • the material of the first pixel bank 31 includes a hydrophilic organic material, and the first pixel bank 31 prepared by using the hydrophilic organic material has hydrophilic properties.
  • the material of the second pixel bank 32 includes a hydrophobic organic material, such as a fluorine-containing organic material with hydrophobic properties, and the second pixel bank 32 prepared by using the hydrophobic organic material has hydrophobic properties.
  • the light-emitting layer 50 when preparing the light-emitting layer 50, different colors of light-emitting materials are respectively dissolved in a solvent to form different inks, and inks of different concentrations are configured according to the thickness of the light-emitting layer 50 to be prepared, and then processes such as inkjet printing are used.
  • the ink is printed in the printing grooves 321 formed by the adjacent second pixel banks 32 , and the ink is cured to form a film to form the light-emitting layer 50 .
  • the volume of the ink is much larger than the volume of the light-emitting layer 50 after curing and film formation, and the ink has fluidity.
  • the first pixel bank 31 with hydrophilic properties can speed up printing
  • the flow of the ink in the groove 321 makes the printed ink quickly disperse in the area defined by the first pixel bank 31 to prevent the ink from accumulating and overflowing in a certain area, which can further improve the efficiency of continuous printing.
  • the second pixel bank 32 with hydrophobic properties can prevent the printed ink from overflowing into the adjacent printing grooves 321 to cause color mixing.
  • the thickness of the second pixel bank 32 needs to be the same as that of the printed ink. Height matches.
  • a second electrode 60 needs to be provided, and the second electrode 60 covers the light-emitting layer 50 and the second pixel bank 32 , as shown in FIG. 6 .
  • the first electrode 20 is an anode
  • the second electrode 60 is a cathode, but the present application is not limited thereto.
  • the light-emitting layer 50 emits light under the combined action of the first electrode 20 and the second electrode 60 , and the array substrate 10 provides a driving voltage to the first electrode 20 .
  • the array substrate 10 may include a base substrate 11 and a light shielding layer 12, a buffer layer 13, an active layer 14, a gate insulating layer 15, a gate 16, a light shielding layer 12, a buffer layer 13, an active layer 14, a gate insulating layer 15, a gate 16,
  • the base substrate 11 may be a rigid substrate or a flexible substrate.
  • the base substrate 11 may include a rigid substrate such as a glass substrate; when the base substrate 11 is a flexible substrate, it may include Flexible substrates such as polyimide (PI) films and ultra-thin glass films.
  • PI polyimide
  • the material of the buffer layer 13 may include inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, etc.
  • the buffer layer 13 can prevent unwanted impurities or contaminants (such as moisture, oxygen, etc.) from The base substrate 11 diffuses into devices that may be damaged by these impurities or contaminants, while also providing a flat top surface.
  • the material of the active layer 14 may be a metal oxide semiconductor material, such as IGZO, ITZO, or IGZTO.
  • the active layer 14 includes a channel region 141 , a source region 142 and a drain region 143 .
  • the light shielding layer 12 is disposed correspondingly to the active layer 14 , and the light shielding layer 12 may be a metal light shielding layer for shielding the active layer 14 to prevent light from irradiating the channel region 141 .
  • Both the gate 16 and the gate insulating layer 15 are disposed corresponding to the channel region 141 .
  • the source-drain layer 18 includes a source electrode 181 and a drain electrode 182, the drain electrode 182 is connected to the drain region 143 through the via hole of the interlayer insulating layer 17, and the source electrode 181 is connected to the drain region 143 through the interlayer insulating layer Another via hole of the layer 17 is connected to the source region 142 , and the source electrode 181 is also connected to the light shielding layer 12 through a via hole passing through the interlayer insulating layer 17 and the buffer layer 13 .
  • the passivation layer 19 covers the source and drain layers 18 and the interlayer insulating layer 17
  • the planarization layer 191 covers the passivation layer 19 .
  • the material of the planarization layer 191 includes organic materials such as organic photoresist, and the planarization layer 191 can provide a flat top surface for the array substrate 10 .
  • the array substrate 10 is further provided with openings penetrating the planarization layer 191 and the passivation layer 19 , the openings expose the source electrodes 181 , and the first electrodes 20 pass through the openings connected to the source electrode 181 .
  • this embodiment schematically shows a structure of the array substrate 10, but the present application is not limited to this.
  • the array substrate 10 of the present application may also be other types of array substrates, such as GOA (Gate Driver on Array, array substrate row driver) substrate, etc., which will not be repeated here.
  • GOA Gate Driver on Array, array substrate row driver
  • the display panel 100 may further include an encapsulation layer (not shown) disposed on the second electrode 60 .
  • the organic encapsulation layer and the second inorganic encapsulation layer three-layer thin films are stacked in sequence to form a laminated structure or a multi-layered laminated structure, which is used to protect the light-emitting layer 50 and prevent the light-emitting material of the light-emitting layer 50 from failing due to the invasion of water and oxygen.
  • the first pixel bank 31 and the second pixel bank 32 are disposed on the array substrate 10 , and the second pixel bank 32 spans the first pixel bank 31 , the thickness of the second pixel bank 32 is greater than the thickness of the first pixel bank 31, so that the same color luminescent material can be continuously printed between the adjacent second pixel banks 32, which solves the problem of the existing SBS
  • the design of the type pixel definition layer cannot continuously print the luminescent material, which affects the printing efficiency.
  • the first pixel bank 31 adopts a hydrophilic organic material, which can quickly disperse the printed luminescent material in the area defined by the first pixel bank 31, further improving the efficiency of continuous printing;
  • the second pixel bank 31 32 uses hydrophobic organic materials, which can prevent the printed luminescent material from overflowing and causing color mixing.
  • FIG. 8 is another schematic top-view structure diagram of the display panel provided by the embodiment of the present application.
  • the first pixel bank 31 between the adjacent second pixel banks 32 is covered with the luminescent material.
  • the thickness of the first pixel bank 31 can be smaller than the thickness of the light-emitting layer 50 , and continuous printing can still be used when printing the light-emitting material to form the light-emitting layer 50 to improve printing efficiency, and the formed light-emitting layer 50 is also continuous.
  • the above-mentioned embodiments which will not be repeated here.
  • the first pixel bank 31 and the second pixel bank 32 are integrally provided, and the first pixel bank 31 and the second pixel are integrated.
  • the banks 32 are simultaneously formed from the same material under the same process conditions.
  • a half-tone mask Half-tone mask, HTM
  • HTM half-tone mask
  • a first pixel bank 31 with a thinner thickness is formed in the first direction X
  • a second pixel bank 32 with a thicker thickness is formed in the second direction Y to form the pixel definition layer 30 structure shown in FIG. 1 .
  • the material of the pixel definition layer 30 includes an affinity organic material and the like. For other descriptions, please refer to the above-mentioned embodiments, which will not be repeated here.
  • FIG. 9 is a schematic flowchart of a method for fabricating a display panel provided by an embodiment of the present application.
  • the display panel preparation method includes the following steps:
  • the array substrate 10 includes a base substrate 11 and a light-shielding layer 12 , a buffer layer and a light-shielding layer 12 , a buffer layer, and a layered layer on the base substrate 11 in sequence.
  • the base substrate 11 may be a rigid substrate or a flexible substrate.
  • the base substrate 11 may include a rigid substrate such as a glass substrate.
  • the base substrate 11 is a flexible substrate.
  • flexible substrates such as polyimide films and ultra-thin glass films can be included.
  • a metal layer is deposited on the base substrate 11, and the metal layer may be a stack of single-layer or multi-layer metal layers, and the metal layer is patterned to form a light-shielding layer with wiring and light-shielding functions 12.
  • a deposition process such as PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method) is used to deposit a buffer layer 13 on the light shielding layer 12 and the base substrate 11, and the buffer layer 13 is
  • the material can be inorganic materials such as silicon oxide, silicon nitride, and silicon oxynitride, for example, one or a combination of several of Si3N4, SiO2, SiON, and the like.
  • the thickness of the buffer layer 13 may be 1000 angstroms to 5000 angstroms.
  • PVD Physical Vapor Deposition, physical vapor deposition
  • other deposition processes deposit a metal oxide semiconductor material on the buffer layer 13, and the metal oxide semiconductor material may be IGZO, ITZO, IGZTO, or the like.
  • the metal oxide semiconductor is patterned to form an active layer 14, and the thickness of the active layer 14 may be 100 angstroms to 1000 angstroms.
  • a deposition process such as PECVD is used to deposit a gate dielectric material on the active layer 14 and the buffer layer 13 , and the gate dielectric material includes SiOx or the like.
  • the thickness of the deposited gate dielectric material may be 500 angstroms to 2000 angstroms.
  • a gate metal layer is deposited on the gate dielectric material by a deposition process such as PVD, and the gate metal layer is patterned to form a gate pattern.
  • the gate pattern as a shield, the gate dielectric material is etched, and the gate 16 , the gate insulating layer 15 , and the channel region 141 of the active layer 14 are formed in self-alignment, so that the active layer 14 is divided into These are the channel region 141 , the source region 142 and the drain region 143 .
  • an inorganic thin film such as SiO2 is deposited on the gate 16, the active layer 14 and the buffer layer 13 by a deposition process such as PECVD to form an interlayer insulating layer 17.
  • the thickness of the interlayer insulating layer 17 is Can be 2000 angstroms to 8000 angstroms.
  • the interlayer insulating layer 17 and the buffer layer 13 are patterned to form a plurality of via holes.
  • a source/drain metal layer is deposited on the interlayer insulating layer 17 by a deposition process such as PVD, and the source/drain metal layer is patterned to form a source/drain layer 18, and the source/drain layer 18 includes a source/drain layer.
  • the drain 182 is connected to the drain region 143 of the active layer 14 through the via hole of the interlayer insulating layer 17 .
  • the source electrode 181 is connected to the source region 142 of the active layer 14 through the via hole of the interlayer insulating layer 17 , and also through the via hole passing through the interlayer insulating layer 17 and the buffer layer 13 connected to the light shielding layer 12 .
  • an inorganic thin film such as SiO2 is deposited on the source/drain layer 18 and the interlayer insulating layer 17 by a deposition process such as PECVD as the passivation layer 19, and the thickness of the passivation layer 19 may be 1000 to 1000 angstroms. 5000 angstroms.
  • a planarization layer 191 is deposited on the passivation layer 19, and the material of the planarization layer 191 includes organic photoresist and the like.
  • the planarization layer 191 and the passivation layer 19 are patterned to form openings, and thus the fabrication of the array substrate 10 is completed.
  • electrode material is deposited on the array substrate 10 , and the electrode material is patterned to form a plurality of first electrodes 20 arranged in an array, as shown in FIG. 2 .
  • the electrode material includes a transparent conductive electrode material, such as ITO (Indium Tin Oxide, indium tin oxide) and the like.
  • ITO Indium Tin Oxide, indium tin oxide
  • the present application is not limited to this, and the first electrode 20 of the present application may also be an opaque electrode, which may be specifically determined according to the light emitting direction of the display panel 100 .
  • a plurality of first electrodes 20 are arranged in an array on the array substrate 10, and a first space 211 is formed in the first direction X adjacent to the first electrodes 20, and the adjacent first electrodes 20 are in the first direction X.
  • the second space 222 is formed in the second direction Y.
  • the first electrode 20 includes a short side 21 and a long side 22. The short side 21 is arranged along the first direction X, and the long side 22 is arranged along the second direction Y.
  • a first space 211 is formed between the short sides 21 of the adjacent first electrodes 20
  • a second space 222 is formed between the long sides 22 of the adjacent first electrodes 20 .
  • the entire surface of the hydrophilic organic material is deposited on the first electrode 20 and the array substrate 10 , and the hydrophilic organic material is patterned to form the first pixel bank 31 .
  • the first pixel bank 31 corresponds to the first spacer 211 , and the first pixel bank 31 covers part of the first electrode 20 . As shown in FIG. 10 , the first pixel bank 31 covers all Part of the short side 21 of the first electrode 20 is described.
  • the thickness of the first pixel bank 31 is greater than the thickness of the first electrode 20 .
  • the thickness of the first pixel bank 31 ranges from 0.1 ⁇ m to 0.6 ⁇ m.
  • the thickness of the second pixel bank 32 is greater than the thickness of the first pixel bank 31 , and the The second pixel banks 32 cover part of the first pixel banks 31 and part of the first electrodes 20, so that printing grooves 321 are formed between adjacent second pixel banks 32;
  • the entire surface of the hydrophobic organic material is deposited on the first pixel bank 31 , the first electrode 20 and the array substrate 10 , and the hydrophobic organic material is patterned to form the second pixel bank 32 .
  • the second pixel bank 32 corresponds to the second spacer 222 , and the second pixel bank 32 covers part of the first pixel bank 31 and part of the first electrode 20 to form a pixel definition layer 30 , as shown in Figure 11.
  • the part of the first pixel bank 31 covered by the second pixel bank 32 refers to the overlapping part of the first pixel bank 31 and the second pixel bank 32; the first electrode 20
  • the portion covered by the second pixel bank 32 includes the long side 22 of the first electrode 20 and the short side 21 not covered by the first pixel bank 31 .
  • the thickness of the second pixel bank 32 is greater than the thickness of the first pixel bank 31 .
  • the thickness of the second pixel bank 32 ranges from 0.8 ⁇ m to 2 ⁇ m.
  • the second pixel bank 32 covers part of the first pixel bank 31 and part of the first electrode 20 , and the thickness of the second pixel bank 32 is greater than that of the first pixel bank 31 , so that printing grooves 321 are formed between adjacent second pixel banks 32 , as shown in FIG. 11 .
  • the luminescent layer 50 is formed in an area that is not on the first electrode 20 covered by the second pixel bank 32;
  • different colors of luminescent materials are respectively dissolved in a solvent to form different inks, and then the inks are printed in the printing grooves 321 formed by the adjacent second pixel banks 32 by a process such as inkjet printing.
  • the printing tank 321 inks formed of different colors of luminescent materials are printed, and the inks are cured to form a film to form a luminescent layer 50, as shown in FIG. 12 .
  • the red light-emitting material 51 , the green light-emitting material 52 and the blue light-emitting material 53 are arranged in different printing grooves 321 at intervals. Since the printing groove 321 is continuous, ink can be continuously printed in the printing groove 321 , and the concentration of the ink can be configured according to the thickness of the light-emitting layer 50 to be prepared.
  • FIG. 4 schematically shows three printing grooves 321 , but the display panel 100 may include more first electrodes 20 , so as to provide more second pixel banks 32 to When more printing grooves 321 are formed, the red light-emitting material 51 , the green light-emitting material 52 , and the blue light-emitting material 53 are sequentially and cyclically arranged in the more printing grooves 321 .
  • the thickness of the second pixel bank 32 is greater than the thickness of the light emitting layer 50 .
  • the light-emitting materials of the same color between the adjacent second pixel banks 32 are separated by the first pixel banks 31, so that the light-emitting materials only cover the first electrodes 20 in the light-emitting area , and does not cover the first pixel bank 31 .
  • different colors of luminescent materials are printed in different printing grooves 321 , so the adjacent first pixel banks 31 exhibit luminescent materials of different colors arranged at intervals. That is, the first pixel banks 31 are used to define luminescent materials of the same color, and the second pixel banks 32 are used to define luminescent materials of different colors.
  • the thickness of the first pixel bank 31 is greater than or equal to the thickness of the light emitting layer 50 .
  • the volume of the ink is much larger than the volume of the light emitting layer 50 after curing and film formation, and the ink has fluidity.
  • the first pixel bank 31 with hydrophilic properties can speed up
  • the flow of ink in the printing tank 321 makes the printed ink quickly disperse in the area defined by the first pixel bank 31 to prevent the ink from accumulating and overflowing in a certain area, which can further improve the efficiency of continuous printing.
  • the second pixel bank 32 with hydrophobic properties can prevent the printed ink from overflowing into the adjacent printing grooves 321 to cause color mixing.
  • the thickness of the second pixel bank 32 needs to be the same as that of the printed ink. Height matches.
  • a second electrode 60 needs to be provided, and the second electrode 60 covers the light-emitting layer 50 and the second pixel bank 32 , as shown in FIG. 6 .
  • the first electrode 20 is an anode
  • the second electrode 60 is a cathode, but the present application is not limited thereto.
  • the light-emitting layer 50 emits light under the combined action of the first electrode 20 and the second electrode 60 , and the array substrate 10 provides a driving voltage to the first electrode 20 .
  • the display panel manufacturing method of the present application may further include preparing an encapsulation layer on the second electrode 60, and the encapsulation layer may be encapsulated by a thin film, and the thin film encapsulation may be composed of a first inorganic encapsulation layer, an organic
  • the encapsulation layer and the second inorganic encapsulation layer are stacked in sequence to form a laminate structure or a multi-layer laminate structure, which is used to protect the light-emitting layer 50 and prevent the light-emitting material of the light-emitting layer 50 from failing due to water and oxygen intrusion.
  • An embodiment of the present application further provides a display device, which includes the display panel of one of the foregoing embodiments, a device such as a circuit board bound to the display panel, and a cover plate covering the display panel.
  • the present application provides a display panel, a method for manufacturing the same, and a display device;
  • the array substrate of the display panel is provided with a plurality of first electrodes, and the plurality of first electrodes have a first interval and a second interval, corresponding to the first interval
  • a first pixel bank is arranged, a second pixel bank is arranged corresponding to the second interval, the second pixel bank spans the first pixel bank, and the thicknesses of the first pixel bank and the second pixel bank are both larger than the first pixel bank
  • the thickness of the electrode, and the thickness of the second pixel bank is greater than the thickness of the first pixel bank, so that the same color luminescent material can be continuously printed between adjacent second pixel banks, which solves the definition of the existing SBS type pixel.
  • the layer design cannot be printed continuously and affects the printing efficiency.
  • the first pixel bank is made of hydrophilic organic material, which can quickly disperse the printed luminescent material in the area defined by the first pixel bank, which further improves the printing efficiency;
  • the second pixel bank is made of hydrophobic organic material, which can prevent Printed luminescent material spills causing color mixing.

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Abstract

一种显示面板(100,101)及其制备方法、显示装置，显示面板(100,101)的第一电极(20)之间具有第一间隔(211)和第二间隔(222)，对应第一间隔(211)设置有第一像素隔堤(31)，对应第二间隔(222)设置有第二像素隔堤(32)，第二像素隔堤(32)跨过第一像素隔堤(31)，第二像素隔堤(32)的厚度大于第一像素隔堤(31)的厚度，使得能够在相邻第二像素隔堤(32)之间连续打印同一颜色的发光材料(51,52,53)。

Description

显示面板及其制备方法、显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制备方法、显示装置。
 背景技术
有源矩阵有机发光二极管显示（Active Matrix Organic Light Emitting Display，AMOLED）相较于液晶显示（ Liquid Crystal Display，LCD），具备高色域、高对比度、可柔性及可穿戴等优点。根据OLED 制备工艺，AMOLED的制备可分为蒸镀型及喷墨打印（Ink jet Print，IJP）型。对于大尺寸显示背板的制作，采用蒸镀技术需要依靠白光OLED（WOLED）结合彩色滤光片（Color Filter，CF）来实现彩色显示，而精细掩模版对应的无CF显示则无法应用于大尺寸高世代线的量产。喷墨打印工艺在一定程度上很好的克服了蒸镀技术的缺点，可直接实现大世代线的全彩像素的打印，并且很大程度上提升了OLED材料的使用效率。喷墨打印工艺需要依赖特殊设计的像素定义层，传统的肩并肩（Side by side，SBS）型像素定义层设计在整面像素定义层图形上进行像素开孔，OLED材料打印在开孔内，然而同一颜色的OLED材料被像素定义层间隔开，无法实现喷墨打印工艺的连续打印，很大程度上限制了打印技术的优点，降低了打印效率。
因此，现有SBS型像素定义层设计影响打印效率的问题需要解决。
 技术问题
本申请提供一种显示面板及其制备方法、显示装置，以缓解现有SBS型像素定义层设计影响打印效率的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供一种显示面板，所述显示面板的像素定义层包括：沿第一方向设置的多个第一像素隔堤；沿第二方向设置的多个第二像素隔堤，相邻的两个第一像素隔堤和相邻的两个第二像素隔堤围绕形成出光区域；所述第一方向与所述第二方向形成有夹角；其中，在所述第二方向上，所述出光区域内的发光材料相同；所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
在本申请实施例提供的显示面板中，所述第一像素隔堤的材料包括亲水性有机材料。
在本申请实施例提供的显示面板中，，所述第二像素隔堤的材料包括疏水性有机材料。
在本申请实施例提供的显示面板中，所述第一像素隔堤和所述第二像素隔堤一体式设置。
在本申请实施例提供的显示面板中，在所述第一方向上，相邻的两个所述出光区域内的发光材料不同。
在本申请实施例提供的显示面板中，所述显示面板包括阵列基板、多个第一电极。多个第一电极阵列排布在所述阵列基板上，相邻所述第一电极在所述第一方向上形成第一间隔，在所述第二方向上形成第二间隔；所述像素定义层设置在所述第一电极以及所述阵列基板上，且所述第一像素隔堤设置于所述第一间隔内，且覆盖部分所述第一电极；所述第二像素隔堤设置于所述第二间隔内，且覆盖所述第一像素隔堤和部分所述第一电极；其中，所述像素定义层形成的所述出光区域对应所述第一电极，所述发光材料覆盖在所述第一电极上形成发光层。
在本申请实施例提供的显示面板中，所述第一像素隔堤的厚度大于或等于所述发光层的厚度。
在本申请实施例提供的显示面板中，所述第一像素隔堤的厚度大于所述第一电极的厚度。
在本申请实施例提供的显示面板中，所述第一像素隔堤的厚度范围为0.1微米至0.6微米，所述第二像素隔堤的厚度范围为0.8微米至2微米。
本申请实施例还提供一种显示面板制备方法，其包括以下步骤：提供阵列基板，在所述阵列基板上制备阵列排布的第一电极，相邻所述第一电极在第一方向上形成第一间隔，相邻所述第一电极在第二方向上形成第二间隔；在所述第一间隔内制备第一像素隔堤，所述第一像素隔堤的厚度大于所述第一电极的厚度，以使得所述第一像素隔堤覆盖部分所述第一电极；在所述第二间隔内制备第二像素隔堤，以形成像素定义层，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度，且所述第二像素隔堤覆盖部分所述第一像素隔堤和部分所述第一电极，以使得相邻的所述第二像素隔堤之间形成打印槽；在同一所述打印槽内连续打印同一颜色的发光材料，在不同的所述打印槽内打印不同颜色的发光材料，以形成发光层，所述发光层形成在未被所述第二像素隔堤覆盖的所述第一电极上；在所述发光层上沉积第二电极。
在本申请实施例提供的显示面板制备方法中，所述第一像素隔堤的材料包括亲水性有机材料，所述第二像素隔堤的材料包括疏水性有机材料。
本申请实施例还提供一种显示装置，其包括前述实施例其中之一的显示面板。
 有益效果
本申请提供的显示面板及其制备方法、显示装置中阵列基板上设置有多个第一电极，多个第一电极之间具有第一间隔和第二间隔，对应第一间隔设置有第一像素隔堤，对应第二间隔设置有第二像素隔堤，第二像素隔堤跨过第一像素隔堤，第一像素隔堤和第二像素隔堤的厚度均大于第一电极的厚度，且第二像素隔堤的厚度大于第一像素隔堤的厚度，以使得能够在相邻第二像素隔堤之间连续打印同一颜色的发光材料，解决了现有SBS型像素定义层设计不能连续打印而影响打印效率的问题。同时第一像素隔堤采用亲水性有机材料，能够使打印的发光材料快速分散在第一像素隔堤限定的区域，进一步提高了打印效率；第二像素隔堤采用疏水性有机材料，能够防止打印的发光材料溢出导致混色。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板的一种俯视结构示意图。
图2为本申请实施例提供的第一电极阵列排布的俯视结构示意图。
图3为图1中沿A-A’方向的剖面结构示意图。
图4为图1中沿B-B’方向的剖面结构示意图。
图5为图1中沿C-C’方向的剖面结构示意图。
图6为本申请实施例提供的显示面板的剖面结构示意图。
图7为本申请实施例提供的阵列基板的剖面结构示意图。
图8为本申请实施例提供的显示面板的另一种俯视结构示意图。
图9为本申请实施例提供的显示面板制备方法的流程示意图。
图10至图12为本申请实施例提供的显示面板制备方法中各步骤制得的显示面板的部分俯视结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。在附图中，为了清晰理解和便于描述，夸大了一些层和区域的厚度。即附图中示出的每个组件的尺寸和厚度是任意示出的，但是本申请不限于此。
在一种实施例中，请参照图1，图1为本申请实施例提供的显示面板的一种俯视结构示意图。所述显示面板100包括OLED显示面板等，例如可以为AMOLED显示面板。所述显示面板100包括阵列基板10、多个第一电极20、像素定义层30以及发光层50等，其中所述像素定义层30包括沿第一方向X设置的多个第一像素隔堤31；沿第二方向Y设置的多个第二像素隔堤32，所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度。且相邻的两个第一像素隔堤31和相邻的两个第二像素隔堤32围绕形成出光区域。所述出光区域内设置有发光材料以形成所述发光层50。
所述第一方向X与所述第二方向Y形成有夹角a，所述夹角a可以大于0度小于180度，如图1示出的，所述第一方向X平行于所述阵列基板10的水平边，所述第二方向Y平行于所述阵列基板10的竖直边，则此时夹角a为90度。其中，在所述第二方向Y上，所述出光区域内的发光材料相同。
具体地，请参照图2，图2为本申请实施例提供的第一电极阵列排布的俯视结构示意图。多个第一电极20阵列排布在所述阵列基板10上，相邻所述第一电极20在第一方向X上形成第一间隔211，相邻所述第一电极20在第二方向Y上形成第二间隔222。示例性的，所述第一电极20包括短边21和长边22，所述短边21沿所述第一方向X排布，所述长边22沿所述第二方向Y排布。其中所述第一电极20的短边21是指在俯视视角下，第一电极20边长较短的边，所述短边21的形状可以为直线、折线、圆弧等，如图2示出的第一电极20的短边21边长为圆弧。当然地，所述第一电极20的长边22即是指在俯视视角下，第一电极20边长较长的边。
可选地，所述第一电极20在所述阵列基板10上阵列排布成多行和多列，行是指沿所述第一方向X的排布，列是指沿所述第二方向Y的排布，其中各行第一电极20之间彼此平行，各列第一电极20之间也彼此平行。当所述第一方向X和所述第二方向Y的夹角a为90度时，各行和各列彼此垂直，使得所述第一间隔211和所述第二间隔222也彼此垂直相交。当然地，本申请不限于此，本申请第一电极20的行和列也可以成一定夹角设置，如此所述第一间隔211和所述第二间隔222也成一定夹角相交设置。
请结合参照图1至图5，图3为图1中沿A-A’方向的剖面结构示意图，图4为图1中沿B-B’方向的剖面结构示意图，图5为图1中沿C-C’方向的剖面结构示意图。第一像素隔堤31设置于所述第一间隔211内，且覆盖部分所述第一电极20。所述第一像素隔堤31的厚度大于所述第一电极20的厚度，故所述第一像素隔堤31填充所述第一间隔211并超出所述第一电极20的厚度，且覆盖所述第一电极20的部分短边21。如图1所示，所述第一电极20的短边21为圆弧，所述第一像素隔堤31覆盖部分圆弧。
第二像素隔堤32设置于所述第二间隔222内，且覆盖所述第一像素隔堤31和部分所述第一电极20。所述第二像素隔堤32的厚度大于所述第一电极20的厚度，故所述第二像素隔堤32填充所述第二间隔222并超出所述第一电极20的厚度，且覆盖所述第一电极20的长边22及未被所述第一像素隔堤31覆盖的部分短边21，如此通过所述第一像素隔堤31和所述第二像素隔堤32限定出出光区域。
同时所述第二像素隔堤32的厚度还大于所述第一像素隔堤31的厚度，所述第二像素隔堤32与所述第一像素隔堤31相交的区域，所述第二像素隔堤32覆盖所述第一像素隔堤31，如图5所示。
可选地，所述第一像素隔堤31的厚度范围为0.1微米至0.6微米，所述第二像素隔堤32的厚度范围为0.8微米至2微米。
需要说明的是，所述第一电极20的短边21为圆弧，所述第一像素隔堤31覆盖所述第一电极20的部分短边21，而所述第二像素隔堤32覆盖所述第一电极20的长边22及未被所述第一像素隔堤31覆盖的部分短边21，故如图5所示，所述第二像素隔堤32在靠近所述出光区域的位置仍覆盖所述第一像素隔堤31。
由于所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度，则相邻的所述第二像素隔堤32之间形成有打印槽321，沿着所述打印槽321的延伸方向能够连续打印发光材料以形成发光层50。
具体地，发光层50设置于未被所述第二像素隔堤32覆盖的所述第一电极20上，所述发光层50通过在不同的打印槽321内打印不同颜色的发光材料形成，且同一打印槽321内打印同种颜色的发光材料，使得相邻的所述第二像素隔堤32之间设置同一颜色的发光材料，如此在所述第二方向Y上，所述出光区域内的发光材料相同。可选地，所述发光层50的发光材料包括红色发光材料51、绿色发光材料52及蓝色发光材料53。
进一步地，结合参照图1和图4，红色发光材料51、绿色发光材料52及蓝色发光材料53分别设置在不同的打印槽321内，当然地，图4示意性的示出了三个打印槽321，但所述显示面板100可以包括更多的所述第一电极20，从而设置更多条的所述第二像素隔堤32以形成更多的打印槽321，则红色发光材料51、绿色发光材料52及蓝色发光材料53在更多的打印槽321内依次循环设置。其中所述第二像素隔堤32的厚度大于所述发光层50的厚度。
同时，参照图1，打印在相邻的所述第二像素隔堤32之间的同一颜色的发光材料被所述第一像素隔堤31间隔开，使所述发光材料只覆盖在出光区域的第一电极20上，而未覆盖在所述第一像素隔堤31上。而不同的打印槽321内打印不同颜色的发光材料，故相邻的所述第一像素隔堤31之间呈现间隔设置的不同颜色的发光材料，如此在所述第一方向X上，相邻的两个所述出光区域内的发光材料不同。也即所述第一像素隔堤31用于限定同种颜色的发光材料，而第二像素隔堤32用于限定不同颜色的发光材料。
可选地，所述第一像素隔堤31的厚度大于或等于所述发光层50的厚度。
可选地，所述第一像素隔堤31的材料包括亲水性有机材料，使用亲水性有机材料制备的第一像素隔堤31具有亲水特性。所述第二像素隔堤32的材料包括疏水性有机材料，例如具有疏水特性的含氟有机材料，使用疏水性有机材料制备的第二像素隔堤32具有疏水特性。
需要说明的是，在制备发光层50时，是把不同颜色的发光材料分别溶化在溶剂中形成不同的墨水，根据需要制备的发光层50厚度配置不同浓度的墨水，然后采用喷墨打印等工艺把墨水打印在相邻的所述第二像素隔堤32形成的打印槽321内，并使墨水固化成膜形成发光层50。
而在打印槽321内打印墨水时，墨水的体积要远大于固化成膜后发光层50的体积，且墨水具有流动性，此时具有亲水特性的所述第一像素隔堤31能够加快打印槽321内墨水的流动，使打印的墨水快速分散在第一像素隔堤31限定的区域，防止某一区域墨水堆积溢出，如此还可进一步提高连续打印的效率。同时具有疏水特性的所述第二像素隔堤32，能够防止打印的墨水溢出到相邻的打印槽321内导致混色，当然地，所述第二像素隔堤32的厚度需与打印的墨水的高度相匹配。
另外，为了实现所述发光层50发光，还需要设置第二电极60，所述第二电极60覆盖在所述发光层50及所述第二像素隔堤32上，如图6所示。其中所述第一电极20为阳极，所述第二电极60为阴极，但本申请不限于此。所述发光层50在所述第一电极20和所述第二电极60的共同作用下发光，而所述阵列基板10给所述第一电极20提供驱动电压。
请参照图7，图7为本申请实施例提供的阵列基板的剖面结构示意图。可选地，所述阵列基板10可以包括衬底基板11以及依次层叠设置在所述衬底基板11上遮光层12、缓冲层13、有源层14、栅极绝缘层15、栅极16、层间绝缘层17、源漏极层18、钝化层19以及平坦化层191。
可选地，所述衬底基板11可以为刚性基板或柔性基板，所述衬底基板11为刚性基板时，可包括玻璃基板等硬性基板；所述衬底基板11为柔性基板时，可包括聚酰亚胺（Polyimide，PI）薄膜、超薄玻璃薄膜等柔性基板。
可选地，所述缓冲层13的材料可以包括氧化硅、氮化硅、氮氧化硅等无机材料，所述缓冲层13可以防止不期望的杂质或污染物（例如湿气、氧气等）从所述衬底基板11扩散至可能因这些杂质或污染物而受损的器件中，同时还可以提供平坦的顶表面。
可选地，所述有源层14的材料可以为金属氧化物半导体材料，例如IGZO、ITZO或IGZTO等。所述有源层14包括沟道区141、源极区142及漏极区143。所述遮光层12与所述有源层14对应设置，所述遮光层12可以为金属遮光层，用于遮挡有源层14，避免光线照射沟道区141。所述栅极16和所述栅极绝缘层15均与所述沟道区141对应设置。
所述源漏极层18包括源极181和漏极182，所述漏极182通过所述层间绝缘层17的过孔与漏极区143连接，所述源极181通过所述层间绝缘层17的另一过孔与源极区142连接，且所述源极181还通过贯穿所述层间绝缘层17和所述缓冲层13的过孔与所述遮光层12连接。
所述钝化层19覆盖在所述源漏极层18以及所述层间绝缘层17上，所述平坦化层191覆盖在所述钝化层19上。所述平坦化层191的材料包括有机光阻等有机材料，所述平坦化层191可以为所述阵列基板10提供平坦的顶表面。所述阵列基板10上还设置有贯穿所述平坦化层191和所述钝化层19的开孔，所述开孔裸露出所述源极181，所述第一电极20通过所述开孔与所述源极181连接。
需要说明的是，本实施例示意性的示出了所述阵列基板10的一种结构，但本申请不限于此，本申请的阵列基板10还可以为其他类型的阵列基板，如GOA（Gate Driver on Array，阵列基板行驱动）基板等，在此不再赘述。
另外，所述显示面板100还可包括设置在所述第二电极60上的封装层（图未示），所述封装层可以采用薄膜封装，所述薄膜封装可以为由第一无机封装层、有机封装层、第二无机封装层三层薄膜依次层叠形成的叠层结构或更多层的叠层结构，用于保护所述发光层50，避免水氧入侵导致发光层50的发光材料失效。
在本实施例中，在所述阵列基板10上设置所述第一像素隔堤31和所述第二像素隔堤32，所述第二像素隔堤32跨过所述第一像素隔堤31，所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度，以使得能够在相邻第二像素隔堤32之间连续打印同一颜色的发光材料，解决了现有SBS型像素定义层设计不能连续打印发光材料而影响打印效率的问题。同时所述第一像素隔堤31采用亲水性有机材料，能够使打印的发光材料快速分散在第一像素隔堤31限定的区域，进一步提高了连续打印的效率；所述第二像素隔堤32采用疏水性有机材料，能够防止打印的发光材料溢出导致混色。
在一种实施例中，请参照图8，图8为本申请实施例提供的显示面板的另一种俯视结构示意图。与上述实施例不同的是，如图8所示的显示面板101，相邻所述第二像素隔堤32之间的所述第一像素隔堤31上覆盖有所述发光材料，此时所述第一像素隔堤31的厚度可以小于所述发光层50的厚度，在打印发光材料形成发光层50时仍可采用连续打印，提高打印效率，且形成的发光层50也是连续的。其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，与上述实施例不同的是，所述第一像素隔堤31和所述第二像素隔堤32一体式设置，所述第一像素隔堤31和所述第二像素隔堤32由同一种材料在同一工艺条件下同时形成。可选地，采用半色调掩膜板（Half-tone mask，HTM）对整层覆盖在所述第一电极20以及所述阵列基板10上的像素定义层30进行黄光工艺，使像素定义层30在第一方向X上形成厚度较薄的第一像素隔堤31，在第二方向Y上形成厚度较厚的第二像素隔堤32，形成如图1所示的像素定义层30结构。所述像素定义层30的材料包括亲属性有机材料等。其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请参照图9，图9为本申请实施例提供的显示面板制备方法的流程示意图。所述显示面板制备方法包括以下步骤：
S301、提供阵列基板10，在所述阵列基板10上制备阵列排布的第一电极20，相邻所述第一电极20在第一方向X上形成第一间隔211，相邻所述第一电极20在第二方向Y上形成第二间隔222；
具体地，请结合参照图2和图7，提供如图7所示的阵列基板10，所述阵列基板10包括衬底基板11以及依次层叠设置在所述衬底基板11上遮光层12、缓冲层13、有源层14、栅极绝缘层15、栅极16、层间绝缘层17、源漏极层18、钝化层19以及平坦化层191。
具体地，提供衬底基板11，所述衬底基板11可以为刚性基板或柔性基板，所述衬底基板11为刚性基板时，可包括玻璃基板等硬性基板；所述衬底基板11为柔性基板时，可包括聚酰亚胺薄膜、超薄玻璃薄膜等柔性基板。
可选地，在所述衬底基板11上沉积金属层，所述金属层可以为单层或多层金属层的叠层，图案化所述金属层，形成具备走线及遮光作用的遮光层12。
可选地，采用PECVD ( Plasma Enhanced Chemical Vapor Deposition ，等离子体增强化学的气相沉积法) 等沉积工艺在所述遮光层12以及所述衬底基板11上沉积缓冲层13，所述缓冲层13的材料可以氧化硅、氮化硅、氮氧化硅等无机材料，例如Si3N4、SiO2、SiON等中的一种或几种的组合物。所述缓冲层13的厚度可以为1000埃至5000埃。
可选地，采用PVD（Physical Vapor Deposition，物理气相沉积法）等沉积工艺在所述缓冲层13上沉积金属氧化物半导体材料，金属氧化物半导体材料可以为IGZO、ITZO或IGZTO等。图案化所述金属氧化物半导体形成有源层14，所述有源层14的厚度可以为100埃至1000埃。
可选地，采用PECVD等沉积工艺在所述有源层14以及所述缓冲层13上沉积栅极介电材料，所述栅极介电材料包括SiOx等。沉积的栅极介电材料的厚度可以为500埃至2000A埃。
可选地，采用PVD等沉积工艺在所述栅极介电材料上沉积栅极金属层，图案化栅极金属层形成栅极图案。利用所述栅极图案做遮挡，对所述栅极介电材料进行蚀刻，自对准形成栅极16、栅极绝缘层15、有源层14的沟道区141，使有源层14分为沟道区141、源极区142以及漏极区143。
可选地，采用PECVD等沉积工艺在所述栅极16、所述有源层14以及所述缓冲层13上沉积SiO2等无机薄膜形成层间绝缘层17，所述层间绝缘层17的厚度可以为2000埃至8000埃。图案化所述层间绝缘层17以及缓冲层13形成多个过孔。
可选地，采用PVD等沉积工艺在所述层间绝缘层17上沉积源漏极金属层，图案化所述源漏极金属层形成源漏极层18，所述源漏极层18包括源极181和漏极182等。所述漏极182通过所述层间绝缘层17的过孔与所述有源层14的漏极区143连接。所述源极181通过所述层间绝缘层17的过孔与所述有源层14的源极区142连接，且还通过贯穿所述层间绝缘层17和所述缓冲层13的过孔与所述遮光层12连接。
可选地，采用PECVD等沉积工艺在所述源漏极层18以及所述层间绝缘层17上沉积SiO2等无机薄膜作为钝化层19 ，所述钝化层19的厚度可以为1000埃至5000埃。然后在所述钝化层19上沉积平坦化层191，所述平坦化层191的材料包括有机光阻等。图案化所述平坦化层191和所述钝化层19形成开孔，至此完成阵列基板10的制作。
进一步地，在所述阵列基板10上沉积电极材料，图案化所述电极材料形成阵列排布的多个第一电极20，如图2所示。所述电极材料包括透明导电电极材料，如ITO（Indium Tin Oxide，氧化铟锡）等。当然地，本申请不限于此，本申请的第一电极20也可以为不透明电极，具体可根据所述显示面板100的出光方向确定。
可选地，多个第一电极20阵列排布在所述阵列基板10上，相邻所述第一电极20在第一方向X上形成第一间隔211，相邻所述第一电极20在第二方向Y上形成第二间隔222。示例性的，所述第一电极20包括短边21和长边22，所述短边21沿所述第一方向X排布，所述长边22沿所述第二方向Y排布，相邻所述第一电极20的短边21之间具有第一间隔211，相邻所述第一电极20的长边22之间具有第二间隔222。
S302、在所述第一间隔211内制备第一像素隔堤31，所述第一像素隔堤31的厚度大于所述第一电极20的厚度，以使得所述第一像素隔堤31覆盖部分所述第一电极20；
具体地，在所述第一电极20以及所述阵列基板10上沉积整面的亲水性有机材料，图案化所述亲水性有机材料，形成第一像素隔堤31。所述第一像素隔堤31对应所述第一间隔211，且所述第一像素隔堤31覆盖部分所述第一电极20，如图10所示，所述第一像素隔堤31覆盖所述第一电极20的部分短边21。所述第一像素隔堤31的厚度大于所述第一电极20的厚度，可选地，所述第一像素隔堤31的厚度范围为0.1微米至0.6微米。
S303、在所述第二间隔222内制备第二像素隔堤32，以形成像素定义层30，所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度，且所述第二像素隔堤32覆盖部分所述第一像素隔堤31和部分所述第一电极20，以使得相邻的所述第二像素隔堤32之间形成打印槽321；
具体地，在所述第一像素隔堤31、所述第一电极20以及所述阵列基板10上沉积整面的疏水性有机材料，图案化所述疏水性有机材料形成第二像素隔堤32。所述第二像素隔堤32对应所述第二间隔222，且所述第二像素隔堤32覆盖部分所述第一像素隔堤31和部分所述第一电极20，以形成像素定义层30，如图11所示。其中所述第一像素隔堤31被所述第二像素隔堤32覆盖的部分是指所述第一像素隔堤31与所述第二像素隔堤32重叠的部分；所述第一电极20被所述第二像素隔堤32覆盖的部分包括第一电极20的长边22以及未被所述第一像素隔堤31覆盖的短边21。所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度，可选地，所述第二像素隔堤32的厚度范围为0.8微米至2微米。
由于所述第二像素隔堤32覆盖部分所述第一像素隔堤31和部分所述第一电极20，且所述第二像素隔堤32的厚度大于所述第一像素隔堤31的厚度，以使得相邻的所述第二像素隔堤32之间形成打印槽321，如图11所示。
S304、在同一所述打印槽321内连续打印同一颜色的发光材料，在不同的所述打印槽321内打印不同颜色的发光材料，以形成发光层50，所述发光层50形成在未被所述第二像素隔堤32覆盖的所述第一电极20上；
具体地，把不同颜色的发光材料分别溶化在溶剂中形成不同的墨水，然后采用喷墨打印等工艺把墨水打印在相邻的所述第二像素隔堤32形成的打印槽321内，在不同的所述打印槽321内打印不同颜色发光材料形成的墨水，并使墨水固化成膜形成发光层50，如图12所示。结合参照图12和图4，红色发光材料51、绿色发光材料52及蓝色发光材料53间隔设置在不同的打印槽321内。其中由于所述打印槽321是连续的，故可以在所述打印槽321内连续打印墨水，所述墨水的浓度可根据需要制备的发光层50厚度来配置。
当然地，图4示意性的示出了三个打印槽321，但所述显示面板100可以包括更多的所述第一电极20，从而设置更多条的所述第二像素隔堤32以形成更多的打印槽321，则红色发光材料51、绿色发光材料52及蓝色发光材料53在更多的打印槽321内依次循环设置。其中所述第二像素隔堤32的厚度大于所述发光层50的厚度。
同时，在相邻的所述第二像素隔堤32之间的同一颜色的发光材料被所述第一像素隔堤31间隔开，使所述发光材料只覆盖在出光区域的第一电极20上，而未覆盖在所述第一像素隔堤31上。而不同的打印槽321内打印不同颜色的发光材料，故相邻的所述第一像素隔堤31之间呈现间隔设置的不同颜色的发光材料。也即所述第一像素隔堤31用于限定同种颜色的发光材料，而第二像素隔堤32用于限定不同颜色的发光材料。
可选地，所述第一像素隔堤31的厚度大于或等于所述发光层50的厚度。
另外，在打印槽321内打印墨水时，墨水的体积要远大于固化成膜后发光层50的体积，且墨水具有流动性，此时具有亲水特性的所述第一像素隔堤31能够加快打印槽321内墨水的流动，使打印的墨水快速分散在第一像素隔堤31限定的区域，防止某一区域墨水堆积溢出，如此还可进一步提高连续打印的效率。同时具有疏水特性的所述第二像素隔堤32，能够防止打印的墨水溢出到相邻的打印槽321内导致混色，当然地，所述第二像素隔堤32的厚度需与打印的墨水的高度相匹配。
S305、在所述发光层50上沉积第二电极60。
具体地，为了实现所述发光层50发光，还需要设置第二电极60，所述第二电极60覆盖在所述发光层50及所述第二像素隔堤32上，如图6所示。其中所述第一电极20为阳极，所述第二电极60为阴极，但本申请不限于此。所述发光层50在所述第一电极20和所述第二电极60的共同作用下发光，而所述阵列基板10给所述第一电极20提供驱动电压。
需要说明的是，本申请的显示面板制备方法还可包括在所述第二电极60上制备封装层，所述封装层可以采用薄膜封装，所述薄膜封装可以为由第一无机封装层、有机封装层、第二无机封装层三层薄膜依次层叠形成的叠层结构或更多层的叠层结构，用于保护所述发光层50，避免水氧入侵导致发光层50的发光材料失效。
本申请实施例还提供一种显示装置，其包括前述实施例其中之一的显示面板、绑定于所述显示面板的电路板等器件以及覆盖在所述显示面板上的盖板等。
根据上述实施例可知：
本申请提供一种显示面板及其制备方法、显示装置；该显示面板的阵列基板上设置有多个第一电极，多个第一电极之间具有第一间隔和第二间隔，对应第一间隔设置有第一像素隔堤，对应第二间隔设置有第二像素隔堤，第二像素隔堤跨过第一像素隔堤，第一像素隔堤和第二像素隔堤的厚度均大于第一电极的厚度，且第二像素隔堤的厚度大于第一像素隔堤的厚度，以使得能够在相邻第二像素隔堤之间连续打印同一颜色的发光材料，解决了现有SBS型像素定义层设计不能连续打印而影响打印效率的问题。同时第一像素隔堤采用亲水性有机材料，能够使打印的发光材料快速分散在第一像素隔堤限定的区域，进一步提高了打印效率；第二像素隔堤采用疏水性有机材料，能够防止打印的发光材料溢出导致混色。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其中，所述显示面板的像素定义层包括：
    沿第一方向设置的多个第一像素隔堤；以及
    沿第二方向设置的多个第二像素隔堤，相邻的两个第一像素隔堤和相邻的两个第二像素隔堤围绕形成出光区域；所述第一方向与所述第二方向形成有夹角；
    其中，在所述第二方向上，所述出光区域内的发光材料相同；所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
  2. 根据权利要求1所述的显示面板，其中，所述第一像素隔堤的材料包括亲水性有机材料。
  3. 根据权利要求1所述的显示面板，其中，所述第二像素隔堤的材料包括疏水性有机材料。
  4. 根据权利要求1所述的显示面板，其中，所述第一像素隔堤和所述第二像素隔堤一体式设置。
  5. 根据权利要求1所述的显示面板，其中，在所述第一方向上，相邻的两个所述出光区域内的发光材料不同。
  6. 根据权利要求1所述的显示面板，其中，所述显示面板包括：
    阵列基板；
    多个第一电极，阵列排布在所述阵列基板上，相邻所述第一电极在所述第一方向上形成第一间隔，在所述第二方向上形成第二间隔；
    所述像素定义层设置在所述第一电极以及所述阵列基板上，所述第一像素隔堤设置于所述第一间隔内，且覆盖部分所述第一电极；所述第二像素隔堤设置于所述第二间隔内，且覆盖所述第一像素隔堤和部分所述第一电极；
    其中，所述像素定义层形成的所述出光区域对应所述第一电极，所述发光材料覆盖在所述第一电极上形成发光层。
  7. 根据权利要求6所述的显示面板，其中，所述第一像素隔堤的厚度大于或等于所述发光层的厚度。
  8. 根据权利要求6所述的显示面板，其中，所述第一像素隔堤的厚度大于所述第一电极的厚度。
  9. 根据权利要求1所述的显示面板，其中，所述第一像素隔堤的厚度范围为0.1微米至0.6微米，所述第二像素隔堤的厚度范围为0.8微米至2微米。
  10. 一种显示面板制备方法，其包括：
    提供阵列基板，在所述阵列基板上制备阵列排布的第一电极，相邻所述第一电极在第一方向上形成第一间隔，相邻所述第一电极在第二方向上形成第二间隔；
    在所述第一间隔内制备第一像素隔堤，所述第一像素隔堤的厚度大于所述第一电极的厚度，以使得所述第一像素隔堤覆盖部分所述第一电极；
    在所述第二间隔内制备第二像素隔堤，以形成像素定义层，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度，且所述第二像素隔堤覆盖部分所述第一像素隔堤和部分所述第一电极，以使得相邻的所述第二像素隔堤之间形成打印槽；
    在同一所述打印槽内连续打印同一颜色的发光材料，在不同的所述打印槽内打印不同颜色的发光材料，以形成发光层，所述发光层形成在未被所述第二像素隔堤覆盖的所述第一电极上；
    在所述发光层上沉积第二电极。
  11. 根据权利要求10所述的显示面板制备方法，其中，所述第一像素隔堤的材料包括亲水性有机材料，所述第二像素隔堤的材料包括疏水性有机材料。
  12. 一种显示装置，其包括显示面板，所述显示面板的像素定义层包括：
    沿第一方向设置的多个第一像素隔堤；以及
    沿第二方向设置的多个第二像素隔堤，相邻的两个第一像素隔堤和相邻的两个第二像素隔堤围绕形成出光区域；所述第一方向与所述第二方向形成有夹角；
    其中，在所述第二方向上，所述出光区域内的发光材料相同；所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
  13. 根据权利要求12所述的显示装置，其中，所述第一像素隔堤的材料包括亲水性有机材料。
  14. 根据权利要求12所述的显示装置，其中，所述第二像素隔堤的材料包括疏水性有机材料。
  15. 根据权利要求12所述的显示装置，其中，所述第一像素隔堤和所述第二像素隔堤一体式设置。
  16. 根据权利要求12所述的显示装置，其中，在所述第一方向上，相邻的两个所述出光区域内的发光材料不同。
  17. 根据权利要求12所述的显示装置，其中，所述显示面板包括：
    阵列基板；
    多个第一电极，阵列排布在所述阵列基板上，相邻所述第一电极在所述第一方向上形成第一间隔，在所述第二方向上形成第二间隔；
    所述像素定义层设置在所述第一电极以及所述阵列基板上，所述第一像素隔堤设置于所述第一间隔内，且覆盖部分所述第一电极；所述第二像素隔堤设置于所述第二间隔内，且覆盖所述第一像素隔堤和部分所述第一电极；
    其中，所述像素定义层形成的所述出光区域对应所述第一电极，所述发光材料覆盖在所述第一电极上形成发光层。
  18. 根据权利要求17所述的显示装置，其中，所述第一像素隔堤的厚度大于或等于所述发光层的厚度。
  19. 根据权利要求17所述的显示装置，其中，所述第一像素隔堤的厚度大于所述第一电极的厚度。
  20. 根据权利要求12所述的显示装置，其中，所述第一像素隔堤的厚度范围为0.1微米至0.6微米，所述第二像素隔堤的厚度范围为0.8微米至2微米。
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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
CN114267703A (zh) * 2021-12-14 2022-04-01 深圳市华星光电半导体显示技术有限公司 Oled显示器件制造方法以及oled显示器件
CN114583076A (zh) * 2022-02-16 2022-06-03 深圳市华星光电半导体显示技术有限公司 显示面板及其制备方法、电子装置

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101543134A (zh) * 2007-05-28 2009-09-23 松下电器产业株式会社 有机电致发光器件以及显示装置
KR20170080242A (ko) * 2015-12-31 2017-07-10 엘지디스플레이 주식회사 유기발광소자 표시장치
CN108258010A (zh) * 2016-12-29 2018-07-06 乐金显示有限公司 显示装置
CN108598110A (zh) * 2018-04-23 2018-09-28 深圳市华星光电半导体显示技术有限公司 Oled器件
CN111200004A (zh) * 2020-02-27 2020-05-26 深圳市华星光电半导体显示技术有限公司 一种像素结构及其制备方法、显示面板
CN111293141A (zh) * 2018-12-07 2020-06-16 乐金显示有限公司 有机发光显示装置
CN111312760A (zh) * 2018-12-11 2020-06-19 乐金显示有限公司 有机发光显示装置及其制造方法
CN112234080A (zh) * 2019-07-15 2021-01-15 乐金显示有限公司 有机发光显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100508002B1 (ko) * 2002-09-03 2005-08-17 엘지.필립스 엘시디 주식회사 노즐코팅을 이용한 유기 전계 발광 소자 제조 방법
WO2012049717A1 (ja) * 2010-10-15 2012-04-19 パナソニック株式会社 有機発光パネルとその製造方法、および有機表示装置
JP5982146B2 (ja) * 2011-06-16 2016-08-31 三星ディスプレイ株式會社Ｓａｍｓｕｎｇ Ｄｉｓｐｌａｙ Ｃｏ．，Ｌｔｄ． 有機発光構造物、有機発光構造物の製造方法、有機発光表示装置、及び有機発光表示製造方法
CN103227190B (zh) * 2013-04-28 2015-06-10 京东方科技集团股份有限公司 像素界定层及制备方法、oled基板、显示装置
JP6500311B2 (ja) * 2014-12-12 2019-04-17 株式会社Ｊｏｌｅｄ 有機発光デバイス
CN109817816B (zh) * 2019-01-25 2020-08-11 深圳市华星光电半导体显示技术有限公司 显示面板及制造方法
CN112310176A (zh) * 2020-10-16 2021-02-02 深圳市华星光电半导体显示技术有限公司 一种显示面板、显示面板制程方法及显示装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101543134A (zh) * 2007-05-28 2009-09-23 松下电器产业株式会社 有机电致发光器件以及显示装置
KR20170080242A (ko) * 2015-12-31 2017-07-10 엘지디스플레이 주식회사 유기발광소자 표시장치
CN108258010A (zh) * 2016-12-29 2018-07-06 乐金显示有限公司 显示装置
CN108598110A (zh) * 2018-04-23 2018-09-28 深圳市华星光电半导体显示技术有限公司 Oled器件
CN111293141A (zh) * 2018-12-07 2020-06-16 乐金显示有限公司 有机发光显示装置
CN111312760A (zh) * 2018-12-11 2020-06-19 乐金显示有限公司 有机发光显示装置及其制造方法
CN112234080A (zh) * 2019-07-15 2021-01-15 乐金显示有限公司 有机发光显示装置
CN111200004A (zh) * 2020-02-27 2020-05-26 深圳市华星光电半导体显示技术有限公司 一种像素结构及其制备方法、显示面板

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