WO2021221055A1 - 半導体素子の製造方法 - Google Patents

半導体素子の製造方法 Download PDF

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Publication number
WO2021221055A1
WO2021221055A1 PCT/JP2021/016802 JP2021016802W WO2021221055A1 WO 2021221055 A1 WO2021221055 A1 WO 2021221055A1 JP 2021016802 W JP2021016802 W JP 2021016802W WO 2021221055 A1 WO2021221055 A1 WO 2021221055A1
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Prior art keywords
semiconductor
base substrate
manufacturing
substrate
semiconductor element
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PCT/JP2021/016802
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English (en)
French (fr)
Japanese (ja)
Inventor
剛太 西村
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Kyocera Corp
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Kyocera Corp
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Priority to US17/921,789 priority Critical patent/US20230170220A1/en
Priority to JP2022518083A priority patent/JPWO2021221055A1/ja
Priority to CN202180030661.7A priority patent/CN115443519B/zh
Priority to EP21795307.4A priority patent/EP4144896A4/en
Publication of WO2021221055A1 publication Critical patent/WO2021221055A1/ja
Anticipated expiration legal-status Critical
Priority to JP2024062912A priority patent/JP7660742B2/ja
Ceased legal-status Critical Current

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    • B23K26/0624—Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam by shaping pulses using ultrashort pulses, i.e. pulses of 1 ns or less
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    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
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    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
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    • H10P14/271—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
    • H10P14/272—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition using mask materials other than SiO2 or SiN
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    • H01S5/00—Semiconductor lasers
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    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
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Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • Patent Document 1 In the method of manufacturing a semiconductor element, various techniques for separating a semiconductor layer formed on a substrate from the substrate have been proposed (see, for example, Patent Document 1 below).
  • semiconductor layers adjacent to each other in the direction along the first surface are separated from each other at least partially in the direction along the first surface on the first surface of the base substrate.
  • a separation step of separating the plurality of semiconductor layers from the base substrate is included.
  • step a shows a forming step
  • step b shows a weakening step
  • step c shows a separation step
  • step a1 shows a mask forming step
  • step “a2” shows a semiconductor layer forming step
  • step a3 shows a mask removing step.
  • step c1 indicates a preparation step
  • step c2 indicates a joining step
  • step c3 indicates a peeling step.
  • the method for manufacturing a semiconductor device of the present embodiment includes a forming step a, a fragility step b, and a separation step c.
  • the forming step a is one of epitaxial vapor deposition, for example, by the selective lateral growth (ELO) method, each of which is connected to the base substrate 1 by the connecting portion 2 on the base substrate 1.
  • ELO selective lateral growth
  • This is a step of forming a plurality of semiconductor layers 3.
  • the weakening step b is a step of irradiating the connecting portion 2 with the laser beam 5 to weaken the connecting portion 2.
  • the separation step c is a step of separating the plurality of semiconductor layers 3 from the base substrate 1.
  • Each semiconductor layer 3 has, for example, a cleavage plane, and further, electrodes, wiring conductors, and the like are arranged to form one or a plurality of semiconductor elements S.
  • the semiconductor element S include, but are not limited to, a light emitting diode (Light Emitting Diode; LED), a semiconductor laser (Laser Diode; LD), a photodiode (Photodiode; PD), and the like.
  • the base substrate 1 has a flat one main surface (hereinafter, also referred to as a first surface) 1a including a starting point of growth of a semiconductor crystal, and a flat other main surface (hereinafter, also referred to as a second surface) opposite to the first surface 1a. It has 1b and a side surface (hereinafter, also referred to as a third surface) 1c connecting the first surface 1a and the second surface 1b. At least the first surface 1a of the base substrate 1 is made of a nitride semiconductor.
  • the base substrate 1 may be, for example, a substrate made of a nitride semiconductor such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), or indium gallium nitride (InGaN).
  • a nitride semiconductor such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), or indium gallium nitride (InGaN).
  • the base substrate 1 used in the present embodiment is a GaN substrate cut out from a GaN single crystal ingot.
  • the base substrate 1 is cut out from the single crystal ingot so that the first surface 1a including the starting point of the growth of the semiconductor crystal is in a predetermined surface direction.
  • the base substrate 1 may be an n-type substrate in which impurities such as Si are doped in GaN, or may be a p-type substrate in which impurities such as Mg are doped in GaN.
  • the impurity density in the base substrate 1 is, for example, about 1 ⁇ 10 19 cm -3 or less.
  • the forming step a is a step of forming a plurality of semiconductor layers 3 on the first surface 1a of the base substrate 1 by the ELO method.
  • a plurality of semiconductor layers 3 are formed so that the semiconductor layers 3 adjacent to each other in the direction along the first surface 1a are separated from each other at least partially in the direction along the first surface 1a.
  • the forming step a includes a mask forming step a1, a semiconductor layer forming step a2, and a mask removing step a3, which are shown below.
  • the mask forming step a1 is a step of forming a deposition suppressing mask (hereinafter, also simply referred to as a mask) 6 that suppresses the crystals of semiconductor crystals on the base substrate 1.
  • a deposition suppressing mask hereinafter, also simply referred to as a mask
  • silicon oxide for example, SiO 2 or the like
  • PCVD plasma chemical vapor deposition
  • the silicon oxide layer is then patterned using, for example, a photolithography method and wet etching with Buffered Hydrogen Fluoride (BHF). In this way, the mask 6 is formed on the first surface 1a in a predetermined pattern.
  • the mask 6 may have, for example, a striped shape in which a plurality of strip-shaped portions 61 are arranged in parallel at predetermined intervals.
  • the width of the opening 62, which is also called a mask window, between two adjacent strips 61 is, for example, about 2 ⁇ m to 20 ⁇ m.
  • the width of the strip 61 is, for example, about 50 ⁇ m to 200 ⁇ m.
  • the edge region near the third surface 1c on the first surface 1a of the base substrate 1 may also be covered with the mask 6. This makes it possible to cleanly and surely separate the semiconductor layer 3 that grows in the edge region of the first surface 1a from the base substrate 1. Further, it is possible to suppress the abnormal growth of the semiconductor crystal in the edge region of the first surface 1a.
  • A2 Semiconductor layer forming step
  • a GaN crystal is vapor-deposited from a region of the first surface 1a of the base substrate 1 that is not covered by the mask 6 and is exposed to the opening 62. Let me.
  • VPE vapor phase deposition
  • MOCVD Metalorganic Chemical Vapor Deposition
  • the semiconductor layer 3 is formed into a light emitting diode (LED) or a semiconductor laser (Laser Diode;). It can be formed as a multilayer film that functions as an LD) or the like.
  • the semiconductor crystal When the grown semiconductor crystal exceeds the opening 62 of the mask 6, the semiconductor crystal also grows laterally along the upper surface of the mask 6.
  • the growth of the semiconductor crystal may be terminated before the semiconductor crystal grown from the first surface 1a overlaps with the adjacent semiconductor crystal.
  • a plurality of semiconductor layers 3 are obtained, each of which is connected to the first surface 1a by the connecting portion 2.
  • the connecting portion 2 is made of, for example, a GaN crystal.
  • the connecting portion 2 has, for example, a width of about 2 ⁇ m to 20 ⁇ m and a height of about 100 nm to 500 nm.
  • Each semiconductor layer 3 has, for example, a width of about 50 ⁇ m to 200 ⁇ m and a height of about 10 ⁇ m to 50 ⁇ m.
  • the growth of the semiconductor crystal may continue until the semiconductor crystal that grows laterally along the upper surface of the mask 6 overlaps with the adjacent semiconductor crystal. In this case, a semiconductor layer connected to the first surface 1a by a plurality of connecting portions 2 is obtained.
  • the mask removing step a3 is a step of removing the mask 6 after the completion of the semiconductor layer forming step a2.
  • the base substrate 1 on which the semiconductor layer 3 is formed is taken out from the vapor phase growth apparatus (epitaxial apparatus), and the mask 6 is removed using an etchant that does not substantially invade the semiconductor layer 3.
  • the mask 6 when the mask 6 is made of a silicon oxide film, the mask 6 is removed by performing wet etching using BHF. In this way, for example, as shown in FIG. 1, a plurality of semiconductor layers 3 are obtained, each of which is connected to the first surface 1a by a connecting portion 2.
  • Each of the plurality of semiconductor layers 3 may extend in a predetermined direction in a plan view. Further, the plurality of semiconductor layers 3 may form a pattern as shown in FIG. 3, for example, in a plan view. The plurality of semiconductor layers 3 may form a striped pattern extending in a predetermined direction, for example, as shown in FIG. 3A. As shown in FIG. 3B, for example, the plurality of semiconductor layers 3 may be arranged in a staggered pattern to form a so-called repeat pattern. As shown in FIG. 3C, for example, the plurality of semiconductor layers 3 may form a grid-like pattern in which each semiconductor layer 3 is connected to adjacent semiconductor layers 3 at both ends thereof.
  • the weakening step b is a step of irradiating the connecting portion 2 with the laser beam 5 to weaken the connecting portion 2.
  • the connection portion 2 can be thermally denatured and the crystal structure of the connection portion 2 can be changed by irradiating the laser beam 5.
  • the connection portion 2 may be completely or partially cut by the irradiation of the laser beam 5.
  • the wavelength of the laser beam 5 may be, for example, 370 nm or less.
  • a light source that outputs the laser beam 5 for example, an AlGAN-based semiconductor laser, a KrF excimer laser, an ArF excimer laser, a YAG laser (third harmonic), or the like can be used.
  • the focal length and spot size of the laser beam 5 can be appropriately selected according to the dimensions of the base substrate 1, the connecting portion 2, the semiconductor layer 3, and the like.
  • the laser beam 5 may be irradiated from the first surface 1a side of the base substrate 1 or may be irradiated from the second surface 1b side of the base substrate 1.
  • the laser beam 5 may be irradiated from the third surface 1c side of the base substrate 1.
  • the separation step c is a step of separating a plurality of semiconductor layers 3 from the base substrate 1.
  • a force is applied to the weakened connecting portion 2 by, for example, bringing the blade into contact with the semiconductor layer 3 or irradiating the connecting portion 2 with ultrasonic waves.
  • the connection portion 2 can be broken and the semiconductor layer 3 can be separated from the base substrate 1.
  • the separation step c can be omitted.
  • the plurality of semiconductor layers 3 formed on the first surface 1a of the base substrate 1 include semiconductor layers 3 adjacent to each other in the direction along the first surface 1a. It is at least partially separated in the direction along the first surface 1a. Therefore, the decomposition product gas or the evaporation gas generated by irradiating the connection portion 2 with the laser beam 5 and filling the space between the semiconductor layer 3 and the base substrate 1 can be discharged to the outside.
  • the gas can be released to the outside through, for example, a gap (hereinafter, also referred to as a release path) G between adjacent semiconductor layers 3 as shown by an arrow in FIG.
  • the base substrate 1 can be reused without polishing for removing the damaged portion or by performing only a small amount of polishing. As a result, it is possible to improve the production efficiency of the semiconductor element S, and it is possible to provide the semiconductor element S that can increase the number of times that the base substrate 1 can be reused.
  • the method for manufacturing a semiconductor element of the present embodiment it is not necessary to irradiate the entire base substrate 1 with the laser beam 5, and it is sufficient to irradiate only the connecting portion 2 connecting each semiconductor layer 3 and the first surface 1a. .. Therefore, it is possible to suppress excessive heating of the semiconductor layer 3 and the base substrate 1, and it is possible to reduce thermal damage to the semiconductor layer 3 and the base substrate 1. As a result, it becomes possible to manufacture a high-quality semiconductor element S. Further, the base substrate 1 can be reused without polishing for removing the damaged portion or by performing only a small amount of polishing. This makes it possible to improve the production efficiency of the semiconductor element S and reduce the manufacturing cost of the semiconductor element S.
  • the base substrate 1, the connecting portion 2, and the semiconductor layer 3 are made of GaN crystals, their refractive indexes are substantially the same. Thereby, the refraction and reflection of the laser beam 5 at the interface between the base substrate 1 and the connecting portion 2 and the interface between the connecting portion 2 and the semiconductor layer 3 can be reduced. As a result, the laser beam 5 can be irradiated to the connection portion 2 with high accuracy and high efficiency. As a result, it becomes possible to manufacture a high-quality semiconductor element S. Further, the production efficiency of the semiconductor element S can be improved.
  • the fragility step b is performed. Before this is performed, a through hole may be formed in the semiconductor layer so as to penetrate in the thickness direction thereof. As a result, the decomposition product gas or the evaporation gas that fills the space between the semiconductor layer and the base substrate 1 can be discharged to the outside through the through holes. As a result, even when the semiconductor layer connected to the first surface 1a is formed by the plurality of connecting portions 2, it becomes possible to manufacture the high-quality semiconductor element S and the production efficiency of the semiconductor element S. Can be improved.
  • the laser beam 5 may be irradiated from the second surface 1b side of the base substrate 1 and incident on the base substrate 1 from the second surface 1b. Since the base substrate 1 is not a dissimilar substrate formed by forming a GaN layer on the surface of a sapphire substrate, a SiC substrate, or the like, but a substrate made of substantially the same material, the refractive index of the base substrate 1 is substantially constant. Therefore, by incident the laser light 5 from the second surface 1b of the base substrate 1, the laser light 5 can be focused on the connection portion 2 with high accuracy.
  • connection portion 2 may be irradiated with picosecond pulse laser light or femtosecond pulse laser light.
  • picosecond pulse laser light or femtosecond pulse laser light.
  • an ablation phenomenon due to multiphoton absorption can be induced at the connection portion 2 which is the condensing point of the laser beam 5. Therefore, the connection portion 2 can be fragile with high accuracy while suppressing the occurrence of thermal damage in the semiconductor layer 3 and the base substrate 1.
  • connection portion 2 may be irradiated with a sub-nanosecond pulse laser beam or a nanosecond pulse laser beam.
  • the material removal rate is higher than in the case where the pulse width of the laser beam 5 is picoseconds or femtoseconds, so that the processing efficiency in the weakening step b can be improved.
  • the decomposition product gas and the evaporation gas can be effectively emitted to the outside even when the pulse width of the laser beam 5 is sub-nanoseconds or nanoseconds.
  • the optimization of the emission path G may be to form each semiconductor layer 3 so as to have a cross-sectional shape in which the corners of the lower surface are rounded, as shown in FIG. 1, for example.
  • a plurality of semiconductor layers 3 arranged in a staggered pattern are formed, and the distance between the adjacent semiconductor layers 3 is set in two different directions. It may be to adjust.
  • a scanning path that improves the production efficiency of the semiconductor element S may be selected according to the pattern shape of the plurality of semiconductor layers 3 formed on the base substrate 1. ..
  • the laser beam 5 may be scanned from the outer peripheral portion to the central portion of the base substrate 1 while rotating the base substrate 1 around the axis perpendicular to the first surface 1a.
  • the atmosphere, pressure, etc. in the laser processing apparatus are suppressed. May be adjusted. As a result, damage to the base substrate 1 due to oxidation can be reduced. As a result, the base substrate 1 can be reused without polishing to remove the damaged portion or by polishing only a small amount. This makes it possible to improve the production efficiency of the semiconductor element S and reduce the manufacturing cost of the semiconductor element S. Further, since it is possible to prevent the oxidized Ga metal from adhering to the semiconductor layer 3, it is possible to reduce the possibility that the quality of the semiconductor layer 3 is deteriorated. As a result, it becomes possible to manufacture a high-quality semiconductor element S.
  • the focus of the laser beam 5 may be aligned with the end portion 21 of the connecting portion 2 on the base substrate 1 side.
  • undesired thermal denaturation of the semiconductor layer 3 due to irradiation with the laser beam 5 can be suppressed.
  • polishing for removing the heat-denatured portion of the semiconductor layer 3 can be omitted, or the amount of polishing of the semiconductor layer 3 can be reduced. As a result, it becomes possible to improve the production efficiency of the semiconductor element S.
  • the focus of the laser beam 5 may be aligned with the end portion 22 of the connection portion 2 on the semiconductor layer 3 side.
  • undesired thermal denaturation of the base substrate 1 due to irradiation with the laser beam 5 can be suppressed.
  • polishing for removing the heat-denatured portion of the base substrate 1 can be omitted, or the amount of polishing of the base substrate 1 can be reduced.
  • the production efficiency of the semiconductor element S can be improved and the manufacturing cost of the semiconductor element S can be reduced.
  • the focus of the laser beam 5 may be aligned with the intermediate portion 23 located between the end portion of the connecting portion 2 on the base substrate 1 side and the end portion 22 on the 21 semiconductor layer 3 side.
  • the intermediate portion 23 located between the end portion of the connecting portion 2 on the base substrate 1 side and the end portion 22 on the 21 semiconductor layer 3 side.
  • the joining step c2 is a step of joining the support substrate 10 to the upper surfaces of the plurality of semiconductor layers 3.
  • the support substrate 10 is arranged on the plurality of semiconductor layers 3 formed on the base substrate 1 in the forming step a.
  • the support substrate 10 is arranged so that the facing surface 10a faces the first surface 1a of the base substrate 1.
  • the support substrate 10 is heated while being pressed toward the base substrate 1, and the support substrate 10 is bonded to the upper surfaces of the plurality of semiconductor layers 3.
  • the peeling step c3 is a step of peeling a plurality of semiconductor layers 3 from the base substrate 1.
  • the base substrate 1 and the support substrate 10 are relatively separated from each other.
  • tensile stress is generated in the connecting portion 2 which is weakened by the irradiation of the laser beam 5, and the connecting portion 2 is broken, so that the plurality of semiconductor layers 3 can be peeled off from the base substrate 1.
  • the peeling step c3 may include a step of forming a cleavage plane on the semiconductor layer 3 and a step of forming an electrode, a wiring conductor, or the like on the semiconductor layer 3.
  • the preparation step c1 and the joining step c2 may be performed between the forming step a and the weakening step b.
  • the decomposition-generated gas or evaporative gas generated by the irradiation of the laser beam 5 flows in the space between the semiconductor layer 3 and the base substrate 1 along the first surface 1a toward the outer edge portion of the base substrate 1. , Released to the outside.
  • the support substrate 10 may be formed with a gas flow path (not shown) for promoting the release of the decomposition product gas or the evaporative gas to the outside.
  • the gas flow path may be, for example, a through hole that penetrates the support substrate 10 in the thickness direction.
  • the gas flow path may be, for example, a groove formed on the facing surface 10a of the support substrate 10.
  • semiconductor layers adjacent to each other in the direction along the first surface are separated from each other at least partially in the direction along the first surface on the first surface of the base substrate.
  • a forming process that forms multiple semiconductor layers by epitaxial growth A fragility step of irradiating a connection portion between each of the plurality of semiconductor layers and the first surface with a laser beam to weaken the connection portion.
  • a separation step of separating the plurality of semiconductor layers from the base substrate is included.
  • the method for manufacturing a semiconductor element of the present disclosure it is possible to reduce damage to the base substrate and the semiconductor layer when the semiconductor layer is separated from the base substrate. This makes it possible to manufacture high-quality semiconductor devices and improve the production efficiency of semiconductor devices.
  • the method for manufacturing a semiconductor device of the present embodiment includes an element forming step S1, a light irradiation step S2 (also referred to as a weakening step), and a separation step S3.
  • the element forming step S1 is a step of forming the semiconductor element 33 coupled by the connecting portion 2 on the base substrate 1 by the ELO method.
  • the light irradiation step S2 is a step of bringing the connecting portion 2 into contact with the etching solution 4 and irradiating at least a part of the connecting portion 2 with light such as a laser beam 5 to melt or weaken the connecting portion 2.
  • the separation step S3 is a step of separating the semiconductor element 33 whose connecting portion 2 has been weakened by the light irradiation step S2 from the base substrate 1.
  • the element forming step S1 and the light irradiation step S2 may not be performed in this order, and for example, the element forming step S1 and the light irradiation step S2 may be performed in parallel. As a result, the process time can be shortened.
  • the semiconductor element 33 include, but are not limited to, a light emitting diode (Light Emitting Diode; LED), a semiconductor laser (Laser Diode; LD), and a photodiode (Photodiode; PD).
  • the base substrate 1 has a first surface 1a which is a flat one main surface which is a starting point of crystal growth of a semiconductor, and a second surface 1b which is a flat other main surface on the back side thereof. At least the surface of the first surface 1a is a nitride semiconductor.
  • the base substrate 1 used in the embodiment is, for example, a GaN substrate cut out from a single crystal ingot of gallium nitride (GaN) so that the first surface 1a, which is a growth surface, is in a predetermined surface direction.
  • the GaN substrate may be either an n-type substrate or a p-type substrate in which impurities such as Si are doped in the semiconductor.
  • the impurity density of the GaN substrate for example, one having an impurity density of about 1 ⁇ 10 19 cm -3 or less can be used.
  • the base substrate 1 in addition to the GaN substrate, a substrate in which a GaN layer is formed on the surface of a substrate other than GaN such as a sapphire substrate and a SiC substrate may be used.
  • the surface of the base substrate 1 is not limited to the GaN layer, and any substrate made of a GaN-based semiconductor can be used.
  • the term "nitride semiconductor" refers those are constituted by Al x Ga y In z N ( 0 ⁇ x ⁇ 1,0 ⁇ y ⁇ 1,0 ⁇ z ⁇ 1,1).
  • a mask 6 is formed on the above-mentioned base substrate 1.
  • silicon oxide for example, SiO 2
  • PCVD Physical Vapor Deposition
  • the SiO 2 layer is patterned by a photolithography method and wet etching with buffered hydrofluoric acid (BHF) to form the mask 6 shown in FIG. 6A.
  • the mask 6 has a striped shape in which a plurality of strip-shaped portions 6a are arranged in parallel at predetermined intervals.
  • the width of the opening 7, which is also called a mask window, between two adjacent strips 6a is, for example, about 2 ⁇ m to 20 ⁇ m.
  • the width of the band-shaped portion 6a is, for example, about 50 ⁇ m to 200 ⁇ m.
  • FIG. 7 is a plan view showing the pattern shape of the mask.
  • the mask material for forming the mask 6 may be a material other than SiO 2 , in which the semiconductor layer does not grow from the mask material due to vapor phase growth.
  • Masking material for example, patterning can ZrO X, oxides such as TiO X or AlO X, or can be used transition metals such as W or Cr.
  • a method suitable for the mask material such as a thin film deposition method, sputtering, or coating curing, can be appropriately used.
  • a SiO 2 layer having a thickness of about 100 to 500 nm is formed.
  • silicon oxide (SiO 2 ) which is a material for the mask 6, is laminated on the first surface 1a by a PCVD (Plasma Chemical Vapor Deposition) method or the like to have a thickness of about 100 to 500 nm.
  • the mask pattern of the mask 6 may be a strip-shaped or striped shape indicated by reference numeral 7a in FIG. 7, or a grid pattern in which a plurality of strip-shaped bodies arranged so as to be orthogonal to each other in the vertical and horizontal directions shown by reference numeral 7b. Further, it may be a so-called repeat pattern (pattern) in which the openings 7 divided at regular intervals (repeat pitch), which are indicated by reference numerals 7c, are repeated a plurality of times.
  • the edge region of the first surface 1a of the base substrate 1 near the end surface (side surface) 1c of the base substrate 1 is also covered with the above-mentioned mask 6 in consideration of the ease of peeling and separation of the semiconductor layer 3 described later. May be. As a result, the semiconductor layer near the edge located at the edge of the base substrate 1 can also be easily peeled off.
  • the semiconductor device layer 8 obtained by growing the nitride semiconductor by the ELO method is obtained.
  • the width of the semiconductor device layer 8 is, for example, about 50 ⁇ m to 200 ⁇ m, and the height is about 10 ⁇ m to 50 ⁇ m.
  • the laser beam 5 may irradiate a region including a part of the base substrate 1 side or the base substrate 1 side of the connection portion 2.
  • the laser beam 5 may be scanned in an arbitrary direction in the substrate surface of the substrate 1 by aligning the focus of the laser beam 5 with the position described above.
  • another light source as described above may be used instead of the laser beam 5.
  • the method of irradiating the connection portion 2 with the laser beam 5 in contact with the etching solution which is an electrolytic solution is a photoelectrochemical etching (also referred to as (Photo-electrochemical; PEC) etching).
  • This PEC etching is a semiconductor.
  • an "oxidation reaction” as represented by the following formula (1) and an “oxide film dissolution reaction” as represented by the formula (2) occur.
  • "H + " in the formula (1) represents a hole.
  • the connecting portion 2 When the connecting portion 2 is irradiated with the laser beam 5 in the etching solution 4 by the above-mentioned oxidation reaction and oxide film dissolution reaction, an electric field is generated from the inside of the connecting portion 2 toward the surface, and the connecting portion 2 is acid or alkaline from the surface. Dissolves or weakens in.
  • the connecting portion 2 is weakened by irradiating the connecting portion 2 with a laser beam as described above.
  • the base substrate 1 is taken out from the wafer bonding device, and the support substrate 10 is moved in a direction away from the base substrate 1.
  • a large tensile stress is generated in the connecting portion 2 which is weakened by the irradiation of the laser beam 5, and the connecting portion 2 is broken as shown in FIG. 8C.
  • the connection portion 2 since the connection portion 2 is in a fragile state or the like, the base substrate 1 can be easily separated. Separation can be done by an appropriate method. It is conceivable that the connection portion 2 remains on the base substrate 1 side, the semiconductor element 33 side, or both, depending on the vulnerable location. Therefore, after separation, the residue of the connecting portion 2 remaining on the semiconductor element 33 is removed by polishing or the like.
  • FIGS. 9A to 9C are diagrams showing the etching shape of the connecting portion.
  • the connecting portion 2 has a small width b1 on the base substrate 1 side, a large width b2 on the semiconductor element 33 side, and the cross section is etched in an inverted trapezoidal shape.
  • the semiconductor device layer 8 is formed of a band-structured material that causes an energy barrier, for example, n-GaN / i-GaN / n-GaN. Then, a laser beam is irradiated to a selective region to cause photoexcitation, a current circuit, polarization due to electric field distortion, and the like. Thereby, the connection portion 2 or a part thereof can be selectively etched by an etchant such as KOH or TMAH which can accelerate the chemical etching reaction of the charge localized portion.
  • an etchant such as KOH or TMAH which can accelerate the chemical etching reaction of the charge localized portion.
  • the connecting portion 2 has a structure having pores by a VAS (Void-Assisted Separation) method, formation of a coarse initial nucleus, porosification by anodization, an In droplet method, or the like.
  • VAS Vaid-Assisted Separation
  • the surface area is increased and the rigidity is reduced as compared with the ELO structure having no pores.
  • selective weakening is possible by increasing the etching rate.
  • the width b2 on the semiconductor element 33 side of the connecting portion 2 is small, the width b1 on the base substrate 1 side is large, and the cross section can be etched into a trapezoidal shape.
  • etching rate can be controlled by providing the above-mentioned multilayer structure inside the connecting portion 2.
  • the method for manufacturing a semiconductor element of the present disclosure includes an element forming step of forming a semiconductor element located via a connecting portion on a base substrate, and irradiating light with the connecting portion in contact with an etching solution. It includes a light irradiation step of melting or weakening, and a separation step of separating the semiconductor element from the base substrate.
  • the nitride semiconductor include GaN-based semiconductors, AlN (aluminum nitride), InAlN (indium nitride aluminum nitride), and InN (indium nitride).
  • the Z direction is the normal direction of the (0001) plane, which is the c-plane of the nitride semiconductor of the convex portion TS.
  • the X direction is the normal direction of the (11-20) plane which is the a-plane of the nitride semiconductor of the convex portion TS, and the Y direction is the m-plane of the nitride semiconductor of the convex portion TS (1-100). The normal direction of the surface.
  • the mask ML is located on the base substrate UK and includes the mask portions M1 and M2 and the openings K1 and K2 by the ELO (Epitaxial Lateral Overgrowth) method.
  • the first semiconductor portion SL1 is formed, and then the mask portions M1 and M2 are etched and removed to form the hollow portion TK.
  • the mask ML may be a mask layer.
  • the convex portion TS is formed in the opening K1.
  • the convex portion TS may have a shape in which the ⁇ 1-100> direction (Y direction) of the nitride semiconductor included therein is the longitudinal direction.
  • the p-type semiconductor portion, the n-type semiconductor portion, the active portion, and the electrode portion are each formed in layers, and the device portion DL is formed by being laminated. That is, the device unit DL may be a device layer.
  • the light emitting region can be formed so as to overlap the low dislocation portion WG in a plan view.
  • FIG. 12 is a cross-sectional view showing a configuration example of the base substrate.
  • the nitride semiconductor included in the convex portion TS is a GaN-based semiconductor
  • the base substrate UK is on a dissimilar substrate MK having a lattice constant different from that of the GaN-based semiconductor of the convex portion TS and a dissimilar substrate MK. It may be configured to have a seed portion SD formed and containing a nitride semiconductor.
  • the base substrate UK may be composed of a main substrate MK which is a silicon substrate and a seed portion SD (for example, an AlN portion), or a main substrate MK which is a silicon carbide substrate and a seed portion SD (for example, an AlN portion). , GaN-based semiconductor unit). Further, the base substrate UK includes a main substrate MK which is a silicon substrate, a buffer portion BF on the main substrate (including at least one of an AlN portion and a SiC portion), and a seed portion SD (for example, GaN) on the buffer portion. It may be composed of a system semiconductor unit). The base substrate UK may be a bulk type GaN substrate or a bulk type SiC substrate (hexagonal system) without being limited to these configurations. The seed portion SD may be the seed layer, and the buffer portion BF may be the buffer layer.
  • the convex portion TS is irradiated with the laser beam LZ while the etching solution EH is brought into contact with the side surface of the convex portion TS, so that the anisotropy progresses from the side surface of the convex portion TS to the inside.
  • Etching is performed.
  • an oxide for example, Ga 2 O
  • a nitride semiconductor for example, a GaN-based semiconductor
  • an anion for example, hydroxide ion
  • the step of separating the first semiconductor portion SL1 from the base substrate UK may be a step performed after the convex portion TS is weakened, or may be a step of crossing the convex portion TS.
  • the laser beam LZ may be irradiated from the base substrate UK side or the support substrate SK side, but the latter is selected when the base substrate UK has a light-shielding property (for example, when a silicon substrate is included). ..
  • the present disclosure has been described in detail above, but the present disclosure is not limited to the above-described embodiment, and various changes, improvements, etc. are made without departing from the gist of the present disclosure. Is possible.
  • a base substrate having a material different from the semiconductor material contained in the semiconductor layer 3 is adopted. You may.
  • the base substrate may be made of sapphire (Al 2 O 3 ), silicon carbide (SiC), silicon (Si), or the like.
  • a buffer portion and a seed portion may be arranged on the base substrate.
  • the example of irradiating the laser after removing the mask is described, but the mask may be removed after irradiating the laser and before peeling the semiconductor layer 3.
  • Base substrate 1a One main surface (first surface) 1b The other main surface (second surface) 1c Side surface (third surface), end surface 2 Connection part 21 and 22 End part 23 Intermediate part 3
  • Semiconductor layer 4 Etching solution 5 Laser light 6 Sedimentation suppression mask (mask) 6a Band 7 Opening 8 Semiconductor device layer 8a Top surface 8b Bottom surface 9
  • Adhesive layer 10 Support substrate 10a Opposing surface 10b Bonding layer 33
  • Semiconductor device 61 Opening G Gap (emission path) S semiconductor element a forming process a1 mask forming process a2 semiconductor layer forming process a3 mask removing process b weakening process c separation process c1 preparation process c2 joining process c3 peeling process S1 element forming process S2 light irradiation process S3 separation process

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JPWO2022270309A1 (https=) * 2021-06-21 2022-12-29
JPWO2023153358A1 (https=) * 2022-02-10 2023-08-17
JPWO2023189872A1 (https=) * 2022-03-28 2023-10-05
WO2025070496A1 (ja) * 2023-09-27 2025-04-03 京セラ株式会社 半導体基板並びにその製造方法および製造装置、半導体デバイス
WO2025095087A1 (ja) * 2023-10-31 2025-05-08 京セラ株式会社 半導体基板、半導体基板の製造方法、半導体デバイスの製造方法、半導体デバイス、発光素子

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