WO2021217808A1 - 一种像素驱动电路及其驱动方法及显示装置 - Google Patents

一种像素驱动电路及其驱动方法及显示装置 Download PDF

Info

Publication number
WO2021217808A1
WO2021217808A1 PCT/CN2020/096126 CN2020096126W WO2021217808A1 WO 2021217808 A1 WO2021217808 A1 WO 2021217808A1 CN 2020096126 W CN2020096126 W CN 2020096126W WO 2021217808 A1 WO2021217808 A1 WO 2021217808A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
node
unit
driving
control unit
Prior art date
Application number
PCT/CN2020/096126
Other languages
English (en)
French (fr)
Inventor
黄式强
曹起
陈政岳
明星
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/975,121 priority Critical patent/US20230123397A1/en
Publication of WO2021217808A1 publication Critical patent/WO2021217808A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technology, and in particular to a pixel driving circuit, a driving method thereof, and a display device.
  • the driving of the pixels in the organic light emitting diode display panel is to control the current between the source and drain of the driving transistor by changing the gate voltage of the driving transistor, and different currents realize the change of the pixel's light-emitting brightness, and then display different gray scales.
  • the threshold voltage (Vth) of the driving transistors at different positions in the plane will be different, and as the working time of the organic light-emitting diode device increases and the use environment changes , The threshold voltage of the drive transistor will also drift.
  • the threshold voltages of the driving transistors at different positions in the plane are different, which will lead to differences in their driving currents, and therefore display unevenness.
  • the object of the present invention is to provide a pixel driving circuit, a driving method thereof, and a display device, which can avoid display unevenness and improve the display effect.
  • the present invention provides a pixel driving circuit, including:
  • a data writing unit connected to a data voltage and a first scan signal; the data writing unit is used to write the data voltage to the first node in the reset phase;
  • the first control unit is connected to the first power supply voltage and the second scan signal; the first control unit is respectively coupled to the driving unit and the data writing unit to the first node; the first control unit is used for In the light-emitting phase, writing the first power supply voltage to the first node;
  • the driving unit is connected to the first power supply voltage; the driving unit is used to provide a driving current;
  • a compensation unit, the compensation unit and the driving unit are coupled to a second node, and the compensation unit is connected to the first scan signal; the data writing unit and the compensation unit are used in the compensation phase, Charging the second node to the first compensation voltage;
  • the lighting control unit is configured to receive a lighting signal, and the lighting control unit is coupled to the driving unit and the compensation unit to a third node; the lighting control unit is used to reset the light-emitting device and in the lighting phase , Controlling the driving current to access the light emitting device;
  • a first pole of the light emitting device is connected to the light emission control unit, and a second pole of the light emitting device receives a second power supply voltage.
  • the present invention provides a display device, including a display panel, which includes the above-mentioned pixel driving circuit.
  • the present invention provides a pixel driving method, the pixel driving method is based on the above pixel driving circuit, and the pixel driving method includes:
  • the data writing unit writes the data voltage to the first node in response to the control of the first scan signal;
  • the voltage of the second node is pulled down;
  • both the data writing unit and the compensation unit charge the voltage of the second node to the first compensation voltage in response to the control of the first scan signal;
  • V1 Vdata+Vth
  • V1 represents the first compensation voltage
  • Vdata is the data voltage
  • Vth is the threshold voltage of the driving transistor
  • the first control unit inputs a first power supply voltage to the first node in response to the control of the second scan signal
  • the driving unit responds to the control of the voltage of the second node and outputs a driving current to the light-emitting device through the light-emitting control unit to drive the light-emitting device to emit light.
  • the pixel driving circuit, the driving method thereof, and the display device of the present invention improve the existing pixel driving circuit, so that the current flowing through the light-emitting device is independent of the threshold voltage of the driving transistor, and the threshold voltage of the driving transistor is compensated. To avoid uneven display, and to improve the display effect.
  • FIG. 1 is a schematic diagram of the structure of the first pixel driving circuit in the prior art.
  • FIG. 2 is a schematic diagram of a working sequence of the pixel driving circuit shown in FIG. 1.
  • FIG. 3 is a schematic diagram of the structure of a second pixel driving circuit in the prior art.
  • FIG. 4 is a schematic diagram of a working sequence of the pixel driving circuit shown in FIG. 3.
  • FIG. 5 is a schematic structural diagram of a pixel driving circuit according to the first embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a pixel driving circuit according to the second embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a working sequence of the pixel driving circuit shown in FIG. 6.
  • FIG. 8 is a working principle diagram of the pixel driving circuit shown in FIG. 6 in the reset stage.
  • FIG. 9 is a working principle diagram of the pixel driving circuit shown in FIG. 6 in the compensation stage.
  • FIG. 10 is a working principle diagram of the pixel driving circuit shown in FIG. 6 in the light-emitting phase.
  • the existing 2T1C pixel driving circuit includes a driving transistor T11 and a second transistor T12.
  • the gate of the second transistor T12 is connected to the scan signal Scan, the source is connected to the data voltage Vdata, and the driving transistor T11
  • the gate is connected to the drain of the second transistor T12, and the source is connected to the first power supply voltage VDD (direct current voltage).
  • VDD direct current voltage
  • the signal writing stage (t1) Scan signal outputs low level, transistor T12 is turned on, data signal Vdata is written to point A through transistor T12, and the potential of point A becomes Vdata, that is The gate potential of the driving transistor T11 is Vdata, which is stored in the capacitor C1;
  • Light-emitting stage (t2) The Scan signal outputs a high level, the transistor T12 is turned off, and the DC voltage VDD continuously charges the driving transistor T11 and forms a current to drive the OLED device to emit light.
  • the current flowing through the anode of the OLED device (the saturation current of T11) is proportional to the square of the difference between the gate-source voltage of the driving transistor T11 and the threshold voltage.
  • the current formula is as follows:
  • u is the channel carrier mobility of the drive transistor T11
  • C is the channel capacitance per unit area
  • W is the channel width of the drive transistor T11
  • L is the channel length of the drive transistor T11
  • Vth is the threshold of the drive transistor T11 Voltage
  • the existing 7T1C pixel driving circuit includes a driving transistor M1 and a second transistor M2 to a seventh transistor M7.
  • the gate of the second transistor M2 is connected to the second scan signal Scan[n], the source is connected to the data voltage Vdata, and the drain is connected to the source of the driving transistor M1,
  • the gate of the driving transistor M1 is connected to the first node A, and the drain is connected to the drain of the third transistor M3;
  • the gate of the fifth transistor M5 is connected to the light-emitting signal EM, the source is connected to the data voltage VDD, and the drain is connected to the source of the driving transistor M1;
  • the gate of the third transistor M3 is connected to the second scan signal Scan[n], the source is connected to the first node A, and the drain is connected to the drain of the driving transistor M1,
  • the gate of the fourth transistor M4 is connected to the first scan signal Scan[n-1], the source is connected to the first node A, and the drain and the source of the seventh transistor M7 are both connected to the low-level signal VI;
  • the gate of the sixth transistor M6 is connected to the light emitting signal EM, the source is connected to the drain of the driving transistor M1, the drain is connected to the drain of the seventh transistor M7 and the light emitting device, and the gate of the seventh transistor M7 is connected to the The second scan signal Scan[n].
  • the specific work process includes the following stages:
  • the working process of the pixel driving circuit is divided into three stages: the initialization stage (t1), the threshold voltage compensation stage (t2), and the light-emitting stage (t3), as follows:
  • the initialization stage (t1) Scan[n-1] outputs a low level, so that the transistor M4 is turned on, Scan[n] and EM output a high level, making M2, M3, M5 , M6, M7 are turned off, VI signal (low potential) resets the gate (point A) of driving transistor M1 through M4;
  • Threshold voltage compensation stage (t2) Scan[n-1] and EM output high level, making transistors M4, M5, M6 off, Scan[n] output low level, making M2, M3, M7 open, the previous stage
  • the gate of M1 is at low potential and M1 is in the open state.
  • the data voltage Vdata charges point A (gate of M1) through M2, M1, and M3.
  • VA-Vdata Vth
  • M1 no longer meets the opening condition, and the threshold voltage compensation phase ends.
  • the potential at point A is: Vdata+Vth
  • the VI signal resets the anode of the light-emitting device through M7.
  • the saturation current formula of the driving transistor M1 is as follows, the current flowing through the anode of the OLED device is independent of Vth, and the threshold voltage of M1 is compensated.
  • the 7T1C compensation circuit can avoid that the current flowing through the anode of the OLED has nothing to do with the threshold voltage of M1, the number of transistors and the input voltage signal are relatively large, occupying a relatively large layout area, which is not conducive to saving wiring space, so it is difficult to achieve high Resolution.
  • FIG. 5 is a schematic structural diagram of a pixel driving circuit according to the first embodiment of the present invention.
  • the pixel driving circuit of this embodiment includes a data writing unit 10, a first control unit 20, a driving unit 30, a compensation unit 40, a light emission control unit 50, and a light emitting device D1.
  • the data writing unit 10 is connected to the data voltage Vdata and the first scan signal Scan[n-1]; the data writing unit 10 is used for writing the data voltage Vdata to the first node A during the reset phase;
  • the first control unit 20 is connected to a first power supply voltage VDD and a second scan signal Scan[n]; the first control unit 20 is respectively coupled to the driving unit 30 and the data writing unit 10 to the first Node A; the first control unit 20 is used to write the first power supply voltage VDD to the first node A during the light-emitting phase.
  • the driving unit 30 is connected to the first power supply voltage VDD; the driving unit 30 is used to provide a driving current; the driving current is used to drive the light emitting device D1 to emit light.
  • the compensation unit 40 and the driving unit 30 are coupled to a second node B, and the compensation unit 40 is connected to the first scan signal Scan[n-1]; the data writing unit 10 and the The compensation unit 40 is used to charge the second node B to the first compensation voltage V1 in the compensation phase;
  • the light emission control unit 50 is configured to receive a light emission signal EM.
  • the light emission control unit 50 is coupled to the driving unit 30 and the compensation unit 40 to a third node C; the light emission control unit 50 is configured to control the light emission
  • the device D1 is reset and in the light-emitting phase, the driving current is controlled to be connected to the light-emitting device D1;
  • the first pole of the light emitting device D1 is connected to the light emission control unit 50, and the second pole of the light emitting device D1 receives the second power supply voltage VSS.
  • the first power supply voltage VDD is greater than the second power supply voltage VSS, and the first pole is anode and the second pole is cathode.
  • the light emitting device may be an organic light emitting diode.
  • the data writing unit 10 writes the data voltage Vdata to the first node A; the compensation unit 40 and the light emission control unit 50 perform the voltage of the second node B Pull down.
  • the potential written into the second node B in the previous frame is Vdata+Vth, and the potential at point A is Vdata at this time.
  • the first control unit 20 inputs the first power supply voltage VDD to the first node A; the driving unit 30 outputs a driving current to the light-emitting device D1 through the light-emitting control unit 50 to drive the The light emitting device D1 emits light.
  • FIG. 6 is a schematic structural diagram of a pixel driving circuit according to a second embodiment of the present invention.
  • the first control unit 20 includes a fourth transistor T4, the gate of the fourth transistor T4 is connected to the second scan signal Scan[n], and the drain of the fourth transistor T4 It is connected to the first node A, and the source of the fourth transistor T4 is connected to the first power supply voltage VDD.
  • the driving unit 30 includes: a driving transistor T1 and a first capacitor C1, the gate of the driving transistor T1 is connected to the second node B, and the source of the driving transistor T1 is connected to the first node A and The drain of the fourth transistor T4 is connected;
  • One end of the first capacitor C1 is connected to the first power supply voltage VDD, and the other end of the first capacitor C1 is connected to the second node B.
  • the compensation unit 40 includes a third transistor T3, the gate of the third transistor T3 is used to receive the first scan signal Scan[n-1], and the source of the third transistor T3 is connected to the first scan signal Scan[n-1].
  • the gate of the transistor T1 is connected to the other end of the first capacitor C1, and the drain of the third transistor T3 is connected to the third node C.
  • the light emission control unit 50 includes a fifth film transistor T5, the gate of the fifth transistor T5 receives the light emission signal EM, and the source of the fifth transistor T5 is connected to the drain and the drain of the third transistor T3, respectively.
  • the drain of the first transistor T1 is connected, and the drain of the fifth transistor T5 is connected to the second power supply voltage VSS.
  • the data writing unit 10 includes a second transistor T2, the gate of the second transistor T2 receives the first scan signal Scan[n-1], and the source of the second transistor T2 is connected to the data Voltage Vdata, the drain of the second transistor T2 is connected to the source of the driving transistor T1.
  • All the transistors in the pixel drive circuit are N-type transistors; or, all the transistors in the pixel drive circuit are P-type transistors.
  • the potential (point B potential) charges the anode of the OLED through T3 and T5.
  • T3 and T5 are in the linear region, and the current passing through the anode of the light-emitting device is relatively large, so the gate potential of the driving transistor T1 (point B potential) is instantly pulled down .
  • the potential written to the gate of T1 in the previous frame is Vdata+Vth, and the potential at point A is Vdata.
  • Threshold voltage compensation stage (t2) Scan[n-1] outputs a low level, making the transistors T2 and T3 open, and Scan[n] outputs a high level, making T4 closed.
  • EM outputs a high level to turn off T5, and the data voltage Vdata charges point B through T2, T1, and T3.
  • the potential at point B is Vdata+Vth, that is, the gate potential of the driving transistor T1 is Vdata+Vth, and the working principle of the circuit is shown in Fig. 9;
  • Light-emitting stage (t3) Scan[n-1] outputs high level, making transistors T2 and T3 off, Scan[n] outputs low level, making T4 open, EM outputs low level, making T5 open, and the first power supply
  • the voltage VDD charges the anode of the light-emitting device through T4, T1, and T5, and the saturation current flowing through the driving transistor T1 is as follows, that is, the current I flowing through the anode of the OLED is as follows:
  • the current flowing through the anode of the light-emitting device has nothing to do with the threshold voltage of T1, and the threshold voltage of the driving transistor is compensated (to ensure that T1 is turned on, the condition Vdata+Vth-VDD ⁇ Vth, that is, Vdata ⁇ VDD) must be met, and the circuit works
  • the principle is shown in Figure 10. Since the number of transistors and input voltage signals in the pixel driving circuit of this embodiment are relatively small, the layout area is relatively small, thereby saving wiring space and improving resolution.
  • the present invention also provides a pixel driving method, which is implemented based on any one of the above-mentioned pixel driving circuits, and the pixel driving method;
  • the data writing unit 10 writes the data voltage Vdata to the first node A in response to the control of the first scan signal Scan[n-1];
  • the compensation unit 40 and the light emission control unit 50 pull down the voltage of the second node B;
  • the data writing unit 10 and the compensation unit 40 both respond to the control of the first scan signal Scan[n-1] to charge the voltage of the second node B to the first Compensation voltage V1;
  • V1 Vdata+Vth
  • V1 represents the first compensation voltage
  • Vdata is the data voltage
  • Vth is the threshold voltage of the driving transistor
  • the first control unit 20 responds to the control of the second scan signal Scan[n] to input the first power supply voltage VDD to the first node A; the driving unit 30 responds to the first node A
  • the voltage of the second node B is controlled by outputting a driving current to the light-emitting device D1 through the light-emitting control unit 50 to drive the light-emitting device D1 to emit light.
  • the present invention also provides a display panel including any one of the above-mentioned pixel driving circuits.
  • the display panel may be an organic light emitting diode display panel.
  • the present invention also provides a display device, including any one of the above-mentioned display panels.
  • the pixel driving circuit, the driving method thereof, and the display device of the present invention improve the existing pixel driving circuit, so that the current flowing through the light-emitting device is independent of the threshold voltage of the driving transistor, and the threshold voltage of the driving transistor is compensated. To avoid uneven display, and to improve the display effect.

Abstract

一种像素驱动电路及其驱动方法及显示装置，像素驱动电路包括：补偿单元(40)，补偿单元(40)与驱动单元(30)耦接于第二节点(B)，补偿单元(40)接入有第一扫描信号(Scan[n-1])；发光控制单元(50)，用于接收发光信号(EM)，发光控制单元(50)与驱动单元(30)以及补偿单元(40)耦接于第三节点(C)。

Description

一种像素驱动电路及其驱动方法及显示装置 技术领域
本发明涉及显示技术领域，特别是涉及一种像素驱动电路及其驱动方法及显示装置。
背景技术
有机发光二极管显示面板中像素的驱动是通过改变驱动晶体管的栅极电压来控制驱动晶体管源极与漏极之间的电流，不同的电流实现像素发光亮度的变化，进而显示不同的灰阶。
技术问题
然而在面板制作过程中，由于工艺均一性及波动性等因素，会导致面内不同位置的驱动晶体管的阈值电压(Vth)存在差异，并且随着有机发光二极管器件的工作时间延长及使用环境改变，驱动晶体管的阈值电压也会发生漂移。面内不同位置的驱动晶体管阈值电压有差异，会导致其驱动电流有差异，因此会出现显示不均。
技术解决方案
本发明的目的在于提供一种像素驱动电路及其驱动方法及显示装置，能够避免出现显示不均，提高了显示效果。
为解决上述技术问题，本发明提供一种像素驱动电路，包括：
数据写入单元，接入有数据电压和第一扫描信号；所述数据写入单元用于在重置阶段，将所述数据电压写入第一节点；
第一控制单元，接入有第一电源电压和第二扫描信号；所述第一控制单元分别与驱动单元以及所述数据写入单元耦接于第一节点；所述第一控制单元用于在发光阶段，将所述第一电源电压写入所述第一节点；
驱动单元，接入第一电源电压；所述驱动单元用于提供驱动电流；
补偿单元，所述补偿单元与所述驱动单元耦接于第二节点，所述补偿单元接入有所述第一扫描信号；所述数据写入单元和所述补偿单元用于在补偿阶段，将所述第二节点充电至第一补偿电压；
发光控制单元，用于接收发光信号，所述发光控制单元与所述驱动单元以及所述补偿单元耦接于第三节点；所述发光控制单元用于对所述发光器件进行复位以及在发光阶段，控制所述驱动电流接入所述发光器件；
发光器件，所述发光器件的第一极与所述发光控制单元连接，所述发光器件的第二极接收第二电源电压。
本发明提供一种显示装置，包括显示面板，其包括上述像素驱动电路。
本发明提供一种像素驱动方法，所述像素驱动方法基于上述像素驱动电路，所述像素驱动方法包括：
在重置阶段，所述数据写入单元响应于所述第一扫描信号的控制，将所述数据电压写入至所述第一节点；通过所述补偿单元和所述发光控制单元将所述第二节点的电压进行拉低；
在补偿阶段，所述数据写入单元和所述补偿单元均响应于所述第一扫描信号的控制，将所述第二节点的电压充电至第一补偿电压；
其中，V1＝Vdata+Vth，V1表示所述第一补偿电压，Vdata为所述数据电压，Vth为所述驱动晶体管的阈值电压；
在发光阶段，所述第一控制单元响应于所述第二扫描信号的控制，向所述第一节点输入第一电源电压；
其中所述驱动单元响应于所述第二节点的电压的控制，通过所述发光控制单元向所述发光器件输出驱动电流，以驱动所述发光器件发光。
有益效果
本发明的像素驱动电路及其驱动方法及显示装置，通过对现有的像素驱动电路进行改进，因此使得流过发光器件的电流与驱动晶体管的阈值电压无关，实现了驱动晶体管阈值电压的补偿，避免出现显示不均，进而提高了显示效果。
附图说明
图1为现有第一种像素驱动电路的结构示意图。
图2为图1所示的像素驱动电路的一种工作时序示意图。
图3为现有第二种像素驱动电路的结构示意图。
图4为图3所示的像素驱动电路的一种工作时序示意图。
图5为本发明实施例一的像素驱动电路的结构示意图。
图6为本发明实施例二的像素驱动电路的结构示意图。
图7为图6所示的像素驱动电路的一种工作时序示意图。
图8为图6所示的像素驱动电路处于重置阶段的工作原理图。
图9为图6所示的像素驱动电路处于补偿阶段的工作原理图。
图10为图6所示的像素驱动电路处于发光阶段的工作原理图。
本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
如图1和图2所示，现有的2T1C像素驱动电路包括驱动晶体管T11和第二晶体管T12，第二晶体管T12的栅极接入扫描信号Scan，源极接入数据电压Vdata，驱动晶体管T11的栅极与第二晶体管T12的漏极连接，源极接入第一电源电压VDD(直流电压)，具体工作过程中包括以下阶段：
以T12和T11为P型晶体管为例，信号写入阶段(t1)：Scan信号输出低电平，晶体管T12打开，数据信号Vdata通过晶体管T12写入A点，A点的电位变为Vdata，即驱动晶体管T11的栅极电位为Vdata，并存入电容C1；
发光阶段(t2)：Scan信号输出高电平，晶体管T12关闭，直流电压VDD持续对驱动晶体管T11充电并形成电流，驱动OLED器件发光。流过OLED器件阳极的电流(T11的饱和电流)正比于驱动晶体管T11栅源压差与阈值电压差值的平方，电流公式如下，
Figure PCTCN2020096126-appb-000001
其中u为驱动晶体管T11的沟道载流子迁移率，C为单位面积沟道电容，W为驱动晶体管T11的沟道宽度，L为驱动晶体管T11的沟道长度，Vth为驱动晶体管T11的阈值电压，可见流过发光二极管的电流与驱动晶体管T11的阈值电压有关。
如图3和图4所示，现有的7T1C的像素驱动电路包括驱动晶体管M1和第二晶体管M2至第七晶体管M7。
第二晶体管M2的栅极接入第二扫描信号Scan[n]，源极接入数据电压Vdata，漏极与驱动晶体管M1的源极连接，
驱动晶体管M1的栅极与第一节点A连接，漏极与第三晶体管M3的漏极连接；
第五晶体管M5的栅极接入发光信号EM，源极接入数据电压VDD，漏极与驱动晶体管M1的源极连接；
第三晶体管M3的栅极接入第二扫描信号Scan[n]，源极与第一节点A连接，漏极与驱动晶体管M1的漏极连接，
第四晶体管M4的栅极接入第一扫描信号Scan[n-1]，源极与第一节点A连接，漏极和第七晶 体管M7的源极均与低电平信号VI连接；
第六晶体管M6的栅极接入发光信号EM，源极与驱动晶体管M1的漏极连接，漏极与第七晶体管M7的漏极连接以及发光器件连接，第七晶体管M7的栅极接入第二扫描信号Scan[n]。
具体工作过程中包括以下阶段：
该像素驱动电路工作过程分为三个阶段：初始化阶段(t1)、阈值电压补偿阶段(t2)、发光阶段(t3)，具体如下：
以M1至M7为P型晶体管为例，初始化阶段(t1)：Scan[n-1]输出低电平，使得晶体管M4打开，Scan[n]及EM输出高电平，使得M2、M3、M5、M6、M7关闭，VI信号(低电位)通过M4对驱动晶体管M1的栅极(A点)进行复位；
阈值电压补偿阶段(t2)：Scan[n-1]及EM输出高电平，使得晶体管M4、M5、M6关闭，Scan[n]输出低电平，使得M2、M3、M7打开，上一阶段M1栅极为低电位，M1处于打开状态，数据电压Vdata通过M2、M1、M3对A点(M1栅极)进行充电，当M1栅极与源极电位差为其阈值电压时(即VA-Vdata＝Vth)，M1不再满足打开条件，阈值电压补偿阶段结束，此时A点电位为：Vdata+Vth，同时VI信号通过M7对发光器件的阳极进行复位。
发光阶段(t3)：Scan[n-1]、Scan[n]输出高电平，使得晶体管M2、M3、M4、M7关闭，EM输出低电平，使得M5、M6打开，VDD通过M5、M1、M6给发光器件的阳极供电，驱动晶体管M1输出电流以驱动发光器件发光。
驱动晶体管M1的饱和电流公式如下，流过OLED器件阳极的电流与Vth无关，实现了对M1阈值电压的补偿。
Figure PCTCN2020096126-appb-000002
该7T1C补偿电路虽然可以避免流过OLED阳极的电流与M1的阈值电压无关，但是晶体管数量及输入的电压信号相对较多，占用版图面积相对较多，不利于节省布线空间，因此较难实现高分辨率。
请参照图5，图5本发明实施例一的像素驱动电路的结构示意图。
如图5所示，本实施例的像素驱动电路包括数据写入单元10、第一控制单元20、驱动单元30、补偿单元40、发光控制单元50以及发光器件D1。
数据写入单元10接入有数据电压Vdata和第一扫描信号Scan[n-1]；所述数据写入单元10用于在重置阶段，将所述数据电压Vdata写入第一节点A；
第一控制单元20接入有第一电源电压VDD和第二扫描信号Scan[n]；所述第一控制单元20分别与所述驱动单元30以及所述数据写入单元10耦接于第一节点A；所述第一控制单元20用于在发光阶段，将所述第一电源电压VDD写入所述第一节点A。
所述驱动单元30接入第一电源电压VDD；所述驱动单元30用于提供驱动电流；所述驱动电流用于驱动所述发光器件D1发光。
所述补偿单元40与所述驱动单元30耦接于第二节点B，所述补偿单元40接入有所述第一扫描信号Scan[n-1]；所述数据写入单元10和所述补偿单元40用于在补偿阶段，将所述第二节点B充电至第一补偿电压V1；
发光控制单元50，用于接收发光信号EM，所述发光控制单元50与所述驱动单元30以及所述补偿单元40耦接于第三节点C；所述发光控制单元50用于对所述发光器件D1进行复位以及在发光阶段，控制所述驱动电流接入所述发光器件D1；
所述发光器件D1的第一极与所述发光控制单元50连接，所述发光器件D1的第二极接收第二电源电压VSS。在一实施方式中，第一电源电压VDD大于所述第二电源电压VSS，第一极为阳极、第二极为阴极。所述发光器件可为有机发光二极管。
本实施例的像素驱动电路的工作过程包括以下三个阶段：
在重置阶段，所述数据写入单元10将所述数据电压Vdata写入至所述第一节点A；所述补偿单元40和所述发光控制单元50将所述第二节点B的电压进行拉低。上一帧第二节点B被写入的电位为Vdata+Vth，此时A点的电位为Vdata。
在补偿阶段，所述数据写入单元10和所述补偿单元40将所述第二节点B的电压充电至第一补偿电压V1；其中，V1＝Vdata+Vth，V1表示所述第一补偿电压，Vdata为所述数据电压，Vth为所述驱动晶体管的阈值电压；当B点的电压满足VA-Vdata＝Vth时，T1关闭，阈值电压补偿阶段结束，此时B点电位为Vdata+Vth。
在发光阶段，所述第一控制单元20将第一电源电压VDD输入至所述第一节点A；驱动单元30通过所述发光控制单元50向所述发光器件D1输出驱动电流，以驱动所述发光器件D1发光。
请参照图6，图6本发明实施例二的像素驱动电路的结构示意图。
如图6所示，所述第一控制单元20包括第四晶体管T4，所述第四晶体管T4的栅极接入所述第二扫描信号Scan[n]，所述第四晶体管T4的漏极与所述第一节点A连接，所述第四晶体管T4的源极与所述第一电源电压VDD连接。
所述驱动单元30包括：驱动晶体管T1和第一电容C1，所述驱动晶体管T1的栅极与所述第二节点B连接，所述驱动晶体管T1的源极分别与所述第一节点A以及所述第四晶体管T4的漏极连接；
所述第一电容C1的一端接入所述第一电源电压VDD，所述第一电容C1的另一端与所述第二节点B连接。
所述补偿单元40包括第三晶体管T3，所述第三晶体管T3的栅极用于接收所述第一扫描信号Scan[n-1]，所述第三晶体管T3的源极与所述第一晶体管T1的栅极和所述第一电容C1的另一端连接，所述第三晶体管T3的漏极与所述第三节点C连接。
所述发光控制单元50包括第五膜晶体管T5，所述第五晶体管T5的栅极接收所述发光信号EM，所述第五晶体管T5的源极分别与所述第三晶体管T3的漏极和所述第一晶体管T1的漏极连接，所述第五晶体管T5的漏极接入所述第二电源电压VSS。
所述数据写入单元10包括第二晶体管T2，所述第二晶体管T2的栅极接收所述第一扫描信号Scan[n-1]，所述第二晶体管T2的源极接入所述数据电压Vdata，所述第二晶体管T2的漏极与所述驱动晶体管T1的源极连接。
所述像素驱动电路中的全部晶体管均为N型晶体管；或者，所述像素驱动电路中的全部晶体管均为P型晶体管。
以全部晶体管均为P型晶体管为例，结合图6和图7，对本实施例的像素驱动电路的工作过程进行详细描述。
重置阶段(t1)：Scan[n-1]和EM均输出低电平，使得晶体管T2、T3、T5打开，Scan[n]输出高电平，使得晶体管T4关闭，驱动晶体管T1的栅极电位(B点电位)经过T3、T5对OLED阳极进行充电，此时T3、T5处于线性区，经过发光器件阳极的电流较大，因此驱动晶体管T1栅极电位(B点电位)瞬间被拉低。T1的栅极在上一帧被写入的电位为Vdata+Vth，A点的电位为Vdata，此时T1的栅极和源极之间的压差Vgs＝Vdata+Vth-Vdata＝Vth，T1处于关闭状态，A点不影响驱动晶体管栅极复位，电路工作原理如下图8所示；图8至图10中的箭头表示电流的流向。
阈值电压补偿阶段(t2)：Scan[n-1]输出低电平，使得晶体管T2、T3打开，Scan[n]输出高电平，使得T4关闭。EM输出高电平，使得T5关闭，数据电压Vdata经过T2、T1、T3对B点充电，当B点的电位满足VA-Vdata＝Vth时，T1关闭，阈值电压补偿阶段结束。此时B点的电位为Vdata+Vth，也即即驱动晶体管T1的栅极电位为Vdata+Vth，电路工作原理如图9所示；
发光阶段(t3)：Scan[n-1]输出高电平，使得晶体管T2、T3关闭，Scan[n]输出低电平，使得T4打开，EM输出低电平，使得T5打开，第一电源电压VDD经过T4、T1、T5对发光器件的阳极进行充电，流过驱动晶体管T1的饱和电流如下，即流过OLED阳极的电流I如下：
Figure PCTCN2020096126-appb-000003
也即流过发光器件的阳极的电流与T1的阈值电压无关，实现了驱动晶体管阈值电压的补偿(为确保T1打开，需满足条件Vdata+Vth-VDD<Vth，即Vdata<VDD)，电路工作原理如图10所示。由于本实施例的像素驱动电路中晶体管的数量及输入的电压信号相对较少，因此占用版图面积相对较少，从而节省布线空间，提高分辨率。
本发明还提供一种像素驱动方法，该像素驱动方法基于上述任意一种的像素驱动电路实现，所述像素驱动方法；
S11、在重置阶段，所述数据写入单元10响应于所述第一扫描信号Scan[n-1]的控制，将所述数据电压Vdata写入至所述第一节点A；通过所述补偿单元40和所述发光控制单元50将所述第二节点B的电压进行拉低；
S12、在补偿阶段，所述数据写入单元10和所述补偿单元40均响应于所述第一扫描信号Scan[n-1]的控制，将所述第二节点B的电压充电至第一补偿电压V1；
其中，V1＝Vdata+Vth，V1表示所述第一补偿电压，Vdata为所述数据电压，Vth为所述驱动晶体管的阈值电压；
S13、在发光阶段，所述第一控制单元20响应于所述第二扫描信号Scan[n]的控制，向所述第一节点A输入第一电源电压VDD；驱动单元30响应于所述第二节点B的电压的控制，通过所述发光控制单元50向所述发光器件D1输出驱动电流，以驱动所述发光器件D1发光。对于上述各步骤的具体描述和像素驱动电路的具体描述可参见前述任一实施例中的相应内容，此处不再详细描述。
本发明还提供一种显示面板，包括上述任意一种像素驱动电路。该显示面板可为有机发光二极管显示面板。
本发明还提供一种显示装置，包括上述任意一种显示面板。
本发明的像素驱动电路及其驱动方法及显示装置，通过对现有的像素驱动电路进行改进，因此使得流过发光器件的电流与驱动晶体管的阈值电压无关，实现了驱动晶体管阈值电压的补偿，避免出现显示不均，进而提高了显示效果。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种像素驱动电路，其包括：
    数据写入单元，接入有数据电压和第一扫描信号；所述数据写入单元用于在重置阶段，将所述数据电压写入第一节点；
    第一控制单元，接入有第一电源电压和第二扫描信号；所述第一控制单元分别与驱动单元以及所述数据写入单元耦接于第一节点；所述第一控制单元用于在发光阶段，将所述第一电源电压写入所述第一节点；
    驱动单元，接入第一电源电压；所述驱动单元用于提供驱动电流；
    补偿单元，所述补偿单元与所述驱动单元耦接于第二节点，所述补偿单元接入有所述第一扫描信号；所述数据写入单元和所述补偿单元用于在补偿阶段，将所述第二节点充电至第一补偿电压；
    发光控制单元，用于接收发光信号，所述发光控制单元与所述驱动单元以及所述补偿单元耦接于第三节点；所述发光控制单元用于对所述发光器件进行复位以及在发光阶段，控制所述驱动电流接入所述发光器件；以及
    发光器件，所述发光器件的第一极与所述发光控制单元连接，所述发光器件的第二极接收第二电源电压。
  2. 根据权利要求1所述的像素驱动电路，其中所述第一控制单元包括第四晶体管，所述第四晶体管的栅极与所述第二扫描信号连接，所述第四晶体管的漏极与所述第一节点连接，所述第四晶体管的源极接入所述第一电源电压。
  3. 根据权利要求2所述的像素驱动电路，其中
    所述驱动单元包括：
    驱动晶体管，所述驱动晶体管的栅极与所述第二节点连接，所述驱动晶体管的源极分别与所述第一节点以及所述第四晶体管的漏极连接；
    第一电容，所述第一电容的一端接入所述第一电源电压，所述第一电容的另一端与所述第二节点连接。
  4. 根据权利要求3所述的像素驱动电路，其中
    所述补偿单元包括第三晶体管，所述第三晶体管的栅极用于接收所述第一扫描信号，所述第三晶体管的源极与所述第一晶体管的栅极和所述第一电容的另一端连接，所述第三晶体管的漏极与所述第三节点连接。
  5. 根据权利要求4所述的像素驱动电路，其中
    所述发光控制单元包括第五膜晶体管，所述第五晶体管的栅极接入所述发光信号，所述第五晶体管的源极分别与所述第三晶体管的漏极和所述第一晶体管的漏极连接，所述第五晶体管的漏极接入所述第二电源电压。
  6. 根据权利要求3所述的像素驱动电路，其中
    所述数据写入单元包括第二晶体管，所述第二晶体管的栅极接入所述第一扫描信号，所述第二晶体管的源极接入所述数据电压，所述第二晶体管的漏极与所述驱动晶体管的源极连接。
  7. 根据权利要求2所述的像素驱动电路，其中所述像素驱动电路中的全部晶体管均为N型晶体管。
  8. 根据权利要求2所述的像素驱动电路，其中所述像素驱动电路中的全部晶体管均为P型晶体管。
  9. 一种显示装置，其包括显示面板，其包括像素驱动电路，其包括：
    数据写入单元，接入有数据电压和第一扫描信号；所述数据写入单元用于在重置阶段，将所述数据电压写入第一节点；
    第一控制单元，接入有第一电源电压和第二扫描信号；所述第一控制单元分别与驱动单元以及所述数据写入单元耦接于第一节点；所述第一控制单元用于在发光阶段，将所述第一电源电压写入所述第一节点；
    驱动单元，接入第一电源电压；所述驱动单元用于提供驱动电流；
    补偿单元，所述补偿单元与所述驱动单元耦接于第二节点，所述补偿单元接入有所述第一扫描信号；所述数据写入单元和所述补偿单元用于在补偿阶段，将所述第二节点充电至第一补偿电压；
    发光控制单元，用于接收发光信号，所述发光控制单元与所述驱动单元以及所述补偿单元耦接于第三节点；所述发光控制单元用于对所述发光器件进行复位以及在发光阶段，控制所述驱动电流接入所述发光器件；以及
    发光器件，所述发光器件的第一极与所述发光控制单元连接，所述发光器件的第二极接收第二电源电压。
  10. 根据权利要求9所述的显示装置，其中所述第一控制单元包括第四晶体管，所述第四晶体管的栅极与所述第二扫描信号连接，所述第四晶体管的漏极与所述第一节点连接，所述第四晶体管的源极接入所述第一电源电压。
  11. 根据权利要求10所述的显示装置，其中
    所述驱动单元包括：
    驱动晶体管，所述驱动晶体管的栅极与所述第二节点连接，所述驱动晶体管的源极分别与所述第一节点以及所述第四晶体管的漏极连接；
    第一电容，所述第一电容的一端接入所述第一电源电压，所述第一电容的另一端与所述第二节点连接。
  12. 根据权利要求11所述的显示装置，其中
    所述补偿单元包括第三晶体管，所述第三晶体管的栅极用于接收所述第一扫描信号，所述第三晶体管的源极与所述第一晶体管的栅极和所述第一电容的另一端连接，所述第三晶体管的漏极与所述第三节点连接。
  13. 根据权利要求12所述的显示装置，其中
    所述发光控制单元包括第五膜晶体管，所述第五晶体管的栅极接入所述发光信号，所述第五晶体管的源极分别与所述第三晶体管的漏极和所述第一晶体管的漏极连接，所述第五晶体管的漏极接入所述第二电源电压。
  14. 根据权利要求11所述的显示装置，其中
    所述数据写入单元包括第二晶体管，所述第二晶体管的栅极接入所述第一扫描信号，所述第二晶体管的源极接入所述数据电压，所述第二晶体管的漏极与所述驱动晶体管的源极连接。
  15. 根据权利要求10所述的显示装置，其中所述像素驱动电路中的全部晶体管均为N型晶体管。
  16. 根据权利要求10所述的显示装置，其中所述像素驱动电路中的全部晶体管均为P型晶体管。
  17. 一种像素驱动方法，其中所述像素驱动方法基于像素驱动电路，所述像素驱动方法包括：
    在重置阶段，所述数据写入单元响应于所述第一扫描信号的控制，将所述数据电压写入至所述第一节点；通过所述补偿单元和所述发光控制单元将所述第二节点的电压进行拉低；
    在补偿阶段，所述数据写入单元和所述补偿单元均响应于所述第一扫描信号的控制，将所述第二节点的电压充电至第一补偿电压；
    其中，V1＝Vdata+Vth，V1表示所述第一补偿电压，Vdata为所述数据电压，Vth为所述驱动晶体管的阈值电压；
    在发光阶段，所述第一控制单元响应于所述第二扫描信号的控制，向所述第一节点输入第一电源电压；
    其中所述驱动单元响应于所述第二节点的电压的控制，通过所述发光控制单元向所述发光器件输出驱动电流，以驱动所述发光器件发光；
    所述像素驱动电路包括：
    数据写入单元，接入有数据电压和第一扫描信号；所述数据写入单元用于在重置阶段，将所述数据电压写入第一节点；
    第一控制单元，接入有第一电源电压和第二扫描信号；所述第一控制单元分别与驱动单元以及所述数据写入单元耦接于第一节点；所述第一控制单元用于在发光阶段，将所述第一电源电压写入所述第一节点；
    驱动单元，接入第一电源电压；所述驱动单元用于提供驱动电流；
    补偿单元，所述补偿单元与所述驱动单元耦接于第二节点，所述补偿单元接入有所述第一扫描信号；所述数据写入单元和所述补偿单元用于在补偿阶段，将所述第二节点充电至第一补偿电压；
    发光控制单元，用于接收发光信号，所述发光控制单元与所述驱动单元以及所述补偿单元耦接于第三节点；所述发光控制单元用于对所述发光器件进行复位以及在发光阶段，控制所述驱动电流接入所述发光器件；以及
    发光器件，所述发光器件的第一极与所述发光控制单元连接，所述发光器件的第二极接收第二电源电压。
  18. 根据权利要求17所述的像素驱动方法，其中所述第一控制单元包括第四晶体管，所述第四晶体管的栅极与所述第二扫描信号连接，所述第四晶体管的漏极与所述第一节点连接，所述第四晶体管的源极接入所述第一电源电压。
  19. 根据权利要求18所述的像素驱动方法，其中
    所述驱动单元包括：
    驱动晶体管，所述驱动晶体管的栅极与所述第二节点连接，所述驱动晶体管的源极分别与所述第一节点以及所述第四晶体管的漏极连接；
    第一电容，所述第一电容的一端接入所述第一电源电压，所述第一电容的另一端与所述第二节点连接。
  20. 根据权利要求17所述的像素驱动方法，其中
    所述补偿单元包括第三晶体管，所述第三晶体管的栅极用于接收所述第一扫描信号，所述第三晶体管的源极与所述第一晶体管的栅极和所述第一电容的另一端连接，所述第三晶体管的漏极与所述第三节点连接。
PCT/CN2020/096126 2020-04-29 2020-06-15 一种像素驱动电路及其驱动方法及显示装置 WO2021217808A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/975,121 US20230123397A1 (en) 2020-04-29 2020-06-15 Pixel driving circuit, driving method thereof, and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010356383.1A CN111508437A (zh) 2020-04-29 2020-04-29 一种像素驱动电路及其驱动方法、显示面板及显示装置
CN202010356383.1 2020-04-29

Publications (1)

Publication Number Publication Date
WO2021217808A1 true WO2021217808A1 (zh) 2021-11-04

Family

ID=71878225

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/096126 WO2021217808A1 (zh) 2020-04-29 2020-06-15 一种像素驱动电路及其驱动方法及显示装置

Country Status (3)

Country Link
US (1) US20230123397A1 (zh)
CN (1) CN111508437A (zh)
WO (1) WO2021217808A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230098997A (ko) * 2021-12-27 2023-07-04 엘지디스플레이 주식회사 픽셀 회로 및 이를 포함하는 표시 장치

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985352A (zh) * 2014-05-08 2014-08-13 京东方科技集团股份有限公司 补偿像素电路及显示装置
US9589502B2 (en) * 2012-11-23 2017-03-07 Samsung Display Co., Ltd. Organic light emitting display device with initialization circuit and driving method of the same
CN106558287A (zh) * 2017-01-25 2017-04-05 上海天马有机发光显示技术有限公司 有机发光像素驱动电路、驱动方法及有机发光显示面板
CN109087610A (zh) * 2018-08-20 2018-12-25 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路、驱动方法及显示面板
CN110085170A (zh) * 2019-04-29 2019-08-02 昆山国显光电有限公司 一种像素电路、像素电路的驱动方法和显示面板
CN110895915A (zh) * 2018-09-13 2020-03-20 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
US20200098316A1 (en) * 2017-03-22 2020-03-26 Sharp Kabushiki Kaisha Display device drive method and display device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180099020A (ko) * 2017-02-28 2018-09-05 엘지디스플레이 주식회사 전계 발광 표시장치
US11127357B2 (en) * 2019-04-19 2021-09-21 Apple Inc. Display pixel luminance stabilization systems and methods

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9589502B2 (en) * 2012-11-23 2017-03-07 Samsung Display Co., Ltd. Organic light emitting display device with initialization circuit and driving method of the same
CN103985352A (zh) * 2014-05-08 2014-08-13 京东方科技集团股份有限公司 补偿像素电路及显示装置
CN106558287A (zh) * 2017-01-25 2017-04-05 上海天马有机发光显示技术有限公司 有机发光像素驱动电路、驱动方法及有机发光显示面板
US20200098316A1 (en) * 2017-03-22 2020-03-26 Sharp Kabushiki Kaisha Display device drive method and display device
CN109087610A (zh) * 2018-08-20 2018-12-25 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路、驱动方法及显示面板
CN110895915A (zh) * 2018-09-13 2020-03-20 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
CN110085170A (zh) * 2019-04-29 2019-08-02 昆山国显光电有限公司 一种像素电路、像素电路的驱动方法和显示面板

Also Published As

Publication number Publication date
US20230123397A1 (en) 2023-04-20
CN111508437A (zh) 2020-08-07

Similar Documents

Publication Publication Date Title
US10249238B2 (en) Pixel driving circuit, array substrate, display panel and display apparatus having the same, and driving method thereof
WO2019237735A1 (zh) 像素电路及其驱动方法、显示面板和显示装置
WO2020140717A1 (zh) 像素电路及其驱动方法、显示面板、显示装置
WO2020211688A1 (zh) 像素驱动电路及方法、显示面板
WO2018072299A1 (zh) Amoled像素驱动电路及驱动方法
EP2523182B1 (en) Pixel unit circuit, pixel array, display panel and display panel driving method
WO2018214419A1 (zh) 像素电路、像素驱动方法和显示装置
WO2016145693A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2016155053A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2016150232A1 (zh) 像素电路及其驱动方法、显示装置
WO2018072298A1 (zh) Amoled像素驱动电路及驱动方法
WO2016192275A1 (zh) 一种像素驱动电路及方法、阵列基板和显示装置
WO2016011711A1 (zh) 像素电路、像素电路的驱动方法和显示装置
US9548024B2 (en) Pixel driving circuit, driving method thereof and display apparatus
WO2020143234A1 (zh) 像素驱动电路、像素驱动方法和显示装置
CN108777131B (zh) Amoled像素驱动电路及驱动方法
WO2022061852A1 (zh) 像素驱动电路及显示面板
EP3654325B1 (en) Amoled pixel driver circuit and pixel driving method
WO2023016138A1 (zh) 像素驱动电路及显示面板
KR20200019253A (ko) Amoled 픽셀 구동 회로 및 픽셀 구동 방법
WO2018166037A1 (zh) 一种像素驱动电路及oled显示装置
WO2023011333A1 (zh) 像素驱动电路及其驱动方法、显示面板
WO2019047701A1 (zh) 像素电路及其驱动方法、显示装置
WO2019037536A1 (zh) 像素电路及其驱动方法、显示装置
CN111063294B (zh) 一种像素驱动电路及显示面板

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20933113

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20933113

Country of ref document: EP

Kind code of ref document: A1