WO2016155053A1 - Amoled像素驱动电路及像素驱动方法 - Google Patents

Amoled像素驱动电路及像素驱动方法 Download PDF

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WO2016155053A1
WO2016155053A1 PCT/CN2015/077157 CN2015077157W WO2016155053A1 WO 2016155053 A1 WO2016155053 A1 WO 2016155053A1 CN 2015077157 W CN2015077157 W CN 2015077157W WO 2016155053 A1 WO2016155053 A1 WO 2016155053A1
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thin film
film transistor
electrically connected
node
signal
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PCT/CN2015/077157
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English (en)
French (fr)
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韩佰祥
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深圳市华星光电技术有限公司
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Priority to US14/758,963 priority Critical patent/US9721507B2/en
Publication of WO2016155053A1 publication Critical patent/WO2016155053A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an AMOLED pixel driving circuit and a pixel driving method.
  • OLED Organic Light Emitting Display
  • OLED Organic Light Emitting Display
  • a large-area full-color display and many other advantages have been recognized by the industry as the most promising display device.
  • the OLED display device can be divided into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED), namely direct addressing and thin film transistor (Thin Film Transistor, according to the driving method). TFT) matrix addressing two types.
  • the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
  • the AMOLED is a current driving device. When a current flows through the organic light emitting diode, the organic light emitting diode emits light, and the luminance of the light is determined by the current flowing through the organic light emitting diode itself. Most existing integrated circuits (ICs) only transmit voltage signals, so the pixel driving circuit of AMOLED needs to complete the task of converting a voltage signal into a current signal.
  • the conventional AMOLED pixel driving circuit is usually 2T1C, that is, a structure in which two thin film transistors are added with a capacitor to convert a voltage into a current.
  • a conventional 2T1C pixel driving circuit for an AMOLED includes a first thin film transistor T10, a second thin film transistor T20, and a capacitor C10.
  • the first thin film transistor T10 is a switching thin film transistor.
  • the second thin film transistor T20 is a driving thin film transistor, and the capacitor C10 is a storage capacitor.
  • the gate of the first thin film transistor T10 is electrically connected to the scan signal Scan, the source is electrically connected to the data signal Data, and the drain is electrically connected to the gate of the second thin film transistor T20 and one end of the capacitor C10;
  • the drain of the second thin film transistor T20 is electrically connected to the positive voltage VDD of the power source, the source is electrically connected to the anode of the organic light emitting diode D; the cathode of the organic light emitting diode D is electrically connected to the negative voltage of the power supply VSS;
  • One end of C10 is electrically connected to the first film
  • the drain of the transistor T10 and the gate of the second thin film transistor T20 are electrically connected to the drain of the second thin film transistor T20 and the positive power supply voltage VDD.
  • the scan signal Scan controls the opening of the first thin film transistor T10, and the data signal Data passes through the first thin film transistor T10 to enter the gate of the second thin film transistor T20 and the capacitor C10, and then the first thin film transistor T10 is closed due to the capacitance C10.
  • the gate voltage of the second thin film transistor T20 can continue to maintain the data signal voltage, so that the second thin film transistor T20 is in an on state, and the driving current enters the organic light emitting diode D through the second thin film transistor T20 to drive the organic light emitting.
  • the diode D emits light.
  • the above conventional 2T1C pixel driving circuit for AMOLED is sensitive to the threshold voltage and channel mobility of the thin film transistor, the starting voltage and quantum efficiency of the organic light emitting diode, and the transient process of the power supply.
  • the threshold voltage of the second thin film transistor T20 that is, the driving thin film transistor, may drift with the operation time, thereby causing the light emission of the organic light emitting diode D to be unstable; further, the second thin film transistor T20 of the pixel driving circuit of each pixel is driven.
  • the drift of the threshold voltage of the thin film transistor is different, and the amount of drift is increased or decreased, resulting in uneven illumination and uneven brightness between the pixels.
  • the AMOLED display luminance unevenness caused by using such a conventional uncompensated 2T1C pixel driving circuit is about 50% or more.
  • the compensation means that the parameters of the driving thin film transistor in each pixel, such as the threshold voltage and the mobility, must be compensated to flow through the organic light emitting diode. The current becomes independent of these parameters.
  • An object of the present invention is to provide an AMOLED pixel driving circuit capable of effectively compensating for threshold voltage variations of a driving thin film transistor and an organic light emitting diode, so that the display brightness of the AMOLED is relatively uniform and the display quality is improved.
  • Another object of the present invention is to provide an AMOLED pixel driving method capable of effectively compensating for threshold voltage changes of a driving thin film transistor and an organic light emitting diode, so that the display brightness of the AMOLED is relatively uniform and the display quality is improved.
  • the present invention provides an AMOLED pixel driving circuit, including: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a first capacitor, a second capacitor, And organic light emitting diodes;
  • the gate of the first thin film transistor is electrically connected to the first node, and the source is electrically connected to the second section Point, the drain is electrically connected to the positive voltage of the power source;
  • the gate of the second thin film transistor is electrically connected to the scan signal, the source is electrically connected to the data signal, and the drain is electrically connected to the first node;
  • the gate of the third thin film transistor is electrically connected to the second global signal, the source is electrically connected to the negative voltage of the power supply, and the drain is electrically connected to the second node;
  • the fourth thin film transistor gate is electrically connected to the third global signal, the source is electrically connected to the third node, and the drain is electrically connected to the first node;
  • the gate of the fifth thin film transistor is electrically connected to the first global signal, the source is electrically connected to the reference voltage, and the drain is electrically connected to the third node;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the third node;
  • One end of the second capacitor is electrically connected to the third node, and the other end is electrically connected to the second node;
  • the anode of the organic light emitting diode is electrically connected to the second node, and the cathode is electrically connected to the negative voltage of the power source;
  • the first thin film transistor is a driving thin film transistor, and the threshold voltage is compensated by driving the source of the thin film transistor to follow.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the first global signal, the second global signal, and the third global signal are all generated by an external timing controller.
  • the combination of the first global signal, the second global signal, the third global signal, and the scan signal sequentially corresponds to an initialization phase, a data signal writing phase, a threshold voltage compensation phase, and a driving illumination phase; the data signal is written The phase is performed separately from the threshold voltage compensation phase;
  • the first global signal is a high potential
  • the second global signal is a high potential
  • the third global signal is a low potential
  • the scan signal is a low potential
  • the first global signal is a high potential
  • the second global signal is a high potential
  • the third global signal is a low potential
  • the scan signal provides a pulse signal row by row
  • the first global signal is a high potential
  • the second global signal is a low potential
  • the third global signal is a low potential
  • the scan signal is a low potential
  • the first global signal is low and the second global signal is low
  • the third global signal is supplied with a pulse signal and remains low, and the scan signal is low.
  • a plurality of the AMOLED pixel driving circuit arrays are arranged in the display panel, and each of the AMOLED pixel driving circuits in the same row is electrically connected to the scanning signal input for providing the scanning signal through the same scanning signal line and the same reference voltage line, respectively.
  • a circuit and a reference voltage input circuit for providing a reference voltage each AMOLED pixel driving circuit of the same column is electrically connected to an image data input circuit for providing a data signal through the same data signal line;
  • each AMOLED pixel driving circuit is Electrically coupled to a first global signal control circuit for providing a first global signal, a second global signal control circuit for providing a second global signal, and a third global signal control circuit for providing a third global signal.
  • the reference voltage is a constant voltage.
  • the invention also provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 Providing an AMOLED pixel driving circuit
  • the AMOLED pixel driving circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode;
  • the gate of the first thin film transistor is electrically connected to the first node, the source is electrically connected to the second node, and the drain is electrically connected to the positive voltage of the power source;
  • the gate of the second thin film transistor is electrically connected to the scan signal, the source is electrically connected to the data signal, and the drain is electrically connected to the first node;
  • the gate of the third thin film transistor is electrically connected to the second global signal, the source is electrically connected to the negative voltage of the power supply, and the drain is electrically connected to the second node;
  • the gate of the fourth thin film transistor is electrically connected to the third global signal, the source is electrically connected to the third node, and the drain is electrically connected to the first node;
  • the gate of the fifth thin film transistor is electrically connected to the first global signal, the source is electrically connected to the reference voltage, and the drain is electrically connected to the third node;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the third node;
  • One end of the second capacitor is electrically connected to the third node, and the other end is electrically connected to the second node;
  • the anode of the organic light emitting diode is electrically connected to the second node, and the cathode is electrically connected to the negative voltage of the power source;
  • the first thin film transistor is a driving thin film transistor
  • Step 2 enter the initialization phase
  • the first global signal provides a high potential
  • the second global signal provides a high potential
  • the third global signal and the scan signal both provide a low potential
  • the third and fifth thin film transistors are turned on
  • the second and fourth thin film transistors are turned off
  • the third The node writes the reference voltage
  • the second node writes the negative voltage of the power supply
  • the organic light emitting diode is discharged
  • Step 3 Enter a data signal writing phase
  • the first global signal provides a high potential
  • the second global signal provides a high potential
  • the third global signal provides a low potential
  • the scan signal provides a pulse signal row by row
  • the second, third, and fifth thin film transistors are turned on
  • fourth The thin film transistor is turned off, the potential of the third node is maintained at the reference voltage, the potential of the second node is maintained at the negative voltage of the power supply, the data signal is written to the first node row by row, and stored in the first capacitor, and the first thin film transistor is turned on;
  • Step 4 Enter a threshold voltage compensation phase
  • the first global signal provides a high potential
  • the second global signal, the third global signal, and the scan signal both provide a low potential
  • the second, third, and fourth thin film transistors are turned off
  • the fifth thin film transistor is turned on
  • the third node is The potential is maintained at the reference voltage, and the potential of the second node is raised by the source of the first thin film transistor, that is, the driving thin film transistor;
  • V S V Data -V th_T1
  • V S represents a potential of the second node, that is, a source potential of the first thin film transistor
  • V th — T1 represents a threshold voltage of the first thin film transistor, that is, a driving thin film transistor
  • V Data represents a data signal voltage
  • Step 5 entering the driving lighting stage
  • the first global signal provides a low potential
  • the second global signal provides a low potential
  • the third global signal provides a pulse signal and then remains low
  • the scan signal provides a low potential
  • the second, third, and fifth thin film transistors are turned off,
  • the four thin film transistors are turned off after one pulse time;
  • the fourth thin film transistor has the same potential as the first thin film transistor and the third node in the turn-on time, that is:
  • V G represents the potential of the first node, that is, the gate potential of the first thin film transistor
  • the potential of the second node that is, the source potential of the first thin film transistor is:
  • V S V Data -V th_T1
  • V S represents a potential of the second node, that is, a source potential of the first thin film transistor
  • V th — T1 represents a threshold voltage of the first thin film transistor, that is, a driving thin film transistor
  • V Data represents a data signal voltage
  • the organic light emitting diode emits light, and a current flowing through the organic light emitting diode is independent of a threshold voltage of the first thin film transistor and a threshold voltage of the organic light emitting diode.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the first global signal, the second global signal, and the third global signal are all generated by an external timing controller.
  • the reference voltage is a constant voltage.
  • the invention also provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 Providing an AMOLED pixel driving circuit
  • the AMOLED pixel driving circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode;
  • the gate of the first thin film transistor is electrically connected to the first node, the source is electrically connected to the second node, and the drain is electrically connected to the positive voltage of the power source;
  • the gate of the second thin film transistor is electrically connected to the scan signal, the source is electrically connected to the data signal, and the drain is electrically connected to the first node;
  • the gate of the third thin film transistor is electrically connected to the second global signal, the source is electrically connected to the negative voltage of the power supply, and the drain is electrically connected to the second node;
  • the gate of the fourth thin film transistor is electrically connected to the third global signal, the source is electrically connected to the third node, and the drain is electrically connected to the first node;
  • the gate of the fifth thin film transistor is electrically connected to the first global signal, the source is electrically connected to the reference voltage, and the drain is electrically connected to the third node;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the third node;
  • One end of the second capacitor is electrically connected to the third node, and the other end is electrically connected to the second node;
  • the anode of the organic light emitting diode is electrically connected to the second node, and the cathode is electrically connected to the negative voltage of the power source;
  • the first thin film transistor is a driving thin film transistor
  • Step 2 enter the initialization phase
  • the first global signal provides a high potential
  • the second global signal provides a high potential
  • the third global signal and the scan signal both provide a low potential
  • the third and fifth thin film transistors are turned on
  • the second and fourth thin film transistors are turned off
  • the third The node writes the reference voltage
  • the second node writes the negative voltage of the power supply
  • the organic light emitting diode is discharged
  • Step 3 Enter a data signal writing phase
  • the first global signal provides a high potential
  • the second global signal provides a high potential
  • the third global signal provides a low potential
  • the scan signal provides a pulse signal row by row
  • the second, third, and fifth thin film transistors are turned on
  • fourth The thin film transistor is turned off, the potential of the third node is maintained at the reference voltage, the potential of the second node is maintained at the negative voltage of the power supply, the data signal is written to the first node row by row, and stored in the first capacitor, and the first thin film transistor is turned on;
  • Step 4 Enter a threshold voltage compensation phase
  • the first global signal provides a high potential
  • the second global signal, the third global signal, and the scan signal both provide a low potential
  • the second, third, and fourth thin film transistors are turned off
  • the fifth thin film transistor is turned on
  • the third node is The potential is maintained at the reference voltage, and the potential of the second node is boosted by the source of the first thin film transistor, ie, the driving thin film transistor, to:
  • V S V Data -V th_T1
  • V S represents a potential of the second node, that is, a source potential of the first thin film transistor
  • V th — T1 represents a threshold voltage of the first thin film transistor, that is, a driving thin film transistor
  • V Data represents a data signal voltage
  • Step 5 entering the driving lighting stage
  • the first global signal provides a low potential
  • the second global signal provides a low potential
  • the third global signal provides a pulse signal and then remains low
  • the scan signal provides a low potential
  • the second, third, and fifth thin film transistors are turned off,
  • the four thin film transistors are turned off after one pulse time;
  • the fourth thin film transistor has the same potential as the first thin film transistor and the third node in the turn-on time, that is:
  • V G represents the potential of the first node, that is, the gate potential of the first thin film transistor
  • the potential of the second node that is, the source potential of the first thin film transistor is:
  • V S V Data -V th_T1
  • V S represents a potential of the second node, that is, a source potential of the first thin film transistor
  • V th — T1 represents a threshold voltage of the first thin film transistor, that is, a driving thin film transistor
  • V Data represents a data signal voltage
  • the organic light emitting diode emits light, and a current flowing through the organic light emitting diode is independent of a threshold voltage of the first thin film transistor and a threshold voltage of the organic light emitting diode;
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors;
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, and the fifth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the invention provides an AMOLED pixel driving circuit and a pixel driving method, which adopts a pixel driving circuit of a 5T2C structure to compensate a threshold voltage of a driving thin film transistor and a threshold voltage of an organic light emitting diode in each pixel, and The writing of the data signal and the compensation of the threshold voltage are performed separately, and the first, second, and third global signals are used to control all the pixel driving circuits in the entire panel, and each pixel is effectively compensated by driving the source of the thin film transistor to follow.
  • the threshold voltage variation of the driving thin film transistor and the organic light emitting diode makes the display brightness of the AMOLED uniform and improves the display quality.
  • FIG. 1 is a circuit diagram of a conventional 2T1C pixel driving circuit for AMOLED
  • FIG. 2 is a circuit diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 3 is a timing diagram of an AMOLED pixel driving circuit of the present invention.
  • step 2 of the AMOLED pixel driving method of the present invention is a schematic diagram of step 2 of the AMOLED pixel driving method of the present invention.
  • FIG. 5 is a schematic diagram of step 3 of the AMOLED pixel driving method of the present invention.
  • FIG. 6 is a schematic diagram of step 4 of the AMOLED pixel driving method of the present invention.
  • step 5 of the AMOLED pixel driving method of the present invention is a schematic diagram of step 5 of the AMOLED pixel driving method of the present invention.
  • FIG. 8 is a block diagram showing a display of an AMOLED pixel driving circuit of the present invention applied to a display panel;
  • FIG. 9 is a schematic diagram of current simulation data flowing through the OLED when the threshold voltage of the driving thin film transistor is shifted according to the present invention.
  • FIG. 10 is a diagram showing current simulation data flowing through the OLED when the threshold voltage of the OLED is shifted according to the present invention.
  • the present invention provides an AMOLED pixel driving circuit.
  • the AMOLED pixel driving circuit adopts a 5T2C structure, and includes: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, and a fourth thin film transistor T4.
  • the fifth thin film transistor T5 the first capacitor C1, the second capacitor C2, and the organic light emitting diode OLED.
  • the gate of the first thin film transistor T1 is electrically connected to the first node G, the source is electrically connected to the second node S, and the drain is electrically connected to the positive voltage VDD of the power supply;
  • the gate of the second thin film transistor T2 is electrically connected to the scan signal Scan, the source is electrically connected to the data signal Data, and the drain is electrically connected to the first node G;
  • the gate of the third thin film transistor T3 is electrically connected to the second global signal G2, the source is electrically connected to the power supply negative voltage VSS, and the drain is electrically connected to the second node S;
  • the gate of the fourth thin film transistor T4 is electrically connected to the third global signal G3, the source is electrically connected to the third node X, and the drain is electrically connected to the first node G;
  • the gate of the fifth thin film transistor T5 is electrically connected to the first global signal G1, the source is electrically connected to the reference voltage Vref, and the drain is electrically connected to the third node X;
  • One end of the first capacitor C1 is electrically connected to the first node G, and the other end is electrically connected to the third node X;
  • the second capacitor C2 is electrically connected to the third node X, and the other end is electrically connected to the second node S;
  • the anode of the organic light emitting diode OLED is electrically connected to the second node S, and the cathode is electrically connected to the power supply negative voltage VSS;
  • the first thin film transistor T1 is a driving thin film transistor, and the threshold voltage is compensated by driving the source of the thin film transistor: the first capacitor C1 and the second capacitor C2 are connected as a compensation capacitor to the first thin film transistor T1. That is, between the gate and the source of the driving thin film transistor, the source voltage of the first thin film transistor T1, that is, the driving thin film transistor, follows its gate voltage when the threshold voltage is detected.
  • a plurality of the arrays of the AMOLED pixel driving circuits are arranged in the display panel, and each of the AMOLED pixel driving circuits in the same row is electrically connected through the same scanning signal line and the same reference voltage line.
  • each AMOLED pixel drive circuit of the same column is electrically connected to an image for providing the data signal Data through the same data signal line a data input circuit; each AMOLED pixel driving circuit is electrically connected to a first global signal control circuit for providing a first global signal G1, a second global signal control circuit for providing a second global signal G2, and A third global signal control circuit that provides a third global signal G3.
  • the first global signal G1 is used to control the opening and closing of the fifth thin film transistor T5; the second global signal G2 is used to control the opening and closing of the third thin film transistor T3; and the third global signal G3 is used for controlling
  • the fourth thin film transistor T4 is turned on and off; the scan signal Scan is used to control the opening and closing of the second thin film transistor T2 to realize progressive scanning; and the data signal Data is used to control the light emission brightness of the organic light emitting diode OLED.
  • the reference voltage Vref is a constant voltage.
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, and the fifth thin film transistor T5 are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or non- Crystalline silicon thin film transistor.
  • the first global signal G1, the second global signal G2, and the third global signal G3 are all provided by an external timing controller.
  • the combination of the first global signal G1, the second global signal G2, the third global signal G3, and the scan signal Scan sequentially corresponds to the initialization phase 1, and the data signal is written.
  • phase 2 threshold voltage compensation phase 3, and drive illumination phase 4.
  • Place The data signal writing phase 2 is performed separately from the threshold voltage compensation phase 3.
  • the first global signal G1 is high, the second global signal G2 is high, the third global signal G3 is low, the scan signal Scan is low, and the data signal is Writing phase 2, the first global signal G1 is high, the second global signal G2 is high, the third global signal G3 is low, and the scan signal Scan provides a pulse signal row by row;
  • the first global signal G1 is at a high potential, the second global signal G2 is at a low potential, the third global signal G3 is at a low potential, and the scan signal Scan is at a low potential in the driving illuminating phase 4
  • the first global signal G1 is at a low potential, the second global signal G2 is at a low potential, the third global signal G3 is supplied with a pulse signal and then remains at a low potential, and the scan signal Scan is at a low potential.
  • the third and fifth thin film transistors T3, T5 are turned on, the second and fourth thin film transistors T2, T4 are turned off, the third node X is written with the reference voltage Vref, and the second node S is written.
  • the power supply negative voltage VSS, the organic light emitting diode OLED is discharged; in the data signal writing phase 2, the second, third, and fifth thin film transistors T2, T3, and T5 are turned on, and the fourth thin film transistor T4 is turned off.
  • the data signal Data is written into the first node G row by row, and stored in the first capacitor C1; in the threshold voltage compensation phase 3, the second, The third and fourth thin film transistors T2, T3, and T4 are turned off, the fifth thin film transistor T5 is turned on, the potential of the third node X is maintained, and the potential of the second node S is driven by the first thin film transistor T1, that is, the source of the driving thin film transistor.
  • V th_T1 represents the threshold voltage of the first thin film transistor T1 , that is, the driving thin film transistor
  • V Data represents the data signal Data voltage
  • the second, third, Fifth thin film transistor When the fourth thin film transistor T4 is turned off for one pulse time, the fourth thin film transistor T4 has the same potential of the first node G, that is, the gate potential of the first thin film transistor T1 and the third node X.
  • the organic light emitting diode OLED emits light, and the current flowing through the organic light emitting diode OLED is independent of the threshold voltage of the first thin film transistor T1 and the threshold voltage of the organic light emitting diode OLED.
  • the AMOLED pixel driving circuit can effectively compensate the threshold voltage variation of the first thin film transistor T1, that is, the driving thin film transistor and the organic light emitting diode OLED, so that the display brightness of the AMOLED is relatively uniform and the display quality is improved.
  • the present invention further provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 provides an AMOLED pixel driving circuit using the 5T2C structure as shown in FIG. 2, and the circuit will not be repeatedly described herein.
  • Step 2 in the display process of a frame image 1frame, the initialization phase 1 is first entered.
  • the first global signal G1 provides a high potential
  • the second global signal G2 provides a high potential
  • the third global signal G3 and the scan signal Scan both provide a low potential
  • the third and fifth thin film transistors T3 and T5 are turned on
  • the second and the second The four thin film transistors T2 and T4 are turned off
  • the third node X is written with the reference voltage Vref
  • the second node S is written with the power supply negative voltage VSS
  • the organic light emitting diode OLED is discharged.
  • Step 3 Referring to FIG. 3 and FIG. 5, the data signal writing phase 2 is entered.
  • the first global signal G1 provides a high potential
  • the second global signal G2 provides a high potential
  • the third global signal G3 provides a low potential
  • the scan signal Scan provides a pulse signal row by row
  • the second, third, and fifth thin film transistors T2, T3, T5 are turned on
  • the fourth thin film transistor T4 is turned off
  • the potential of the third node X is maintained at the reference voltage Vref
  • the potential of the second node S is maintained at the power supply negative voltage VSS
  • the data signal Data is written line by line to the first node G.
  • the first thin film transistor T1 is turned on.
  • Step 4 Referring to FIG. 3 and FIG. 6, enter the threshold voltage compensation phase 3.
  • the first global signal G1 provides a high potential
  • the second global signal G2, the third global signal G3, and the scan signal Scan both provide a low potential
  • the second, third, and fourth thin film transistors T2, T3, and T4 are turned off.
  • the fifth thin film transistor T5 is turned on, and the potential of the third node X is maintained at the reference voltage Vref.
  • the third thin film transistor T3 since the third thin film transistor T3 is turned off, the second node S is not supplied with the power supply negative voltage VSS, the first and second capacitors C1 and C2.
  • the first thin film transistor T1 Connected in series between the gate and the source of the first thin film transistor T1, that is, the driving thin film transistor, the first thin film transistor T1, that is, the driving thin film transistor is driven as a source follower, and the potential of the second node S rises until the first
  • the gate-to-source voltage of the thin film transistor T1 ie, the potential difference between the first node G and the second node S
  • the threshold voltage of the first thin film transistor T1 that is, the potential of the second node S is raised to:
  • V S V Data -V th_T1
  • V S represents a potential of the second node S, that is, a source potential of the first thin film transistor T1
  • V th_T1 represents a threshold voltage of the first thin film transistor T1, that is, a driving thin film transistor
  • V Data represents a data signal Data. Voltage.
  • the potential difference across the second capacitor C2 is Vref-(V Data - Vth_T1 ).
  • Step 5 please refer to FIG. 3 and FIG. 7 to enter the driving illumination stage 4.
  • the first global signal G1 provides a low potential
  • the second global signal G2 provides a low potential
  • the third global signal G3 provides a pulse signal and then remains low
  • the scan signal Scan provides a low potential
  • the transistors T2, T3, and T5 are turned off, and the fourth thin film transistor T4 is turned off after a pulse time; the fourth thin film transistor T4 causes the potential of the first node G to be the gate potential of the first thin film transistor T1 during its turn-on time.
  • the potential of the third node X is the same, namely:
  • V G represents the potential of the first node G, that is, the gate potential of the first thin film transistor T1;
  • the potential of the second node S, that is, the source potential of the first thin film transistor T1 is:
  • V S V Data -V th_T1
  • V S represents the potential of the second node S, that is, the source potential of the first thin film transistor T1
  • V th_T1 represents the threshold voltage of the first thin film transistor T1
  • V Data represents the data signal Data voltage.
  • I is the current of the organic light emitting diode OLED
  • ⁇ is the carrier mobility of the driving thin film transistor
  • W and L are the width and length of the channel of the driving thin film transistor, respectively
  • Vgs is the gate and source of the driving thin film transistor.
  • the voltage between V and V th is the threshold voltage of the driving thin film transistor.
  • the threshold voltage Vth of the driving thin film transistor is the threshold voltage Vth_T1 of the first thin film transistor T1
  • Vgs is the potential of the first node G, that is, the gate potential of the first thin film transistor T1.
  • the difference between the potential of the second node S, that is, the source potential of the first thin film transistor T1 is:
  • Vgs V G -V S
  • the current I flowing through the organic light emitting diode OLED is independent of the threshold voltage V th — T1 of the first thin film transistor T1 , the threshold voltage V th — OLED of the organic light emitting diode OLED , and the negative voltage VSS of the power supply, thereby realizing the compensation function.
  • the threshold voltage variation of the driving thin film transistor that is, the first thin film transistor T1 and the organic light emitting diode OLED, can be effectively compensated, so that the display brightness of the AMOLED is relatively uniform, and the display quality is improved.
  • the threshold voltage of the driving thin film transistor that is, the first thin film transistor T1
  • the current flowing through the organic light emitting diode OLED does not change by more than 20%, which is effective.
  • the luminescent stability of the OLED is ensured, and the display brightness of the AMOLED is relatively uniform.
  • the current flowing through the organic light emitting diode OLED does not change by more than 20%, thereby effectively ensuring organic
  • the light-emitting stability of the light-emitting diode OLED makes the display brightness of the AMOLED relatively uniform.
  • the AMOLED pixel driving circuit and the pixel driving method of the present invention use a pixel driving circuit of a 5T2C structure to compensate a threshold voltage of a driving thin film transistor and a threshold voltage of an organic light emitting diode in each pixel, and write the data signal.
  • the compensation of the input and the threshold voltage is performed separately, and the first, second, and third global signals are used to control all the pixel driving circuits in the entire panel, and the driving thin film transistor in each pixel is effectively compensated by driving the source of the thin film transistor to follow.
  • the threshold voltage of the organic light-emitting diode changes, so that the display brightness of the AMOLED is relatively uniform, and the display quality is improved.

Abstract

一种AMOLED像素驱动电路及像素驱动方法。该AMOLED像素驱动电路采用5T2C结构，包括第一、第二、第三、第四、第五薄膜晶体管(T1、T2、T3、T4、T5)、第一、第二电容(C1、C2)、及有机发光二极管(OLED)，所述第一薄膜晶体管(T1)为驱动薄膜晶体管；并引入第一、第二、第三全局信号(G1、G2、G3)，三者与扫描信号(Scan)相组合先后对应于初始化阶段(1)，数据信号写入阶段(2)、阈值电压补偿阶段(3)、及驱动发光阶段(4)，其中，数据信号写入阶段(2)和阈值电压补偿阶段(3)分开进行，通过驱动薄膜晶体管(T1)源极跟随的方式有效补偿了驱动薄膜晶体管(T1)及有机发光二级管(OLED)的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。

Description

AMOLED像素驱动电路及像素驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种AMOLED像素驱动电路及像素驱动方法。
背景技术
有机发光二极管(Organic Light Emitting Display，OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180度视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类，即直接寻址和薄膜晶体管(Thin Film Transistor，TFT)矩阵寻址两类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。
AMOLED是电流驱动器件，当有电流流过有机发光二极管时，有机发光二极管发光，且发光亮度由流过有机发光二极管自身的电流决定。大部分已有的集成电路(Integrated Circuit，IC)都只传输电压信号，故AMOLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。传统的AMOLED像素驱动电路通常为2T1C，即两个薄膜晶体管加一个电容的结构，将电压变换为电流。
如图1所述，传统的用于AMOLED的2T1C像素驱动电路，包括一第一薄膜晶体管T10、一第二薄膜晶体管T20、及一电容C10，所述第一薄膜晶体管T10为开关薄膜晶体管，所述第二薄膜晶体管T20为驱动薄膜晶体管，所述电容C10为存储电容。具体地，所述第一薄膜晶体管T10的栅极电性连接扫描信号Scan，源极电性连接数据信号Data，漏极与第二薄膜晶体管T20的栅极、及电容C10的一端电性连接；所述第二薄膜晶体管T20的漏极电性连接电源正电压VDD，源极电性连接有机发光二级管D的阳极；有机发光二级管D的阴极电性连接于电源负电压VSS；电容C10的一端电性连接第一薄膜 晶体管T10的漏极及第二薄膜晶体管T20的栅极，另一端电性连接第二薄膜晶体管T20的漏极及电源正电压VDD。AMOLED显示时，扫描信号Scan控制第一薄膜晶体管T10打开，数据信号Data经过第一薄膜晶体管T10进入到第二薄膜晶体管T20的栅极及电容C10，然后第一薄膜晶体管T10闭合，由于电容C10的存储作用，第二薄膜晶体管T20的栅极电压仍可继续保持数据信号电压，使得第二薄膜晶体管T20处于导通状态，驱动电流通过第二薄膜晶体管T20进入有机发光二级管D，驱动有机发光二级管D发光。
上述传统用于AMOLED的2T1C像素驱动电路对薄膜晶体管的阈值电压和沟道迁移率、有机发光二极管的启动电压和量子效率以及供电电源的瞬变过程都很敏感。第二薄膜晶体管T20，即驱动薄膜晶体管的阈值电压会随着工作时间而漂移，从而导致有机发光二极管D的发光不稳定；进一步地，各个像素的像素驱动电路的第二薄膜晶体管T20，即驱动薄膜晶体管的阈值电压的漂移不同，漂移量或增大或减小，导致各个像素间的发光不均匀、亮度不一。使用这种传统的不带补偿的2T1C像素驱动电路造成的AMOLED显示亮度的不均匀性约为50％甚至更高。
解决AMOLED显示亮度不均匀的一个方法是对每一个像素加补偿电路，补偿意味着必须对每一个像素中的驱动薄膜晶体管的参数，例如阈值电压和迁移率，进行补偿，使流经有机发光二极管的电流变得与这些参数无关。
发明内容
本发明的目的在于提供一种AMOLED像素驱动电路，能够有效补偿驱动薄膜晶体管及有机发光二级管的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。
本发明的目的还在于提供一种AMOLED像素驱动方法，能够对驱动薄膜晶体管及有机发光二级管的阈值电压变化进行有效补偿，使AMOLED的显示亮度较均匀，提升显示品质。
为实现上述目的，本发明提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节 点，漏极电性连接于电源正电压；
所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信号，漏极电性连接于第一节点；
所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
所述第四薄膜晶体管栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
所述第一薄膜晶体管为驱动薄膜晶体管，通过驱动薄膜晶体管源极跟随的方式进行阈值电压的补偿。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述第一全局信号、第二全局信号、及第三全局信号均通过外部时序控制器产生。
所述第一全局信号、第二全局信号、第三全局信号、及扫描信号相组合先后对应于初始化阶段、数据信号写入阶段、阈值电压补偿阶段、及驱动发光阶段；所述数据信号写入阶段与阈值电压补偿阶段分开进行；
在所述初始化阶段，所述第一全局信号为高电位，第二全局信号为高电位，第三全局信号为低电位，所述扫描信号为低电位；
在所述数据信号写入阶段，所述第一全局信号为高电位，第二全局信号为高电位，第三全局信号为低电位，所述扫描信号逐行提供脉冲信号；
在所述阈值电压补偿阶段，所述第一全局信号为高电位，第二全局信号为低电位，第三全局信号为低电位，所述扫描信号为低电位；
在所述驱动发光阶段，所述第一全局信号为低电位、第二全局信号为低电 位，第三全局信号提供一脉冲信号后保持低电位，所述扫描信号为低电位。
多个所述AMOLED像素驱动电路阵列排布于显示面板中，同一行的每一AMOLED像素驱动电路均通过同一扫描信号线和同一参考电压线分别电性连接于用于提供扫描信号的扫描信号输入电路和用于提供参考电压的参考电压输入电路；同一列的每一AMOLED像素驱动电路均通过同一数据信号线电性连接于用于提供数据信号的图像数据输入电路；每一AMOLED像素驱动电路均电性连接于用于提供第一全局信号的第一全局信号控制电路、用于提供第二全局信号的第二全局信号控制电路、及用于提供第三全局信号的第三全局信号控制电路。
所述参考电压为一恒定电压。
本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一AMOLED像素驱动电路；
所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节点，漏极电性连接于电源正电压；
所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信号，漏极电性连接于第一节点；
所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
所述第四薄膜晶体管的栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
所述第一薄膜晶体管为驱动薄膜晶体管；
步骤2、进入初始化阶段；
所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号及扫描信号均提供低电位，第三、第五薄膜晶体管打开，第二、第四薄膜晶体管关闭，第三节点写入参考电压，第二节点写入电源负电压，有机发光二极管被放电；
步骤3、进入数据信号写入阶段；
所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号提供低电位，所述扫描信号逐行提供脉冲信号，第二、第三、第五薄膜晶体管打开，第四薄膜晶体管关闭，第三节点的电位维持在参考电压、第二节点的电位维持在电源负电压，数据信号逐行写入第一节点，并储存在第一电容中，第一薄膜晶体管打开；
步骤4、进入阈值电压补偿阶段；
所述第一全局信号提供高电位，第二全局信号、第三全局信号、及扫描信号均提供低电位，第二、第三、第四薄膜晶体管关闭，第五薄膜晶体管打开，第三节点的电位维持在参考电压，第二节点电位因第一薄膜晶体管即驱动薄膜晶体管源极跟随提升至；
VS＝VData-Vth_T1
其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
步骤5、进入驱动发光阶段；
所述第一全局信号提供低电位、第二全局信号提供低电位，第三全局信号提供一脉冲信号后保持低电位，扫描信号提供低电位，第二、第三、第五薄膜晶体管关闭，第四薄膜晶体管开启一个脉冲时间后关闭；所述第四薄膜晶体管在其开启时间内使得第一节点的电位即第一薄膜晶体管的栅极电位与第三节点的电位相同，即：
VG＝Vref
其中，VG表示所述第一节点的电位即所述第一薄膜晶体管的栅极电位；
所述第二节点的电位即第一薄膜晶体管的源极电位为：
VS＝VData-Vth_T1
其中，VS表示第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
所述有机发光二极管发光，且流经所述有机发光二极管的电流与第一薄膜晶体管的阈值电压、有机发光二极管的阈值电压无关。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述第一全局信号、第二全局信号、及第三全局信号均通过外部时序控制器产生。
所述参考电压为一恒定电压。
本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一AMOLED像素驱动电路；
所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节点，漏极电性连接于电源正电压；
所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信号，漏极电性连接于第一节点；
所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
所述第四薄膜晶体管的栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
所述第一薄膜晶体管为驱动薄膜晶体管；
步骤2、进入初始化阶段；
所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号及扫描信号均提供低电位，第三、第五薄膜晶体管打开，第二、第四薄膜晶体管关闭，第三节点写入参考电压，第二节点写入电源负电压，有机发光二极管被放电；
步骤3、进入数据信号写入阶段；
所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号提供低电位，所述扫描信号逐行提供脉冲信号，第二、第三、第五薄膜晶体管打开，第四薄膜晶体管关闭，第三节点的电位维持在参考电压、第二节点的电位维持在电源负电压，数据信号逐行写入第一节点，并储存在第一电容中，第一薄膜晶体管打开；
步骤4、进入阈值电压补偿阶段；
所述第一全局信号提供高电位，第二全局信号、第三全局信号、及扫描信号均提供低电位，第二、第三、第四薄膜晶体管关闭，第五薄膜晶体管打开，第三节点的电位维持在参考电压，第二节点电位因第一薄膜晶体管即驱动薄膜晶体管源极跟随而提升至：
VS＝VData-Vth_T1
其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
步骤5、进入驱动发光阶段；
所述第一全局信号提供低电位、第二全局信号提供低电位，第三全局信号提供一脉冲信号后保持低电位，扫描信号提供低电位，第二、第三、第五薄膜晶体管关闭，第四薄膜晶体管开启一个脉冲时间后关闭；所述第四薄膜晶体管在其开启时间内使得第一节点的电位即第一薄膜晶体管的栅极电位与第三节点的电位相同，即：
VG＝Vref
其中，VG表示所述第一节点的电位即所述第一薄膜晶体管的栅极电位；
所述第二节点的电位即第一薄膜晶体管的源极电位为：
VS＝VData-Vth_T1
其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
所述有机发光二极管发光，且流经所述有机发光二极管的电流与第一薄膜晶体管的阈值电压、有机发光二极管的阈值电压无关；
其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管；
其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
本发明的有益效果：本发明提供的一种AMOLED像素驱动电路及像素驱动方法，采用5T2C结构的像素驱动电路对每一像素中驱动薄膜晶体管的阈值电压及有机发光二极管的阈值电压进行补偿，将数据信号的写入和阈值电压的补偿分开进行，采用第一、第二、第三全局信号来控制整个面板中所有的像素驱动电路，通过驱动薄膜晶体管源极跟随的方式有效补偿了每一像素中驱动薄膜晶体管及有机发光二级管的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为传统的用于AMOLED的2T1C像素驱动电路的电路图；
图2为本发明的AMOLED像素驱动电路的电路图；
图3为本发明的AMOLED像素驱动电路的时序图；
图4为本发明的AMOLED像素驱动方法的步骤2的示意图；
图5为本发明的AMOLED像素驱动方法的步骤3的示意图；
图6为本发明的AMOLED像素驱动方法的步骤4的示意图；
图7为本发明的AMOLED像素驱动方法的步骤5的示意图；
图8为本发明的AMOLED像素驱动电路应用于显示面板中的显示方框图；
图9为本发明中驱动薄膜晶体管的阈值电压漂移时对应的流经OLED的电流模拟数据图；
图10为本发明中OLED的阈值电压漂移时对应的流经OLED的电流模拟数据图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明提供一种AMOLED像素驱动电路，该AMOLED像素驱动电路采用5T2C结构，包括：第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、第五薄膜晶体管T5、第一电容C1、第二电容C2、及有机发光二极管OLED。
所述第一薄膜晶体管T1的栅极电性连接于第一节点G，源极电性连接于第二节点S，漏极电性连接于电源正电压VDD；
所述第二薄膜晶体管T2的栅极电性连接于扫描信号Scan，源极电性连接于数据信号Data，漏极电性连接于第一节点G；
所述第三薄膜晶体管T3的栅极电性连接于第二全局信号G2，源极电性连接于电源负电压VSS，漏极电性连接于第二节点S；
所述第四薄膜晶体管T4的栅极电性连接于第三全局信号G3，源极电性连接于第三节点X，漏极电性连接于第一节点G；
所述第五薄膜晶体管T5的栅极电性连接于第一全局信号G1，源极电性连接于参考电压Vref，漏极电性连接于第三节点X；
所述第一电容C1的一端电性连接于第一节点G，另一端电性连接于第三节点X；
所述第二电容C2的一端电性连接于第三节点X，另一端电性连接于第二节点S；
所述有机发光二极管OLED的阳极电性连接于第二节点S，阴极电性连接于电源负电压VSS；
所述第一薄膜晶体管T1为驱动薄膜晶体管，通过驱动薄膜晶体管源极跟随的方式进行阈值电压的补偿：所述第一电容C1与第二电容C2作为补偿电容连接在所述第一薄膜晶体管T1即驱动薄膜晶体管的栅极和源极之间，在检测阈值电压时所述第一薄膜晶体管T1即驱动薄膜晶体管的源极电压跟随其栅极电压。
进一步地，请参阅图8，多个所述AMOLED像素驱动电路阵列排布于显示面板中，同一行的每一AMOLED像素驱动电路均通过同一扫描信号线和同一参考电压线分别电性连接于用于提供扫描信号Scan的扫描信号输入电路和用于提供参考电压Vref的参考电压输入电路；同一列的每一AMOLED像素驱动电路均通过同一数据信号线电性连接于用于提供数据信号Data的图像数据输入电路；每一AMOLED像素驱动电路均电性连接于用于提供第一全局信号G1的第一全局信号控制电路、用于提供第二全局信号G2的第二全局信号控制电路、及用于提供第三全局信号G3的第三全局信号控制电路。
所述第一全局信号G1用于控制第五薄膜晶体管T5的打开与关闭；所述第二全局信号G2用于控制第三薄膜晶体管T3的打开与关闭；所述第三全局信号G3用于控制第四薄膜晶体管T4的打开与关闭；所述扫描信号Scan用于控制第二薄膜晶体管T2的打开与关闭，实现逐行扫描；所述数据信号Data用于控制有机发光二极管OLED的发光亮度。所述参考电压Vref为一恒定电压。
具体地，所述第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、及第五薄膜晶体管T5均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。所述第一全局信号G1、第二全局信号G2、及第三全局信号G3均通过外部时序控制器提供。
进一步地，在一帧图像1 frame的显示过程中，所述第一全局信号G1、第二全局信号G2、第三全局信号G3、及扫描信号Scan相组合先后对应于初始化阶段1、数据信号写入阶段2、阈值电压补偿阶段3、及驱动发光阶段4。所 述数据信号写入阶段2与阈值电压补偿阶段3分开进行。
在所述初始化阶段1，所述第一全局信号G1为高电位，第二全局信号G2为高电位，第三全局信号G3为低电位，所述扫描信号Scan为低电位；在所述数据信号写入阶段2，所述第一全局信号G1为高电位，第二全局信号G2为高电位，第三全局信号G3为低电位，所述扫描信号Scan逐行提供脉冲信号；在所述阈值电压补偿阶段3，所述第一全局信号G1为高电位，第二全局信号G2为低电位，第三全局信号G3为低电位，所述扫描信号Scan为低电位在所述驱动发光阶段4，所述第一全局信号G1为低电位、第二全局信号G2为低电位，第三全局信号G3提供一脉冲信号后保持低电位，所述扫描信号Scan为低电位。
在所述初始化阶段1中，所述第三、第五薄膜晶体管T3、T5打开，第二、第四薄膜晶体管T2、T4关闭，第三节点X写入参考电压Vref，第二节点S写入电源负电压VSS，有机发光二极管OLED被放电；在所述数据信号写入阶段2中，所述第二、第三、第五薄膜晶体管T2、T3、T5打开，第四薄膜晶体管T4关闭，第二节点S与第三节点X的电位维持不变，数据信号Data逐行写入第一节点G，并储存在第一电容C1中；在所述阈值电压补偿阶段3中，所述第二、第三、第四薄膜晶体管T2、T3、T4关闭，第五薄膜晶体管T5打开，第三节点X的电位维持不变，第二节点S的电位因第一薄膜晶体管T1即驱动薄膜晶体管源极跟随提升至VData-Vth_T1，其中Vth_T1表示所述第一薄膜晶体管T1即驱动薄膜晶体管的阈值电压，VData表示数据信号Data电压；在所述驱动发光阶段4中，第二、第三、第五薄膜晶体管关闭，第四薄膜晶体管T4开启一个脉冲时间后关闭，所述第四薄膜晶体管T4在其开启时间内使得第一节点G即第一薄膜晶体管T1的栅极电位与第三节点X的电位相同，所述有机发光二极管OLED发光，且流经所述有机发光二极管OLED的电流与第一薄膜晶体管T1的阈值电压、有机发光二极管OLED的阈值电压无关。
该AMOLED像素驱动电路能够有效补偿第一薄膜晶体管T1即驱动薄膜晶体管及有机发光二级管OLED的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。
请参阅图4至图7，结合图2、图3，在上述AMOLED像素驱动电路的基础上，本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一上述如图2所示的采用5T2C结构的AMOLED像素驱动电路，此处不再对该电路进行重复描述。
步骤2、请参阅图3与图4，在一帧图像1frame的显示过程中，首先进入初始化阶段1。
所述第一全局信号G1提供高电位，第二全局信号G2提供高电位，第三全局信号G3及扫描信号Scan均提供低电位，第三、第五薄膜晶体管T3、T5打开，第二、第四薄膜晶体管T2、T4关闭，第三节点X写入参考电压Vref，第二节点S写入电源负电压VSS，有机发光二极管OLED被放电。
步骤3、请参阅图3与图5，进入数据信号写入阶段2。
所述第一全局信号G1提供高电位，第二全局信号G2提供高电位，第三全局信号G3提供低电位，所述扫描信号Scan逐行提供脉冲信号，第二、第三、第五薄膜晶体管T2、T3、T5打开，第四薄膜晶体管T4关闭，第三节点X的电位维持在参考电压Vref、第二节点S的电位维持在电源负电压VSS，数据信号Data逐行写入第一节点G，并储存在第一电容C1中，第一薄膜晶体管T1打开。
步骤4、请参阅图3与图6，进入阈值电压补偿阶段3。
所述第一全局信号G1提供高电位，第二全局信号G2、第三全局信号G3、及扫描信号Scan均提供低电位，第二、第三、第四薄膜晶体管T2、T3、T4关闭，第五薄膜晶体管T5打开，第三节点X的电位维持在参考电压Vref，此时，由于第三薄膜晶体管T3关闭不再向第二节点S提供电源负电压VSS，第一、第二电容C1、C2串联于第一薄膜晶体管T1即驱动薄膜晶体管的栅极与源极之间，所述第一薄膜晶体管T1即驱动薄膜晶体管被驱动为源极跟随器，第二节点S电位升高，直至第一薄膜晶体管T1的栅源极电压(即第一节点G与第二节点S之间的电位差)等于第一薄膜晶体管T1的阈值电压，即第二节点S电位提升至：
VS＝VData-Vth_T1
其中，VS表示所述第二节点S的电位即所述第一薄膜晶体管T1的源极电位，Vth_T1表示所述第一薄膜晶体管T1即驱动薄膜晶体管的阈值电压，VData表示数据信号Data电压。
在该阈值电压补偿阶段3中，所述第二电容C2两端的电位差为Vref- (VData-Vth_T1)。
步骤5、请参阅图3与图7，进入驱动发光阶段4。
所述第一全局信号G1提供低电位、第二全局信号G2提供低电位，第三全局信号G3提供一脉冲信号后保持低电位，扫描信号Scan提供低电位，第二、第三、第五薄膜晶体管T2、T3、T5关闭，第四薄膜晶体管T4开启一个脉冲时间后关闭；所述第四薄膜晶体管T4在其开启时间内使得第一节点G的电位即第一薄膜晶体管T1的栅极电位与第三节点X的电位相同，即：
VG＝Vref
其中，VG表示所述第一节点G的电位即所述第一薄膜晶体管T1的栅极电位；
所述第二节点S的电位即第一薄膜晶体管T1的源极电位为：
VS＝VData-Vth_T1
其中，VS表示第二节点S的电位即所述第一薄膜晶体管T1的源极电位，Vth_T1表示所述第一薄膜晶体管T1即驱动薄膜晶体管的阈值电压，VData表示数据信号Data电压。进一步地，已知的，计算流经有机发光二极管OLED的电流的公式为：
I＝1/2Cox(μW/L)(Vgs-Vth)2       (1)
其中I为有机发光二极管OLED的电流、μ为驱动薄膜晶体管的载流子迁移率、W和L分别为驱动薄膜晶体管的沟道的宽度和长度、Vgs为驱动薄膜晶体管的栅极与源极之间的电压、Vth为驱动薄膜晶体管的阈值电压。在本发明中，驱动薄膜晶体管的阈值电压Vth即为所述第一薄膜晶体管T1的阈值电压Vth_T1；Vgs为所述第一节点G的电位即所述第一薄膜晶体管T1的栅极电位与所述第二节点S的电位即所述第一薄膜晶体管T1的源极电位之间的差值，即有：
Vgs＝VG-VS
＝Vref-(VData-Vth_T1)
＝Vref-VData+Vth_T1       (2)
将(2)式代入(1)式得：
I＝1/2Cox(μW/L)(Vref-VData+Vth_T1-Vth_T1)2
＝1/2Cox(μW/L)(Vref-VData)2
由此可见，流经所述有机发光二极管OLED的电流I与所述第一薄膜晶体管T1的阈值电压Vth_T1、有机发光二极管OLED的阈值电压Vth_OLED、及电源负电压VSS无关，实现了补偿功能，能够有效补偿驱动薄膜晶体管即所述第一薄膜晶体管T1及有机发光二级管OLED的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。
请参阅图9，当驱动薄膜晶体管即第一薄膜晶体管T1的阈值电压分别漂移0V、+0.5V、-0.5V时，流经所述有机发光二极管OLED的电流变化量不会超过20％，有效保证了有机发光二极管OLED的发光稳定性，使AMOLED的显示亮度较均匀。
请参阅图10，当所述有机发光二极管OLED的阈值电压分别漂移0V、+0.5V、-0.5V时，流经所述有机发光二极管OLED的电流变化量不会超过20％，有效保证了有机发光二极管OLED的发光稳定性，使AMOLED的显示亮度较均匀。
综上所述，本发明的AMOLED像素驱动电路及像素驱动方法，采用5T2C结构的像素驱动电路对每一像素中驱动薄膜晶体管的阈值电压及有机发光二极管的阈值电压进行补偿，且数据信号的写入和阈值电压的补偿分开进行，采用第一、第二、第三全局信号来控制整个面板中所有的像素驱动电路，通过驱动薄膜晶体管源极跟随的方式有效补偿了每一像素中驱动薄膜晶体管及有机发光二级管的阈值电压变化，使AMOLED的显示亮度较均匀，提升显示品质。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (12)

  1. 一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节点，漏极电性连接于电源正电压；
    所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信号，漏极电性连接于第一节点；
    所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
    所述第四薄膜晶体管的栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
    所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
    所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
    所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
    所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
    所述第一薄膜晶体管为驱动薄膜晶体管，通过驱动薄膜晶体管源极跟随的方式进行阈值电压的补偿。
  2. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  3. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第一全局信号、第二全局信号、及第三全局信号均通过外部时序控制器产生。
  4. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第一全局信号、第二全局信号、第三全局信号、及扫描信号相组合先后对应于初始化阶段、数据信号写入阶段、阈值电压补偿阶段、及驱动发光阶段；所述数据信号 写入阶段与阈值电压补偿阶段分开进行；
    在所述初始化阶段，所述第一全局信号为高电位，第二全局信号为高电位，第三全局信号为低电位，所述扫描信号为低电位；
    在所述数据信号写入阶段，所述第一全局信号为高电位，第二全局信号为高电位，第三全局信号为低电位，所述扫描信号逐行提供脉冲信号；
    在所述阈值电压补偿阶段，所述第一全局信号为高电位，第二全局信号为低电位，第三全局信号为低电位，所述扫描信号为低电位；
    在所述驱动发光阶段，所述第一全局信号为低电位、第二全局信号为低电位，第三全局信号提供一脉冲信号后保持低电位，所述扫描信号为低电位。
  5. 如权利要求1所述的AMOLED像素驱动电路，其中，多个所述AMOLED像素驱动电路阵列排布于显示面板中，同一行的每一AMOLED像素驱动电路均通过同一扫描信号线和同一参考电压线分别电性连接于用于提供扫描信号的扫描信号输入电路和用于提供参考电压的参考电压输入电路；同一列的每一AMOLED像素驱动电路均通过同一数据信号线电性连接于用于提供数据信号的图像数据输入电路；每一AMOLED像素驱动电路均电性连接于用于提供第一全局信号的第一全局信号控制电路、用于提供第二全局信号的第二全局信号控制电路、及用于提供第三全局信号的第三全局信号控制电路。
  6. 如权利要求1所述的AMOLED像素驱动电路，其中，所述参考电压为一恒定电压。
  7. 一种AMOLED像素驱动方法，包括如下步骤：
    步骤1、提供一AMOLED像素驱动电路；
    所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节点，漏极电性连接于电源正电压；
    所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信号，漏极电性连接于第一节点；
    所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
    所述第四薄膜晶体管的栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
    所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
    所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
    所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
    所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
    所述第一薄膜晶体管为驱动薄膜晶体管；
    步骤2、进入初始化阶段；
    所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号及扫描信号均提供低电位，第三、第五薄膜晶体管打开，第二、第四薄膜晶体管关闭，第三节点写入参考电压，第二节点写入电源负电压，有机发光二极管被放电；
    步骤3、进入数据信号写入阶段；
    所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号提供低电位，所述扫描信号逐行提供脉冲信号，第二、第三、第五薄膜晶体管打开，第四薄膜晶体管关闭，第三节点的电位维持在参考电压、第二节点的电位维持在电源负电压，数据信号逐行写入第一节点，并储存在第一电容中，第一薄膜晶体管打开；
    步骤4、进入阈值电压补偿阶段；
    所述第一全局信号提供高电位，第二全局信号、第三全局信号、及扫描信号均提供低电位，第二、第三、第四薄膜晶体管关闭，第五薄膜晶体管打开，第三节点的电位维持在参考电压，第二节点电位因第一薄膜晶体管即驱动薄膜晶体管源极跟随而提升至：
    VS＝VData-Vth_T1
    其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
    步骤5、进入驱动发光阶段；
    所述第一全局信号提供低电位、第二全局信号提供低电位，第三全局信号提供一脉冲信号后保持低电位，扫描信号提供低电位，第二、第三、第五薄膜晶体管关闭，第四薄膜晶体管开启一个脉冲时间后关闭；所述第四薄膜晶体管在其开启时间内使得第一节点的电位即第一薄膜晶体管的栅极电位与第三节点的电位相同，即：
    VG＝Vref
    其中，VG表示所述第一节点的电位即所述第一薄膜晶体管的栅极电位；
    所述第二节点的电位即第一薄膜晶体管的源极电位为：
    VS＝VData-Vth_T1
    其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
    所述有机发光二极管发光，且流经所述有机发光二极管的电流与第一薄膜晶体管的阈值电压、有机发光二极管的阈值电压无关。
  8. 如权利要求7所述的AMOLED像素驱动方法，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  9. 如权利要求7所述的AMOLED像素驱动方法，其中，所述第一全局信号、第二全局信号、及第三全局信号均通过外部时序控制器产生。
  10. 如权利要求7所述的AMOLED像素驱动方法，其中，所述参考电压为一恒定电压。
  11. 一种AMOLED像素驱动方法，包括如下步骤：
    步骤1、提供一AMOLED像素驱动电路；
    所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第一薄膜晶体管的栅极电性连接于第一节点，源极电性连接于第二节点，漏极电性连接于电源正电压；
    所述第二薄膜晶体管的栅极电性连接于扫描信号，源极电性连接于数据信 号，漏极电性连接于第一节点；
    所述第三薄膜晶体管的栅极电性连接于第二全局信号，源极电性连接于电源负电压，漏极电性连接于第二节点；
    所述第四薄膜晶体管的栅极电性连接于第三全局信号，源极电性连接于第三节点，漏极电性连接于第一节点；
    所述第五薄膜晶体管的栅极电性连接于第一全局信号，源极电性连接于参考电压，漏极电性连接于第三节点；
    所述第一电容的一端电性连接于第一节点，另一端电性连接于第三节点；
    所述第二电容的一端电性连接于第三节点，另一端电性连接于第二节点；
    所述有机发光二极管的阳极电性连接于第二节点，阴极电性连接于电源负电压；
    所述第一薄膜晶体管为驱动薄膜晶体管；
    步骤2、进入初始化阶段；
    所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号及扫描信号均提供低电位，第三、第五薄膜晶体管打开，第二、第四薄膜晶体管关闭，第三节点写入参考电压，第二节点写入电源负电压，有机发光二极管被放电；
    步骤3、进入数据信号写入阶段；
    所述第一全局信号提供高电位，第二全局信号提供高电位，第三全局信号提供低电位，所述扫描信号逐行提供脉冲信号，第二、第三、第五薄膜晶体管打开，第四薄膜晶体管关闭，第三节点的电位维持在参考电压、第二节点的电位维持在电源负电压，数据信号逐行写入第一节点，并储存在第一电容中，第一薄膜晶体管打开；
    步骤4、进入阈值电压补偿阶段；
    所述第一全局信号提供高电位，第二全局信号、第三全局信号、及扫描信号均提供低电位，第二、第三、第四薄膜晶体管关闭，第五薄膜晶体管打开，第三节点的电位维持在参考电压，第二节点电位因第一薄膜晶体管即驱动薄膜晶体管源极跟随而提升至：
    VS＝VData-Vth_T1
    其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位， Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
    步骤5、进入驱动发光阶段；
    所述第一全局信号提供低电位、第二全局信号提供低电位，第三全局信号提供一脉冲信号后保持低电位，扫描信号提供低电位，第二、第三、第五薄膜晶体管关闭，第四薄膜晶体管开启一个脉冲时间后关闭；所述第四薄膜晶体管在其开启时间内使得第一节点的电位即第一薄膜晶体管的栅极电位与第三节点的电位相同，即：
    VG＝Vref
    其中，VG表示所述第一节点的电位即所述第一薄膜晶体管的栅极电位；
    所述第二节点的电位即第一薄膜晶体管的源极电位为：
    VS＝VData-Vth_T1
    其中，VS表示所述第二节点的电位即所述第一薄膜晶体管的源极电位，Vth_T1表示所述第一薄膜晶体管即驱动薄膜晶体管的阈值电压，VData表示数据信号电压；
    所述有机发光二极管发光，且流经所述有机发光二极管的电流与第一薄膜晶体管的阈值电压、有机发光二极管的阈值电压无关；
    其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管；
    其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、及第五薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  12. 如权利要求11所述的AMOLED像素驱动方法，其中，所述参考电压为一恒定电压。
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