WO2021187422A1 - 固体撮像素子及び電子機器 - Google Patents

固体撮像素子及び電子機器 Download PDF

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Publication number
WO2021187422A1
WO2021187422A1 PCT/JP2021/010393 JP2021010393W WO2021187422A1 WO 2021187422 A1 WO2021187422 A1 WO 2021187422A1 JP 2021010393 W JP2021010393 W JP 2021010393W WO 2021187422 A1 WO2021187422 A1 WO 2021187422A1
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Prior art keywords
solid
state image
image sensor
conductor portion
embedded conductor
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Ceased
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PCT/JP2021/010393
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English (en)
French (fr)
Japanese (ja)
Inventor
信 岩淵
智美 伊藤
敦 正垣
義治 工藤
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Sony Semiconductor Solutions Corp
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Sony Semiconductor Solutions Corp
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Application filed by Sony Semiconductor Solutions Corp filed Critical Sony Semiconductor Solutions Corp
Priority to JP2022508347A priority Critical patent/JPWO2021187422A1/ja
Priority to CN202180013417.XA priority patent/CN115053348A/zh
Priority to KR1020227027763A priority patent/KR20220155264A/ko
Priority to EP21771296.7A priority patent/EP4123691A4/en
Priority to US17/910,476 priority patent/US20230197753A1/en
Publication of WO2021187422A1 publication Critical patent/WO2021187422A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/014—Manufacture or treatment of image sensors covered by group H10F39/12 of CMOS image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/806—Optical elements or arrangements associated with the image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/807—Pixel isolation structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/199—Back-illuminated image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes

Definitions

  • the present disclosure relates to a solid-state image sensor and an electronic device.
  • the contact electrode is in close contact with or close to the impurity region that is the source / drain of the transistor, which is the region where the impurity concentration is high, in order to reduce the size of the element. Therefore, a strong electric field is generated between the impurity region and the contact electrode.
  • This technology has been made in view of such a situation, and makes it possible to provide a solid-state image sensor and an electronic device that can suppress the generation of a strong electric field in the vicinity of a transistor while being compact. be.
  • the solid-state image sensor on one side of the present technology penetrates from the first main surface to the second main surface of the substrate and is completely penetrated between the photoelectric conversion element that performs photoelectric conversion and the pixel including the photoelectric conversion element. It includes a mold element separation and a conductor portion provided in close contact with the first main surface side of the completely penetrating type element separation.
  • the electronic device on one aspect of the present technology is a completely penetrating type formed between a photoelectric conversion element that performs photoelectric conversion and a pixel that penetrates from the first main surface to the second main surface of the substrate and includes the photoelectric conversion element.
  • a solid-state image sensor including a solid-state image sensor having element separation and a conductor portion provided in close contact with the first main surface side of the completely penetrating element separation, and the solid-state image sensor that captures image light from a subject. It is provided with an optical lens for forming an image on the image pickup surface of the above, and a signal processing circuit for processing a signal output from the solid-state image pickup device.
  • a photoelectric conversion element that performs photoelectric conversion and a complete penetration formed between a pixel that penetrates from the first main surface to the second main surface of the substrate and includes the photoelectric conversion element.
  • a type element separation and a conductor portion provided in close contact with the first main surface side of the completely penetrating type element separation are provided.
  • the electronic device on one side of the present technology is provided with the solid-state image sensor.
  • FIGS. 1 to 29 an example of an optical element, an optical element array, an electronic device, and a method for manufacturing the optical element according to the embodiment of the present disclosure will be described with reference to FIGS. 1 to 29.
  • Embodiments of the present disclosure will be described in the following order. The present disclosure is not limited to the following examples.
  • the effects described herein are exemplary and not limited, and may have other effects.
  • Solid-state image sensor (1.1) Overall configuration of solid-state image sensor (1.2) Configuration of solid-state image sensor (1.3) Method for manufacturing solid-state image sensor (1.4) Modification 2 ..
  • Second Embodiment Solid-state image sensor (2.1) First example of solid-state image sensor 200 (2.2) Second example of solid-state image sensor 200 (2.3) Third example of solid-state image sensor 200 Example 3.
  • Third Embodiment Solid-state image sensor (3.1) Configuration of solid-state image sensor 4.
  • Fourth Embodiment Solid-state image sensor (4.1) Configuration of solid-state image sensor 5.
  • Fifth Embodiment Solid-state image sensor (5.1) Configuration of solid-state image sensor 6.
  • Solid-state image sensor (6.1) Configuration of solid-state image sensor (6.1.1) First example of solid-state image sensor 600 (6.1.2) Second solid-state image sensor 600 Example 7. 7. Seventh Embodiment: Solid-state image sensor (7.1) Configuration of solid-state image sensor (7.2) Method for manufacturing solid-state image sensor 8. Eighth Embodiment: Electronic device
  • Solid-State Image Sensor (1.1) Overall Configuration of Solid-State Image Sensor The solid-state image sensor 1 according to the first embodiment of the present disclosure will be described.
  • FIG. 1 is a schematic configuration diagram showing the entire solid-state image sensor 1 according to the first embodiment of the present disclosure.
  • the solid-state image sensor 1 shown in FIG. 1 is a back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor.
  • the solid-state imaging device 1 captures image light (incident light 1006) from a subject through an optical lens 1002, and transmits the amount of light of the incident light 1006 imaged on the imaging surface to a signal processing circuit. In 1005, it is converted into an electric signal in pixel units and output as a video signal (pixel signal).
  • the solid-state image sensor 1 of the first embodiment includes a substrate 2, a pixel region 3, a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, and an output circuit. 7 and a control circuit 8 are provided.
  • the pixel region 3 has a plurality of pixels 9 regularly arranged in a two-dimensional array on the substrate 2.
  • the pixel 9 has a photoelectric conversion unit 23 shown in FIG. 3 and a plurality of pixel transistors (not shown).
  • the plurality of pixel transistors for example, four transistors such as a transfer transistor, a reset transistor, a selection transistor, and an amplifier transistor can be adopted. Further, for example, three transistors excluding the selection transistor may be adopted.
  • the vertical drive circuit 4 is composed of, for example, a shift register, selects a desired pixel drive wiring L1, supplies a pulse for driving the pixel 9 to the selected pixel drive wiring L1, and transfers each pixel 9 in rows. Drive. That is, the vertical drive circuit 4 selectively scans each pixel 9 in the pixel region 3 in a row-by-row manner in the vertical direction, and produces a pixel signal based on the signal charge generated by the photoelectric conversion unit 23 of each pixel 9 according to the amount of received light. , Supply to the column signal processing circuit 5 through the vertical signal line L2.
  • the column signal processing circuit 5 is arranged for each column of the pixel 9, for example, and performs signal processing such as noise removal for each pixel string for the signal output from the pixel 9 for one row.
  • the column signal processing circuit 5 performs signal processing such as CDS (Correlated Double Sampling) and AD (Analog Digital) conversion for removing fixed pattern noise peculiar to pixels.
  • the horizontal drive circuit 6 is composed of, for example, a shift register, sequentially outputs horizontal scanning pulses to the column signal processing circuit 5, selects each of the column signal processing circuits 5 in order, and from each of the column signal processing circuits 5.
  • the pixel signal for which signal processing has been performed is output to the horizontal signal line L3.
  • the output circuit 7 processes and outputs the pixel signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal line L3.
  • the signal processing for example, buffering, black level adjustment, column variation correction, various digital signal processing and the like can be used.
  • the control circuit 8 Based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock signal, the control circuit 8 transmits a clock signal or a control signal that serves as a reference for the operation of the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like. Generate. Then, the control circuit 8 outputs the generated clock signal and control signal to the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like.
  • FIG. 2 is a plan view showing an example of the layout of the solid-state image sensor 100 in the pixel region 3 of the solid-state image sensor 1.
  • FIG. 3 is a cross-sectional view of the pixel 9 of the solid-state image sensor 100 in the AA'cross section shown in FIG.
  • the solid-state image sensor 1 having the solid-state image sensor 100 shown in FIGS. 2 and 3 is a back-illuminated CMOS image sensor (CMOS type solid-state image sensor).
  • the solid-state image sensor 100 includes a transfer transistor Ttr, a reset transistor Trs, an amplification transistor Tam, and a select transistor Tsl.
  • the transfer transistor Ttr is a transistor that reads out the electric charge from the photoelectric conversion element 22 and transfers the electric charge to the floating diffusion 41.
  • the reset transistor Trs is a transistor that resets the potential of the floating diffusion 41 to the power supply voltage.
  • the amplification transistor Tam is a transistor that receives the potential of the floating diffusion 41 at the gate and outputs it to a vertical signal line (VSL) at the source follower.
  • the select transistor Tsl is a transistor that connects the amplification transistor Tam of the read line and the vertical signal line, and disconnects the amplification transistor Tam of the line not read and the vertical signal line.
  • the pixels 9 including the photoelectric conversion element (PD: Photo Diode) 22 that photoelectrically converts the incident light are completely separated into elements (FFTI: Front). It has a structure separated by Full Trench Isolation) 11.
  • the solid-state image sensor 100 is photoelectric from the second main surface (lower surface in FIG. 3) opposite to the first main surface (upper surface in FIG. 3) which is the transistor forming surface of the solid-state image sensor 100. Light is incident on the conversion element 22.
  • the first main surface may be referred to as an upper surface
  • the second main surface may be referred to as a lower surface.
  • the solid-state imaging device 100 includes a substrate 2, an FFTI 11, an embedded conductor portion 12, an insulating portion 13, a well layer 21, and a photoelectric conversion element 22. Further, the solid-state image sensor 100 includes a gate insulating film 31, gate electrodes 32, 33, 34 and 35, a floating diffusion 41 and a high-concentration impurity diffusion layer 42.
  • the gate electrode 32 is the gate electrode of the transfer transistor Ttr, and the gate electrode 33 is the gate electrode of the reset transistor Trs.
  • the gate electrode 34 is the gate electrode of the amplification transistor Tam, and the gate electrode 35 is the gate electrode of the select transistor Tsl.
  • a light collecting layer in which a color filter layer and a wafer lens (not shown) are laminated in this order is formed. Further, a wiring layer and a logic substrate (not shown) are laminated in this order on the transistor forming side surface (upper surface) of the substrate 2.
  • the substrate 2 is formed of, for example, silicon (Si).
  • a pixel region 3 in which a plurality of pixels 9 are arranged is formed on the substrate 2. As shown in FIG. 3, in the pixel region 3, a plurality of pixels 9 including a photoelectric conversion element 22 are formed on the substrate 2 and arranged in a two-dimensional matrix.
  • the completely penetrating element separation (FFTI) 11 is formed so as to penetrate from the transistor forming side surface (upper surface) to the lower surface of the substrate 2 and completely separate each pixel 9.
  • the FFTI 11 is provided so as to surround the pixel 9 in a plan view, and each pixel 9 is electrically separated from the adjacent pixel 9 by the FFTI 11.
  • the FFTI 11 has a structure in which an element separation film such as a silicon oxide film or a silicon nitride film is embedded in a trench formed in the substrate 2. Further, the FFTI 11 may have a two-layer structure of an element separation membrane formed so as to cover the inner wall of the trench and a semiconductor film such as silicon embedded in the trench in which the element separation film is formed.
  • an element separation film such as a silicon oxide film or a silicon nitride film is embedded in a trench formed in the substrate 2.
  • the FFTI 11 may have a two-layer structure of an element separation membrane formed so as to cover the inner wall of the trench and a semiconductor film such as silicon embedded in the trench in which the element separation film is formed.
  • the embedded conductor portion 12 functions as a contact electrode for GND contact with the substrate 2 (high-concentration impurity diffusion layer 42).
  • the embedded conductor portion 12 can be embedded in a trench formed on the upper surface of the substrate 2.
  • the embedded conductor portion 12 is formed by embedding all of the trenches provided in the upper part of the substrate 2 having the FFTI 11 as the bottom surface with a conductor film.
  • each pixel 9 is electrically separated by the FFTI 11. Therefore, in the solid-state image sensor 100, each separated pixel 9 needs to have a potential (reference potential) contact of the well layer 21.
  • a part of the FFTI 11 on the transistor forming surface side is used as an active region as an embedded conductor portion 12, and functions as a contact electrode.
  • the embedded conductor portion 12 By arranging the embedded conductor portion 12 closely above the FFTI 11 in this way, it is possible to suppress an increase in the area of the solid-state image sensor 100 in a plan view due to the formation of the contact electrode, and solid-state imaging can be performed. The area of the element 100 can be reduced.
  • the embedded conductor portion 12 is provided at all the boundaries between the pixels 9 as shown in FIG. Further, the GND contact 50 is provided so as to connect with a part of the embedded conductor portion 12 provided at the boundary between the pixels 9.
  • the embedded conductor portion 12 is formed above the FFTI 11 (transistor forming surface side) in a cross-sectional view. Since the embedded conductor portion 12 is formed deeper than the insulating portion 13, the embedded conductor portion 12 is arranged in close contact with the well layer 21 in a region deeper than the insulating portion 13.
  • the embedded conductor portion 12 is ohmic-bonded to the well layer 21 and electrically connected. As shown in FIGS. 2 and 3, the embedded conductor portion 12 is provided in close contact with the FFTI 11 provided between the pixels 9, and is shared as a contact electrode for GND contact between the two adjacent pixels 9. Will be done.
  • the embedded conductor portion 12 is formed by a conductor film.
  • silicon or other semiconductor material or metal doped with P-type or N-type impurities can be used.
  • silicon for example, polycrystalline silicon, amorphous silicon, epitaxially grown silicon, or the like can be used.
  • the insulating portion 13 is an insulating layer provided between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 on the upper surface (transistor forming side surface) of the substrate 2.
  • the insulating portion 13 is formed by STI (Shallow Trench Isolation) or an insulating film.
  • the STI may be any material that is generally used, and for example, silicon oxide is used.
  • As the insulating film an oxide film is preferably used, and a silicon oxide film is particularly preferable.
  • the insulating portion 13 is formed by embedding, for example, an oxide film as an insulating film in a trench formed on the upper surface (transistor forming side surface) of the substrate 2.
  • the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 do not come into close contact with each other, and the distance between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42. Becomes larger. Therefore, a strong electric field is less likely to be generated between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42, and the stability of the output of the solid-state image sensor 100 is improved.
  • the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 are separated from each other in the vertical direction (the depth direction of the substrate 2). Therefore, the generation of a strong electric field between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 is suppressed without increasing the size of the solid-state image sensor 100 in a plan view, and the solid-state image sensor 100 is small. It is possible to achieve both area reduction and improvement of output stability.
  • the well layer 21 is a P-type region in which P-type (an example of the first conductive type) impurities are diffused at a low concentration.
  • the well layer 21 is formed in a region deeper than the high-concentration impurity diffusion layer 42 described later.
  • the well layer 21 is arranged in close contact with the embedded conductor portion 12 in a region deeper than the insulating portion 13.
  • the well layer 21 forms a PN junction with the photoelectric conversion element 22 as described later.
  • the photoelectric conversion element 22 is a photodiode that converts incident light into an amount of electric charge corresponding to the amount of received light and stores it.
  • the photoelectric conversion element 22 receives light corresponding to the color of the color filter incident on the lower surface of the substrate via a lens and a color filter arranged with respect to the photoelectric conversion element 22.
  • the photoelectric conversion element 22 provided in each of the pixels 9 is separated by the FFTI 11.
  • the photoelectric conversion element 22 is a region formed in a region surrounded by a well layer 21, which is a P-shaped region, in each pixel 9.
  • the photoelectric conversion element 22 is an N-type region in which N-type (an example of a second conductive type) impurities different from the impurities diffused in the well layer 21 are diffused at a low concentration.
  • the photoelectric conversion element 22 has a photoelectric conversion function by forming a PN junction with the well layer 21.
  • the photoelectric conversion element 22 functions as a source region of the transfer transistor Ttr.
  • the gate insulating film 31 is an insulating film formed between the photoelectric conversion element 22 and the floating diffusion 41, and between the floating diffusion 41 and the high-concentration impurity diffusion layer 42.
  • the gate insulating film 31 is, for example, a silicon oxide film.
  • the gate electrodes 32, 33, 34 and 35 are the gate electrodes of the transfer transistor Ttr, the reset transistor Trs, the amplification transistor Tam and the select transistor Tsl, respectively.
  • the gate electrodes 32, 33, 34 and 35 are formed of a conductive film such as a polycrystalline silicon film.
  • the gate electrode 32 is formed in a trench formed so as to extend to the vicinity of the photoelectric conversion element 22 with respect to the well layer 21.
  • the gate electrode 32 is formed by embedding a conductive film in a trench provided with a gate insulating film 31 on the surface.
  • the floating diffusion 41 is a region formed on the surface of the substrate 2 on the transistor forming side (upper side) and temporarily holding the electric charge read by the transfer transistor Ttr.
  • the floating diffusion 41 is a region in which, for example, an N-type (an example of a second conductive type) impurities are diffused at a high concentration in a transistor-forming region on the upper surface of the substrate 2.
  • the floating diffusion 41 is formed in a region of the well layer 21 including a boundary between the channel region of the transfer transistor Ttr and the channel region of the reset transistor Trs.
  • the floating diffusion 41 functions as a drain region when the transfer transistor Ttr is driven, and functions as a source region when the reset transistor Trs is driven.
  • the high-concentration impurity diffusion layer 42 is formed on the transistor forming surface (upper surface) side of the substrate 2, and is, for example, a region in which N-type (an example of the second conductive type) impurities are diffused at a high concentration.
  • the high-concentration impurity diffusion layer 42 is formed shallower than the insulating portion 13.
  • the high-concentration impurity diffusion layer 42 functions as a drain region of the reset transistor Trs.
  • a trench is formed on the first main surface which is the transistor forming surface (upper surface in FIG. 3) of the substrate 2, and the insulating material is embedded to form STI13A.
  • silicon oxidation is performed after a trench is formed penetrating from the first main surface of the substrate 2 to the second main surface which is the opposite side surface (lower surface in FIG. 3) of the substrate 2.
  • An element separation film 11' such as a film or a silicon nitride film is embedded. At this time, the trench is formed so as to penetrate the STI.
  • a part of the first main surface of the element separation membrane 11'embedded in the trench is removed to form a trench.
  • the FFTI 11 is formed by the element separation membrane 11'.
  • An etching stopper film may be formed on the first main surface of the substrate 2 before a part of the first main surface of the element separation film 11'is removed.
  • a semiconductor film 12' such as polysilicon doped with impurities is formed so as to cover the formed trench and the first main surface of the substrate 2.
  • the semiconductor film 12' is formed by, for example, a chemical vapor deposition (CVD) method or the like.
  • the semiconductor film 12'deposited on the first main surface of the substrate 2 is flattened by chemical mechanical polishing (CMP). As a result, the embedded conductor portion 12 is formed.
  • CMP chemical mechanical polishing
  • a semiconductor element is formed in the pixel 9 separated by the FFTI 11.
  • the well layer 21, which is a P-type region is formed by ion-implanting P-type impurities into the substrate 2.
  • the photoelectric conversion element 22 which is an N-type region is formed by ion-implanting an N-type impurity into the region surrounded by the well layer 21.
  • a PN junction is formed between the well layer 21 and the photoelectric conversion element 22.
  • the substrate 2 is subjected to thermal oxidation treatment to form a trench extending from the upper surface of the substrate 2 to the vicinity of the upper surface of the photoelectric conversion element 22.
  • the gate insulating film 31 that covers the upper surface of the substrate 2 and the surface of the trench is formed.
  • the conductive film is embedded in the trench provided with the gate insulating film 31, and the conductive film is formed on the upper surface of the substrate 2.
  • a part of the conductive film is removed by using a lithography technique and an etching technique, and a gate electrode 32 of the transfer transistor Ttr and a gate electrode 33 of the reset transistor Trs are formed.
  • the ion-implanted region is activated by heat treatment. As a result, the floating diffusion 41 and the high-concentration impurity diffusion layer 42 are formed.
  • an interlayer insulating film is formed so as to cover the upper surface of the substrate 2 on which each transistor is formed. Further, a contact hole is formed which penetrates the interlayer insulating film and leads to the embedded conductor portion 12. Finally, the GND contact 50 is formed by embedding the conductive material in the contact hole. In FIG. 6B, the interlayer insulating film is not shown, and only the GND contact 50 is shown.
  • the solid-state image sensors 100A, 100B, 100C, 100D, 100E, 100F, and 100G which are seven examples of the solid-state image sensor 100, will be described with reference to FIGS. 7 to 13.
  • the solid-state image pickup devices 100A to 100G are different from the solid-state image pickup devices 100 according to the first embodiment in that the embedded conductor portions 12A to 12I are provided in place of the embedded conductor portions 12.
  • the portion having the same function as the solid-state image pickup device 100 according to the first embodiment will not be described in detail and shown in FIGS. 7 to 13. That is, the FFTI 11, the insulating portion 13, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, and the floating diffusion 41 formed in the pixels 9 of the solid-state image sensors 100A to 100G.
  • the detailed description of the high-concentration impurity diffusion layer 42 and the high-concentration impurity diffusion layer 42 will be omitted.
  • FIG. 7 is a cross-sectional view of a pixel 9 of a solid-state image sensor 100A, which is an example of a modified example of the solid-state image sensor 100.
  • FIG. 7 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portion 12A of the solid-state imaging device 100A is a conductor film formed on the surface of a trench provided on the upper portion of the substrate 2 having the FFTI 11 as the bottom surface.
  • the embedded conductor portion 12A may have a portion that is in close contact with the well layer 21. That is, the embedded conductor portion 12A may have a shape in which a part of the trench is embedded by the conductor material (the conductor material does not completely embed the trench).
  • the embedded conductor portion 12A is a conductive film formed on the surface of a trench formed on the upper surface of the substrate 2, and the trench is surrounded laterally and downwardly by the conductive film. There is an air layer.
  • the embedded conductor portion 12A may have a structure in which pure polysilicon or an oxide film is embedded in the trench.
  • FIG. 8 is a cross-sectional view of the pixel 9 of the solid-state image sensor 100B, which is an example of a modified example of the solid-state image sensor 100.
  • FIG. 8 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portion 12B of the solid-state imaging device 100B is a conductor film formed on the surface of a trench provided on the upper portion of the substrate 2 having the FFTI 11 as the bottom surface.
  • the embedded conductor portion 12B may have a portion that is in close contact with the well layer 21. That is, the embedded conductor portion 12A may have a shape in which a part of the trench is embedded by the conductor material (the conductor material does not completely embed the trench). That is, the embedded conductor portions 12A and 12B may have a shape in which the conductor material does not completely embed the trench.
  • the embedded conductor portion 12B is a conductive film formed on the surface of a trench formed on the upper surface of the substrate 2, and the trench is surrounded laterally and downwardly by the conductive film. There is an air layer.
  • the embedded conductor portion 12B may have a structure in which pure polysilicon or an oxide film is embedded in the trench.
  • FIGS. 9 and 10 are cross-sectional views of pixels 9 of the solid-state image sensor 100C, which is an example of a modification of the solid-state image sensor 100.
  • 9 and 10 are cross-sectional views corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portions 12C and 12D of the solid-state imaging device 100C are embedded in a trench formed near the upper surface of the substrate 2 having the FFTI 11 as the bottom surface.
  • the embedded conductor portions 12C and 12D have an inverted tapered shape or a tapered shape in a cross-sectional view.
  • FIG. 9 illustrates a configuration in which the embedded conductor portion 12C has a tapered shape in which the width decreases from the lower surface to the upper surface of the embedded conductor portion 12C.
  • FIG. 10 illustrates a configuration in which the embedded conductor portion 12D has a tapered shape in which the width decreases from the upper surface to the lower surface of the embedded conductor portion 12C.
  • a trench for forming the FFTI 11 and the embedded conductor portions 12C and 12D is formed so as to penetrate the STI formed on the upper surface of the substrate 2. Then, an insulating film is embedded in the trench to form the FFTI 11. Subsequently, the conductor film is embedded in the upper part of the FFTI 11 in the trench, so that the embedded conductor portions 12C and 12D are formed.
  • the shape of the trench may be tapered, and the cross-sectional shape of the embedded conductor portions 12C and 12D is also tapered.
  • FIG. 11 is a cross-sectional view of the pixel 9 of the solid-state image sensor 100D, which is an example of a modified example of the solid-state image sensor 100.
  • FIG. 11 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portion 12E and the insulating portion 13E of the solid-state image sensor 100D each have a tapered shape in which the width narrows from the lower surface to the upper surface in a cross-sectional view.
  • the embedded conductor portion 12E In order to form the embedded conductor portion 12E, first, for example, a trench is formed on the upper surface of the substrate 2, and an STI to be the insulating portion 13 is formed. Subsequently, a trench for forming the FFTI 11 and the embedded conductor portion 12E is formed so as to penetrate the STI, and an insulating film is embedded in the trench to form the FFTI 11.
  • the embedded conductor portion 12E is formed by embedding the conductor film in the upper part of the FFTI 11 in the trench.
  • the shape of the trench formed when the insulating portion 13 is formed and the shape of the trench formed when the embedded conductor portion 12E is formed may be changed. May also have a tapered shape. In such a case, the cross-sectional shapes of the insulating portion 13 and the embedded conductor portion 12E are similarly tapered.
  • FIG. 12 is a cross-sectional view of pixels 9 of the solid-state image sensor 100E, which is an example of a modification of the solid-state image sensor 100.
  • FIG. 12 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portion 12F of the solid-state imaging device 100E is embedded in a trench formed near the upper surface of the substrate 2 having the FFTI 11 as the bottom surface.
  • the embedded conductor portion 12F has a shape in which a plurality of cylinders whose diameters gradually increase toward the upper surface of the substrate 2 are laminated in a cross-sectional view.
  • the embedded conductor portion 12F In order to form the embedded conductor portion 12F, first, a trench for forming the FFTI 11 and the embedded conductor portion 12F is formed so as to penetrate the STI formed on the upper surface of the substrate 2. Then, an insulating film is embedded in the trench to form the FFTI 11. Subsequently, the conductor film is embedded in the upper part of the FFTI 11 in the trench, so that the embedded conductor portion 12F is formed.
  • the shape of the trench may be a shape in which a plurality of cylinders are stacked.
  • the cross-sectional shape of the embedded conductor portion 12F is also a shape in which a plurality of cylinders are stacked.
  • FIG. 13 is a cross-sectional view of the pixel 9 of the solid-state image sensor 100F, which is an example of a modification of the solid-state image sensor 100.
  • FIG. 13 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the embedded conductor portion 12G of the solid-state imaging device 100F is embedded in a trench formed near the upper surface of the substrate 2 having the FFTI 11 as the bottom surface.
  • the embedded conductor portion 12G has a wider width than the FFTI 11 in cross-sectional view.
  • the width of the trench of the embedded conductor portion 12G forming portion may be wider than the width of the trench of the FFTI 11 forming portion. In such a case, the embedded conductor portion 12G has a wider width than the FFTI 11 in cross-sectional view.
  • the solid-state image sensor 1 and the solid-state image sensor 100, and the solid-state image sensors 100A to 100G according to the present embodiment have the following effects.
  • an embedded conductor portion 12 that functions as a contact electrode is provided in close contact with the completely penetrating element separation (FFTI) 11 that separates each pixel 9.
  • FFTI completely penetrating element separation
  • an insulating portion 13 is provided between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 in a plan view.
  • the embedded conductor portion 12 formed deeper than the insulating portion 13 and the high density formed shallower than the insulating portion 13 near the surface of the transistor forming surface of the substrate 2.
  • An insulating portion 13 is provided between the impurity diffusion layer 42 and the impurity diffusion layer 42.
  • the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 are separated from each other in the vertical direction (the depth direction of the substrate 2). Therefore, the generation of a strong electric field between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42 is suppressed without increasing the size of the solid-state image sensor 100 in a plan view, and the solid-state image sensor 100 is small. It is possible to achieve both area reduction and improvement of output stability.
  • Solid-State Image Sensor 200 The solid-state image sensor 200 according to the second embodiment of the present disclosure will be described.
  • the solid-state image sensor 200 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the solid-state image sensors 200A, 200B, and 200C which are three examples of the solid-state image sensor 200, will be described with reference to FIGS. 14 to 16.
  • the portion having the same function as the solid-state image sensor 100 according to the first embodiment will not be described in detail and shown in FIGS. 14 to 16. That is, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, the floating diffusion 41 and the high-concentration impurity diffusion layer 42 formed in the pixel 9 of the solid-state image sensor 200A. Omits a detailed description.
  • FIG. 14 is a plan view showing an example of the layout of the solid-state image sensor 200A, which is an example of the solid-state image sensor 200.
  • the solid-state image sensor 200A is first implemented in that the embedded conductor portion 12 is provided in close contact with a part of the surface of the FFTI 11 provided at the boundary between the pixels 9. It is different from the solid-state image sensor 100 according to the above embodiment.
  • the arrangement of the FFTI 11 and the embedded conductor portion 12 and the connection of the GND contact 50 will be described.
  • the FFTI 11 of the solid-state image sensor 200A is provided at all the boundaries between the pixels 9. Further, the embedded conductor portion 12 of the solid-state image sensor 200A separates the adjacent pixels 9 from a part of the boundary between the pixels 9, particularly the four pixels 9 arranged in 2 ⁇ 2. Is provided only at the intersection of (the central portion of the four pixels 9). That is, the embedded conductor portions 12 of the solid-state image sensor 200A are provided at the four corners of one pixel 9.
  • An embedded conductor portion 12 is provided adjacent to the upper side (front side in FIG. 14) of the FFTI 11 at the intersection of the four FFTI 11.
  • the embedded conductor portion 12 is formed closer to the well layer 21 by being formed deeper than the insulating portion 13.
  • the embedded conductor portion 12 is not provided above the FFTI 11 (front side in FIG. 14), and the transistor forming side surface of the substrate 2 (front side surface in FIG. 14) is not provided.
  • the FFTI 11 is provided to the lower surface (the back side surface in FIG. 14).
  • the embedded conductor portion 12 When the embedded conductor portion 12 is provided above a part of the FFTI 11 (four corners of one pixel 9), the embedded conductor portion 12 is removed from the upper part of the embedded semiconductor material after embedding the semiconductor material, for example, oxidation.
  • the upper part may be covered with an insulator such as silicon and sealed.
  • the embedded conductor portion 12 is shared as a contact electrode for GND contact between four adjacent pixels 9. Pixel 9 will have four contact electrodes at each of the four corners. Therefore, in the solid-state image sensor 200A, even if any of the embedded conductor portions 12 does not function as the contact electrode, the other embedded conductor portion 12 can function as the contact electrode. Therefore, the quality of the solid-state image sensor 1 having the solid-state image sensor 200A can be improved.
  • FIG. 15 is a plan view showing an example of the layout of the solid-state image sensor 200B, which is an example of the solid-state image sensor 200.
  • the solid-state image sensor 200B is first implemented in that the embedded conductor portion 12 is provided in close contact with a part of the surface of the FFTI 11 provided at the boundary between the pixels 9. It is different from the solid-state image sensor 100 according to the above embodiment. Further, in the solid-state image sensor 200B, the GND contact 50 is connected to a part of the formed embedded conductor portion 12, and only a part of the embedded conductor portion 12 functions as a contact electrode. It is different from the solid-state image sensor 200A.
  • the arrangement of the FFTI 11 and the embedded conductor portion 12 and the connection of the GND contact 50 will be described.
  • the FFTI 11 of the solid-state image sensor 200B is provided at all the boundaries between the pixels 9. Further, the embedded conductor portion 12 of the solid-state image sensor 200B is a part of the boundary between the pixels 9, particularly the four FFTI 11s that separate the adjacent pixels 9 out of the four pixels 9 arranged in 2 ⁇ 2. Is provided only at the intersection of (the central portion of the four pixels 9). That is, the embedded conductor portions 12 of the solid-state image sensor 200B are provided at the four corners of one pixel 9.
  • an embedded conductor portion 12 formed above the FFTI 11 (front side in FIG. 15) is provided deeper than the insulating portion 13 and in contact with the well layer 21. There is.
  • the GND contact 50 is connected to a part of the embedded conductor portion 12 provided at the intersection of the four FFTI 11.
  • the GND contact 50 may be electrically connected to the adjacent pixel 9. Therefore, for example, as shown in FIG. 15, the GND contact 50 may be connected to a pair of embedded conductor portions 12 provided at diagonal positions in one pixel 9.
  • the embedded conductor portion 12 arranged as described above is shared as a contact electrode for GND contact between four adjacent pixels 9.
  • the pixel 9 will have two contact electrodes at its two corners. Therefore, in the solid-state image sensor 200B, even if one embedded conductor portion 12 does not function as a contact electrode, the other embedded conductor portion 12 can function as a contact electrode. Therefore, the quality of the solid-state image sensor 1 having the solid-state image sensor 200B can be improved.
  • FIG. 16 is a plan view showing an example of the layout of the solid-state image sensor 200C, which is an example of the solid-state image sensor 200.
  • the solid-state image sensor 200C is the first embodiment in that the embedded conductor portion 12 is provided in close contact with a part of the surface of the FFTI 11 provided at the boundary between the pixels 9. It is different from the solid-state image sensor 100 according to the above embodiment. Further, the solid-state image sensor 200C is different from the solid-state image sensor 200A in that the embedded conductor portion 12 is provided only at diagonal positions (two corners) of one pixel 9.
  • the arrangement of the FFTI 11 and the embedded conductor portion 12 and the connection of the GND contact 50 will be described.
  • the FFTI 11 of the solid-state image sensor 200C is provided at all the boundaries between the pixels 9. Further, the embedded conductor portion 12 of the solid-state image sensor 200C is provided at a part of the boundary between the pixels 9. The embedded conductor portion 12 is provided at a pair of diagonal positions of one pixel 9.
  • an embedded conductor portion 12 formed deeper than the insulating portion 13 and in contact with the well layer 21 is provided. Has been done.
  • the GND contact 50 is connected to each of the embedded conductor portions 12 provided diagonally to the pixel 9.
  • the embedded conductor portion 12 arranged as described above is shared as a contact electrode for GND contact between four adjacent pixels 9.
  • the pixel 9 will have two contact electrodes at its two corners. Therefore, in the solid-state image sensor 200C, even if one embedded conductor portion 12 does not function as a contact electrode, the other embedded conductor portion 12 can function as a contact electrode. Therefore, the quality of the solid-state image sensor 1 having the solid-state image sensor 200C can be improved.
  • the characteristics of the solid-state image sensor 200C and the yield at the time of manufacturing the solid-state image sensor 200C can be increased. Can be done.
  • the solid-state imaging device 200 may have any of the embedded conductor portions 12A to 12G of the modified example of the first embodiment instead of the embedded conductor portion 12.
  • the solid-state image sensor 200 according to the present embodiment has the following effects in addition to the effects described in the first embodiment.
  • an embedded conductor portion 12 that functions as a contact electrode is provided at a corner portion of each pixel 9.
  • the embedded conductor portion 12 is shared as a contact electrode for GND contact between the four adjacent pixels 9, and even if any of the embedded conductor portions 12 does not function as a contact electrode, even if any of the embedded conductor portions 12 does not function as a contact electrode.
  • the other embedded conductor portion 12 can function as a contact electrode. Therefore, the quality of the solid-state image sensor 1 having the solid-state image sensor 200A is improved.
  • the embedded conductor portion 12 is provided only at the diagonal corners (two corners) of each pixel 9. As a result, the characteristics of the solid-state image sensor 200C and the yield at the time of manufacturing the solid-state image sensor 200C are improved as compared with the case where the embedded conductor portions 12 are provided at the four corners of each pixel 9.
  • the solid-state image sensor 300 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the solid-state image sensor 300 will be described with reference to FIG.
  • the portion of the solid-state image sensor 300 that has the same function as the solid-state image sensor 100 according to the first embodiment will not be described in detail and shown in FIG. That is, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, the floating diffusion 41 and the high-concentration impurity diffusion layer 42 formed in the pixel 9 of the solid-state image sensor 300. Will omit detailed description and illustration.
  • FIG. 17 is a cross-sectional view of the pixel 9 of the solid-state image sensor 300.
  • FIG. 17 is a cross-sectional view corresponding to FIG. 3 in the first embodiment.
  • the solid-state image sensor 300 is different from the solid-state image sensor 100 according to the first embodiment in that it includes an insulating portion 313 instead of the insulating portion 13.
  • the insulating portion 313 includes an insulating film covering the surface of the trench provided between the embedded conductor portion 12 and the high-concentration impurity diffusion layer 42, and pure polysilicon or pure polysilicon embedded in the trench. It has a two-layer structure with oxides. Further, the insulating portion 313 may be provided with an air layer (air gap) instead of pure polysilicon or oxide. That is, at least the surface of the insulating portion 313 may be formed of an insulating material. By providing such an insulating portion 313, the width of the insulating portion 313 can be narrowed as compared with the insulating portion 13, which is effective for miniaturization of pixels.
  • the solid-state imaging device 300 may have any of the embedded conductor portions 12A to 12G of the modified example of the first embodiment instead of the embedded conductor portion 12.
  • the solid-state image sensor 300 according to the present embodiment has the following effects in addition to the effects described in the first embodiment.
  • the insulating portion 313 has two layers of an insulating film formed on the trench surface and pure polysilicon or an oxide film embedded in the trench in which the insulating film is formed, or an air layer. It is said to be a structure. As a result, the width of the insulating portion 313 can be formed to be narrower, which is further effective in reducing the area of the solid-state image sensor 300.
  • the solid-state image sensor 400 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the solid-state image sensor 400 is different from the solid-state image sensor 100 according to the first embodiment in that it includes an embedded conductor portion 412 for connecting between pixels 9 instead of the embedded conductor portion 12. Further, the solid-state image sensor 400 is different from the solid-state image sensor 100 according to the first embodiment in that it includes an insulating portion 414. Further, the solid-state image sensor 400 is different from the solid-state image sensor 100 according to the first embodiment in that a contact electrode 460 and an embedded conductor portion 470 are provided.
  • the portion having the same function as the solid-state image sensor 100 according to the first embodiment is omitted in detail and shown in FIGS. 18 to 20. That is, the FFTI 11, the insulating portion 13, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, and the floating diffusion 41 and the height formed in the pixel 9 of the solid-state image sensor 400. A detailed description of the concentration impurity diffusion layer 42 will be omitted.
  • FIG. 18 is a plan view showing an example of the layout of the solid-state image sensor 400.
  • FIG. 19 is a cross-sectional view of the pixel 9 of the solid-state image sensor 400 in the BB'cross section shown in FIG.
  • FIG. 19 is a cross-sectional view of a portion including the transfer transistor Ttr and the reset transistor Trs.
  • FIG. 20 is a cross-sectional view of the pixel 9 of the solid-state image sensor 400 in the CC'cross section shown in FIG.
  • FIG. 20 is a cross-sectional view of a portion including the amplification transistor Tam and the select transistor Tsl.
  • the solid-state image sensor 400 has a contact electrode 460 in the pixel 9. Further, as shown in FIGS. 19 and 20, the solid-state imaging device 400 has an embedded conductor portion 412 provided on the upper portion of the FFTI 11 and an insulating portion 414 provided on the upper portion of the embedded conductor portion 412. ing.
  • the embedded conductor portion 412 is provided between the FFTI 11 and the insulating portion 414.
  • the embedded conductor portion 412 is formed to a position deeper than the insulating portion 13 of the substrate 2, and is arranged in close contact with the well layers 21 of both adjacent pixels 9. That is, the embedded conductor portion 412 has a function of electrically connecting each pixel 9.
  • the embedded conductor portion 412 of the present embodiment does not have a function as a contact electrode unlike the embedded conductor portion 12 of the first embodiment.
  • the embedded conductor portion 412 is formed of the same material as the embedded conductor portion 12.
  • the embedded conductor portion 412 is formed by embedding a conductor film in the upper part of the FFTI 11 and then removing the upper part of the embedded conductor.
  • the insulating portion 414 is provided above the embedded conductor portion 412 and has a function as a cap layer of the insulating portion 414.
  • the insulating portion 414 is formed of, for example, silicon oxide or silicon nitride, or other insulating material.
  • the insulating portion 414 is formed by embedding the insulating portion in the upper part of the embedded conductor portion 412 in the trench.
  • the contact electrode 460 is a region for connecting to and making contact with the GND contact 50. As shown in FIG. 20, the contact electrode 460 is connected to the well layer 21 and fixes the well layer 21 to the potential input from the GND contact 50. The contact electrode 460 is formed in the pixel 9 region. Further, the contact electrode 460 may be arranged inside the pixel 9 region and outside the pixel 9 region (outside the pixel region 3 shown in FIG. 1).
  • the contact electrode 460 When the contact electrode 460 is formed in the pixel 9 region, one contact electrode 460 is provided for several pixels 9.
  • the pixel 9 provided with the contact electrode 460 can be the pixel 9 provided with the blue (B) color filter.
  • the influence of the difference in the pattern of the transistor forming surface on the opposite side surface (upper surface in FIG. 19) of the light incident surface due to the optical characteristics of the blue light is suppressed. This is because it can be done. Therefore, when the contact electrode 460 is provided in the pixel 9 provided with the blue (B) color filter, it is possible to suppress the variation in the output between the pixels 9 and improve the output from each pixel 9 uniformly. can.
  • Pixels 9 are electrically connected by an embedded conductor portion 412. Therefore, one contact electrode 460 functions as a potential (reference potential) contact of the well layer 21 of each separated pixel 9.
  • the contact electrode 460 is a region where impurities are diffused at a high concentration, which is provided for making contact with the GND contact 50.
  • the contact electrode 460 is formed at a depth at which the lower surface is in electrical contact with the well layer 21.
  • the contact electrode 460 is formed by embedding a conductor film in a trench provided on the substrate 2.
  • a conductor film for example, silicon or other semiconductor material or metal doped with P-type impurities is used.
  • silicon for example, polycrystalline silicon, amorphous silicon, epitaxially grown silicon, and the like are used.
  • the solid-state image sensor 400 according to the present embodiment has the following effects.
  • each pixel 9 is electrically connected by an embedded conductor portion 412, and a contact electrode 460 is provided in one of several pixels 9.
  • the number of contact electrodes 460 can be reduced as compared with the case where the contact electrodes 460 are provided in each pixel 9, and the area of the solid-state image sensor 300 can be reduced.
  • a blue (B) color filter can be provided so that the contact electrode 460 is provided on the pixel 9 on which blue light having a short wavelength is incident. In this case, it is possible to suppress the variation in the output between the pixels 9 depending on the presence or absence of the contact electrode 460, and improve the output from each pixel 9 uniformly.
  • the solid-state image sensor 500 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the solid-state image sensor 500 according to the fifth embodiment will be described with reference to FIGS. 21 to 23.
  • the solid-state image sensor 500 is the first embodiment in that the embedded conductor portion 512 is provided in close contact with a part of the surface of the FFTI 11 provided at the boundary between the pixels 9. It is different from the solid-state image sensor 100 according to the above embodiment.
  • the solid-state image sensor 500 includes an embedded conductor portion 512 in each region including the four corners of one pixel 9 in a plan view. Further, the solid-state image sensor 500 is different from the solid-state image sensor 100 according to the first embodiment in that it includes an embedded conductor portion 515 provided on the boundary between the two pixels 9.
  • the solid-state image sensor 500 a portion having the same function as the solid-state image sensor 100 according to the first embodiment will not be described in detail and shown in FIGS. 21 to 23. That is, the FFTI 11, the insulating portion 13, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, and the floating diffusion 41 and the height formed in the pixel 9 of the solid-state image sensor 500. A detailed description of the concentration impurity diffusion layer 42 will be omitted.
  • FIG. 21 is a plan view showing an example of the layout of the solid-state image sensor 500.
  • FIG. 22 is a cross-sectional view of the pixel 9 of the solid-state image sensor 500 in the DD'cross section shown in FIG. Further, FIG. 22 is a cross-sectional view of a region including the embedded conductor portion 515 having an electron trap function.
  • FIG. 23 is a cross-sectional view of the pixel 9 of the solid-state image sensor 500 in the EE cross section shown in FIG. Further, FIG. 23 is a cross-sectional view of a region including an embedded conductor portion 512 that functions as a contact electrode.
  • the embedded conductor portions 512 provided at the four corners of the pixel 9 function as contact electrodes for fixing the potential of the well layer 21, similarly to the embedded conductor portion 12 in the first embodiment.
  • the FFTI 11 of the solid-state image sensor 500 is provided at all the boundaries between the pixels 9.
  • the embedded conductor portion 512 of the solid-state image sensor 500 a part of the boundary between each pixel 9, particularly four FFTI 11s that separate adjacent pixels 9 among the four pixels 9 arranged in 2 ⁇ 2 intersect. It is provided in the area including the portion (the central portion of the four pixels 9). That is, the embedded conductor portions 512 of the solid-state image sensor 500 are provided at the four corners of one pixel 9.
  • the embedded conductor portion 512 is provided above the FFTI 11 (upper side of FIG. 22) in the region including the four corners of the pixel 9 so as to be deeper than the insulating portion 13 and in contact with the well layer 21.
  • FIG. 21 as an example, a cross-shaped embedded conductor portion 512 in a plan view is shown.
  • the embedded conductor portion 512 can be formed by the same material and manufacturing method as the embedded conductor portion 12 of the first embodiment.
  • the embedded conductor portion 515 provided on the boundary between the pixels 9 has an electron trap function for suppressing charge overflow to the adjacent pixel 9 via the embedded conductor portion 512 or 515 when the amount of light is large.
  • the embedded conductor portion 515 is provided above a part of the FFTI 11 (upper side in FIG. 22) located at the boundary between the pixels 9 so as to be deeper than the insulating portion 13 and in contact with the well layer 21.
  • silicon or other semiconductor material or metal doped with N-type impurities is used.
  • the silicon for example, polycrystalline silicon, amorphous silicon, epitaxially grown silicon, and the like are used.
  • the embedded conductor portion 512 is electrically connected to the GND contact 50. As a result, the embedded conductor portion 512 functions as a contact electrode.
  • the embedded conductor portion 512 is shared as a contact electrode for GND contact between four adjacent pixels 9. Pixel 9 will have four contact electrodes at each of the four corners. Therefore, in the solid-state image sensor 500, even if any of the embedded conductor portions 512 does not function as the contact electrode, the other embedded conductor portion 512 can function as the contact electrode. Therefore, the quality of the solid-state image sensor 1 having the solid-state image sensor 500 can be improved.
  • the embedded conductor portion 515 is electrically connected to the VDD contact 570 that applies a positive voltage to the embedded conductor portion 515.
  • the embedded conductor portion 515 is formed of, for example, an N-type semiconductor material, and traps electrons accumulated in the photoelectric conversion element 22 when a positive voltage is applied.
  • the solid-state image sensor 500 can suppress color mixing between adjacent pixels 9 in which color filters of different colors are arranged. Further, in the solid-state image sensor 500, it is preferable to make a difference in the strength between the barrier from the photoelectric conversion element 22 to the embedded conductor portion 515 and the barrier from the photoelectric conversion element 22 to each transistor such as the transfer transistor Ttr. As a result, it is possible to prevent the electrons overflowing from the photoelectric conversion element 22 from affecting each transistor when the amount of light is large.
  • the solid-state imaging device 500 may have any of the embedded conductor portions 12A to 12G of the modified example of the first embodiment instead of the embedded conductor portion 512. Further, in the solid-state image sensor 500, the embedded conductor portion 515 may have the same configuration as the embedded conductor portions 12A to 12G of the modified example of the first embodiment. Further, the solid-state image sensor 500 may have the insulating portion 313 of the third embodiment instead of the insulating portion 13.
  • the solid-state image sensor 500 according to the present embodiment exhibits the following effects in addition to the effects described in the first embodiment.
  • the solid-state image sensor 500 includes an embedded conductor portion 515 that is electrically connected to the VDD contact and traps electrons overflowing from the photoelectric conversion element 22 when a positive voltage is applied from the VDD contact. .. Therefore, it is possible to suppress the electrons overflowing from the photoelectric conversion element 22 from flowing to the adjacent pixels 9 at the time of a large amount of light, and to suppress the color mixing with the adjacent pixels 9.
  • the solid-state image sensor 600 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the portion having the same function as the solid-state image sensor 100 according to the first embodiment is omitted in detail and shown in FIGS. 24 and 25. That is, the FFTI 11, the insulating portion 13, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, which are formed in the pixels 9 of the solid-state image sensor 600A and the solid-state image sensor 600B, and Detailed description of the floating diffusion 41 and the high-concentration impurity diffusion layer 42 will be omitted.
  • FIG. 24 is a plan view showing an example of the layout of the solid-state image sensor 600A, which is an example of the solid-state image sensor 600.
  • the solid-state imaging device 600A includes an embedded conductor portion 612A provided in a part of a region on the boundary sandwiched between the two pixels 9 instead of the embedded conductor portion 12. In that respect, it differs from the solid-state image sensor 100 according to the first embodiment. Further, the solid-state image sensor 600A according to the first embodiment is provided with the embedded conductor portion 615A in a region excluding the region where the embedded conductor portion 612A is formed on the FFTI 11 surrounding each pixel. Different from 100.
  • the arrangement of the FFTI 11, the embedded conductor portion 612A and the embedded conductor portion 615A, and the connection of the GND contact 50 will be described.
  • the solid-state image sensor 600A is a solid-state image sensor in which two adjacent pixels 9 are used as pixel sharing units.
  • One embedded conductor portion 612A is provided for two adjacent pixels 9.
  • the embedded conductor portion 612A is provided on the upper portion (front side in FIG. 24) of the FFTI 11 (not shown) provided at the boundary between the two adjacent pixels 9.
  • the embedded conductor portion 612A is provided near the center of the FFTI 11 sandwiched between the two pixels 9 in a plan view.
  • the upper surface of the embedded conductor portion 612A is exposed from the embedded conductor portion 615A described later, and the GND contact 50 is connected to the embedded conductor portion 612A.
  • the embedded conductor portion 612A functions as a contact electrode in the same manner as the embedded conductor portion 12 described in the first embodiment.
  • the embedded conductor portion 612A is formed in the same manner as the embedded conductor portion 12 except that the embedded conductor portion 612A is provided on a part of the FFTI 11 provided at the boundary between two adjacent pixels 9.
  • the embedded conductor portion 615A is provided above the FFTI 11 (not shown) provided at the boundary of each pixel 9.
  • the embedded conductor portion 615A is formed in a region excluding the region on which the embedded conductor portion 612A is formed on the FFTI 11. Similar to the embedded conductor portion 515 described in the fifth embodiment, the embedded conductor portion 615A suppresses the overflow of electric charge to the adjacent pixel 9 via the embedded conductor portion 612A or 615A when the amount of light is large. Has an electronic trap function for.
  • the embedded conductor portion 615A is formed in the same manner as the embedded conductor portion 515 except that it is provided in a region surrounding most of each pixel 9.
  • a VDD contact 670 that applies a positive voltage to the embedded conductor portion 615A is connected to the embedded conductor portion 615A.
  • the VDD contact 670 is formed of the same material and method as the VDD contact 570 of the fifth embodiment.
  • the embedded conductor portion 612A as a GND contact electrode is shared by each pixel sharing unit composed of two pixels 9.
  • a high-intensity light source is incident on the solid-state image sensor 600A and electrons overflow from the pixel 9 via the embedded conductor portion 612A, electrons are emitted to other pixels 9 in the shared pixel unit via the embedded conductor portion 612A.
  • it flows in it is possible to suppress the inflow of electrons into other pixels 9 outside the shared pixel unit. Therefore, deterioration of image quality can be suppressed by the same processing as pixel correction due to defects in the shared pixel unit.
  • FIG. 25 is a plan view showing an example of the layout of the solid-state image sensor 600B, which is an example of the solid-state image sensor 600.
  • the solid-state imaging device 600B includes an embedded conductor portion 612B provided in a region on the boundary surrounded by four pixels 9 instead of the embedded conductor portion 12. It is different from the solid-state image sensor 100 according to the first embodiment. Further, the solid-state image sensor 600B according to the first embodiment is provided with the embedded conductor portion 615B in a region excluding the region where the embedded conductor portion 612B is formed on the FFTI 11 surrounding each pixel. Different from 100.
  • the arrangement of the FFTI 11, the embedded conductor portion 612B and the embedded conductor portion 615B, and the connection of the GND contact 50 will be described.
  • the solid-state image sensor 600B is a solid-state image sensor in which four pixels 9 arranged in a 2 ⁇ 2 matrix are used as pixel sharing units.
  • One embedded conductor portion 612B is provided for each of the four pixels 9 arranged in a matrix.
  • the embedded conductor portion 612B is provided on the upper portion (front side in FIG. 25) of the FFTI 11 (not shown) located at the center of the four pixels 9.
  • the upper surface of the embedded conductor portion 612B is exposed from the embedded conductor portion 615B described later, and the GND contact 50 is connected to the embedded conductor portion 612B.
  • the embedded conductor portion 615B is provided above the FFTI 11 (not shown) provided at the boundary of each pixel 9.
  • the embedded conductor portion 615B is formed in a region excluding the region on which the embedded conductor portion 612B is formed on the FFTI 11.
  • the embedded conductor portion 615B has an electron trap function for suppressing the overflow of electrons to the adjacent pixel 9 via the embedded conductor portion 612B or 615B when the amount of light is large.
  • the embedded conductor portion 615B is formed in the same manner as the embedded conductor portion 515 except that it is provided in a region surrounding most of each pixel 9.
  • the embedded conductor portion 612B as a GND contact electrode is shared by each pixel sharing unit composed of two pixels 9.
  • a high-intensity light source is incident on the solid-state image sensor 600B and electrons overflow from the pixel 9 via the embedded conductor portion 612B, electrons are emitted to other pixels 9 in the shared pixel unit via the embedded conductor portion 612B.
  • it flows in it is possible to suppress the inflow of electrons into other pixels 9 outside the shared pixel unit. Therefore, deterioration of image quality can be suppressed by the same processing as pixel correction due to defects in the shared pixel unit.
  • the solid-state image sensor 600 according to the present embodiment has the following effects in addition to the effects described in the first embodiment.
  • the solid-state image sensor 600 includes embedded conductor portions 615A and 615B that are electrically connected to the VDD contact and trap the electrons overflowing from the photoelectric conversion element 22 when a positive voltage is applied from the VDD contact. ing. Therefore, the solid-state image sensor 600 can suppress the electrons overflowing from the photoelectric conversion element 22 from flowing to the adjacent pixels 9 at the time of a large amount of light, and can suppress the color mixing with the adjacent pixels 9.
  • the solid-state image sensor 600 can suppress the inflow of electrons into other pixels 9 outside the shared pixel unit even when electrons overflow from the pixel 9. Therefore, the solid-state image sensor 600 can suppress deterioration of image quality by the same processing as pixel correction due to defects in the shared pixel unit.
  • the solid-state image sensor 700 is a solid-state image sensor that can be used in place of the solid-state image sensor 100 of the solid-state image sensor 1 described in the first embodiment.
  • the solid-state image sensor 700 according to the seventh embodiment will be described with reference to FIG. 26. As shown in FIG. 26, the solid-state image sensor 700 differs from the solid-state image sensor 100 according to the first embodiment in that the GND contact 750 is provided up to the inside of the embedded conductor portion 712.
  • the solid-state image sensor 700 a portion having the same function as the solid-state image sensor 100 according to the first embodiment will not be described in detail and shown in FIG. 26. That is, the FFTI 11, the insulating portion 13, the well layer 21, the photoelectric conversion element 22, the gate insulating film 31, the gate electrodes 32, 33, 34 and 35, and the floating diffusion 41 and the height formed in the pixel 9 of the solid-state image sensor 500. A detailed description of the concentration impurity diffusion layer 42 will be omitted.
  • the GND contact 750 is provided up to a position where it penetrates the embedded conductor portion 712 and comes into contact with the FFTI 11.
  • the tip of the GND contact 750 may be formed so as to reach the inside of the FFTI 11.
  • the solid-state image sensor 700 according to the present embodiment has the following effects in addition to the effects described in the first embodiment.
  • FIG. 27 is an enlarged view of the vicinity of the GND contact 50 of the solid-state image sensor 100 (FIG. 3) according to the first embodiment.
  • the embedded conductor portion 12 is ohmic-bonded to the well layer 21 and electrically connected.
  • the embedded conductor portion 12 is formed of, for example, polysilicon, which is a material having a refractive index close to that of silicon in the photoelectric conversion element 22, the polysilicon portion (embedded conductor portion 12) is from an adjacent pixel. Light may be transmitted.
  • light may leak to adjacent pixels at a portion where the embedded conductor portion 12 and the well layer 21 come into contact with each other, and color mixing may occur.
  • the GND contact 750 is provided up to the inside of the embedded conductor portion 12. Therefore, even if a situation occurs in which the light leaks into the adjacent pixels at the portion where the embedded conductor portion 12 and the well layer 21 come into contact with each other, the light is reflected by the GND contact 750. Therefore, it does not leak to the adjacent pixel side. Therefore, color mixing can be prevented.
  • the seventh embodiment can be applied in combination with the first to sixth embodiments.
  • the photoelectric conversion element 22 is formed in the pixel 9 separated by the FFTI 11, and the gate electrode 32 of the transfer transistor Ttr and the gate electrode 33 of the reset transistor Trs are formed. It is in a state of being.
  • an interlayer insulating film 781 is formed so as to cover the upper surface of the substrate 2 on which each transistor is formed.
  • a contact hole is formed that penetrates the interlayer insulating film 781 and penetrates the embedded conductor portion 12.
  • the contact hole may be etched up to a part of FFTI11 such as a silicon oxide film or a silicon nitride film filled in FFTI11.
  • the GND contact 750 is formed by embedding the conductive material in the contact hole.
  • FIG. 29 is a schematic configuration diagram of the electronic device 1000 according to the eighth embodiment of the present disclosure.
  • the electronic device 1000 according to the eighth embodiment includes a solid-state imaging device 1, an optical lens 1002, a shutter device 1003, a drive circuit 1004, and a signal processing circuit 1005.
  • the electronic device 1000 of the eighth embodiment is a solid-state image sensor 1, and the embodiment of the case where the solid-state image sensor 1 according to the first embodiment of the present disclosure is used for an electronic device (for example, a camera) is used. show.
  • the optical lens 1002 forms an image of the image light (incident light 106) from the subject on the image pickup surface of the solid-state image pickup device 1.
  • the shutter device 1003 controls the light irradiation period and the light blocking period for the solid-state image sensor 1.
  • the drive circuit 1004 supplies a drive signal that controls the transfer operation of the solid-state image sensor 1 and the shutter operation of the shutter device 1003.
  • the signal transfer of the solid-state image sensor 1 is performed by the drive signal (timing signal) supplied from the drive circuit 1004.
  • the signal processing circuit 1005 performs various signal processing on the signal (pixel signal) output from the solid-state image sensor 1.
  • the signal-processed video signal is stored in a storage medium such as a memory or output to a monitor.
  • the electronic device 1000 to which the solid-state image sensor 1 can be applied is not limited to the camera, but can also be applied to other electronic devices.
  • it may be applied to an imaging device such as a camera module for mobile devices such as mobile phones and tablet terminals.
  • the solid-state image sensor 1 according to the first embodiment is used as the electronic device as the solid-state image sensor 1, but other configurations may be used.
  • the solid-state image sensor 1 according to the second embodiment and the solid-state image sensor 1 according to a modified example may be used for an electronic device.
  • the solid-state image sensor of the present disclosure may have the above-described configuration of the high-concentration impurity region, the embedded conductor, and the insulating portion provided in the FFTI and its vicinity, and the configuration of other parts is not limited. That is, the configuration of the semiconductor element in the pixel can be any configuration other than the configuration described above. Further, the conductive type of the impurity diffusion region of the solid-state imaging device of the present disclosure is an example, and the P-type region and the N-type region may be formed in opposite directions.
  • the present technology can have the following configurations.
  • a photoelectric conversion element that performs photoelectric conversion and Complete penetration type element separation that penetrates from the first main surface to the second main surface of the substrate and is formed between the pixels including the photoelectric conversion element.
  • a solid-state imaging device including a first conductor portion provided in close contact with the first main surface side of the completely penetrating element separation.
  • the first conductor portion is embedded in a trench formed on the first main surface of the substrate.
  • a high-concentration impurity diffusion layer formed on the first main surface of the substrate,
  • the first conductor portion is formed deeper than the insulating portion.
  • the solid-state image sensor according to (2) wherein the high-concentration impurity diffusion layer is formed shallower than the insulating portion.
  • a well layer formed in a region deeper than the high-concentration impurity diffusion layer is provided.
  • the solid-state imaging device according to (2) wherein the first conductor portion is arranged in close contact with the well layer in a region deeper than the insulating portion.
  • a cap layer provided in close contact with the first main surface side of the first conductor portion is provided.
  • a contact electrode electrically connected to the well layer and formed in the pixel is provided.
  • the solid-state imaging device according to (5), wherein the contact electrode fixes the well layer of the plurality of adjacent pixels to an input potential via the first conductor portion.
  • the completely penetrating element separation is provided so as to surround the pixel in a plan view.
  • the solid-state imaging device according to any one of (1) to (6) above, wherein the first conductor portion is arranged in close contact with the entire surface or a part of the surface above the completely penetrating element separation.
  • the first conductor portion is located above the completely penetrating element separation sandwiched between two adjacent pixels and at the center of four pixels arranged in a 2 ⁇ 2 matrix.
  • the solid-state imaging device according to (7) above, which is provided on at least one of the upper surfaces.
  • the solid-state imaging device according to any one of (1) to (8) above, wherein the first conductor portion has a shape in which a part or all of the trench having the completely penetrating element separation as the bottom surface is embedded with a conductor material. .. (10) The solid-state image sensor according to (2) above, wherein the insulating portion has at least a surface formed of an insulating material. (11) The insulating portion includes an insulating film covering the surface of the trench provided between the first conductor portion and the high-concentration impurity diffusion layer, and pure polysilicon or oxide or an air layer embedded in the trench.
  • the solid-state imaging device according to (10) above, which has a two-layer structure.
  • a solid-state image pickup device including a solid-state image pickup device having a first conductor portion provided in close contact with the first main surface side of the above.
  • An optical lens that forms an image of image light from a subject on the imaging surface of the solid-state image sensor, and
  • An electronic device including a signal processing circuit that processes a signal output from the solid-state image sensor.

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  • Solid State Image Pick-Up Elements (AREA)
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KR1020227027763A KR20220155264A (ko) 2020-03-16 2021-03-15 고체 촬상 소자 및 전자 기기
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