WO2021082485A1 - 一种设计pcb焊盘的方法、设备及介质 - Google Patents

一种设计pcb焊盘的方法、设备及介质 Download PDF

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Publication number
WO2021082485A1
WO2021082485A1 PCT/CN2020/098405 CN2020098405W WO2021082485A1 WO 2021082485 A1 WO2021082485 A1 WO 2021082485A1 CN 2020098405 W CN2020098405 W CN 2020098405W WO 2021082485 A1 WO2021082485 A1 WO 2021082485A1
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size
pcb board
layer
pyramid
shaped
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PCT/CN2020/098405
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English (en)
French (fr)
Inventor
杨才坤
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苏州浪潮智能科技有限公司
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Priority to US17/772,946 priority Critical patent/US20220377905A1/en
Publication of WO2021082485A1 publication Critical patent/WO2021082485A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/18—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
    • G05B19/182—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by the machine tool function, e.g. thread cutting, cam making, tool direction control
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047—Drilling of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/45—Nc applications
    • G05B2219/45035—Printed circuit boards, also holes to be drilled in a plate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09481—Via in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to the field of PCBs, and more specifically, to a method, equipment and readable medium for designing PCB pads.
  • PCB pad design In the process of wave soldering device PCB pad design, it is usually designed according to the device pin size.
  • the diameter of the through hole of the pad is the device pin size diameter + 0.2 ⁇ 0.4mm, as shown in Figure 1.
  • the size of the surface pad is the diameter of the through hole +0.4 ⁇ 0.6mm, as shown in Figure 2.
  • the purpose of the embodiments of the present invention is to provide a method, equipment and medium for designing PCB pads.
  • the amount of tin creep in the hole can be maximized, and the top surface solder can be prevented.
  • Excessive overflow causes continuous soldering on the top surface, which can avoid problems such as insufficient tin on the wave soldering device, false soldering, and false soldering, and can also increase the current carrying capacity of the inner power supply.
  • one aspect of the embodiments of the present invention provides a method for designing PCB pads, including the following steps: using a first size drill bit to drill through the PCB board from the first side; The second side of the PCB board is back drilled to form a pyramid-shaped through hole; the connection mode of the second layer and the third layer of the inner layer of the PCB board including the pyramid-shaped through hole is set to be fully connected; and A pad of a third size is provided on the first layer of the inner layer, and a pad of a fourth size is provided on the last layer of the inner layer, wherein the fourth size is greater than the third size, and the The fourth size is larger than the second size, the second size is larger than the first size, and the third size is larger than the first size.
  • using a drill bit of the first size to drill through the PCB board from the first side includes: using a drill bit of the first size to drill through the PCB board perpendicular to the first side of the PCB board, and The first size is larger than the size of the pin of the device to be soldered.
  • using a drill of the second size to back drill on the second side of the PCB board to form a pyramid-shaped through hole includes: using a drill of the second size to back drill on the second side of the PCB board. Drill to half the thickness of the PCB board to form a pyramid-shaped through hole.
  • back-drilling the second side of the PCB board with a drill bit of the second size to form a pyramid-shaped through hole further includes: electroplating copper in the pyramid-shaped through hole.
  • the arranging a pad of a third size on the first layer of the inner layer further includes: judging whether the first layer of the inner layer of the PCB board including the pyramid-shaped through holes can be used Fully connected; and in response to the first layer of the inner layer of the PCB board including the pyramid-shaped through holes being unable to be fully connected, the first layer is set as a flower pad connection.
  • a computer device including: at least one processor; and a memory.
  • the memory stores computer instructions that can run on the processor, and the instructions are executed by the processor to implement the following steps: Use a drill bit of the first size to drill through the PCB board from the first side; use a drill bit of the second size to back drill on the second side of the PCB board to form a pyramid-shaped through hole;
  • the connection mode of the second layer and the third layer of the inner layer of the board is set to be fully connected; and a third-size pad is arranged on the first layer of the inner layer, and the last layer of the inner layer is arranged
  • a pad of a fourth size wherein the fourth size is greater than the third size, the fourth size is greater than the second size, the second size is greater than the first size, and the third The size is larger than the first size.
  • using a drill bit of the first size to drill through the PCB board from the first side includes: using a drill bit of the first size to drill through the PCB board perpendicular to the first side of the PCB board, and The first size is larger than the size of the pin of the device to be soldered.
  • using a drill of the second size to back drill on the second side of the PCB board to form a pyramid-shaped through hole includes: using a drill of the second size to back drill on the second side of the PCB board. Drill to half the thickness of the PCB board to form a pyramid-shaped through hole.
  • back-drilling the second side of the PCB board with a drill bit of the second size to form a pyramid-shaped through hole further includes: electroplating copper in the pyramid-shaped through hole.
  • a computer-readable storage medium stores a computer program that implements the steps of the above method when executed by a processor.
  • the invention has the following beneficial technical effects: by providing the pyramid-shaped through holes, the amount of creeping tin in the hole can be increased to the greatest extent, and it can prevent excessive overflow of the top surface solder from causing continuous soldering on the top surface, thereby avoiding tin on the wave soldering device Insufficient, false welding, false welding and other problems can also increase the current carrying capacity of the inner power supply.
  • Fig. 1 is a cross-sectional view of a PCB board with through-holes in the prior art
  • Fig. 2 is a top view of a PCB board with a through-hole through a pad in the prior art
  • FIG. 3 is a schematic diagram of an embodiment of a method for designing PCB pads provided by the present invention.
  • Figure 5 is a cross-sectional view of the PCB board with pads provided by the present invention.
  • FIG. 6 is a flowchart of an embodiment of a method for designing PCB pads provided by the present invention.
  • FIG. 7 is a schematic diagram of the hardware structure of an embodiment of the method for designing PCB pads provided by the present invention.
  • FIG. 3 shows a schematic diagram of an embodiment of the method for designing PCB pads provided by the present invention.
  • the embodiment of the present invention includes the following steps:
  • a pad of a third size is arranged on the first layer of the inner layer, and a pad of a fourth size is arranged on the last layer of the inner layer.
  • the fourth size is larger than the third size
  • the fourth size is larger than the second size
  • the second size is larger than the first size
  • the third size is larger than the first size
  • a drill bit of the first size is used to drill through the PCB board from the first side, and a drill bit of the second size is used to perform back drilling on the second side of the PCB board to form a pyramid-shaped through hole.
  • the first size represents the size of the top surface of the through hole
  • the second size represents the size of the bottom surface of the through hole.
  • the shape of the through hole of the pad of the PCB package of the wave soldering device is designed as a pyramid shape.
  • the first surface is the top surface of the PCB board
  • the second surface is the bottom surface of the PCB board.
  • the diameter of the bottom through hole increases, which can increase the solder climbing area for the solder to enter the through hole, thereby increasing the amount of tin in the hole; the diameter of the top through hole is reduced, It can reduce the risk of excessive tin creeping in the through hole and overflowing to the device surface.
  • using a drill bit of the first size to drill through the PCB board from the first side includes: using a drill bit of the first size to drill through the PCB board perpendicular to the first side of the PCB board, and
  • the first size is larger than the size of the pin of the device to be soldered.
  • the diameter of the top surface of the through hole can be set to the diameter of the device pin size + 0.15 to 0.2 mm.
  • using a drill of the second size to back drill on the second side of the PCB board to form a pyramid-shaped through hole includes: using a drill of the second size to back drill on the second side of the PCB board. Drilling to a position of half the thickness of the PCB board to form a pyramid-shaped through hole, and the second size is larger than the size of the pin of the device to be soldered. The size and diameter of the bottom surface of the through hole can be set to the device pin size + 0.3 ⁇ 0.5mm.
  • back-drilling the second side of the PCB board with a drill bit of the second size to form a pyramid-shaped through hole further includes: electroplating copper in the pyramid-shaped through hole.
  • Fig. 4 shows a cross-sectional view of the PCB board with through-holes provided by the present invention.
  • the size of the pin of the device to be soldered is d
  • connection mode of the second layer and the third layer of the inner layer of the PCB board including the pyramid-shaped through holes is set to be fully connected.
  • the plane layer connection method of the inner layer pad is improved.
  • the connection of the inner layer of the through hole is a flower pad connection.
  • the heat dissipation of the solder will be slower.
  • the solder will climb to the top surface As a result, the top surface solder overflows. Therefore, the inner layer connection method needs to be changed, and the second and third layers of the inner layer are changed to full connection, and the other layers are still designed with flower pads.
  • the design of the inner pad connection method can make the top surface heat dissipation as soon as possible under the condition of sufficient solder climbing, so that the solder can cool and lock the solder, and avoid excessive overflow of the solder on the top surface. At the same time, the heat dissipation on the bottom layers is slower, ensuring sufficient time to climb the tin.
  • this design method of fully connected layers on the top surface of the inner layer can increase the current-carrying capacity and avoid insufficient current-carrying.
  • a pad of a third size is arranged on the first layer of the inner layer, and a pad of a fourth size is arranged on the last layer of the inner layer.
  • the arranging a pad of a third size on the first layer of the inner layer further includes: judging whether the first layer of the inner layer of the PCB board including the pyramid-shaped through holes can be used Fully connected; and in response to the first layer of the inner layer of the PCB board including the pyramid-shaped through holes being unable to be fully connected, the first layer is set as a flower pad connection.
  • top and bottom pads are designed, and the top pad size is designed to increase the diameter of the top surface of the through hole by 0.1-0.3mm, preferably 0.2mm, and the size of the bottom pad is increased by 0.38-0.42mm according to the diameter of the bottom of the through hole, preferably Increase 0.4mm.
  • Figure 5 shows a cross-sectional view of the PCB board with pads provided by the present invention.
  • the top surface pad is reduced, which can reduce excessive tin creep in the hole, which leads to excessive tin absorption on the top surface and overflow of tin on the top surface; the increase of the bottom surface pad can increase the tin suction area, which can make Climb the tin faster in the hole.
  • FIG. 6 shows a flowchart of an embodiment of a method for designing PCB pads provided by the present invention.
  • box 102 use the first size drill bit to drill through the PCB board from the first side; then proceed to box 103, use the second size drill bit in the PCB
  • the second side of the board is back-drilled to form a pyramid-shaped through hole; then proceed to the frame 104, the connection mode of the second layer and the third layer of the inner layer of the PCB board including the pyramid-shaped through hole is set to full connection; then Proceed to block 105, set a third-size pad on the first layer of the inner layer, set a fourth-size pad on the last layer of the inner layer, and then proceed to block 106 to end.
  • the second aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory, where computer instructions that can run on the processor are stored in the memory, and the instructions are executed by the processor.
  • the following steps are implemented: S1, a drill bit of the first size is used to drill through the PCB board from the first side; S2, a drill bit of the second size is used to back-drill the second side of the PCB board to form a pyramidal through hole; S3. Set the connection mode of the second layer and the third layer of the inner layer of the PCB board including the pyramid-shaped through-holes to full connection; and S4. Set a third-size solder on the first layer of the inner layer Disk, a pad of a fourth size is arranged on the last layer of the inner layer.
  • using a drill bit of the first size to drill through the PCB board from the first side includes: using a drill bit of the first size to drill through the PCB board perpendicular to the first side of the PCB board, and The first size is larger than the size of the pin of the device to be soldered.
  • using a drill of the second size to back drill on the second side of the PCB board to form a pyramid-shaped through hole includes: using a drill of the second size to back drill on the second side of the PCB board. Drilling to a position of half the thickness of the PCB board to form a pyramid-shaped through hole, and the second size is larger than the size of the pin of the device to be soldered.
  • back-drilling the second side of the PCB board with a drill bit of the second size to form a pyramid-shaped through hole further includes: electroplating copper in the pyramid-shaped through hole.
  • the arranging a pad of a third size on the first layer of the inner layer further includes: judging whether the first layer of the inner layer of the PCB board including the pyramid-shaped through holes can be used Fully connected; and in response to the first layer of the inner layer of the PCB board including the pyramid-shaped through holes being unable to be fully connected, the first layer is set as a flower pad connection.
  • FIG. 7 it is a schematic diagram of the hardware structure of an embodiment of the above method for designing PCB pads provided by the present invention.
  • the device includes a processor 701 and a memory 702, and may also include: an input device 703 and an output device 704.
  • the processor 701, the memory 702, the input device 703, and the output device 704 may be connected by a bus or in other ways. In FIG. 7, the connection by a bus is taken as an example.
  • the memory 702 as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the method for designing PCB pads in the embodiments of the present application.
  • the processor 701 executes various functional applications and data processing of the server by running non-volatile software programs, instructions, and modules stored in the memory 702, that is, realizing the method for designing PCB pads in the foregoing method embodiment.
  • the memory 702 may include a storage program area and a storage data area.
  • the storage program area may store an operating system and an application program required by at least one function; the storage data area may store data created according to the method of designing PCB pads, etc. .
  • the memory 702 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state storage devices.
  • the memory 702 may optionally include memories remotely provided with respect to the processor 701, and these remote memories may be connected to a local module through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
  • the input device 703 can receive the input user name and password and other information.
  • the output device 704 may include a display device such as a display screen.
  • the program instructions/modules corresponding to one or more methods for designing PCB pads are stored in the memory 702, and when executed by the processor 701, the method for designing PCB pads in any of the foregoing method embodiments is executed.
  • Any embodiment of the computer device that executes the foregoing method for designing PCB pads can achieve the same or similar effects as any of the foregoing corresponding method embodiments.
  • the present invention also provides a computer-readable storage medium, and the computer-readable storage medium stores a computer program that executes the above method when executed by a processor.
  • the program of the method for designing PCB pads can be stored in a computer.
  • the program may include the procedures of the above-mentioned method embodiments.
  • the storage medium of the program can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.
  • the foregoing computer program embodiment can achieve the same or similar effects as any of the foregoing corresponding method embodiments.
  • the method disclosed according to the embodiment of the present invention may also be implemented as a computer program executed by a processor, and the computer program may be stored in a computer-readable storage medium.
  • the computer program executes the above-mentioned functions defined in the method disclosed in the embodiment of the present invention.
  • the above method steps and system units can also be implemented using a controller and a computer-readable storage medium for storing a computer program that enables the controller to implement the above steps or unit functions.
  • non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory Memory.
  • Volatile memory can include random access memory (RAM), which can act as external cache memory.
  • RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchronous link DRAM (SLDRAM) and direct Rambus RAM (DRRAM).
  • DRAM synchronous RAM
  • DRAM dynamic RAM
  • SDRAM synchronous DRAM
  • DDR SDRAM double data rate SDRAM
  • ESDRAM enhanced SDRAM
  • SLDRAM Synchronous link DRAM
  • DRRAM direct Rambus RAM
  • the storage devices of the disclosed aspects are intended to include, but are not limited to, these and other suitable types of memory.
  • DSP digital signal processors
  • ASIC application-specific integrated circuits
  • FPGA Field Programmable Gate Array
  • a general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
  • the processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP, and/or any other such configuration.
  • the steps of the method or algorithm described in combination with the disclosure herein may be directly included in hardware, a software module executed by a processor, or a combination of the two.
  • the software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor such that the processor can read information from or write information to the storage medium.
  • the storage medium may be integrated with the processor.
  • the processor and the storage medium may reside in the ASIC.
  • the ASIC can reside in the user terminal.
  • the processor and the storage medium may reside as discrete components in the user terminal.
  • functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted through the computer-readable medium.
  • Computer-readable media include computer storage media and communication media, including any media that facilitates the transfer of a computer program from one location to another location.
  • a storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer.
  • the computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or may be used to carry or store instructions in the form of Or any other medium that can be accessed by a general-purpose or special-purpose computer or general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium.
  • coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave to send software from a website, server, or other remote source
  • coaxial cable Cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are all included in the definition of media.
  • magnetic disks and optical disks include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVD), floppy disks, and Blu-ray disks. Disks usually reproduce data magnetically, while optical disks use lasers to optically reproduce data. . Combinations of the above content should also be included in the scope of computer-readable media.
  • the program can be stored in a computer-readable storage medium.
  • the storage medium can be a read-only memory, a magnetic disk or an optical disk, etc.

Abstract

一种设计PCB焊盘的方法，包括以下步骤：使用第一尺寸大小的钻头从第一面钻通PCB板（S1）；使用第二尺寸大小的钻头在PCB板的第二面进行背钻以形成棱锥形通孔（S2）；将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接（S3）；以及在内层的第一层上设置第三尺寸大小的焊盘，在内层的最后一层设置第四尺寸大小的焊盘（S4），其中，第四尺寸大于第三尺寸，第四尺寸大于第二尺寸，第二尺寸大于第一尺寸，第三尺寸大于第一尺寸。通过设置棱锥形的通孔最大程度的增加孔内的爬锡量，可以避免波峰焊器件上锡不足、虚焊、假焊等问题。

Description

一种设计PCB焊盘的方法、设备及介质
本申请要求于2019年10月31日提交中国专利局、申请号为201911049653.8、名称为“一种设计PCB焊盘的方法、设备及介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及PCB领域，更具体地，特别是指一种设计PCB焊盘的方法、设备及可读介质。
背景技术
在PCB波峰焊接过程中常出现波峰器件焊接不良等问题，该不良焊接由多种因素造成，从PCB设计角度考虑，主要是由于波峰焊器件的PCB焊盘设计不合理，从而在进行波峰焊接时，器件bottom面上锡不足，管脚通孔内爬锡不足，进而导致波峰焊器件焊接不实、虚焊、假焊等问题。
在波峰焊器件PCB焊盘设计过程中，通常按照器件管脚尺寸设计，焊盘通孔尺寸直径大小为器件管脚尺寸直径+0.2～0.4mm，如图1所示。表面焊盘大小为通孔尺寸直径+0.4～0.6mm，如图2所示。在采用此种PCB封装焊盘设计情况下，当在波峰焊接过程中，焊接条件不佳时，例如：PCB预热和焊接温度过高或者过低、PCB爬坡角度偏小等，均会造成最终的波峰焊器件焊接不良，例如：爬锡不足、焊点干瘪不完整等问题。
发明内容
有鉴于此，本发明实施例的目的在于提出一种设计PCB焊盘的方法、设备及介质，通过设置棱锥形的通孔可以最大程度的增加孔内的爬锡量，并且可以防止顶面焊锡过多溢出造成顶面连焊，进而可以避免波峰焊器件上锡不足、虚焊、假焊等问题，还可以增大内层电源载流量。
基于上述目的，本发明实施例的一方面提供了一种设计PCB焊盘的方 法，包括如下步骤：使用第一尺寸大小的钻头从第一面钻通PCB板；使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘，其中，所述第四尺寸大于所述第三尺寸，所述第四尺寸大于所述第二尺寸，所述第二尺寸大于所述第一尺寸，所述第三尺寸大于所述第一尺寸。
在一些实施方式中，所述使用第一尺寸大小的钻头从第一面钻通PCB板包括：使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔包括：使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：在所述棱锥形通孔内进行电镀上铜。
在一些实施方式中，所述在所述内层的第一层上设置第三尺寸大小的焊盘还包括：判断所述包括棱锥形通孔的PCB板的内层的第一层是否能够进行全连接；以及响应于所述包括棱锥形通孔的PCB板的内层的第一层不能进行全连接，将所述第一层设置为花焊盘连接。
本发明实施例的另一方面，还提供了一种计算机设备，包括：至少一个处理器；以及存储器，存储器存储有可在处理器上运行的计算机指令，指令由处理器执行以实现如下步骤：使用第一尺寸大小的钻头从第一面钻通PCB板；使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘，其中，所述第四尺寸大于所述第三尺寸，所述第四尺寸大于所述第二尺寸，所述第二尺寸大于所述第一尺寸，所述第三尺寸大于所述第一尺寸。
在一些实施方式中，所述使用第一尺寸大小的钻头从第一面钻通PCB 板包括：使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔包括：使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：在所述棱锥形通孔内进行电镀上铜。
本发明实施例的再一方面，还提供了一种计算机可读存储介质，计算机可读存储介质存储有被处理器执行时实现如上方法步骤的计算机程序。
本发明具有以下有益技术效果：通过设置棱锥形的通孔可以最大程度的增加孔内的爬锡量，并且可以防止顶面焊锡过多溢出造成顶面连焊，进而可以避免波峰焊器件上锡不足、虚焊、假焊等问题，还可以增大内层电源载流量。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的实施例。
图1为现有技术中带焊盘通孔的PCB板的截面图；
图2为现有技术中带焊盘通孔的PCB板的俯视图；
图3为本发明提供的设计PCB焊盘的方法的实施例的示意图；
图4为本发明提供的带焊盘通孔的PCB板的截面图；
图5为本发明提供的带焊盘的PCB板的截面图；
图6为本发明提供的设计PCB焊盘的方法的实施例的流程图；
图7为本发明提供的设计PCB焊盘的方法的实施例的硬件结构示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本发明实施例进一步详细说明。
需要说明的是，本发明实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量，可见“第一”“第二”仅为了表述的方便，不应理解为对本发明实施例的限定，后续实施例对此不再一一说明。
基于上述目的，本发明实施例的第一个方面，提出了一种设计PCB焊盘的方法的实施例。图3示出的是本发明提供的设计PCB焊盘的方法的实施例的示意图。如图3所示，本发明实施例包括如下步骤：
S1、使用第一尺寸大小的钻头从第一面钻通PCB板；
S2、使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；
S3、将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及
S4、在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘。
其中，所述第四尺寸大于所述第三尺寸，所述第四尺寸大于所述第二尺寸，所述第二尺寸大于所述第一尺寸，所述第三尺寸大于所述第一尺寸。
使用第一尺寸大小的钻头从第一面钻通PCB板，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔。第一尺寸大小表示通孔顶面尺寸大小，第二尺寸大小表示通孔底面尺寸大小。将波峰焊器件PCB封装的焊盘通孔形状设计为棱锥形，本实施例中的第一面为PCB板的顶面，第二面为PCB板的底面。先采用通孔顶面尺寸大小的钻头钻通PCB板，然后采用通孔底面尺寸大小的钻头在PCB底面进行背钻，通孔顶面尺寸小于通孔底面尺寸。此焊盘通孔设计方式对波峰焊的优点为：底面通孔直径增大，可以增大焊锡进入通孔的爬锡面积，从而增大孔内上锡量；顶面通孔直径减小，可以降低通孔内爬锡过多，溢出到器件面的风险。
在一些实施方式中，所述使用第一尺寸大小的钻头从第一面钻通PCB 板包括：使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。例如，通孔顶面尺寸直径大小可以设置为器件管脚尺寸直径+0.15～0.2mm。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔包括：使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔，所述第二尺寸大于待焊接器件管脚的尺寸。通孔底面尺寸直径大小可以设置为器件管脚尺寸直径+0.3～0.5mm。在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：在所述棱锥形通孔内进行电镀上铜。
图4示出的是本发明提供的带焊盘通孔的PCB板的截面图。如图4所示，待焊接器件管脚的尺寸为d，第一尺寸大小Dt＝d+0.15～0.2mm，第二尺寸大小Db＝d+0.3～0.5mm，很显然，第二尺寸大小大于第一尺寸大小。
将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接。在上述设计管脚通孔的基础上，改进内层焊盘的平面层连接方式。通常通孔内层的连接为花焊盘连接，此连接方式下，会使焊锡散热较慢，在通孔内上锡量较大且上锡过快的情况下，会使焊锡爬上顶面从而造成顶面焊锡溢出。因此需更改内层连接方式，将内层的第2、3层改为全连接，其它层仍做花焊盘设计。此内层焊盘连接方式的设计，可以在爬锡足量的情况下，使顶面几层尽快散热，使焊锡冷却锁住焊锡，避免焊锡在顶面溢出过多。同时在底面几层散热较慢，保证拥有充足的爬锡时间。另外，若管脚为电源管脚，且所需大载流时，此种内层顶面几层全连接的设计方式，可以增大电流载流量，避免载流不足。
在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘。在一些实施方式中，所述在所述内层的第一层上设置第三尺寸大小的焊盘还包括：判断所述包括棱锥形通孔的PCB板的内层的第一层是否能够进行全连接；以及响应于所述包括棱锥形通孔的PCB板的内层的第一层不能进行全连接，将所述第一层设置为花焊盘连接。最后设计顶底面焊盘，将顶面焊盘尺寸设计按照通孔顶面尺寸直径增 加0.1～0.3mm，优选增加0.2mm，将底面焊盘尺寸按照通孔底面尺寸直径增加0.38～0.42mm，优选增加0.4mm。
图5示出的是本发明提供的带焊盘的PCB板的截面图。如图5所示，第三尺寸大小Pt＝Dt+0.1mm，第四尺寸大小Pb＝Db+0.4mm。此设计方式，顶面焊盘缩小，可以减少孔内爬锡过多，导致顶面吸锡过多而导致顶面上锡溢出；底面焊盘增大，可以增大吸锡面积，从而可以使孔内更快的爬锡。
图6示出的是本发明提供的设计PCB焊盘的方法的实施例的流程图。如图6所示，从框101开始，接着前进到框102，使用第一尺寸大小的钻头从第一面钻通PCB板；接着前进到框103，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；接着前进到框104，将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；接着前进到框105，在内层的第一层上设置第三尺寸大小的焊盘，在内层的最后一层设置第四尺寸大小的焊盘，然后前进到框106结束。
需要特别指出的是，上述设计PCB焊盘的方法的各个实施例中的各个步骤均可以相互交叉、替换、增加、删减，因此，这些合理的排列组合变换之于设计PCB焊盘的方法也应当属于本发明的保护范围，并且不应将本发明的保护范围局限在实施例之上。
基于上述目的，本发明实施例的第二个方面，提出了一种计算机设备，包括：至少一个处理器；以及存储器，存储器存储有可在处理器上运行的计算机指令，指令由处理器执行以实现如下步骤：S1、使用第一尺寸大小的钻头从第一面钻通PCB板；S2、使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；S3、将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及S4、在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘。
在一些实施方式中，所述使用第一尺寸大小的钻头从第一面钻通PCB板包括：使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面 进行背钻以形成棱锥形通孔包括：使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔，所述第二尺寸大于待焊接器件管脚的尺寸。
在一些实施方式中，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：在所述棱锥形通孔内进行电镀上铜。
在一些实施方式中，所述在所述内层的第一层上设置第三尺寸大小的焊盘还包括：判断所述包括棱锥形通孔的PCB板的内层的第一层是否能够进行全连接；以及响应于所述包括棱锥形通孔的PCB板的内层的第一层不能进行全连接，将所述第一层设置为花焊盘连接。
如图7所示，为本发明提供的上述设计PCB焊盘的方法的一个实施例的硬件结构示意图。
以如图7所示的装置为例，在该装置中包括一个处理器701以及一个存储器702，并还可以包括：输入装置703和输出装置704。
处理器701、存储器702、输入装置703和输出装置704可以通过总线或者其他方式连接，图7中以通过总线连接为例。
存储器702作为一种非易失性计算机可读存储介质，可用于存储非易失性软件程序、非易失性计算机可执行程序以及模块，如本申请实施例中的设计PCB焊盘的方法对应的程序指令/模块。处理器701通过运行存储在存储器702中的非易失性软件程序、指令以及模块，从而执行服务器的各种功能应用以及数据处理，即实现上述方法实施例的设计PCB焊盘的方法。
存储器702可以包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需要的应用程序；存储数据区可存储根据设计PCB焊盘的方法的使用所创建的数据等。此外，存储器702可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中，存储器702可选包括相对于处理器701远程设置的存储器，这些远程存储器可以通过网络连接至本地模块。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
输入装置703可接收输入的用户名和密码等信息。输出装置704可包括显示屏等显示设备。
一个或者多个设计PCB焊盘的方法对应的程序指令/模块存储在存储器702中，当被处理器701执行时，执行上述任意方法实施例中的设计PCB焊盘的方法。
执行上述设计PCB焊盘的方法的计算机设备的任何一个实施例，可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
本发明还提供了一种计算机可读存储介质，计算机可读存储介质存储有被处理器执行时执行如上方法的计算机程序。
最后需要说明的是，本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，可以通过计算机程序来指令相关硬件来完成，设计PCB焊盘的方法的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，程序的存储介质可为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。上述计算机程序的实施例，可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
此外，根据本发明实施例公开的方法还可以被实现为由处理器执行的计算机程序，该计算机程序可以存储在计算机可读存储介质中。在该计算机程序被处理器执行时，执行本发明实施例公开的方法中限定的上述功能。
此外，上述方法步骤以及系统单元也可以利用控制器以及用于存储使得控制器实现上述步骤或单元功能的计算机程序的计算机可读存储介质实现。
此外，应该明白的是，本文的计算机可读存储介质(例如，存储器)可以是易失性存储器或非易失性存储器，或者可以包括易失性存储器和非易失性存储器两者。作为例子而非限制性的，非易失性存储器可以包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦写可编程ROM(EEPROM)或快闪存储器。易失性存储器可以包括随机存取存储器(RAM)，该RAM可以充当外部高速缓存存储器。作为例子而非限制性的，RAM可以以多种形式获得，比如同步RAM(DRAM)、 动态RAM(DRAM)、同步DRAM(SDRAM)、双数据速率SDRAM(DDR SDRAM)、增强SDRAM(ESDRAM)、同步链路DRAM(SLDRAM)、以及直接Rambus RAM(DRRAM)。所公开的方面的存储设备意在包括但不限于这些和其它合适类型的存储器。
本领域技术人员还将明白的是，结合这里的公开所描述的各种示例性逻辑块、模块、电路和算法步骤可以被实现为电子硬件、计算机软件或两者的组合。为了清楚地说明硬件和软件的这种可互换性，已经就各种示意性组件、方块、模块、电路和步骤的功能对其进行了一般性的描述。这种功能是被实现为软件还是被实现为硬件取决于具体应用以及施加给整个系统的设计约束。本领域技术人员可以针对每种具体应用以各种方式来实现的功能，但是这种实现决定不应被解释为导致脱离本发明实施例公开的范围。
结合这里的公开所描述的各种示例性逻辑块、模块和电路可以利用被设计成用于执行这里功能的下列部件来实现或执行：通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或其它可编程逻辑器件、分立门或晶体管逻辑、分立的硬件组件或者这些部件的任何组合。通用处理器可以是微处理器，但是可替换地，处理器可以是任何传统处理器、控制器、微控制器或状态机。处理器也可以被实现为计算设备的组合，例如，DSP和微处理器的组合、多个微处理器、一个或多个微处理器结合DSP和/或任何其它这种配置。
结合这里的公开所描述的方法或算法的步骤可以直接包含在硬件中、由处理器执行的软件模块中或这两者的组合中。软件模块可以驻留在RAM存储器、快闪存储器、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动盘、CD-ROM、或本领域已知的任何其它形式的存储介质中。示例性的存储介质被耦合到处理器，使得处理器能够从该存储介质中读取信息或向该存储介质写入信息。在一个替换方案中，存储介质可以与处理器集成在一起。处理器和存储介质可以驻留在ASIC中。ASIC可以驻留在用户终端中。在一个替换方案中，处理器和存储介质可以作为分立组件驻留在用户终端中。
在一个或多个示例性设计中，功能可以在硬件、软件、固件或其任意组合中实现。如果在软件中实现，则可以将功能作为一个或多个指令或代码存储在计算机可读介质上或通过计算机可读介质来传送。计算机可读介质包括计算机存储介质和通信介质，该通信介质包括有助于将计算机程序从一个位置传送到另一个位置的任何介质。存储介质可以是能够被通用或专用计算机访问的任何可用介质。作为例子而非限制性的，该计算机可读介质可以包括RAM、ROM、EEPROM、CD-ROM或其它光盘存储设备、磁盘存储设备或其它磁性存储设备，或者是可以用于携带或存储形式为指令或数据结构的所需程序代码并且能够被通用或专用计算机或者通用或专用处理器访问的任何其它介质。此外，任何连接都可以适当地称为计算机可读介质。例如，如果使用同轴线缆、光纤线缆、双绞线、数字用户线路(DSL)或诸如红外线、无线电和微波的无线技术来从网站、服务器或其它远程源发送软件，则上述同轴线缆、光纤线缆、双绞线、DSL或诸如红外线、无线电和微波的无线技术均包括在介质的定义。如这里所使用的，磁盘和光盘包括压缩盘(CD)、激光盘、光盘、数字多功能盘(DVD)、软盘、蓝光盘，其中磁盘通常磁性地再现数据，而光盘利用激光光学地再现数据。上述内容的组合也应当包括在计算机可读介质的范围内。
以上是本发明公开的示例性实施例，但是应当注意，在不背离权利要求限定的本发明实施例公开的范围的前提下，可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以任何特定顺序执行。此外，尽管本发明实施例公开的元素可以以个体形式描述或要求，但除非明确限制为单数，也可以理解为多个。
应当理解的是，在本文中使用的，除非上下文清楚地支持例外情况，单数形式“一个”旨在也包括复数形式。还应当理解的是，在本文中使用的“和/或”是指包括一个或者一个以上相关联地列出的项目的任意和所有可能组合。
上述本发明实施例公开实施例序号仅仅为了描述，不代表实施例的优劣。
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以 通过硬件来完成，也可以通过程序来指令相关的硬件完成，程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
所属领域的普通技术人员应当理解：以上任何实施例的讨论仅为示例性的，并非旨在暗示本发明实施例公开的范围(包括权利要求)被限于这些例子；在本发明实施例的思路下，以上实施例或者不同实施例中的技术特征之间也可以进行组合，并存在如上的本发明实施例的不同方面的许多其它变化，为了简明它们没有在细节中提供。因此，凡在本发明实施例的精神和原则之内，所做的任何省略、修改、等同替换、改进等，均应包含在本发明实施例的保护范围之内。

Claims (10)

  1. 一种设计PCB焊盘的方法，其特征在于，包括以下步骤：
    使用第一尺寸大小的钻头从第一面钻通PCB板；
    使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；
    将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及
    在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘，
    其中，所述第四尺寸大于所述第三尺寸，所述第四尺寸大于所述第二尺寸，所述第二尺寸大于所述第一尺寸，所述第三尺寸大于所述第一尺寸。
  2. 根据权利要求1所述的方法，其特征在于，所述使用第一尺寸大小的钻头从第一面钻通PCB板包括：
    使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。
  3. 根据权利要求2所述的方法，其特征在于，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔包括：
    使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔。
  4. 根据权利要求3所述的方法，其特征在于，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：
    在所述棱锥形通孔内进行电镀上铜。
  5. 根据权利要求1所述的方法，其特征在于，所述在所述内层的第一层上设置第三尺寸大小的焊盘还包括：
    判断所述包括棱锥形通孔的PCB板的内层的第一层是否能够进行全连接；以及
    响应于所述包括棱锥形通孔的PCB板的内层的第一层不能进行全连接，将所述第一层设置为花焊盘连接。
  6. 一种计算机设备，其特征在于，包括：
    至少一个处理器；以及
    存储器，所述存储器存储有可在所述处理器上运行的计算机指令，所述指令由所述处理器执行时实现以下步骤：
    使用第一尺寸大小的钻头从第一面钻通PCB板；
    使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔；
    将包括棱锥形通孔的PCB板的内层的第二层以及第三层的连接方式设置为全连接；以及
    在所述内层的第一层上设置第三尺寸大小的焊盘，在所述内层的最后一层设置第四尺寸大小的焊盘，
    其中，所述第四尺寸大于所述第三尺寸，所述第四尺寸大于所述第二尺寸，所述第二尺寸大于所述第一尺寸，所述第三尺寸大于所述第一尺寸。
  7. 根据权利要求6所述的计算机设备，其特征在于，所述使用第一尺寸大小的钻头从第一面钻通PCB板包括：
    使用第一尺寸大小的钻头垂直所述PCB板的第一面钻通所述PCB板，所述第一尺寸大于待焊接器件管脚的尺寸。
  8. 根据权利要求7所述的计算机设备，其特征在于，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔包括：
    使用第二尺寸大小的钻头在所述PCB板的第二面背钻到所述PCB板厚度的一半位置以形成棱锥形通孔。
  9. 根据权利要求8所述的计算机设备，其特征在于，使用第二尺寸大小的钻头在所述PCB板的第二面进行背钻以形成棱锥形通孔还包括：
    在所述棱锥形通孔内进行电镀上铜。
  10. 一种计算机可读存储介质，所述计算机可读存储介质存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1-5任意一项所述方法的步骤。
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CN110996513B (zh) * 2019-10-31 2021-02-02 苏州浪潮智能科技有限公司 一种设计pcb焊盘的方法、设备及介质
CN111836467A (zh) * 2020-07-16 2020-10-27 苏州浪潮智能科技有限公司 一种pcb及其波峰焊良率改善焊盘结构
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6646886B1 (en) * 2002-04-12 2003-11-11 Cisco Technology, Inc. Power connection structure
CN102291947A (zh) * 2011-07-29 2011-12-21 杭州华三通信技术有限公司 Pcb板上阶梯结构处通孔焊盘的制作方法以及pcb板
CN103889147A (zh) * 2014-04-04 2014-06-25 杭州华三通信技术有限公司 Pcb阶梯板的加工方法及pcb阶梯板
CN104270903A (zh) * 2014-10-13 2015-01-07 浪潮(北京)电子信息产业有限公司 一种实现pcb上锡的方法和装置
CN110996513A (zh) * 2019-10-31 2020-04-10 苏州浪潮智能科技有限公司 一种设计pcb焊盘的方法、设备及介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009195938A (ja) * 2008-02-21 2009-09-03 Mitsuo Ebisawa 半田鏝、それを用いて電子機器を製造する方法
CN101925253A (zh) * 2009-06-17 2010-12-22 鸿富锦精密工业（深圳）有限公司 印刷电路板及其钻孔方法
CN102186312B (zh) * 2011-04-29 2013-04-17 摩比天线技术（深圳）有限公司 一种印刷电路板的通孔回流焊接方法和模板
JP2015225960A (ja) * 2014-05-28 2015-12-14 富士通株式会社 プリント基板、電子装置およびプリント基板の製造方法
CN107027238B (zh) * 2016-01-29 2020-08-18 奥特斯(中国)有限公司 包括铜填充多径激光钻孔的元件载体
US20170231099A1 (en) * 2016-02-05 2017-08-10 Dell Products, Lp Electrical Breaks in PCB Vias
CN206620355U (zh) * 2016-12-28 2017-11-07 液化空气（中国）研发有限公司 一种波峰焊的印刷电路板
CN207802535U (zh) * 2017-12-26 2018-08-31 深圳市富盛电子有限公司 防止焊接元件脱落的柔性线路板
US20200053882A1 (en) * 2018-08-10 2020-02-13 Arista Networks, Inc. Network devices and network elements with belly to belly small format pluggable modules

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6646886B1 (en) * 2002-04-12 2003-11-11 Cisco Technology, Inc. Power connection structure
CN102291947A (zh) * 2011-07-29 2011-12-21 杭州华三通信技术有限公司 Pcb板上阶梯结构处通孔焊盘的制作方法以及pcb板
CN103889147A (zh) * 2014-04-04 2014-06-25 杭州华三通信技术有限公司 Pcb阶梯板的加工方法及pcb阶梯板
CN104270903A (zh) * 2014-10-13 2015-01-07 浪潮(北京)电子信息产业有限公司 一种实现pcb上锡的方法和装置
CN110996513A (zh) * 2019-10-31 2020-04-10 苏州浪潮智能科技有限公司 一种设计pcb焊盘的方法、设备及介质

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