WO2021056948A1 - 一种阵列基板、oled显示面板、掩膜板 - Google Patents

一种阵列基板、oled显示面板、掩膜板 Download PDF

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Publication number
WO2021056948A1
WO2021056948A1 PCT/CN2020/074855 CN2020074855W WO2021056948A1 WO 2021056948 A1 WO2021056948 A1 WO 2021056948A1 CN 2020074855 W CN2020074855 W CN 2020074855W WO 2021056948 A1 WO2021056948 A1 WO 2021056948A1
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WO
WIPO (PCT)
Prior art keywords
film
area
array substrate
layer
forming area
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Application number
PCT/CN2020/074855
Other languages
English (en)
French (fr)
Inventor
张兴永
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/768,693 priority Critical patent/US11469397B2/en
Publication of WO2021056948A1 publication Critical patent/WO2021056948A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/88—Dummy elements, i.e. elements having non-functional features
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C23C16/042—Coating on selected surface areas, e.g. using masks using masks

Definitions

  • This application relates to the field of display technology, in particular to an array substrate, an OLED display panel, and a mask.
  • AMOLED active matrix organic light-emitting diodes
  • the encapsulated inorganic film is prepared by the chemical vapor deposition (CVD) method.
  • This method must be assisted by a mask to pattern the film.
  • the shadow effect. (Shadow effect).
  • the so-called shadow is due to the existence of a certain gap between the mask and the substrate during film formation.
  • the plasma will enter the non-opening area at the edge of the mask to form a film.
  • the film in this area is thinner than the normal film formation area and extends the distance. Long, there will be certain risks in the cutting and reliability verification of subsequent devices.
  • the shadow effect in the CVD film forming process cannot be avoided in the industry.
  • the present application provides an array substrate, an OLED display panel, and a mask, which can solve the adverse effects of the film layer located in the shadow area on the film layer of the preset film formation area, and solve the shadow effect generated in the CVD process .
  • An array substrate provided by the present application includes a preset film-forming area and a non-film-forming area surrounding the preset film-forming area.
  • the non-film-forming area includes a shadow area, and the shadow area surrounds and is adjacent to the Preset film forming area;
  • the actual film formation area of the film layer to be prepared on the array substrate includes the preset film formation area and the shadow area;
  • the array substrate is provided with grooves or protrusions corresponding to the shaded area, so that the film layer is disconnected at the positions corresponding to the grooves or the protrusions.
  • the array substrate is provided with a retaining wall in the preset film-forming area, at least one of the retaining walls is arranged in a ring shape near the non-film-forming area, and at least one The groove or the protrusion is arranged around the preset film forming area.
  • the distance between the retaining wall and the groove or the protrusion is the distance between the boundary of the film layer corresponding to the preset film formation area and the retaining wall.
  • the cross-sectional width at the opening of the groove is smaller than the cross-sectional width of the bottom of the groove, and the side wall of the groove is a curved surface or an inclined surface set at a preset angle.
  • the cross-sectional width of the top of the protrusion is greater than the cross-sectional width of the bottom of the protrusion, and the sidewall of the protrusion is a curved surface or an inclined surface set at a preset angle.
  • the array substrate is provided with signal traces at intervals corresponding to the shaded area, the grooves are arranged to avoid the signal traces, or the bumps correspond to the Signal routing settings.
  • the present application also provides an OLED display panel, which includes the above-mentioned array substrate, an organic light emitting layer and a thin film packaging layer;
  • the array substrate is provided with a pixel opening area corresponding to the predetermined film-forming area, and the organic light-emitting layer is provided corresponding to the pixel opening area;
  • the thin-film encapsulation layer is disposed on the surface of the organic light-emitting layer, and the thin-film encapsulation layer includes an inorganic film layer and an organic film layer that are stacked, and the organic film layer is wrapped between two adjacent inorganic film layers. between;
  • the organic film layer is correspondingly located in the predetermined film formation area, and the inorganic film layer extends from the predetermined film formation area to one side of the shaded area;
  • the grooves or the protrusions provided on the array substrate corresponding to the shaded regions cause the inorganic film layer to form a step, and the inorganic film layer is positioned at a position corresponding to the grooves or the protrusions.
  • the edges are broken to form the thin film encapsulation layer corresponding to the predetermined film forming area.
  • the present application also provides a mask, which is applied to the preparation of an OLED display panel.
  • the mask includes a shielding portion and an opening.
  • the OLED display panel includes a preset film forming area and a surrounding area. The non-film-forming area of the preset film-forming area;
  • the opening portion of the mask plate corresponds to the preset film forming area
  • the shielding portion corresponds to the non-film forming area, and is used to form a preset film forming area on the OLED display panel corresponding to the preset film forming area.
  • the edge portion of the shielding portion close to the opening is arranged on a side surface of the OLED display panel facing the OLED display panel in an inclined or curved surface, so that the portion of the shielding portion adjacent to the opening is between and the OLED display panel.
  • the distance between the two is smaller than the distance between the rest of the shielding portion and the OLED display panel.
  • the mask is used to form a thin-film encapsulation layer in the preset film-forming area, and the shielding part is close to the edge of the opening to the edge of the OLED display panel.
  • One side is arranged on an inclined surface, and the thickness of the edge portion of the shielding portion is greater than the thickness of the remaining portions.
  • the beneficial effect of the present application is: compared with the existing display panel, the array substrate, OLED display panel, and mask provided by the present application are prepared in the array substrate by arranging grooves or protrusions in the corresponding shadow area of the array substrate.
  • the film layer on the substrate is broken at the corresponding grooves or protrusions to form a discontinuous film, thereby preventing the film layer located in the shadow area from causing an adverse effect on the film layer in the predetermined film forming area.
  • the present application also processes the edge of the opening of the mask to achieve the purpose of reducing the area of the shadow area, thereby facilitating the design of the narrow frame of the display panel and reducing the influence of the shadow effect.
  • FIG. 1 is a top view of an array substrate provided by an embodiment of the application
  • FIG. 2 is a schematic diagram of a partial structure of a display panel provided in Embodiment 1 of the application;
  • FIG. 3 is a schematic diagram of the position of the groove of the display panel provided in the first embodiment of the application.
  • FIG. 4 is a schematic diagram of a partial structure of a display panel provided in the second embodiment of the application.
  • FIG. 5 is a schematic structural diagram of a mask provided by an embodiment of the application.
  • This application is aimed at the existing display panel. Since the current film formation by the chemical vapor deposition (CVD) method requires the assistance of a photomask to pattern the film layer, there is an unavoidable problem in the use of the photomask, namely, shadowing. Effect effect).
  • the so-called shadow is due to the existence of a certain gap between the photomask and the substrate during film formation. Plasma will enter the non-opening area at the edge of the photomask to form a film. The film in this area is thinner than the normal film formation area and extends The long distance will bring certain risks to the cutting and reliability verification of subsequent devices, and it is not conducive to the design of narrow bezels.
  • the array substrate 100 includes: a predetermined film-forming area A and a non-film-forming area B surrounding the predetermined film-forming area A, the non-film-forming area B includes a shadow area C, and the shadow area C surrounds and Adjacent to the preset film-forming area A; the actual film-forming area of the film layer to be prepared on the array substrate 100 includes the preset film-forming area A and the shaded area C; wherein, the array substrate 100 A groove or protrusion surrounding the preset film forming area A is provided in the corresponding shadow area C, so that the portion of the film layer corresponding to the preset film forming area A and the portion corresponding to the shadow area C A step is partially formed, that is, the film layer is broken at a position corresponding to the groove or the protrusion, thereby forming a discontinuous thin film.
  • the film layer is a thin-film encapsulation layer as an example, but it is not limited to this.
  • the following uses display panels formed by array substrates provided in different embodiments of the present application as examples for description.
  • FIG. 2 it is a schematic diagram of a partial structure of a display panel provided in Embodiment 1 of the present application.
  • the display panel includes the array substrate 100 and an organic light emitting device and a thin film encapsulation layer 200.
  • the array substrate 100 includes, but is not limited to, a base substrate 101, an interlayer insulating layer 102, a source and drain metal layer 103, a passivation layer 104, and a pixel definition layer 105 that are stacked in sequence.
  • the base substrate 101 includes, but is not limited to, a substrate, and a buffer layer, an active layer, a gate insulating layer, and a gate are sequentially prepared on the substrate;
  • the source/drain metal layer 103 includes source/drain electrodes and spacers.
  • the organic light-emitting device is arranged corresponding to the pixel opening area defined by the pixel defining layer 105, and includes an anode 301, an organic light-emitting layer 302, and a cathode (not shown) that are stacked.
  • the active layer, the gate, and the source/drain form a thin film transistor
  • the thin film transistor and the organic light-emitting device are correspondingly disposed in the predetermined film formation area A
  • the signal The wiring 103' is correspondingly arranged in the non-film forming area B.
  • the thin film encapsulation layer 200 is disposed on the surface of the organic light-emitting device, and the thin film encapsulation layer 200 includes an inorganic film layer and an organic film layer that are stacked, and the organic film layer is wrapped around two adjacent inorganic films. Between layers.
  • the thin film encapsulation layer 200 includes a first inorganic film layer 201, a second inorganic film layer 203, and an organic film layer 202 located between the first inorganic film layer 201 and the second inorganic film layer 203.
  • the organic film layer 202 is correspondingly located in the predetermined film formation area A, and the first inorganic film layer 201 and the second inorganic film layer 203 extend from the predetermined film formation area A to the shadow area C Extend on one side.
  • the array substrate 100 is provided with a retaining wall 400 in the predetermined film forming area A, and at least one of the retaining walls 400 is arranged in a ring shape at a position close to the non-film forming area B.
  • the retaining wall 400 includes but is not limited to one or more of the passivation layer 104 and the pixel definition layer 105 and is formed by patterning.
  • the organic film layer 202 is blocked by the retaining wall 400 in the predetermined film formation area A. Since the mask used for vapor deposition of the inorganic film layer has a shadow effect, the first inorganic film The layer 201 and the second inorganic film layer 203 extend from the predetermined film forming area A to the shadow area C.
  • a groove 500 is provided in the array substrate 100 corresponding to the shaded area C, and at least one of the grooves 500 is provided around the preset film-forming area A, so that the thin film encapsulation layer 200 is Corresponding to the break of the groove 500, a discontinuous thin film is formed, that is, the portion of the thin film encapsulation layer 200 corresponding to the predetermined film forming area A and the portion corresponding to the shadow area C are independent of each other.
  • the distance d1 between the retaining wall 400 and the groove 500 is the distance between the boundary of the thin film encapsulation layer 200 corresponding to the predetermined film forming area A and the retaining wall 400.
  • the first inorganic film layer 201 and the second inorganic film layer 203 located in the groove 500 and the first inorganic film layer 201 and the second inorganic film layer located in the remaining parts There is a step difference in the stack of 203, so that the thin film encapsulation layer 200 is disconnected at the edge of the groove 500.
  • the depth of the groove 500 is greater than the thickness of the stack formed by the first inorganic film layer 201 and the second inorganic film layer 203, so as to ensure the formation of a discontinuous film.
  • the depth of the groove 500 is 300 nm Between -500nm.
  • the cross-sectional width at the opening of the groove 500 is smaller than the cross-sectional width of the bottom of the groove 500, and the side wall of the groove 500 is a curved surface or an inclined surface set at a predetermined angle.
  • the inclination angle of the inclined surface can be designed according to the actual manufacturing process. This design can ensure that the inorganic film layer in the groove 500 can be completely disconnected from the inorganic film layer in other parts.
  • the cross-section of the groove 500 The shape can be a regular trapezoid, or other regular or irregular polygons, and there is no restriction here.
  • a' ⁇ e' in FIG. 3 it is a schematic diagram of the position of the groove of the display panel provided in the first embodiment of the present application.
  • the position and number of the groove 500 may also be different.
  • the groove 500 is arranged at the gap position between the two adjacent signal traces 103', or the shaded area The position of C avoids the arrangement area of the signal wiring 103', and the groove 500 is arranged adjacent to the preset film formation area.
  • the grooves 500 can be arranged in multiple and spaced apart in the shaded area C.
  • FIG. 4 it is a schematic diagram of a partial structure of the display panel provided in the second embodiment of the present application.
  • this embodiment does not provide the grooves, but provides protrusions 600 in the shadow area C corresponding to the array substrate 100, and at least one The protrusion 600 is arranged around the preset film forming area A, so that the thin film encapsulation layer 200 is broken at the position corresponding to the protrusion 600 to form a discontinuous thin film, that is, the thin film encapsulation layer 200 corresponds to the preset
  • the portion of the film formation area A and the portion corresponding to the shaded area C are independent of each other.
  • the distance d2 between the retaining wall 400 and the protrusion 600 is the distance between the boundary of the thin film encapsulation layer 200 corresponding to the predetermined film forming area A and the retaining wall 400.
  • the shaded area C corresponding to the stack of the first inorganic film layer 201 and the second inorganic film layer 203 on the protrusion 600 and the first inorganic film layer 201 on the remaining part And there is a step difference in the stack of the second inorganic film layer 203, so that the thin film encapsulation layer 200 is disconnected at the edge of the protrusion 600.
  • the thickness of the protrusion 600 is greater than the thickness of the stack formed by the first inorganic film layer 201 and the second inorganic film layer 203, so as to ensure the formation of a discontinuous film.
  • the cross-sectional width of the top of the protrusion 600 is greater than the cross-sectional width of the bottom of the protrusion 600, and the side wall of the protrusion 600 is a curved surface or an inclined surface set at a predetermined angle.
  • the inclination angle of the inclined plane can be designed according to the actual manufacturing process. This design can ensure that the inorganic film layer on the protrusion 600 can be completely disconnected from the inorganic film layer in other parts.
  • the cross-section of the protrusion 600 The shape can be an inverted trapezoid, or other regular or irregular polygons, and there is no restriction here.
  • the bump 600 is arranged corresponding to the signal wiring 103', so the terrain formed by the signal wiring 103', that is, a climbing slope is formed at the position corresponding to the signal wiring 103', It can be further ensured that the inorganic film layer is disconnected at the protrusion 600.
  • the bump 600 includes, but is not limited to, one or more of the interlayer insulating layer 102, the source and drain metal layer 103, the passivation layer 104, and the pixel definition layer 105, and Formed after etching.
  • the position and number of the protrusions 600 may also be different. The details are similar to the design of the groove described in the foregoing embodiment, and will not be repeated here.
  • the film structure of the other parts of the display panel in this embodiment is the same as the film structure of the display panel in the first embodiment, and will not be repeated here.
  • the present application also provides a mask, which is applied to the preparation of an OLED display panel.
  • the mask is applied to the preparation of the inorganic film layer of the thin film encapsulation layer, but it is not limited thereto.
  • the mask 11 includes a shielding portion 112 and an opening 111
  • the OLED display panel 10 includes a preset film forming area A and a non-film forming area B surrounding the preset film forming area A.
  • the opening 111 of the mask 11 corresponds to the preset film forming area A
  • the shielding portion 112 corresponds to the non-film forming area B for the OLED display panel 10 corresponding to the preset
  • the film area A is set to form the thin film encapsulation layer in a predetermined pattern.
  • a target 12 is provided above the mask 11. The target 12 is used to eject the inorganic material 13, and the inorganic material 13 is formed on the surface of the OLED display panel 10 through the opening 111.
  • the side surface of the shielding portion 112 near the opening 111 facing the OLED display panel 10 is inclined or curved, so that the shielding portion 112 is adjacent to the portion of the opening 111 and the surface.
  • the distance between the OLED display panel 10 is smaller than the distance between the remaining part of the shielding portion 112 and the OLED display panel 10.
  • the side surface of the shielding portion 112 away from the OLED display panel 10 is located on the same horizontal plane. In the position of the area 113 in the figure, the shielding portion 112 is close to the surface of the OLED display panel 10.
  • One side surface is inclined or curved.
  • the mask 11 is used to form a thin film encapsulation layer in the preset film forming area A, and the shielding portion 112 is close to the edge of the opening 111 toward the OLED display panel.
  • One side of 10 is inclined, as shown in area 113 in the figure, and the thickness of the edge portion of the shielding portion 112 is greater than the thickness of the remaining portions.
  • the edge of the shielding portion 112 of the mask 11 can be closer to the OLED display panel 10, compared to traditional masks,
  • the present application can further reduce the distance between the mask 11 and the OLED display panel 10, that is, it can further reduce the entry of the inorganic material 13 from the preset film-forming area A into the non- The channel of the film forming area B achieves the purpose of reducing the shadow area C, thereby facilitating the narrow frame design of the display panel and reducing the influence of the shadow effect.
  • the array substrate, OLED display panel, and mask provided by the present application are provided with grooves or protrusions in the corresponding shadow areas of the array substrate, so that the film layer prepared on the array substrate is in the corresponding grooves or protrusions.
  • the starting point is disconnected to form a discontinuous film, thereby preventing the film layer located in the shadow area from causing an adverse effect on the film layer in the predetermined film forming area.
  • the present application also processes the edge of the opening of the mask to achieve the purpose of reducing the area of the shadow area, thereby facilitating the design of the narrow frame of the display panel and reducing the influence of the shadow effect.

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Abstract

本申请提供一种阵列基板、OLED显示面板、掩膜板，阵列基板包括预设成膜区域和非成膜区域，非成膜区域内紧邻预设成膜区域设有阴影区域；待制备于阵列基板上的膜层的实际成膜区域包括预设成膜区域和阴影区域，在阵列基板对应阴影区域内设置凹槽或凸起，使得制备于阵列基板上的膜层在对应凹槽或凸起处断开，形成不连续薄膜。

Description

一种阵列基板、OLED显示面板、掩膜板
本申请要求于2019年9月29日提交中国专利局、申请号为201910934726.5、发明名称为“一种阵列基板、OLED显示面板、掩膜板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板、OLED显示面板、掩膜板。
 背景技术
与传统的液晶显示器相比，有源矩阵有机发光二极管（AMOLED）具有高对比度、广视角、高色域以及高分辨率等优点。随着OLED应用领域的拓展，新的应用领域对OLED器件的要求会越来越高，尤其是对封装无机膜的要求越来越高。
目前封装无机膜是通过化学气相沉积（CVD）的方法制备，该方法必须通过掩膜板（Mask）进行辅助才能对膜层进行图案化，但是Mask的使用存在一个无法避免的问题，即阴影效应（Shadow effect）。所谓的阴影是由于在成膜时Mask和基板间存在一定间隙，等离子体（plasma）会进入到Mask边缘的非开口区成膜，这个区域的薄膜相比正常成膜区较薄，且延伸距离较长，对后续器件的切割以及可靠性验证都会存在一定风险，然而目前行业内无法避免CVD 成膜制程中的阴影效应。
因此，现有技术存在缺陷，急需改进。
 技术问题
本申请提供一种阵列基板、OLED显示面板、掩膜板，能够解决位于阴影区域的膜层对预设成膜区域的膜层造成连带的不良影响，以及解决CVD制程中产生的阴影效应的影响。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请提供的一种阵列基板，包括预设成膜区域和围绕所述预设成膜区域的非成膜区域，所述非成膜区域内包括阴影区域，所述阴影区域围绕且紧邻所述预设成膜区域；
待制备于所述阵列基板上的膜层的实际成膜区域包括所述预设成膜区域和所述阴影区域；
其中，所述阵列基板在对应所述阴影区域内设置有凹槽或凸起，使得所述膜层在对应所述凹槽或所述凸起处断开。
在本申请的阵列基板中，所述阵列基板在所述预设成膜区域内设置有挡墙，至少一所述挡墙在靠近所述非成膜区域的位置呈环形设置，并且至少一所述凹槽或所述凸起围绕所述预设成膜区域设置。
在本申请的阵列基板中，所述挡墙与所述凹槽或所述凸起之间的距离为对应所述预设成膜区域的所述膜层的边界距所述挡墙的距离。
在本申请的阵列基板中，所述凹槽开口处的截面宽度小于所述凹槽底部的截面宽度，所述凹槽的侧壁为弧面或者呈预设角度设置的斜面。
在本申请的阵列基板中，对应位于所述凹槽内的所述膜层与其余部位的所述膜层存在段差，且所述膜层在所述凹槽的边缘处断开。
在本申请的阵列基板中，所述凸起顶部的截面宽度大于所述凸起底部的截面宽度，所述凸起的侧壁为弧面或者呈预设角度设置的斜面。
在本申请的阵列基板中，对应位于所述凸起上的所述膜层与其余部位的所述膜层存在段差，且所述膜层在所述凸起的边缘处断开。
在本申请的阵列基板中，所述阵列基板在对应所述阴影区域的位置设置有间隔分布的信号走线，所述凹槽避开所述信号走线设置，或者所述凸起对应所述信号走线设置。
为解决上述技术问题，本申请还提供一种OLED显示面板，其包括如上所述的阵列基板以及有机发光层和薄膜封装层；
所述阵列基板在对应所述预设成膜区域内设置有像素开口区，所述有机发光层对应所述像素开口区设置；
所述薄膜封装层设置于所述有机发光层的表面，且所述薄膜封装层包括层叠设置的无机膜层与有机膜层，且所述有机膜层包裹于相邻两所述无机膜层之间；
所述有机膜层对应位于所述预设成膜区域内，所述无机膜层由所述预设成膜区域向所述阴影区域一侧延伸；
其中，所述阵列基板上对应于所述阴影区域设置的所述凹槽或所述凸起使得所述无机膜层形成段差，所述无机膜层在对应所述凹槽或所述凸起的边缘处断开，形成对应所述预设成膜区域的所述薄膜封装层。
为解决上述技术问题，本申请还提供一种掩膜板，应用于OLED显示面板的制备，所述掩膜板包括遮挡部和开口部，所述OLED显示面板包括预设成膜区域和围绕所述预设成膜区域的非成膜区域；
所述掩膜板的所述开口部对应所述预设成膜区域，所述遮挡部对应所述非成膜区域，用以在所述OLED显示面板对应所述预设成膜区域形成预设图案的膜层；
其中，所述遮挡部靠近所述开口部的边缘部位面向所述OLED显示面板的一侧表面呈斜面或弧面设置，使得所述遮挡部紧邻所述开口部的部分与所述OLED显示面板之间的距离小于所述遮挡部其余部分与所述OLED显示面板之间的距离。
在本申请的掩膜板中，所述掩膜板用于在所述预设成膜区域形成薄膜封装层，并且所述遮挡部靠近所述开口部的边缘部位向靠近所述OLED显示面板的一侧呈斜面设置，且所述遮挡部的所述边缘部位的厚度大于其余部位的厚度。
 有益效果
本申请的有益效果为：相较于现有的显示面板，本申请提供的阵列基板、OLED显示面板、掩膜板，通过在阵列基板对应阴影区域内设置凹槽或凸起，使得制备于阵列基板上的膜层在对应凹槽或凸起处断开，形成不连续薄膜，从而防止位于阴影区域的膜层对预设成膜区域的膜层造成连带的不良影响。另外，本申请还通过对掩膜板开口边缘进行处理，以达到缩小阴影区域面积的目的，从而有利于显示面板窄边框设计和减小阴影效应的影响。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的阵列基板的俯视图；
图2为本申请实施例一提供的显示面板的局部结构示意图；
图3为本申请实施例一提供的显示面板的凹槽位置示意图；
图4为本申请实施例二提供的显示面板的局部结构示意图；
图5为本申请实施例提供的掩膜板的结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本申请针对现有的显示面板，由于目前通过化学气相沉积（CVD）的方法成膜需要通过光罩进行辅助才能对膜层进行图案化，但是光罩的使用存在一个无法避免的问题，即阴影效应（Shadow effect）。所谓的阴影是由于在成膜时光罩和基板间存在一定间隙，等离子体（plasma）会进入到光罩边缘的非开口区成膜，这个区域的薄膜相比正常成膜区较薄，且延伸距离较长，对后续器件的切割以及可靠性验证都会存在一定风险，并且不利于窄边框的设计。
由此本申请提供一种阵列基板，能够解决上述缺陷，如图1所示，为本申请实施例提供的阵列基板的俯视图。所述阵列基板100包括：预设成膜区域A和围绕所述预设成膜区域A的非成膜区域B，所述非成膜区域B内包括阴影区域C，所述阴影区域C围绕且紧邻所述预设成膜区域A；待制备于所述阵列基板100上的膜层的实际成膜区域包括所述预设成膜区域A和所述阴影区域C；其中，所述阵列基板100在对应所述阴影区域C内设置有环绕所述预设成膜区域A的凹槽或凸起，使所述膜层对应所述预设成膜区域A的部分与对应所述阴影区域C的部分形成段差，也就是说，使得所述膜层在对应所述凹槽或所述凸起处断开，从而形成不连续薄膜。本申请通过此设计，可以保证后续器件的切割以及可靠性验证的信赖度，防止对所述预设成膜区域A的所述膜层造成连带的不良影响。
本实施例中以所述膜层为薄膜封装层为例，但并不以此为限，以下通过本申请不同实施例提供的阵列基板形成的显示面板为例进行说明。
如图2所示，为本申请实施例一提供的显示面板的局部结构示意图。所述显示面板包括所述阵列基板100以及有机发光器件和薄膜封装层200。所述阵列基板100包括但不限于依次层叠设置的衬底基板101、层间绝缘层102、源漏金属层103、钝化层104以及像素定义层105。其中，所述衬底基板101包括但不限于基板，依次制备于所述基板上的缓冲层、有源层、栅绝缘层、栅极；所述源漏金属层103包括源/漏极以及间隔设置的信号走线103’。所述有机发光器件对应于所述像素定义层105定义出的像素开口区设置，且包括层叠设置的阳极301、有机发光层302以及阴极（未图示）。
其中，所述有源层、所述栅极以及所述源/漏极形成薄膜晶体管，所述薄膜晶体管以及所述有机发光器件均对应设置于所述预设成膜区域A内，所述信号走线103’对应设置于所述非成膜区域B内。
所述薄膜封装层200设置于所述有机发光器件的表面，且所述薄膜封装层200包括层叠设置的无机膜层与有机膜层，且所述有机膜层包裹于相邻两所述无机膜层之间。在图中，所述薄膜封装层200包括第一无机膜层201、第二无机膜层203以及位于所述第一无机膜层201与所述第二无机膜层203之间的有机膜层202。所述有机膜层202对应位于所述预设成膜区域A内，所述第一无机膜层201以及所述第二无机膜层203由所述预设成膜区域A向所述阴影区域C一侧延伸。
所述阵列基板100在所述预设成膜区域A内设置有挡墙400，至少一所述挡墙400在靠近所述非成膜区域B的位置呈环形设置。所述挡墙400包括但不限于所述钝化层104、所述像素定义层105中的一者或一者以上并经图案化形成的。所述有机膜层202被所述挡墙400阻挡在所述预设成膜区域A内，由于用于蒸镀所述无机膜层的掩膜板存在阴影效应，因此，所述第一无机膜层201以及所述第二无机膜层203会由所述预设成膜区域A延伸至所述阴影区域C内。本实施例在所述阵列基板100在对应所述阴影区域C内设置有凹槽500，并且至少一所述凹槽500围绕所述预设成膜区域A设置，使得所述薄膜封装层200在对应所述凹槽500处断开，形成不连续薄膜，即所述薄膜封装层200对应所述预设成膜区域A的部分与对应所述阴影区域C的部分相互独立。
其中，所述挡墙400与所述凹槽500之间的距离d1为对应所述预设成膜区域A的所述薄膜封装层200的边界距所述挡墙400的距离。对应位于所述凹槽500内的所述第一无机膜层201以及所述第二无机膜层203的叠层与位于其余部位的所述第一无机膜层201以及所述第二无机膜层203的叠层存在段差，使得所述薄膜封装层200在所述凹槽500的边缘处断开。其中，所述凹槽500的深度大于所述第一无机膜层201以及所述第二无机膜层203形成的叠层的厚度，从而保证形成不连续薄膜。本实施例中，所述凹槽500的深度为300nm -500nm之间。
在一种实施例中，所述凹槽500开口处的截面宽度小于所述凹槽500底部的截面宽度，所述凹槽500的侧壁为弧面或者呈预设角度设置的斜面。其中，斜面的倾斜角度可根据实际制程设计，此设计可以保证位于所述凹槽500内的所述无机膜层与其他部位的所述无机膜层能够完全断开，所述凹槽500的截面形状可以为正梯形，或者其他规则或不规则的多边形，此处不做限制。
如图3中的a’~e’所示，为本申请实施例一提供的显示面板的凹槽位置示意图。所述凹槽500除图2中所示的位置外，根据CVD成膜边界和所述挡墙400的所述距离d1的不同，所述凹槽500的位置以及数目也可以不同。如图3中a’~c’所示，根据所述阴影区域C的范围不同，所述凹槽500设置于相邻两所述信号走线103’之间的间隙位置，或者所述阴影区域C的位置避开所述信号走线103’的设置区域，所述凹槽500紧邻所述预设成膜区域设置。如图3中d’~e’所示，所述凹槽500在所述阴影区域C内可以设置为多个并间隔分布。
如图4所示，为本申请实施例二提供的显示面板的局部结构示意图。相较于上述实施例一，本实施例的区别在于：本实施例不设置所述凹槽，而是在所述阵列基板100对应所述阴影区域C内设置有凸起600，并且至少一所述凸起600围绕所述预设成膜区域A设置，使得所述薄膜封装层200在对应所述凸起600处断开，形成不连续薄膜，即所述薄膜封装层200对应所述预设成膜区域A的部分与对应所述阴影区域C的部分相互独立。
其中，所述挡墙400与所凸起600之间的距离d2为对应所述预设成膜区域A的所述薄膜封装层200的边界距所述挡墙400的距离。在所述阴影区域C内，对应位于所述凸起600上的所述第一无机膜层201以及所述第二无机膜层203的叠层与位于其余部位的所述第一无机膜层201以及所述第二无机膜层203的叠层存在段差，使得所述薄膜封装层200在所述凸起600的边缘处断开。其中，所述凸起600的厚度大于所述第一无机膜层201以及所述第二无机膜层203形成的叠层的厚度，从而保证形成不连续薄膜。
在一种实施例中，所述凸起600顶部的截面宽度大于所述凸起600底部的截面宽度，所述凸起600的侧壁为弧面或者呈预设角度设置的斜面。其中，斜面的倾斜角度可根据实际制程设计，此设计可以保证位于所述凸起600上的所述无机膜层与其他部位的所述无机膜层能够完全断开，所述凸起600的截面形状可以为倒梯形，或者其他规则或不规则的多边形，此处不做限制。
在本实施例中，所述凸起600对应所述信号走线103’设置，因此借助所述信号走线103’形成的地势，即对应所述信号走线103’的位置形成有爬坡，可以进一步保证所述无机膜层在所述凸起600处断开。其中，所述凸起600包括但不限于所述层间绝缘层102、所述源漏金属层103、所述钝化层104、所述像素定义层105中的一者或一者以上，且经蚀刻后形成。
在其他实施例中，根据CVD成膜边界和所述挡墙400的所述距离d2的不同，所述凸起600的位置以及数目也可以不同。具体与上述实施例中所述凹槽的设计类似，此处不再赘述。
其中，本实施例的所述显示面板的其他部位的膜层结构与上述实施例一中的所述显示面板的膜层结构相同，此处不再赘述。
本申请还提供一种掩膜板，应用于OLED显示面板的制备，在本实施例中，所述掩膜板应用于薄膜封装层的无机膜层的制备，但并不以此为限。如图5所示，所述掩膜板11包括遮挡部112和开口部111，所述OLED显示面板10包括预设成膜区域A和围绕所述预设成膜区域A的非成膜区域B；所述掩膜板11的所述开口部111对应所述预设成膜区域A，所述遮挡部112对应所述非成膜区域B，用以在所述OLED显示面板10对应所述预设成膜区域A形成预设图案的所述薄膜封装层。对应所述掩膜板11的上方设置有靶材12，所述靶材12用于喷射出无机材料13，所述无机材料13通过所述开口部111形成于所述OLED显示面板10的表面。
其中，所述遮挡部112靠近所述开口部111的边缘部位面向所述OLED显示面板10的一侧表面呈斜面或弧面设置，使得所述遮挡部112紧邻所述开口部111的部分与所述OLED显示面板10之间的距离小于所述遮挡部112其余部分与所述OLED显示面板10之间的距离。比如，在一种实施例中，所述遮挡部112远离所述OLED显示面板10的一侧表面位于同一水平面上，在图中113区域的位置所述遮挡部112靠近所述OLED显示面板10的一侧表面为斜面或弧面。
本实施例中，所述掩膜板11用于在所述预设成膜区域A内形成薄膜封装层，并且所述遮挡部112靠近所述开口部111的边缘部位向靠近所述OLED显示面板10的一侧呈斜面设置，如图中113区域所示，且所述遮挡部112的所述边缘部位的厚度大于其余部位的厚度。
由于通过对所述掩膜板11的开口边缘进行上述处理，从而使得所述掩膜板11的所述遮挡部112的边缘能够更贴近所述OLED显示面板10，相比传统的掩膜板，本申请能够进一步减小所述掩膜板11与所述OLED显示面板10之间的距离，也就是说，能够进一步减小所述无机材料13由所述预设成膜区域A进入所述非成膜区域B的通道，以达到缩小阴影区域C的目的，从而有利于显示面板窄边框设计和减小阴影效应的影响。
综上所述，本申请提供的阵列基板、OLED显示面板、掩膜板，通过在阵列基板对应阴影区域内设置凹槽或凸起，使得制备于阵列基板上的膜层在对应凹槽或凸起处断开，形成不连续薄膜，从而防止位于阴影区域的膜层对预设成膜区域的膜层造成连带的不良影响。另外，本申请还通过对掩膜板开口边缘进行处理，以达到缩小阴影区域面积的目的，从而有利于显示面板窄边框设计和减小阴影效应的影响。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (11)

  1. 一种阵列基板，其包括预设成膜区域和围绕所述预设成膜区域的非成膜区域，所述非成膜区域内包括阴影区域，所述阴影区域围绕且紧邻所述预设成膜区域；
    待制备于所述阵列基板上的膜层的实际成膜区域包括所述预设成膜区域和所述阴影区域；
    其中，所述阵列基板在对应所述阴影区域内设置有凹槽或凸起，使得所述膜层在对应所述凹槽或所述凸起处断开。
  2. 根据权利要求1所述的阵列基板，其中，所述阵列基板在所述预设成膜区域内设置有挡墙，至少一所述挡墙在靠近所述非成膜区域的位置呈环形设置，并且至少一所述凹槽或所述凸起围绕所述预设成膜区域设置。
  3. 根据权利要求2所述的阵列基板，其中，所述挡墙与所述凹槽或所述凸起之间的距离为对应所述预设成膜区域的所述膜层的边界距所述挡墙的距离。
  4. 根据权利要求1所述的阵列基板，其中，所述凹槽开口处的截面宽度小于所述凹槽底部的截面宽度，所述凹槽的侧壁为弧面或者呈预设角度设置的斜面。
  5. 根据权利要求4所述的阵列基板，其中，对应位于所述凹槽内的所述膜层与其余部位的所述膜层存在段差，且所述膜层在所述凹槽的边缘处断开。
  6. 根据权利要求1所述的阵列基板，其中，所述凸起顶部的截面宽度大于所述凸起底部的截面宽度，所述凸起的侧壁为弧面或者呈预设角度设置的斜面。
  7. 根据权利要求6所述的阵列基板，其中，对应位于所述凸起上的所述膜层与其余部位的所述膜层存在段差，且所述膜层在所述凸起的边缘处断开。
  8. 根据权利要求1所述的阵列基板，其中，所述阵列基板在对应所述阴影区域的位置设置有间隔分布的信号走线，所述凹槽避开所述信号走线设置，或者所述凸起对应所述信号走线设置。
  9. 一种OLED显示面板，其包括如权利要求1所述的阵列基板以及有机发光层和薄膜封装层；
    所述阵列基板在对应所述预设成膜区域内设置有像素开口区，所述有机发光层对应所述像素开口区设置；
    所述薄膜封装层设置于所述有机发光层的表面，且所述薄膜封装层包括层叠设置的无机膜层与有机膜层，且所述有机膜层包裹于相邻两所述无机膜层之间；
    所述有机膜层对应位于所述预设成膜区域内，所述无机膜层由所述预设成膜区域向所述阴影区域一侧延伸；
    其中，所述阵列基板上对应于所述阴影区域设置的所述凹槽或所述凸起使得所述无机膜层形成段差，所述无机膜层在对应所述凹槽或所述凸起的边缘处断开，形成对应所述预设成膜区域的所述薄膜封装层。
  10. 一种掩膜板，应用于OLED显示面板的制备，其中，所述掩膜板包括遮挡部和开口部，所述OLED显示面板包括预设成膜区域和围绕所述预设成膜区域的非成膜区域；
    所述掩膜板的所述开口部对应所述预设成膜区域，所述遮挡部对应所述非成膜区域，用以在所述OLED显示面板对应所述预设成膜区域形成预设图案的膜层；
    其中，所述遮挡部靠近所述开口部的边缘部位面向所述OLED显示面板的一侧表面呈斜面或弧面设置，使得所述遮挡部紧邻所述开口部的部分与所述OLED显示面板之间的距离小于所述遮挡部其余部分与所述OLED显示面板之间的距离。
  11. 根据权利要求10所述的掩膜板，其中，所述掩膜板用于在所述预设成膜区域形成薄膜封装层，并且所述遮挡部靠近所述开口部的边缘部位向靠近所述OLED显示面板的一侧呈斜面设置，且所述遮挡部的所述边缘部位的厚度大于其余部位的厚度。
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