WO2020259473A1 - 显示屏、终端 - Google Patents

显示屏、终端 Download PDF

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Publication number
WO2020259473A1
WO2020259473A1 PCT/CN2020/097611 CN2020097611W WO2020259473A1 WO 2020259473 A1 WO2020259473 A1 WO 2020259473A1 CN 2020097611 W CN2020097611 W CN 2020097611W WO 2020259473 A1 WO2020259473 A1 WO 2020259473A1
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WIPO (PCT)
Prior art keywords
pixels
light
display screen
sub
driving circuit
Prior art date
Application number
PCT/CN2020/097611
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English (en)
French (fr)
Inventor
严斌
毛春程
尹帮实
Original Assignee
华为技术有限公司
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Filing date
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Publication of WO2020259473A1 publication Critical patent/WO2020259473A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Definitions

  • This application relates to the field of display technology, in particular to a display screen and a terminal.
  • terminal devices with a high screen-to-body ratio have become a more popular product type for consumers.
  • the optical device because it needs to collect light on the side where the display surface of the terminal device is located, must occupy a certain area on the display surface of the terminal device. Therefore, it has become the main influencing factor restricting the full-screen display of the terminal device.
  • OLED organic light-emitting diode
  • OLED displays are not completely opaque, in order to simplify the structure, a design often used is to install optical devices on the OLED display.
  • the light-receiving surface of the optical device faces the back of the OLED display.
  • the transmittance of the OLED display screen is only about 3% to 5%, when the optical device is arranged on the back of the OLED display screen, the performance of the optical device is affected due to the small amount of light entering the optical device.
  • the embodiments of the present application provide a display screen and a terminal to solve the problem of how to improve the transmittance of the OLED display screen.
  • a display screen in a first aspect, includes a substrate and at least one high-density pixel group and at least one low-density pixel group disposed on the substrate; the high-density pixel group includes a plurality of first pixels arranged in an array , The low-density pixel group includes a plurality of second pixels arranged in an array; the first pixel includes at least three first sub-pixels for displaying three primary colors respectively, and the first sub-pixel includes at least a first driving circuit and a first driving circuit.
  • the first light-emitting device is electrically connected, the first driving circuit is used to drive the first light-emitting device to emit light;
  • the second pixel includes at least three second sub-pixels for displaying the three primary colors respectively, and the second sub-pixel includes at least a second driving circuit and
  • the second light-emitting device is electrically connected to the second driving circuit, and the second driving circuit is used to drive the second light-emitting device to emit light;
  • the pixel density of the first display area where the first pixels arranged in multiple arrays are located is greater than that in the multiple array arrangements The pixel density of the second display area where the second pixel is located.
  • the number of transistors in the second display area is smaller than the number of transistors in the first display area. Equivalent to the increase in the area of the light-transmitting area in the second display area, the increase in the aperture ratio, and the increase in the overall transmittance of the local area, so that the ambient light transmittance of the second display area is greater than that of the first display area .
  • the display screen further includes a pixel defining layer disposed on the side of the first driving circuit and the second driving circuit away from the substrate; the pixel defining layer includes a plurality of intersecting retaining walls and a plurality of intersecting retaining walls.
  • the hole injection layer, hole transport layer, electron transport layer, and electron injection layer are all light-transmitting layers, they still have a certain influence on the transmittance.
  • At least one of the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer in the second light emitting device is only located in the first opening, and does not extend to the area between adjacent second pixels.
  • the influence of the film layers of the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer on the transmittance of the second display area can be avoided, and the transmittance of the second display area can be further improved.
  • the pixel defining layer further includes at least one second opening surrounded by a plurality of intersecting barriers; the second opening is located between adjacent second pixels and used to separate adjacent second pixels. It can reduce the blocking of ambient light by the retaining wall.
  • adjacent second openings are connected. Further reduce the blocking of the ambient light by the retaining wall.
  • the second driving circuit includes a plurality of transistors; the transistors include a conductive layer and a first insulating layer stacked with the conductive layer, and multiple transistors in the same second driving circuit share the same first insulating layer; adjacent second drivers
  • the first insulating layers in the circuit are arranged at intervals; the first insulating layer is a gate insulating layer or a passivation layer.
  • the gate insulating layer and the passivation layer are both light-transmitting layers, they still have a certain influence on the transmittance.
  • the gate insulating layer and the passivation layer are made at least one of the gate insulating layer and the passivation layer a block structure that does not extend into the blank area between the adjacent second pixels, it is possible to prevent the gate insulating layer and the passivation layer from interfering with each other.
  • the influence of the transmittance of the second display area further increases the transmittance of the second display area.
  • the display screen further includes a first light-shielding layer, the first light-shielding layer includes a plurality of independently arranged light-shielding blocks, and each second driving circuit corresponds to a light-shielding block; the orthographic projection of the second driving circuit on the substrate is located at and The shading block corresponding to the second driving circuit is in the orthographic projection on the substrate.
  • the display screen further includes a filling layer, and the filling layer includes a plurality of independently arranged filling blocks; at least a part of the outline of the orthographic projection of the second driving circuit on the substrate is a broken line, and the orthographic projection of the filling blocks on the substrate , Coincide with the area where the concave position of the broken line of the second driving circuit corresponding to the filling block is located; the filling layer is arranged on the side of the second driving circuit close to the substrate.
  • the filling block By setting the filling block, the small features on the outline of the orthographic projection of the second driving circuit on the substrate are filled to prevent the second driving circuit from forming a grating, thereby preventing the second driving circuit from affecting the normal operation of the optical device under the display screen .
  • the display screen further includes a filling layer, and the filling layer includes a plurality of independently arranged filling blocks; at least a part of the outline of the orthographic projection of the second driving circuit on the substrate is a broken line, and the orthographic projection of the filling blocks on the substrate , And the area where the concave position of the broken line of the second driving circuit corresponding to the filling block is overlapped; the filling layer is arranged on the side of the second driving circuit away from the substrate.
  • the display screen further includes a filling layer, and the filling layer includes a plurality of independently arranged filling blocks; at least a part of the outline of the orthographic projection of the second driving circuit on the substrate is a broken line, and the orthographic projection of the filling blocks on the substrate , Coincides with the area where the recessed position of the broken line of the second driving circuit corresponding to the filling block is located; the filling layer is the same layer and the same material as at least one conductive layer in the second driving circuit. The thickness of the display can be reduced.
  • the display screen further includes a second signal line group for transmitting driving signals to the second driving circuit, the second signal line group includes a second data line and a plurality of second signal lines that are arranged crosswise; the second data line Used to transmit data voltage; the second signal line is used to transmit operating voltage, or to provide a gate signal to the gate of a transistor in the second driving circuit; the display screen also includes a second light shielding layer, the second light shielding layer includes a plurality of The light-shielding bars are independently arranged, and each second signal line group corresponds to a light-shielding bar; at least part of the orthographic projection of the second signal line group on the substrate is located in the orthographic projection of the light-shielding bar on the substrate.
  • the signal lines in the second signal line group are shielded, so that when ambient light is incident, the area where the second signal line group is located is completely opaque. It can prevent the signal lines from forming a grating, eliminate the diffraction caused by the signal lines in the second signal line group, and ensure the performance of the optical device.
  • the display screen further includes a second signal line group for transmitting driving signals to the second driving circuit, the second signal line group includes a plurality of second signal lines; the second signal line is used for transmitting operating voltage, or The gate of a transistor in the second driving circuit provides a gate signal; among the plurality of second signal lines, some are used as the first sub-signal line, and some are used as the second sub-signal line; the display screen also includes the first sub-signal line And the second insulating layer between the second sub-signal line; the first sub-signal line and the second sub-signal line are arranged alternately, and the orthographic projection of the first sub-signal line on the substrate is aligned with the first sub-signal line The orthographic projections of the second sub signal lines on both sides on the substrate overlap.
  • the second signal line group includes a plurality of second signal lines; the second signal line is used for transmitting operating voltage, or The gate of a transistor in the second driving circuit provides a gate signal; among the plurality of second signal lines, some
  • the gap formed by the signal lines on the same layer can be blocked, which is equivalent to eliminating the gap between the signal lines , which eliminates the diffraction caused by signal lines.
  • No need to add a new film structure can simplify the preparation process, and make the display screen light and thin.
  • the display screen further includes a second signal line group for transmitting driving signals to the second driving circuit
  • the second signal line group includes a second data line and a plurality of second signal lines that are arranged crosswise; the second data line Used to transmit data voltage; the second signal line is used to transmit operating voltage or provide a gate signal to the gate of a transistor in the second driving circuit; the material constituting the second data line or the second signal line is a transparent conductive material .
  • the display screen further includes a first signal line group for transmitting driving signals to the first driving circuit and a second signal line group for transmitting driving signals to the second driving circuit;
  • the first signal line group includes a plurality of The first signal line;
  • the first signal line is used to transmit the operating voltage or provide a gate signal to the gate of a transistor in the first drive circuit;
  • the second signal line group includes a plurality of second signal lines;
  • the second signal line Used to transmit the operating voltage, or to provide a gate signal to the gate of a transistor in the second driving circuit;
  • the display screen includes two pixels located on both sides of the low-density pixel group, and
  • the low-density pixel group is a high-density pixel group arranged side by side; each row of second pixels in the plurality of arrays of second pixels is arranged in parallel with a row of first pixels of the plurality of arrays of first pixels;
  • a row of first pixels includes a plurality of first sub-pixels arranged in an array; each
  • the first sub-pixels in the same row in the first high-density pixel group and the second high-density pixel group do not share the same first signal line, and there is no need to provide the first signal line at the position where the second pixel is not provided in the second display area Therefore, the shielding of the ambient light by the first signal line can be avoided, and the transmittance of the second display area can be further improved.
  • the display screen further includes a first signal line group for transmitting driving signals to the first driving circuit and a second signal line group for transmitting driving signals to the second driving circuit; the first signal line group includes the first signal line group.
  • Data line; the first data line is used to transmit data voltage; the second signal line group includes a second data line; the second data line is used to transmit data voltage; along the routing direction of the first data line, the display screen includes two A high-density pixel group located on both sides of the low-density pixel group and arranged side by side with the low-density pixel group; the second pixels in each column of the second pixels arranged in a plurality of arrays and the first pixels arranged in the plurality of arrays One column of first pixels in the same column is arranged; each column of first pixels includes a plurality of first sub-pixels arranged in an array; each column of second pixels includes a plurality of second sub-pixels arranged in an array; in each column of first pixels, The first data line electrically connected to the first sub-
  • the first data lines respectively connected to the first sub-pixels in the same column in the third high-density pixel group and the fourth high-density pixel group are coupled by a connecting line, and the connecting line does not pass through the second display area, but bypasses the first data line.
  • Two display area There is no need to provide the first data line at the position where the second pixel is not provided in the second display area, which can prevent the first data line from blocking the ambient light and further improve the transmittance of the second display area.
  • the display screen further includes a black matrix layer disposed on the side of the first driving circuit and the second driving circuit away from the substrate; the orthographic projection of the first driving circuit on the substrate, and the first signal line group on the substrate.
  • the orthographic projection of, the orthographic projection of the second drive circuit on the substrate, and the orthographic projection of the second signal line group on the substrate are all located within the orthographic projection of the black matrix layer on the substrate.
  • the black matrix layer covers the first driving circuit, the first signal line group, the second driving circuit, and the second signal line group. In this way, on the one hand, it is possible to prevent ambient light from irradiating the first driving circuit, the first signal line group, the second driving circuit, and the second signal line group.
  • the black matrix layer can also be The ambient light reflected by the first driving circuit, the first signal line group, the second driving circuit, and the second signal line group is shielded, which can reduce the interference of the reflected light on the display light.
  • the first light emitting device includes a first cathode
  • the second light emitting device includes a second cathode
  • the thickness of the first cathode is greater than the thickness of the second cathode.
  • each second light-emitting device includes a second cathode; adjacent second cathodes are arranged at intervals.
  • the display screen further includes a polarizing layer disposed on a side of the first driving circuit away from the substrate; a third opening is disposed on the polarizing layer, and the third opening is located in the second display area.
  • the polarizing layer is only arranged in the first display area, and the polarizing layer is not arranged in the second display area. In this way, the polarizing layer will not filter the ambient light passing through the second display area, and the transmittance of the second display area can be improved.
  • the display screen further includes a plurality of third light-emitting devices located between adjacent second pixels; a row of third light-emitting devices located between two adjacent rows of the plurality of second pixels arranged in an array, and A row of first light emitting devices in the first pixels arranged in a plurality of arrays are arranged in a row.
  • Only the third light-emitting device is provided in the blank area between the adjacent second pixels without providing the driving circuit. Since the third light-emitting device has a light-transmitting structure, it has less influence on the transmittance of the second display area. In this way, on the basis of improving the transmittance of the second display area, the display screen provided in this example does not change the existing process for preparing the electroluminescent layer, which can save costs.
  • the display screen further includes a plurality of third light-emitting devices located between adjacent second pixels; a column of third light-emitting devices located between two adjacent columns of the second pixels arranged in an array, and A row of first light emitting devices in the first pixels arranged in a plurality of arrays are arranged in the same row.
  • the display screen further includes a color filter layer disposed on the side of the first light emitting device and the second light emitting device away from the substrate; the color filter layer includes at least three color filter patterns corresponding to the three primary colors; A first light-emitting device corresponds to a color filter pattern with the same light-emitting color as the first light-emitting device, and each second light-emitting device corresponds to a color filter pattern with the same light-emitting color as the second light-emitting device.
  • the reflected light can be emitted from the display screen after passing through the color filter layer. Take the red color filter pattern in the color filter layer as an example.
  • the red color filter pattern filters out at least two thirds of the reflected light.
  • the color filter layer in this example can have a better filtering effect on the reflected light, so that the display screen can have a better display effect without a polarizer.
  • a terminal including the display screen of any one of the first aspect; the terminal further includes an optical device arranged on the back of the display screen with the light-receiving surface facing the display screen, and the orthographic projection of the optical device on the display screen is located in the second Display area.
  • the optical device includes a first camera; the focal length of the first camera is less than 4 mm.
  • the focal length of the first camera is less than 4mm.
  • the optical device includes a first camera; the aperture of the first camera is greater than f/2.2, where f is the focal length of the first camera.
  • the aperture of the first camera is greater than f/2.2, where f is the focal length of the first camera.
  • the first camera includes an image sensor, and the pixel size of the image sensor is greater than 0.8um.
  • Using the first camera with a large pixel size can compensate to a certain extent for the influence of the display screen transmittance on the amount of light, and improve the photographing effect of the first camera.
  • the terminal further includes a processing unit; the optical device further includes a second camera; the resolution of the second camera is greater than 8M; both the first camera and the second camera are electrically connected to the processing unit; the first camera is used to transmit to the processing unit For the contrast data of the picture, the second camera is used to transmit the resolution data of the picture to the processing unit; the processing unit is used to process the contrast data and the resolution data to generate the target image. It can make up for the low quality of a single camera.
  • FIG. 1 is a schematic diagram of the framework of a terminal provided by an embodiment of the application.
  • 2a is a schematic diagram of the positional relationship between an optical device and a display screen provided by an embodiment of the application;
  • 2b is a schematic diagram of a sub-pixel arrangement of a display screen provided by an embodiment of the application.
  • 2c is a schematic structural diagram of a driving circuit provided by an embodiment of the application.
  • 2d is a schematic structural diagram of another driving circuit provided by an embodiment of the application.
  • Figure 2e is a schematic structural diagram of a display screen provided by an embodiment of the application.
  • 2f is a schematic structural diagram of a pixel defining layer provided by an embodiment of the application.
  • 3a is a schematic diagram of an arrangement of high-density pixel groups and low-density pixel groups according to an embodiment of the application;
  • 3b is a schematic diagram of another arrangement of high-density pixel groups and low-density pixel groups according to an embodiment of the application;
  • 3c is a schematic diagram of the arrangement of sub-pixels in a display screen provided by an embodiment of the application.
  • 3d is a schematic structural diagram of a first pixel provided by an embodiment of the application.
  • FIG. 3e is a schematic structural diagram of a second pixel provided by an embodiment of the application.
  • 4a to 4d are schematic diagrams of area division of a display screen provided by an embodiment of this application.
  • 5a-5f are schematic diagrams of the area division of another display screen provided by an embodiment of the application.
  • FIG. 6 is a schematic diagram of the transmission of ambient light in a first display area and a second display area provided by an embodiment of the application;
  • FIG. 7 is a schematic diagram of the arrangement of sub-pixels in another display screen provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of an evaporation process provided by an embodiment of the application.
  • FIG. 9 is a schematic top view of a display screen provided by an embodiment of the application.
  • Figure 10a is a schematic cross-sectional view taken along the line A-A' in Figure 9;
  • Figure 10b is a schematic cross-sectional view along the B-B' direction in Figure 9;
  • 10c is a schematic top view of another display screen provided by an embodiment of the application.
  • FIG. 10d is a schematic top view of still another display screen provided by an embodiment of the application.
  • FIG. 11a is a schematic top view of yet another display screen provided by an embodiment of the application.
  • FIG. 11b is a schematic top view of another display screen provided by an embodiment of the application.
  • Figure 12a is a schematic cross-sectional view taken along the direction C-C' in Figure 11b;
  • Figure 12b is another schematic cross-sectional view taken along the C-C' direction in Figure 11b;
  • Figure 12c is another schematic cross-sectional view taken along the C-C' direction in Figure 11b;
  • Figure 12d is another schematic cross-sectional view taken along the C-C' direction in Figure 11b;
  • FIG. 13 is a schematic diagram of an ambient light diffraction process provided by an embodiment of the application.
  • FIG. 14a is a schematic top view of another display screen provided by an embodiment of the application.
  • Figure 14b is a schematic cross-sectional view taken along the D-D' direction in Figure 14a;
  • FIG. 15a is a schematic top view of a second driving circuit provided by an embodiment of this application.
  • 15b is a schematic diagram of the positional relationship between a filling block and a second driving circuit provided by an embodiment of the application;
  • 16a is a schematic diagram of the positional relationship between a light shielding strip and a second signal line provided by an embodiment of the application;
  • 16b is a schematic diagram of the positional relationship between another light-shielding strip and the second signal line according to an embodiment of the application;
  • FIG. 17a is a schematic diagram of the positional relationship between a first sub-signal line and a second sub-signal line according to an embodiment of the application;
  • Figure 17b is a schematic cross-sectional view taken along the E-E' direction in Figure 17a;
  • 18a is a schematic structural diagram of a second signal line in a display screen provided by an embodiment of the application.
  • 18b is a schematic structural diagram of a conventional second signal line in a display screen provided by an embodiment of the application.
  • 18c is a schematic diagram of a connection relationship between a second signal line and a gate driving circuit provided by an embodiment of the application;
  • 19a is a schematic structural diagram of a second data line in a display screen provided by an embodiment of the application.
  • 19b is a schematic structural diagram of a conventional second data line in a display screen provided by an embodiment of the application.
  • 20a is a schematic diagram of the structure of a black matrix layer in a display screen provided by an embodiment of the application.
  • 20b is a schematic diagram of the structure of another black matrix layer in a display screen provided by an embodiment of the application.
  • 21 is a schematic diagram of the structure of a first cathode and a second cathode provided by an embodiment of the application;
  • 22a-22c are schematic diagrams of the preparation process of a first cathode and a second cathode provided by an embodiment of the application;
  • FIG. 23a is a schematic top view of still another display screen provided by an embodiment of the application.
  • Figure 23b is a schematic cross-sectional view taken along the H-H' direction in Figure 23a;
  • FIG. 24a is a schematic top view of another display screen provided by an embodiment of the application.
  • Figure 24b is a schematic cross-sectional view along the M-M' direction in Figure 24a;
  • FIG. 25 is a schematic structural diagram of a display screen provided by an embodiment of the application.
  • FIG. 26 is a schematic structural diagram of a terminal provided by an embodiment of this application.
  • FIG. 27 is a schematic structural diagram of a first camera provided by an embodiment of the application.
  • FIG. 28 is a schematic diagram of an optical path of a first camera receiving diffracted light according to an embodiment of the application.
  • FIG. 29 is a schematic diagram of the structure of an image sensor according to an embodiment of the application.
  • FIG. 30 is a schematic structural diagram of another terminal provided by an embodiment of this application.
  • connection should be understood in a broad sense.
  • “connected” can be a fixed connection, a detachable connection, or a whole; it can be directly connected or Can be indirectly connected through an intermediary.
  • the embodiment of the present application provides a terminal.
  • the terminal can be a tablet computer, a mobile phone, an e-reader, a remote control, a personal computer (PC), a notebook computer, a personal digital assistant (PDA), a vehicle-mounted device, an Internet TV, a wearable device, and a TV Products with display interfaces such as smartphones, and smart display wearable products such as smart watches and smart bracelets.
  • the embodiments of this application do not impose special restrictions on the specific form of the foregoing terminal. For the convenience of description, the following embodiments are all exemplified by taking the terminal as a mobile phone as an example.
  • the aforementioned terminal 01 mainly includes a housing assembly 10 and a display screen 20.
  • the display screen 20 is used to display images, and the housing assembly 10 is used to carry and protect the display screen 20.
  • the display screen 20 is located in the housing assembly 10.
  • the display screen 10 can realize self-luminescence.
  • the display screen 10 may be an organic light emitting diode (OLED) display screen.
  • OLED organic light emitting diode
  • the terminal 01 further includes an optical device 30, which is arranged on the back side a2 of the display screen 20 opposite to the light-emitting surface a1, and the light-receiving surface of the optical device 30 faces the display screen 20. .
  • the optical device 30 is a component including a photosensitive sensor.
  • the optical device 30 may be, for example, a front camera, a fingerprint sensor, or the like.
  • the display screen 20 divides a display area A and a peripheral area B located around the display area A.
  • the relative positional relationship and shape of the display area A and the peripheral area B are not limited.
  • the peripheral area B surrounds the display area A as an example.
  • the optical device 30 included in the terminal 01 implements specific functions by collecting ambient light emitted to the optical device 30 through the display screen 20.
  • the display screen 20 transmits light only through the display area A. Therefore, as shown in FIG. 2a, the orthographic projection of the optical device 30 on the display screen 20 is located in the display area A of the display screen 20.
  • the above-mentioned display area A includes a plurality of sub-pixels P, and each pixel includes at least three sub-pixels P for displaying three primary colors.
  • the above-mentioned multiple sub-pixels P in the present application are described by taking the arrangement of a matrix as an example.
  • each pixel includes at least one red sub-pixel P, one green sub-pixel P, and one blue sub-pixel P.
  • each sub-pixel P is provided with a driving circuit Q and an OLED electrically connected to the driving circuit Q, and the driving circuit Q is used to control the OLED to display.
  • the driving circuit Q includes a capacitor Cst, a plurality of switching transistors (M1, M2, M3, M5, M6, M7), and a driving transistor M4. That is, the 7T1C structure.
  • the driving circuit Q includes a capacitor Cst, a switching transistor M1 and a driving transistor M2. That is, the 2T1C structure.
  • the driving circuit Q may also have other structures, which is only an illustration in the embodiment of the present application.
  • the display screen 20 includes a substrate 23 and sub-pixels P arranged on the substrate 23. 2e shows that two sub-pixels P are provided on the substrate 23.
  • the aforementioned driving circuit Q in the sub-pixel P includes a driving transistor M4 as shown in FIG. 2e.
  • the other transistors in the driving circuit Q are formed synchronously with the driving transistor M4 and arranged in the same layer.
  • the above-mentioned light-emitting device OLED in the sub-pixel P is arranged on the side of the driving transistor M4 away from the substrate 23.
  • the OLED includes an anode a, an electroluminescent layer (EML), and a cathode c which are sequentially arranged in a direction away from the substrate 23.
  • EML electroluminescent layer
  • a second anode electrode is electrically connected to the driving transistor M4, the driving transistor M4 receives a drive current I sd generated by the electroluminescent layer EML emit light at a driving current I sd driver.
  • a pixel defining layer 25 is arranged between adjacent sub-pixels P, and the pixel defining layer 25 is used to prevent light emitted by adjacent sub-pixels P from mixing.
  • the pixel defining layer 25 includes a plurality of horizontal and vertical crossing barrier walls 251 and a plurality of first openings 252 surrounded by the plurality of horizontal and vertical barrier walls 251.
  • One first opening 252 is located in one sub-pixel P.
  • the driving circuit Q is located on the side of the barrier wall 251 close to the substrate 23, and the OLED is located in the first opening 252.
  • the sub-pixels P in the display screen 20 are rearranged.
  • the display screen 20 includes at least one high-density pixel group G and at least one low-density pixel group D disposed on a substrate 23; the high-density pixel group G includes a plurality of arrays arranged The first pixel 21 and the low-density pixel group D include a plurality of second pixels 22 arranged in an array.
  • the display screen 20 includes one low-density pixel group D and four high-density pixel groups G as an example for illustration. Among them, a high-density pixel group G is provided on the top, bottom, left, and right of the low-density pixel group D.
  • the pixels arranged in a row along the horizontal direction X are called pixels in the same row.
  • the pixels arranged in a row along the vertical direction Y are referred to as the same column of pixels.
  • a row of second pixels 22 in the low density pixel group D and a row of first pixels 21 in the high density pixel group G are located in the same row.
  • the third row of first pixels 21 in the high-density pixel group G and the first row of second pixels 22 in the low-density pixel group D are located in the same row, forming the third row of pixels in the display screen 20 from top to bottom .
  • a column of second pixels 22 in the low-density pixel group D and a column of first pixels 21 in the high-density pixel group G are located in the same column, for example, the fourth column of first pixels in the high-density pixel group G 21.
  • the second pixels 22 in each row are arranged in parallel with one row of the first pixels 21 in the plurality of rows.
  • the second pixels 22 in each column are arranged in the same column as one of the first pixels 21 in the plurality of columns.
  • the spacing between adjacent second pixels 22 is at least equal to the size of one second sub-pixel 221, and the spacing between adjacent second pixels 22 is second An integer multiple of the size of the sub-pixel 221. It can also be understood that the position where the second sub-pixel 22 should be set is no longer provided with the second sub-pixel 22 but is changed to a blank area.
  • a row of second pixels 22 in the low-density pixel group D and a row of first pixels 21 in the high-density pixel group G are not located in the same row.
  • a column of second pixels 22 in the low-density pixel group D and a column of first pixels 21 in the high-density pixel group G are not located in the same column.
  • one row of second pixels 22 in the low-density pixel group D and one row of first pixels 21 in the high-density pixel group G are located in the same row, and one column of second pixels 22 in the low-density pixel group D is The first pixel 21 in a row of the density pixel group G is located in the same row as an example for description.
  • each first pixel 21 includes at least three first sub-pixels 211 for respectively displaying three primary colors.
  • a first pixel 21 includes four first sub-pixels 211 as an example.
  • the four first sub-pixels 211 are respectively a red first sub-pixel R1, two green first sub-pixels G1, and a blue first sub-pixel. Color the first sub-pixel B1.
  • each first sub-pixel 211 includes at least a first driving circuit 212 and a first light emitting device 213 connected to the first driving circuit 212, and the first driving circuit 212 is used to drive the first light emitting device 213 to emit light.
  • one first pixel 21 includes three first sub-pixels 211 as an example for illustration.
  • each second pixel 22 includes at least three second sub-pixels 221 for respectively displaying three primary colors.
  • one second pixel 22 includes four second sub-pixels 221 as an example.
  • the four second sub-pixels 221 are respectively a red second sub-pixel R2, two green second sub-pixels G2, and a blue second sub-pixel G2. Color the second sub-pixel B2.
  • each second sub-pixel 221 includes at least a second driving circuit 222 and a second light emitting device 223 electrically connected to the second driving circuit 222, and the second driving circuit 222 is used to drive the second light emitting device 223 to emit light. .
  • one second pixel 22 includes three second sub-pixels 221 as an example for illustration.
  • the first driving circuit 212 may be the same as the driving circuit Q shown in FIG. 2c, for example.
  • the second driving circuit 222 may be the same as the driving circuit Q shown in FIG. 2c, for example.
  • they are all 7T1C structures.
  • the first driving circuit 212 and the second driving circuit may be the same as the driving circuit Q shown in FIG. 2d, for example.
  • they are all 2T1C structures.
  • the structure of the first sub-pixel 211 displaying the same color light and the second sub-pixel 221 displaying the same color light may be the same.
  • the area where the first pixels 21 arranged in multiple arrays are located is the first display area A1, and the area where the second pixels 22 arranged in multiple arrays are located is the second display area A2.
  • the display area A includes a first display area A1 and a second display area A2.
  • the relative positional relationship and shape of the first display area A1 and the second display area A2 are not limited.
  • the first display area A1 is covered by the high-density pixel group G, and the second display area A2 is covered by the low-density pixel group D.
  • the second display area A2 is located on one side of the first display area A1.
  • the first display area A1 surrounds the second display area A2.
  • the second display area A2 may be one area as shown in FIGS. 5a to 5d, or may be multiple areas as shown in FIGS. 5e to 5f. In the case where the second display area A2 is a plurality of areas, a low-density pixel group D is provided in each area.
  • the pixel density of the first display area A1 where the first pixels 21 arranged in a plurality of arrays are located is greater than the pixel density of the second display area A2 where the second pixels 22 arranged in the array are located.
  • Pixel density refers to the number of pixels per inch of screen.
  • the pixel density of the first display area A1 is greater than the pixel density of the second display area A2. It can be understood that as shown in FIG. 3a, the distance between adjacent first pixels 21 in the first display area A1 is smaller than that in the second display area A2. The distance between adjacent second pixels 22. In other words, within the same area, the number of the first pixels 110 provided is greater than the number of the second pixels 120.
  • the density of the first driving circuit 112 in the first display area A1 is greater than that of the second display area A2.
  • the density of the driving circuit 122 makes the number of transistors in the first display area A1 larger than the number of transistors in the second display area A2.
  • the optical device 30 is located on the back a2 of the display screen 20. Since the transistors in the first driving circuit 212 and the second driving circuit 222 are light-shielding materials, the ambient light is directed to the first driving circuit 212 and the second driving circuit. After 222, the ambient light will be blocked, so that the light cannot pass through, and thus cannot be emitted to the optical device 30. Since there is a blank area in the second display area A2 where the second driving circuit 122 is not provided, the ambient light transmittance of the second display area A2 is greater than the ambient light transmittance of the first display area A1.
  • the display area A is divided into a first display area A1 and a second display area A2, and the pixel density of the first pixels 21 arranged in an array in the first display area A1 is greater than that of the second display area A2.
  • the pixel density of the second pixels 22 arranged in the middle array makes the number of transistors in the second display area A2 smaller than the number of transistors in the first display area A1. This is equivalent to the increase in the area of the light-transmitting area in the second display area A2, the increase in the aperture ratio, and the increase in the overall transmittance of the local area, so that the ambient light transmittance of the second display area A2 is greater than that of the first display area A1 Transmittance.
  • the second driving circuit 222 is set to the 2T1C structure shown in FIG. 2d. Compared with the 7T1C structure as shown in FIG. 2c, the number of transistors can be reduced, thereby reducing the occupied area of the second driving circuit 222. Therefore, the light shielding effect of the second driving circuit 222 is reduced, and the transmittance of the second display area A2 is increased.
  • the ambient light receiving rate of the optical device 30 can be further increased, thereby improving the performance of the optical device 30.
  • the terminal 01 is further improved by the structure in the following example.
  • the structure of the display screen 20 is improved.
  • the display screen 20 further includes a plurality of third light emitting devices 24 located between adjacent second pixels 221.
  • the light emitting devices 213 are arranged in the same line.
  • the light emitting devices 213 are arranged in the same column.
  • the arrangement rule of the plurality of third light-emitting devices 24 is the same as the arrangement rule of the first light-emitting devices 213 in the first sub-pixels 211 in the first pixels 21 arranged in an array.
  • the first light emitting device 213, the second light emitting device 223, and the third light emitting device 24 in the display screen 20 are arranged in an array.
  • the first light-emitting device 213, the second light-emitting device 223, and the third light-emitting device 24 light-emitting devices that emit light of the same color have the same structure.
  • the first light emitting device 213, the second light emitting device 223, and the third light emitting device 24 in the display screen 20 as shown in FIG. 7 are prepared, and the light emitting device in the display screen 20 as shown in FIG. 2b is prepared.
  • the mask can be the same without changing the manufacturing process.
  • the first light emitting device 213, the second light emitting device 223, and the third light emitting device 24 all include EML, and the EML is prepared by an evaporation process.
  • the substrate 23 is fixed by the upper magnetic plate 41, and the fine metal mask (FMM) 42 is positioned under the substrate 23, and the bottom is Crucible 43 used for vapor deposition.
  • An organic light-emitting material is placed in the crucible 43. After the crucible 43 is heated, the organic light-emitting material evaporates and sprays toward the FMM 42.
  • the shielding area 421 on the FMM 42 will shield the substrate 23 so that the organic light-emitting material is attached to the FMM.
  • the opening area 422 on the FMM 42 does not shield the substrate 23, and the organic light-emitting material will adhere to the substrate 23 to form an EML.
  • the shielding area 421 on the FMM 42 should simultaneously block the location of the blue-emitting EML and the green-emitting EML, and the opening area 422 on the FMM 42 corresponds to the location of the red-emitting EML.
  • the arrangement of the first driving circuit 212 in the first display area A1 and the second driving circuit 222 in the second display area A2 are different.
  • the arrangement rules of the light emitting devices 213 and the second light emitting devices 223 in the second display area A2 are different.
  • the arrangement rules of the driving circuit Q and the light-emitting device OLED in the entire display screen 20 are the same. Therefore, in order not to change the existing manufacturing process, the existing mask can still be used.
  • the third light emitting device 24 is provided in the blank area between the adjacent second pixels 221, and no driving circuit is provided. Since the third light-emitting device 24 has a light-transmitting structure, it has less influence on the transmittance of the second display area A2. In this way, the display screen 20 provided in this example increases the transmittance of the second display area A2 without changing the existing process for preparing the electroluminescent layer, which can save costs.
  • the structure of the second light emitting device 223 in the display screen 20 is improved.
  • the pixel defining layer 25 includes a plurality of intersecting retaining walls 251 and a plurality of first openings 252 surrounded by the plurality of intersecting retaining walls 251.
  • the pixel defining layer 25 is disposed on the side of the first driving circuit 212 and the second driving circuit 222 away from the substrate 23.
  • the plurality of first openings 252 are located in the first sub-pixel 211 and the second sub-pixel 221.
  • one first opening 252 is located in one first sub-pixel 211.
  • each first sub-pixel 211 in the display screen 20 corresponds to a first opening 252, and the first opening 252 defines the light transmission range of the corresponding first sub-pixel 211.
  • Each second sub-pixel 221 corresponds to a first opening 252, and the first opening 252 defines the light transmission range of the corresponding second sub-pixel 221.
  • each first light-emitting device 213 and each second light-emitting device 223 respectively correspond to a first opening 252, and the first opening 252 at the gap between adjacent second pixels 22 is not The second light emitting device 223 is provided.
  • the first light emitting device 213 includes a hole injection layer (HIL), a hole transport layer (HTL), and an electroluminescence layer that are sequentially stacked in a direction away from the substrate 23.
  • Each layer of the HIL, HTL, ETL, and EIL in the plurality of first light emitting devices 213 is an integrated structure, and one EML is located in one first opening 252.
  • the second light emitting device 223 includes HIL, HTL, EML, ETL, and EIL that are sequentially stacked in a direction away from the substrate 23. At least one of HIL, HTL, ETL, and EIL in the second light emitting device 223 is only located in the first opening 252 and does not extend into the blank area between adjacent second pixels 22. One EML is located in one first opening 252.
  • the EIL in the plurality of second light-emitting devices 223 is an integrated structure, and the HIL, HTL, and ETL are all independent block structures for illustration.
  • the HIL in the display screen 20 is an example.
  • the structure of the HIL is shown in FIG. 10c.
  • the HIL in the second light-emitting device 223 is a block structure, and the HIL in the first light-emitting devices 213 is an integrated structure. .
  • the above-mentioned HIL can be prepared by, for example, the vapor deposition process illustrated in Example 1 above.
  • the opening area 422 corresponds to the area where the HIL is to be formed
  • the shielding area 421 corresponds to the area where the HIL does not need to be formed, thereby preparing the HIL.
  • the above-mentioned HIL can also be prepared by a patterning process, for example.
  • the patterning process may include: first, plating a molybdenum oxide film on the substrate 23 on which the second driving circuit 223 is formed. Secondly, enter the yellow light chamber and spray a photoresist liquid (such as photoresist) with extremely high sensitivity. Furthermore, the mask is put on and irradiated with blue-violet light to expose the photoresist solution.
  • the mask includes a shielding area and an opening area.
  • the mask When performing blue-violet light exposure, the mask is placed between the substrate 23 and the light source, and the molybdenum oxide film is sprayed with photoresist.
  • the area of the photoresist blocked by the masking area of the mask is not irradiated by blue-violet light, that is, no exposure is performed, and the photoresist corresponding to the opening area of the mask is irradiated by blue-violet light, that is, exposure is performed.
  • the photoresist after exposure will be removed, and the unexposed photoresist will remain.
  • the molybdenum oxide film that is not blocked by the photoresist will eventually be etched away, that is, the molybdenum oxide film corresponding to the blocked area will be retained to form the required HIL.
  • the molybdenum oxide film corresponding to the open area will be etched away.
  • the HIL in the first light-emitting device 213 and the second light-emitting device 223 can be prepared through the same patterning process.
  • the HTL, ETL, and EIL in the first light-emitting device 213 and the second light-emitting device 223 can also be prepared through the above patterning process.
  • different patterns can be formed on the substrate 23 to prepare the first light emitting device 213 and the second light emitting device 223 described above.
  • Each of the plurality of second sub-pixels 221 in the same second pixel 22 includes one second light-emitting device 223.
  • the HILs included in the plurality of second light emitting devices 223 are connected as an integral structure.
  • HIL, HTL, ETL and EIL are all light-transmitting layers, they still have a certain influence on the transmittance. Therefore, by making at least one of HIL, HTL, ETL, and EIL in the second light emitting device 223 located only in the first opening 252 and not extending into the blank area between the adjacent second pixels 22, HIL can be avoided.
  • the influence of the film layers of, HTL, ETL and EIL on the transmittance of the second display area A2 further increases the transmittance of the second display area A2.
  • Example 3 The difference between Example 3 and Example 2 is that the structure of the pixel defining layer 25 is different.
  • the pixel defining layer 25 further includes at least one second opening 253 surrounded by a plurality of intersecting barrier walls 251.
  • the second opening 253 is located between adjacent second pixels 22 in the plurality of second pixels 22 arranged in an array, and is used to space adjacent second pixels 22.
  • the barrier 251 is not provided in the blank area between the adjacent second pixels 22. Since the blocking wall 251 is a light-shielding material, the transmittance of the second display area A2 can be further improved by not providing the blocking wall 251. According to the arrangement of the second pixels 22, the structure of the second opening 253 is also different. As shown in FIG. 11a, when only one row of sub-pixels are spaced between adjacent second pixels 22, the second opening 253 only penetrates one row of sub-pixels.
  • the adjacent second openings 253 are connected.
  • the structure of the second driving circuit 222 in the display screen 20 is improved.
  • the second driving circuit 222 includes a plurality of transistors.
  • Each transistor includes a conductive layer and a first insulating layer laminated with the conductive layer.
  • the driving transistor M4 includes a gate 241 and a gate insulating layer 242 which are sequentially stacked on the substrate 23 in a direction away from the substrate 23. , The active layer 243, the source and drain electrode layer 244, and the passivation layer 245.
  • the source/drain electrode layer 244 includes a first electrode and a second electrode.
  • the first electrode may be a source electrode
  • the second electrode may be a drain electrode, for example.
  • the conductive layer may be, for example, the gate 241 or the source/drain electrode layer 244.
  • the first insulating layer may be the gate insulating layer 242 or the passivation layer 245.
  • multiple transistors in the same second driving circuit 222 share the same first insulating layer.
  • the first insulating layers in adjacent second driving circuits 222 are arranged at intervals.
  • the first insulating layer in each second driving circuit 222 has a block structure, and the first insulating layers in the plurality of second driving circuits 222 are all independent structures with gaps between each other. It can also be understood that the first insulating layer does not extend into the blank area between the second pixels 22.
  • the aforementioned conductive layer is a source and drain electrode layer 244, and the first insulating layer is a passivation layer 245.
  • the passivation layer 245 in each second driving circuit 222 is a block structure, and the passivation layers 245 in adjacent second driving circuits 222 are arranged with gaps apart, rather than being an integral structure.
  • the film layers of the multiple transistors in the second driving circuit 222 are all arranged in the same layer, for example, the transistor M1, the transistor M2, the transistor M3, the driving transistor M4, the transistor M5, and the transistor shown in FIG. M6 and the gate of the transistor M7 are prepared through the same patterning process.
  • the patterning process may include: first, plating a metal film on the substrate 23. Secondly, enter the yellow light chamber and spray a photoresist liquid (such as photoresist) with extremely high sensitivity. Furthermore, the mask is put on and irradiated with blue-violet light to expose the photoresist solution. Subsequently, the developer is sent to the developing area to spray the developer to remove the photoresist after the light is illuminated, and the photoresist that is not illuminated is retained to protect the metal film, and the metal film in the area where the photoresist is not blocked is exposed. Then, the metal film that is not blocked by the photoresist is etched away. Finally, remove the remaining photoresist. In this way, the remaining structure is the required gate pattern.
  • a photoresist liquid such as photoresist
  • the mask includes a shielding area and an opening area.
  • the mask When performing blue-violet light exposure, the mask is placed between the substrate 23 and the light source, and the metal film is sprayed with photoresist.
  • the area of the photoresist blocked by the masking area of the mask is not irradiated by blue-violet light, that is, no exposure is performed, and the photoresist corresponding to the opening area of the mask is irradiated by blue-violet light, that is, exposure is performed.
  • the photoresist after exposure will be removed, and the unexposed photoresist will remain.
  • the metal film that is not shielded by the photoresist will eventually be etched away, that is, the metal film corresponding to the shielded area will be retained to form the required gate pattern.
  • the metal film corresponding to the opening area will be etched away.
  • the above-mentioned second driving circuit 222 can be prepared by changing the structure of the shielding area and the opening area in the mask, and forming different patterns on the substrate 23.
  • first driving circuit 212 and the second driving circuit 222 in the display screen 20 can be formed synchronously.
  • the transistors in the second driving circuit 222 are formed synchronously, in this example, only the driving transistor M4 in the second driving circuit 222 is taken as an example to illustrate each film layer in the second driving circuit 222.
  • the driving transistor M4 is a bottom-gate transistor.
  • the driving transistor M4 includes a gate electrode 241, a gate insulating layer 242, an active layer 243, a source and drain electrode layer 244, and a passivation layer 245 that are sequentially stacked on the substrate 23 in a direction away from the substrate 23. .
  • the source/drain electrode layer 244 includes a first electrode and a second electrode.
  • the first electrode may be a source electrode
  • the second electrode may be a drain electrode, for example.
  • the aforementioned conductive layer is the source and drain electrode layer 244, and the first insulating layer is the passivation layer 245.
  • the passivation layer 245 in each second driving circuit 222 is a block structure, and the passivation layers 245 in adjacent second driving circuits 222 are arranged with gaps apart, rather than being an integral structure.
  • the above-mentioned conductive layer is also a gate 241, and the first insulating layer is also a gate insulating layer 242.
  • the gate insulating layer 242 in each second driving circuit 222 has a block structure, and the gate insulating layers 242 in adjacent second driving circuits 222 are arranged at intervals by gaps, instead of being an integral structure.
  • the driving transistor M4 is a top-gate transistor.
  • the driving transistor M4 includes an active layer 243, a gate insulating layer 242, a gate 241, a passivation layer 245, and a source and drain electrode layer 244 stacked on the substrate 23 in a direction away from the substrate 23. .
  • the aforementioned conductive layers are the gate electrode 241 and the source and drain electrode layers 244, and the first insulating layer is the gate insulating layer 242 and the passivation layer 245.
  • the gate insulating layer 242 and the passivation layer 245 in each second driving circuit 222 are in a block structure, and the gate insulating layer 242 and the passivation layer 245 in the adjacent second driving circuit 222 are arranged at intervals instead of One-piece structure.
  • the insulating film layer may also have the same structure as the gate insulating layer 242.
  • the gate insulating layer 242 and the passivation layer 245 in each second driving circuit 222 extend to the area where the second light emitting device 223 is located as an example.
  • the gate insulating layer 242 and the passivation layer 245 may not extend to the area where the second light-emitting device 223 is located, but are only located in the area where the second driving circuit 223 is located.
  • the side of the second driving circuit 222 away from the substrate 23 may be provided with a flat layer 246 as required.
  • the gate insulating layer 242 and the passivation layer 245 are both light-transmitting layers, they still have a certain influence on the transmittance. Therefore, by making at least one of the gate insulating layer 242 and the passivation layer 245 a block structure and does not extend into the blank area between the adjacent second pixels 22, the gate insulating layer 242 and the passivation layer 245 can be avoided. The influence of these layers on the transmittance of the second display area A2 further increases the transmittance of the second display area A2.
  • the material of the first insulating layer is a light-shielding material.
  • the orthographic projection of the first insulating layer on the substrate 23 is staggered with the orthographic projection of the second light emitting device 223 on the substrate 23.
  • the orthographic projections of the conductive layers in the second driving circuit 222 on the substrate 23 are all located on the front of the first insulating layer on the substrate 23. Within the projection.
  • the orthographic projection of the first insulating layer on the substrate 23 is staggered with the orthographic projection of the second light-emitting device 223 on the substrate 23. It can be understood that the first insulating layer does not extend to the area where the second light-emitting device 223 is located, but is only located on the first insulating layer. 2. The area where the driving circuit 222 is located.
  • the first insulating layer is a passivation layer 245
  • the material of the passivation layer 245 is a light-shielding material
  • the orthographic projection of the passivation layer 245 on the substrate 23 and the second light emitting device 223 on the substrate 23 The orthographic projection of has no overlap.
  • the second driving circuit 222 includes a plurality of transistors, and the plurality of transistors are connected by connecting wires, and there is a gap between the connecting wires and the connecting wires. Since the line width of the connecting line itself and the width of the gap between the connecting lines are in the order of microns, these connecting lines constitute a grating. As shown in Figure 13, when ambient light passes through the grating formed by connecting lines, diffraction occurs. The diffracted light has bright and dark stripes, which affects the accuracy of information collected by the optical device 30.
  • the material of the first insulating layer as a light-shielding material, and making the first insulating layer cover the gap between the connecting lines, it is possible to avoid the formation of gratings between the connecting lines, thereby avoiding diffraction of ambient light and ensuring optical The accuracy of the information collected by the device 30.
  • the grating formed by the second driving circuit 222 is shielded.
  • the display screen 20 further includes a first light-shielding layer, and the first light-shielding layer includes a plurality of light-shielding blocks 27 independently arranged, and each second driving circuit 222 corresponds to a light-shielding block 27.
  • the second driving circuit 222 is not provided in the gap between the adjacent second pixels 22, the light shielding block 27 is not provided in the corresponding position.
  • the light-shielding block 27 is not shown in some of the second sub-pixels 221 in FIG. 14a.
  • the first light shielding layer may be located on the side of the second driving circuit 222 close to the substrate 23 or on the side of the second driving circuit 222 away from the substrate 23.
  • the light shielding block 27 is closer to the second driving circuit 222, the light shielding effect on the second driving circuit 222 is better. Therefore, in some embodiments, as shown in FIG. 14 b, the light shielding block 27 is located on the side of the second light emitting device 223 close to the substrate 23.
  • the light shielding block 27 may directly contact the conductive layer (taking the gate 241 as an example) in the second driving circuit 222.
  • the material of the light shielding block 27 is a conductive material, an insulating layer should be provided between the light shielding block 27 and the conductive layer in the second driving circuit 222.
  • the orthographic projection of the second driving circuit 222 on the substrate 23 is located within the orthographic projection of the light shielding block 27 corresponding to the second driving circuit 222 on the substrate 23. In other words, the light shielding block 27 completely covers the second driving circuit 222.
  • the shading block 27 does not block the display light.
  • the orthographic projection of the shading block 27 on the substrate 23 is the same as the orthographic projection of the second light emitting device 223 on the substrate 23. Projection staggered.
  • the light shielding block 27 does not extend to the area where the second light emitting device 223 is located.
  • the light shielding block 27 by arranging the light shielding block 27 and making the light shielding block 27 cover the second driving circuit 222, it is possible to avoid the formation of a grating between the gate 21, the source and drain electrode layer 224 and the connecting lines between the transistors in the second driving circuit 222. , Thereby avoiding diffraction of ambient light, and ensuring the accuracy of information collected by the optical device 30.
  • the transmittance of the area where the second driving circuit 222 is located is relatively low, the influence of the first light shielding layer on the transmittance is relatively small, and the performance of the optical device 30 will not be affected.
  • the grating formed by the second driving circuit 222 is shielded.
  • FIG. 15a At least a part of the outline of the orthographic projection of the second driving circuit 222 on the substrate 23 is a broken line.
  • the part in the dashed box in Figure 15a is a broken line.
  • the display screen 20 further includes a padding layer, as shown in FIG. 15b, the padding layer includes a plurality of independently set padding blocks 28.
  • the orthographic projection of the filling block 28 on the substrate 23 corresponds to the concave position of the broken line of the second driving circuit 222 corresponding to the filling block 28.
  • the regions coincide.
  • one filling block 28 corresponds to one recessed location, and the shapes of the multiple filling blocks 28 are not completely the same.
  • the filling block 28 fills in the uneven area at the edge of the second driving circuit 222, so that when the filling block 28 and the second driving circuit 222 are integrated, the orthographic projection of the whole on the substrate 23 is Convex polygon.
  • the material of the filling block 28 is not limited, and it may be a conductive material or a non-conductive material. It should be understood that when the material of the filling block 28 is a conductive material, the filling block 28 should not affect the performance of the gate 241 and the source/drain electrode layer 244 in the second driving circuit 222.
  • the filling layer may be provided on the side of the second driving circuit 222 away from the substrate 23, and the filling layer may also be provided on the side of the second driving circuit 222 close to the substrate 23.
  • the material of the filling layer is a conductive material
  • at least one insulating layer is provided between the filling layer and the second driving circuit 222.
  • the filling layer and at least one conductive layer in the second driving circuit 222 have the same layer and the same material.
  • the material of the filling layer is a conductive material.
  • the filling layer is formed at the same time.
  • the filling layer and the gate electrode 241 in the second driving circuit 222 have the same layer and the same material as an example, although the filling layer and the gate electrode 241 in the second driving circuit 222 are prepared by the same patterning process. However, if the filling layer and the gate 241 are electrically connected to affect the performance of the second driving circuit 222, the filling layer and the gate 241 should have a separate structure. If the filling layer and the gate 241 will not affect the performance of the second driving circuit 222 after being electrically connected, the filling layer and the gate 241 may be an integrated structure.
  • the filling layer is not limited to only one layer structure, and may be a combination of multiple layers.
  • the padding layer may include a first sub padding layer and a second sub padding layer.
  • the first sub-filling layer can be the same layer and the same material as the gate electrode 221 in the second driving circuit 222
  • the second sub-filling layer can be the same layer and the same material as the source and drain electrode layers 224 in the second driving circuit 222.
  • the first sub-filling layer and the second sub-filling layer are joined together to form the shape of the filling layer.
  • the edge of the second driving circuit 222 is uneven and irregular, at least a part of the outline of the orthographic projection of the second driving circuit 222 on the substrate 23 is a broken line, that is, the second driving circuit 222 is on the substrate 23.
  • the size of these small features is on the order of micrometers, which will also cause diffraction of light, thereby affecting the normal operation of the optical device 30 under the display screen 20.
  • the small features on the outline of the orthographic projection of the second driving circuit 222 on the substrate 23 are filled to prevent the second driving circuit 222 from forming a grating, thereby avoiding the second driving
  • the circuit 222 affects the normal operation of the optical device 30 under the display screen 20.
  • the grating formed by the signal lines on the display screen 20 is shielded.
  • the display screen 20, as shown in FIG. 16a, further includes a second signal line group 224 for transmitting driving signals to the second driving circuit 222.
  • the second signal line group 224 includes a second data line 2241 and a plurality of second data lines 2241 arranged crosswise. Two signal lines 2242; the second data line 2241 is used to transmit data voltage; the second signal line 2242 is used to transmit operating voltage, or provide a gate signal to the gate 241 of a transistor in the second driving circuit 222.
  • the second signal line 2242 may include, for example, multiple second gate lines and multiple second voltage lines.
  • a second gate line is used to provide a gate signal to the gate 241 of a transistor in the second driving circuit 222, and the gate signal refers to a signal that controls the gate 241 of the transistor to be turned on or off.
  • a second voltage line is used to provide a voltage signal to the first pole or the second pole of a transistor in the second driving circuit 222.
  • the working voltage includes an initial signal Vint, a high-level power supply voltage signal ELVDD, and a low-level power supply voltage signal ELVSS.
  • the strobe signal includes a first scan signal N-1, a second scan signal N, and an enable signal EM.
  • each second sub-pixel 221 in a row of second sub-pixels 221 is separately connected to a second data line 2241.
  • the display screen 20, as shown in FIG. 16a, further includes a second light-shielding layer.
  • the second light-shielding layer includes a plurality of independently arranged light-shielding bars 29.
  • Each second signal line group 224 corresponds to a light-shielding bar 29.
  • the second signal group 224 corresponds to one light shielding bar 29.
  • At least part of the orthographic projection of the second signal line group 224 on the substrate 23 is located within the orthographic projection of the light shielding bar 29 on the substrate 23.
  • the orthographic projection of the second signal line 2242 in the second signal line group 224 on the substrate 23 is within the orthographic projection of the light shielding bar 29 on the substrate 23, but the second The orthographic projection of the second data line 2241 in the signal wire group 224 on the substrate 23 is not within the orthographic projection of the light shielding bar 29 on the substrate 23.
  • the light shielding strip 29 only covers the second signal line 2242 in the second signal line group 224, and does not cover the second data line 2241 in the second signal line group 224.
  • the light-shielding strip 29 can also be divided into a first sub-light-shielding strip and a second sub-light-shielding strip.
  • the orthographic projection of the second data line 2241 in the second signal line group 224 on the substrate 23 is within the orthographic projection of the light shielding bar 29 on the substrate 23, but the second The orthographic projection of the second signal wire 2242 in the signal wire group 224 on the substrate 23 is not within the orthographic projection of the light shielding bar 29 on the substrate 23.
  • the light shielding strip 29 only covers the second data line 2241 in the second signal line group 224, and does not cover the second signal line 2242 in the second signal line group 224.
  • the second data lines 2242 connected to the two rows of second sub-pixels 221 are adjacent, instead of one row of second sub-pixels 221 as shown in FIG. 16a.
  • two adjacent second data lines 2241 can share the same light shielding bar 29.
  • the placement position of the second light shielding layer is not limited, and it can be placed on the side of the second signal line group 224 close to the substrate 23, or can be placed on the side of the second signal line group 224 away from the substrate 23.
  • the second light shielding layer may also be arranged between two adjacent layers of signal lines.
  • the material of the second light shielding layer is not limited, and it may be a conductive material or a non-conductive material.
  • an insulating layer should be provided between the second light shielding layer and the signal lines in the second signal line group 224.
  • the second light shielding layer can serve as an insulating layer between two adjacent layers of signal lines. This can reduce the number of layers.
  • the second signal line group 224 includes multiple signal lines, there are gaps between the signal lines and the signal lines. Because the line width of the signal line itself (for example, 2.5 ⁇ m) and the width of the gap between the signal lines (for example, 3 ⁇ m) are both In the micron level, a grating is formed between these signal lines, and diffraction as shown in FIG. 13 occurs when ambient light passes through, which affects the normal operation of the optical device 30 under the display screen 20.
  • a second light shielding layer is separately provided to shield the signal lines in the second signal line group 224, so that when ambient light is incident, the area where the second signal line group 224 is located is completely opaque. . It can prevent the signal lines from forming a grating, eliminate the diffraction caused by the signal lines in the second signal line group 224, and ensure the performance of the optical device 30.
  • the transmittance of the area where the second signal line group 224 is located is relatively low, the influence of the second light shielding layer on the transmittance is relatively small, and the performance of the optical device 30 will not be affected.
  • some are used as first sub-signal lines and some are used as second sub-signal lines.
  • the initial signal Vint, the high-level power supply voltage signal ELVDD, and the low-level power supply voltage signal ELVSS in the second signal line 2242 serve as the first sub-signal line.
  • the first scan signal N-1, the second scan signal N, and the enable signal EM in the second signal line 2242 serve as the second sub-signal line.
  • the first sub-signal line 22421 and the second sub-signal line 22422 extend in the same direction.
  • the first sub-signal line 22421 and the second sub-signal line 22422 are alternately arranged, and the first sub-signal line 22421 is on the substrate 23.
  • the orthographic projection overlaps the orthographic projection of the second sub-signal line 22422 located on both sides of the first sub-signal line 22421 on the substrate 23.
  • first sub-signal line 22421 and the second sub-signal line 22422 located on both sides of the first sub-signal line 22421 overlap.
  • the second sub-signal line 22422 and the first sub-signal line 22421 located on both sides of the second sub-signal line 22422 are also overlapped.
  • the display screen 20 further includes a second insulating layer 26 located between the first sub-signal line 22421 and the second sub-signal line 22422.
  • the orthographic projection of the first sub-signal line 22421 on the substrate 23 and the orthographic projection of the second sub-signal line 22422 located on both sides of the first sub-signal line 22421 on the substrate 23 are intersected.
  • the gap h1 between adjacent first sub-signal lines 22421 is smaller than the line width h2 of the second sub-signal line 22422
  • the gap h3 between adjacent second sub-signal lines 22422 is smaller than the line width of the first sub-signal line 22421 h4.
  • first sub-signal line 22421 may be disposed on the side of the second sub-signal line 22422 close to the substrate 23, or the second sub-signal line 22422 may be disposed on the side of the first sub-signal line 22421 close to the substrate 23.
  • the gap formed by the signal lines on the same layer can be blocked, which is equivalent to eliminating the signal
  • the gap between the lines eliminates the diffraction caused by the signal lines.
  • the material of the signal lines in the second signal line group 224 as a transparent material, the grating formed by the signal lines in the second signal line group 224 can be eliminated.
  • the display screen 20, as shown in FIG. 16a, further includes a second signal line group 224 for transmitting driving signals to the second driving circuit 222.
  • the second signal line group 224 includes a second data line 2241 and a plurality of second data lines 2241 arranged crosswise. Two signal lines 2242; the second data line 2241 is used to transmit data voltage; the second signal line 2242 is used to transmit operating voltage, or provide a gate signal to the gate 241 of a transistor in the second driving circuit 222.
  • the material constituting the second data line 2241 is a transparent conductive material.
  • the material constituting the second signal line 2242 is a transparent conductive material.
  • the transparent conductive material can be, for example, indium zinc oxide (IZO), indium tin oxide (ITO), aluminum zinc oxide (AZO), indium fluoride oxide (indium F oxide). , IFO) at least one of.
  • IZO indium zinc oxide
  • ITO indium tin oxide
  • AZO aluminum zinc oxide
  • IFO indium fluoride oxide
  • the signal lines in the second signal group 224 using a transparent conductive material, not only can the signal lines in the second signal group 224 be prevented from forming a grating, but also the signal lines in the second signal group 224 can be prevented from shading. Thereby, the light receiving effect and light receiving amount of the optical device 30 can be improved.
  • the display screen 20 further includes a first signal line group 214 for transmitting driving signals to the first driving circuit 212 and a second signal line group 224 for transmitting driving signals to the second driving circuit 222.
  • the first signal line group 214 includes a plurality of first signal lines 2142; the first signal line 2142 is used to transmit a working voltage or provide a gate signal to a gate of a transistor in the first driving circuit 212.
  • the second signal line group 224 includes a plurality of second signal lines 2242; the second signal line 2242 is used to transmit an operating voltage or provide a gate signal to a gate of a transistor in the second driving circuit 222.
  • the display screen 20 includes two high-density pixel groups G respectively located on both sides of the low-density pixel group D and arranged side by side with the low-density pixel group.
  • the low-density pixel group D is provided with a first high-density pixel group G1 on the left, and the low-density pixel group D is provided with a second high-density pixel group G2 on the right.
  • Each row of second pixels 22 in the plurality of arrays of second pixels 22 is arranged in line with a row of first pixels 21 of the plurality of arrays of first pixels 21.
  • the first high-density pixel group G1 and the second high-density pixel group G2 are each provided with a plurality of first pixels 21 arranged in an array, and the first pixels 21 arranged in a plurality of arrays are distributed with a plurality of rows of first pixels.
  • the first high-density pixel group G1 and the second high-density pixel group G2 each include three rows of first pixels 21 as an example.
  • Each low-density pixel group D is provided with a plurality of second pixels 22 arranged in an array, and at least one row of second pixels 22 are distributed among the plurality of second pixels 22 arranged in an array.
  • each low-density pixel group D includes two rows of second pixels 22 as an example.
  • Each of the two rows of second pixels 22 is arranged in parallel with one of the three rows of first pixels 21 in the first high-density pixel group G1, and is aligned with one of the three rows of first pixels 21 in the second high-density pixel group G2. Peer settings.
  • one row of pixels consists of one row of first pixels 21 in the first high-density pixel group G1, and one row of second pixels in the low-density pixel group D. Pixels 22 and a row of first pixels 21 in the second high-density pixel group G2 are composed.
  • a row of pixels consists of a row of first pixels 21 in the first high-density pixel group G1 and a row of first pixels 21 in the second high-density pixel group G2.
  • a second display area A2 between a row of first pixels 21 in the first high-density pixel group G1 and a row of first pixels 21 in the second high-density pixel group G2.
  • Each row of the first pixels 21 includes a plurality of first sub-pixels 211 arranged in an array; each row of the second pixels 22 includes a plurality of second sub-pixels 221 arranged in an array.
  • each first pixel 21 includes four first sub-pixels 211, and each row of first pixels 21 includes two rows of first sub-pixels 211 as an example.
  • the first row of pixels 1 illustrated in FIG. 18a includes two rows of sub-pixels, and each row of sub-pixels includes the first sub-pixel 211 and the second sub-pixel 221.
  • the first signal line 2142 electrically connected to the first sub-pixel 211 in the same row and the second signal line electrically connected to the second sub-pixel 221 in each row of the second pixel 22 2242 shared.
  • a row of second pixels 22 and a row of first pixels 21 are arranged in parallel.
  • the first row of first sub-pixels 211 in the row of first pixels 21, the first row of second sub-pixels 221 in the row of second pixels 22, and the second row of The first sub-pixels 211 of the first row of the first pixels 21 in the high-density pixel group G2 share the same second signal line 2242, and no separate first signal line 2142 is provided.
  • the first sub-pixel 211 in the second row of the first pixel 21 in the row, the second sub-pixel 221 in the second row in the second pixel 22, and the second high-density pixel share the same second signal line 2242, and no separate first signal line 2142 is provided.
  • the row does not have the second pixel 22, and only includes one row of the first pixel 21.
  • the first sub-pixels 211 in the first row of the first pixels 21 in the first high-density pixel group G1 share the same first signal line 2142
  • the first sub-pixels 211 in the row of the first high-density pixel group G2 share the same first signal line 2142.
  • the first sub-pixels 211 in the first row of the pixels 21 share the same first signal line 2142.
  • the first sub-pixels 211 of the first row of the first pixels 21 in the row of the two high-density pixel groups G do not share the same first signal line 2142.
  • the first sub-pixel 211 in the first row of the first high-density pixel group G1 is connected to a first signal line 2142
  • the first row of the second high-density pixel group G2 is the first sub-pixel 211.
  • the sub-pixel 211 is connected to a first signal line 2142, and the two first signal lines 2142 are disconnected at the second display area A2 and are not connected to each other.
  • first sub-pixels 211 in the second row in the first high-density pixel group G1 are connected to a first signal line 2142
  • first sub-pixels 211 in the second row in the second high-density pixel group G2 are connected to a first signal Line 2142
  • the two first signal lines 2142 are disconnected at the second display area A2 and are not connected to each other.
  • the third row of pixels 3 illustrated in FIG. 18a has the same structure as the first row of pixels 1.
  • the first high-density pixel group G1 and the second high-density pixel group G2 does not coincide with a row of the second sub-pixel 221 in the low-density pixel group D, the first high-density pixel group G1 and There is a second display area A2 between the row of first sub-pixels 211 in the second high-density pixel group G2, so the row of first sub-pixels in the first high-density pixel group G1 and the second high-density pixel group G2 211 is independently connected to a first signal line 2142.
  • the first sub-pixels 211 in the same row in the first high-density pixel group G1 and the second high-density pixel group G2 share the same first signal line 2142, And the first signal line 2142 passes through the second display area A2.
  • the structure shown in FIG. 18b that is, the first sub-pixels 211 in the same row in the first high-density pixel group G1 and the second high-density pixel group G2 share the same first signal line 2142, And the first signal line 2142 passes through the second display area A2.
  • the first sub-pixels 211 in the same row in the first high-density pixel group G1 and the second high-density pixel group G2 do not share the same first signal line 2142, and are not provided in the second display area A2
  • the first signal line 2142 is not needed at the position of the second pixel 22, which can avoid the first signal line 2142 to block the ambient light, and further improve the transmittance of the second display area A2.
  • the resulting diffraction phenomenon is weaker. Therefore, by not providing the first signal line 2142 at the position where the second pixel 22 is not provided in the second display area A2, the number of signal lines in the second display area A2 can be reduced, thereby reducing diffraction interference.
  • the first signal line 2142 coupled to the first sub-pixel 211 in the first high-density pixel array G1, and the second high-density pixel array is separately connected to a gate driving circuit 40 for independent driving.
  • the display screen 20 is a dual-side driving display screen.
  • a gate driving circuit 40 may be separately connected.
  • the gate driving circuit 40 may be a gate driver on array (GOA) circuit, or a gate driving integrated circuit (IC).
  • GOA gate driver on array
  • IC gate driving integrated circuit
  • the display screen 20, as shown in FIG. 19a, further includes a first signal line group 214 for transmitting driving signals to the first driving circuit 212 and a second signal line group 224 for transmitting driving signals to the second driving circuit 222.
  • the first signal line group 214 includes a first data line 2141; the first data line 2141 is used to transmit a data voltage.
  • the second signal line group 224 includes a second data line 2241; the second data line 2241 is used to transmit a data voltage.
  • the display screen 20 includes two high-density pixel groups G respectively located on both sides of the low-density pixel group D and arranged side by side with the low-density pixel group D.
  • the third high-density pixel group G3 and the fourth high-density pixel group G4 are provided on the upper side of the low-density pixel group D.
  • Each column of second pixels in the plurality of arrays of second pixels is arranged in the same column as a column of first pixels in the plurality of arrays of first pixels.
  • the third high-density pixel group G3 and the fourth high-density pixel group G4 are each provided with a plurality of first pixels 21 arranged in an array, and a plurality of first pixels 21 arranged in an array are distributed with a plurality of first pixels 21 Pixel 21.
  • the third high-density pixel group G3 and the fourth high-density pixel group G4 each include five columns of first pixels 21 as an example.
  • Each low-density pixel group D is provided with a plurality of second pixels 22 arranged in an array, and the plurality of second pixels 22 arranged in an array is distributed with at least one column of second pixels 22.
  • each low-density pixel group D includes three columns of second pixels 22 as an example.
  • Each of the three columns of second pixels 22 is arranged in the same column as one of the five columns of first pixels 21 in the third high-density pixel group G3, and is arranged in the same column as one of the five columns of first pixels 21 in the fourth high-density pixel group G4 Peer settings.
  • one column of pixels consists of a column of first pixels 21 and a low-density pixel group in the third high-density pixel group G3.
  • a row of second pixels 22 in D and a row of first pixels 21 in the fourth high-density pixel group G4 are composed.
  • a column of pixels consists of a column of first pixels 21 in the third high-density pixel group G3 and a column of first pixels in the fourth high-density pixel group G4.
  • Pixel 21 is composed.
  • a second display area A2 is spaced between a row of first pixels 21 in the third high-density pixel group G3 and a row of first pixels 21 in the fourth high-density pixel group G4.
  • Each column of first pixels 21 includes a plurality of first sub-pixels 221 arranged in an array; each column of second pixels 22 includes a plurality of second sub-pixels 221 arranged in an array.
  • each first pixel 21 includes four first sub-pixels 211, and each column of first pixel 21 includes two columns of first sub-pixels 211 as an example.
  • the first column of pixels (1) illustrated in FIG. 19a includes two columns of sub-pixels, and each column of sub-pixels includes the first sub-pixel 211 and the second sub-pixel 221.
  • the first data line 2141 electrically connected to the first sub-pixel 211 in the same column is electrically connected to the second data line 2141 electrically connected to the second sub-pixel 221 in the second pixel 22 of each column.
  • the line 2241 is shared.
  • the two first data lines 2141 electrically connected to the first sub-pixels 21 located in the same column are coupled through the connecting line 2143, and the connecting line 2143 bypasses the second display area A2.
  • a column of second pixels 22 and a column of first pixels 21 are arranged in the same column.
  • the first sub-pixel 211 in the first column of the first pixel 21, the second sub-pixel 221 in the first column of the second pixel 22, and the fourth share the same second data line 2241, and no separate first data line 2141 is provided.
  • the first sub-pixel 211 in the second column of the first pixel 21 in the column, the second sub-pixel 221 in the second column of the second pixel 22 in the column, and the fourth high-density pixel share the same second data line 2241, and the first data line 2141 is no longer separately provided.
  • the column does not have the second pixel 22, and only includes one column of the first pixel 21.
  • the first sub-pixel 211 in the first column of the first pixel 21 in the third high-density pixel group G3 shares the same first data line 2141
  • the first sub-pixel 211 in the first pixel 21 in the fourth high-density pixel group G4 The first sub-pixels 211 in the first column of the pixels 21 share the same first data line 2141.
  • Two first data lines 2141 respectively connected to the first sub-pixels 211 in the first column of the first pixel 21 in the two high-density pixel groups G are coupled through the connection line 2143.
  • the connecting line 2143 surrounds the second display area A2, that is, the connecting line 2143 is located in the first display area A1 and does not enter the second display area A2.
  • the first sub-pixel 211 in the first column of the third high-density pixel group G3 is connected to a first data line 2141, and the fourth high-density pixel group G4
  • the first sub-pixels 211 of the first column are connected to one first data line 2141, and the two first data lines 2141 are coupled through the connection line 2143.
  • first sub-pixel 211 in the second column in the third high-density pixel group G3 is connected to a first data line 2141
  • first sub-pixel 211 in the second column in the fourth high-density pixel group G4 is connected to a first data line.
  • Line 2141, the two first data lines 2141 are coupled through the connecting line 2143.
  • the third high-density pixel group G3 and the fourth high-density pixel group G4 are independently connected to a first data line 2141, and two first data lines 2141 are coupled through a connection line 2143.
  • the first data line 2141 passes through the second display area A2.
  • the structure illustrated in FIG. 19a that is, the first data lines 2141 respectively connected to the first sub-pixels 211 in the same column in the third high-density pixel group G3 and the fourth high-density pixel group G4 are coupled through the connecting line 2143,
  • the line 2143 does not pass through the second display area A2, but bypasses the second display area A2.
  • the first data line 2141 does not need to be provided at the position where the second pixel 22 is not provided in the second display area A2, which can prevent the first data line 2141 from blocking the ambient light and further improve the transmittance of the second display area A2.
  • the second display area A2 since there are fewer signal lines in the second display area A2, the resulting diffraction phenomenon is weaker. Therefore, by coupling the two first data lines 2141 in the same column through the connecting line 2143, and the connecting line 2143 does not pass through the second display area A2, but bypasses the second display area A2, the second display area can be reduced. The number of signal lines in area A2, thereby reducing diffraction interference.
  • a black matrix layer is provided in the display screen 20 to prevent ambient light from being directed to the first drive circuit 212, the first signal line group 214, the second drive circuit 222, and the second signal line group 224, and reduce the impact of ambient light on the first drive circuit 212, The reflections at the first signal line group 214, the second driving circuit 222, and the second signal line group 224 improve the display effect of the display screen 20.
  • the display screen 20 further includes a black matrix layer 50 disposed on the side of the first driving circuit 212 and the second driving circuit 222 away from the substrate 23.
  • the black matrix layer 50 may be disposed between the first driving circuit 212 and the second driving circuit 222 and the first light emitting device 213 and the second light emitting device 223, or may be disposed between the first light emitting device 213 and the second light emitting device 223 is away from the side of the substrate 23.
  • the orthographic projections on the substrate 23 are all located within the orthographic projections of the black matrix layer 50 on the substrate 23.
  • the first signal line group 214 may include at least one of the first data line 2141 and the first signal line 2142
  • the second signal line group 224 may include at least one of the second data line 224 and the second signal line 2242.
  • the black matrix layer 50 may include a plurality of black matrix bars.
  • the specific shape of the black matrix layer 50 is related to the arrangement of the signal lines in the first signal line group 214 and the second signal line group 224.
  • the black matrix layer 50 can also cover the connecting line 2143.
  • the black matrix layer 50 covers the first data line 2241 located in the second display area A2 .
  • the pattern of the black matrix layer 50 shown in FIG. 20b is different from the pattern of the black matrix layer 50 shown in FIG. 20a.
  • the first drive circuit 212, the first signal line group 214, the second drive circuit 222, and the second signal line group 224 in the display screen 20 will reflect the ambient light. The reflected light will interfere with the display light.
  • the black matrix layer 50 is provided, and the black matrix layer 50 covers the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224. In this way, on the one hand, the ambient light can be prevented from irradiating the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224.
  • the black matrix layer 50 can also block the ambient light reflected by the first driving circuit 212, the first signal line group 214, the second driving circuit 222, and the second signal line group 224, which can reduce the interference of the reflected light on the display light.
  • the second cathode in the cathode second light-emitting device 223 By making the second cathode in the cathode second light-emitting device 223 thinner, the light filtering effect of the second cathode is reduced, and the transmittance of the second display area A2 is increased.
  • the first light emitting device 213 includes a first cathode c1
  • the second light emitting device 223 includes a second cathode c2.
  • the thickness h5 of the first cathode c1 is greater than the thickness h6 of the second cathode c2.
  • an evaporation process can be used to form the first cathode c1 and the second cathode c2.
  • the first mask 60 as shown in FIG. 22a is used to shield the substrate 23 on which the electron injection layer EIL is formed, and the deposition time is A*x%.
  • the first mask 60 includes an opening area 61 and a shielding area 62, and the opening area 61 corresponds to the first display area A1 and the second display area A2.
  • A is the time required to form the first cathode c1.
  • x is the set value, and the value of x is related to the thickness of the second and c2, 0 ⁇ x ⁇ 1.
  • a cathode film c3 is formed, and the cathode film c3 covers the first display area A1 and the second display area A2.
  • the thickness h6 of the cathode film c3 is equal to the thickness h6 of the second cathode c1.
  • the second mask 70 as shown in FIG. 22c is used to shield the substrate 23 on which the cathode film c3 is formed, and the time for vapor deposition A*(1-x%).
  • the second mask 70 includes an opening 71 and a shielding portion 72.
  • the opening 71 only corresponds to the first display area A1, and the shielding portion 72 shields the second display area A2.
  • the second vapor deposition only vaporizes the first display area A1, and does not vaporize the second display area A2, so as to increase the thickness of the cathode film c3 in the first display area A1, and form as shown in FIG. 21
  • the portion of the cathode film c3 located in the second display area A2 serves as the second cathode c2 shown in FIG. 21.
  • the thickness of the second cathode c2 is related to the length of the evaporation time, and the thinner the second cathode c2, the higher the transmittance. Therefore, from the perspective of increasing the transmittance of the second display area A2, the shorter the first evaporation time x, the better.
  • the electrical properties such as the resistivity of the second cathode c2 are also related to the thickness of the second cathode c2. The thinner the thickness of the second cathode c2, the worse its electrical properties will affect its normal function. The evaporation time should not be too short, and the requirements for transmittance and electrical performance should be taken into consideration at the same time.
  • the transmittance of the second cathode c2 can be increased, so that the transmittance of the second display area A2 can be improved. Overrate.
  • the second cathode c2 in the second display area A2 is patterned, and the second cathode c2 is not formed in the area where the second sub-pixel 221 is not provided.
  • Each second light emitting device 223 in the display screen 20 includes a second cathode c2, as shown in FIG. 23a, and adjacent second cathodes c2 are spaced apart.
  • the area where the second sub-pixel 221 is not provided does not form the second cathode c2.
  • the plurality of second cathodes c2 may or may not be electrically connected.
  • the first cathode c1 included in the plurality of first light emitting devices 211 in the first display area A1 may be an integral structure.
  • the first cathode c1 and the second cathode c2 can be prepared by a patterning process, for example.
  • the first cathode c1 and the second cathode c2 can also be prepared by an evaporation process.
  • the area where the first cathode c1 and the second cathode c2 need to be evaporated corresponds to the opening area of the mask, and the first cathode c1 and the second cathode are not required to be evaporated.
  • the area of the cathode c2 corresponds to the shielding area of the mask.
  • the first cathode c1 and the second cathode c2 can also be prepared by a laser cutting process, and the laser cutting removes the cathode material in the excess area.
  • the first cathode c1 and the second cathode c2 can also be prepared by a wet etching process to etch away the cathode material in the excess area.
  • the filtering effect of the second cathode c2 on the ambient light can be eliminated, and the transmittance of the second display area A2 can be further improved.
  • the display screen 20 is provided with a polarizing layer, but the polarizing layer has a third opening at a position corresponding to the second display area A2, and the polarizing layer is only located in the first display area A1.
  • the display screen 20 further includes a polarizing layer 80; the polarizing layer 80 is provided with a third opening, and the third opening is located in the second display area A2.
  • the polarizing layer 80 is disposed on the side of the first driving circuit 212 away from the substrate 23.
  • the polarizing layer 80 may be a manufactured polarizer (polarizer).
  • polarizer polarizer
  • a polarizer can be attached to the surface of the display screen 20 on the light exit side.
  • the polarizer mainly includes: a special-shaped film layer, a pressure sensitive adhesive (PSA) layer, a polyvinyl alcohol (PVA) layer, and a tri-cellulose acetate (tri-cellulose) layer, which are sequentially stacked in a direction away from the substrate 23.
  • PSA pressure sensitive adhesive
  • PVA polyvinyl alcohol
  • tri-cellulose tri-cellulose acetate
  • the PVA layer plays the role of polarization.
  • the TAC layer is used to isolate water and air and protect the PVA layer from contact with water and air.
  • the PSA layer is used to stick the polarizer on the surface of the light exit side of the display screen 20.
  • the special-shaped film layer protects the PSA layer, and the protective layer protects the TAC.
  • the polarizing layer 80 may be a grid polarizer (GP).
  • the wire grid polarizing layer may be integrated in the display screen 20 by means of sputtering, nanoimprinting, photolithography, and the like.
  • the material constituting the wire grid polarizing layer may be metal.
  • the material constituting the wire grid polarizing layer includes but is not limited to aluminum (Al), copper (Cu), silver (Ag), gold (Au), chromium (Cr), and the like.
  • a polarizing film layer covering the entire display area A may be prepared first, and then the polarizing film layer located in the second display area A2 may be removed by laser cutting, so as to obtain a polarizing film layer located only in the first display area.
  • the pattern of the removed part of the polarizing film layer is the same as the pattern of the second display area A2, and the remaining pattern covers the first display area A1.
  • the preparation method of the polarizing layer 80 can also be prepared only at the first display area A1 and not at the second display area A2 during the preparation process, so as to save the cutting process.
  • the transmittance of the polarizing layer 80 is less than 50%, which is extremely large.
  • the polarizing layer 80 is only provided in the first display area A1, and the polarizing layer 80 is not provided in the second display area A2. In this way, the polarizing layer 80 does not filter out the ambient light passing through the second display area A2, and can improve the transmittance of the second display area A2.
  • the display screen 20 is also provided with a color filter layer to filter the reflected light in the display screen 20 to reduce the interference of the reflected light on the display light.
  • the display screen 20 further includes a color filter layer 90 disposed on the side of the first light emitting device 213 and the second light emitting device 223 away from the substrate 23.
  • the color filter layer 90 includes at least three color filter patterns 91 respectively corresponding to the three primary colors.
  • the color filter layer 90 includes a red color filter pattern, a green color filter pattern, and a blue color filter pattern.
  • each first light-emitting device 213 corresponds to a color filter pattern 91 that emits the same color as the first light-emitting device 213, and each second light-emitting device 223 corresponds to a color filter that emits the same color as the second light-emitting device 223.
  • Light pattern 91 corresponds to a color filter pattern 91 that emits the same color as the first light-emitting device 213, and each second light-emitting device 223 corresponds to a color filter that emits the same color as the second light-emitting device 223.
  • one first light emitting device 213 corresponds to one color filter pattern
  • one second light emitting device 223 corresponds to one color filter pattern
  • the first light emitting device 213 emitting red light corresponds to a red color filter pattern
  • the first light emitting device 213 emitting green light corresponds to a green color filter pattern
  • the first light emitting device 213 emitting blue light corresponds to a blue color filter pattern.
  • the second light emitting device 223 emitting red light corresponds to the red color filter pattern
  • the second light emitting device 223 emitting green light corresponds to the green color filter pattern
  • the second light emitting device 223 emitting blue light corresponds to the blue color filter pattern.
  • the reflective structures such as the first drive circuit 212, the first signal line group 214, the second drive circuit 222, and the second signal line group 224 in the display screen 20 will affect Reflecting the ambient light causes the reflected light to interfere with the display light and affect the display effect.
  • the reflected light can be emitted from the display screen 20 after passing through the color filter layer 90.
  • red color filter pattern 91 in the color filter layer 90 when the reflected light is directed to the red color filter pattern 91, only red light in the reflected light can pass through the red color filter pattern 91, and the green in the reflected light Light and blue light cannot pass through the red color filter pattern 91.
  • the red color filter pattern 91 filters out at least two thirds of the reflected light.
  • only green light in the reflected light can pass through the green color filter pattern 91, and only blue light in the reflected light can pass through the blue color filter pattern 91. Therefore, the color filter layer 90 in this example can filter the reflected light better, so that the display screen 20 can have a better display effect even without a polarizer.
  • each first light-emitting device 213 corresponds to a color filter pattern 91 that emits the same color as the first light-emitting device 213, each second light-emitting device 223 corresponds to a color that is the same as the second light-emitting device 223. Filter pattern 91.
  • the red light emitted by the red-emitting first light-emitting device 213 and the red-emitting second light-emitting device 223 will not be blocked by the red color filter pattern 91, and the green-emitting first light-emitting device 213 and the green-emitting The green light emitted by the second light emitting device 223 will not be blocked by the green color filter pattern 91, and the blue light emitted by the first blue light emitting device 213 and the second blue light emitting device 223 will not be blocked by the blue color filter pattern 91 Occlude. Based on this, the provision of the color filter layer 90 will not filter out the display light, and the display brightness can be improved compared to the provision of a polarizing layer (which filters out 50% of the display light).
  • the optical device 30 includes a camera, and the structure of the camera is improved to improve the shooting effect of the camera.
  • the terminal 01 includes any display screen 20 described above.
  • the orthographic projection of the optical device 30 on the display screen 20 is located in the second display area A2 of the display screen 20, and the light-receiving surface of the optical device 30 faces the back of the display screen 20.
  • the optical device 30, as shown in FIG. 26, includes a first camera 31.
  • the light-receiving surface of the first camera 31 faces the back of the display screen 20, which means that the lens group of the first camera 31 faces the back of the display screen 20.
  • the focal length of the first camera 31 is less than 4 mm.
  • it is 3.8mm, 3.5mm, 3.3mm, 3.0mm, 2.5mm.
  • the first camera 31 mainly includes a circuit connection board 311, an image sensor 312, an infrared filter 313, a focus motor 314, and a lens group 315.
  • the ambient light passes through the lens group 315 and irradiates the infrared filter 313 to filter the infrared light.
  • the image sensor 312 converts the received light intensity into current and transmits it to the circuit connection board 311, and the circuit connection board 311 completes image processing.
  • the distance between the lens group 315 and the image sensor 312 is called the focal length f.
  • the optical device 30 when the optical device 30 placed under the display screen is used for imaging and the imaging system contains a lens, for example, the optical device 30 is the first camera 31, the lens The group 315 includes lenses. Then, the ambient light is imaged in the optical device after passing through the second display area A2, and the whole process constitutes the grating diffraction system shown in FIG. 28.
  • the first driving circuit 212, the first signal line group 214, the second driving circuit 222, the second signal line group 224 and other components constitute an equivalent grating.
  • j is the main maximum series
  • f is the focal length of the optical device
  • ⁇ is the wavelength of the incident light
  • d is the period of the grating.
  • the distance y from the center position of the main maximum of each level must be reduced.
  • the wavelength ⁇ of the incident light is the same as the grating period d
  • the distance y from the center of each main maximum is proportional to the focal length f of the first camera 31. Therefore, selecting the first camera 31 with a small focal length f can reduce the influence of grating diffraction on the imaging of the first camera 31.
  • the focal length of the first camera 31 by setting the focal length of the first camera 31 to be less than 4 mm, the influence of grating diffraction on the imaging of the first camera 31 can be reduced.
  • the pixel size of the image sensor 312 is greater than 0.8um.
  • it is 1.0um, 1.2um, 1.4um, 1.5um, 1.8um, 2.0um.
  • the image sensor 312 includes a plurality of pixel blocks 3121 for light-sensing, and each pixel block 3121 is the minimum resolution of the image sensor 312.
  • the pixel size of the image sensor 312 refers to the size of the pixel block 3121, that is, the width of the pixel block 3121 in the arrangement direction thereof.
  • Each pixel block 3121 mainly includes a photodiode, and the photodiode can generate an output current after being irradiated by light, and the intensity of the current corresponds to the intensity of the light, thereby realizing image acquisition.
  • the influence on the imaging effect is weaker. Therefore, when the distance y of the j-level main maximum offset from the center is constant, the larger the size s of the pixel block 3121, the smaller the number of the j-level main maximum offset pixel blocks 3121, and the weaker the influence on the imaging effect. Therefore, selecting the first camera 31 with a large pixel size in this example can reduce the influence of grating diffraction on the imaging of the first camera 31.
  • the aperture of the first camera 31 is greater than f/2.2.
  • the shooting effect of the first camera 31 is not only related to the light intensity, but also related to the size of the aperture of the first camera 31, the larger the aperture, the greater the light input of the first camera 31, and the better the shooting effect. Therefore, by increasing the aperture of the first camera 31, the amount of light entering the first camera 31 can be increased to a certain extent.
  • the first camera 31 with a large aperture can compensate to a certain extent the influence of the transmittance of the display screen 20 on the amount of light entering, and improve the photographing effect of the first camera 31.
  • the terminal 01 further includes a processing unit 100; the optical device 30 further includes a second camera 32; the resolution of the second camera 32 is greater than 8M.
  • the resolution of the second camera 32 is, for example, 16M.
  • the projections of the first camera 31 and the second camera 32 on the display screen 20 are both located in the second display area A2 of the display screen 20.
  • Both the first camera 31 and the second camera 32 are electrically connected to the processing unit 100.
  • the first camera 31 includes a circuit connection board 311, and the second camera 32 can share the same circuit connection board 311 with the first camera 31.
  • the first camera 31 is used to transmit the contrast data of the picture to the processing unit 100
  • the second camera 32 is used to transmit the resolution data of the picture to the processing unit 100.
  • the first camera 31 collects a picture
  • the second camera 32 also collects a picture. Since the pixel size of the first camera 31 is large, the photographing brightness is high, and the contrast of the collected pictures is high. Therefore, the first camera 31 transmits the contrast data of the picture to the processing unit 100. Due to the large resolution of the second camera 32, the fineness of taking pictures is good, and the resolution of the collected pictures is high. Therefore, the second camera 32 transmits the resolution data of the picture to the processing unit 100.
  • the processing unit 100 is used to process contrast data and resolution data to generate a target image.
  • the processing unit 100 merges the pictures collected by the first camera 31 and the pictures collected by the second camera 32 to generate a picture with high contrast and high resolution, that is, a clear and delicate high-quality picture. This can make up for the low quality of a single camera.

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Abstract

本申请提供一种显示屏、终端，涉及显示技术领域，用于解决如何提高OLED显示屏的透过率的问题。显示屏包括衬底和设置在衬底上的至少一个高密度像素组和至少一个低密度像素组；高密度像素组包括多个阵列排布的第一像素，低密度像素组包括多个阵列排布的第二像素；第一像素包括至少三个用于分别显示三原色的第一亚像素，第一亚像素至少包括第一驱动电路和与第一驱动电路电连接的第一发光器件；第二像素包括至少三个用于分别显示三原色的第二亚像素，第二亚像素至少包括第二驱动电路和与第二驱动电路电连接的第二发光器件；多个阵列排布的第一像素所在的第一显示区的像素密度大于多个阵列排布的第二像素所在的第二显示区的像素密度。

Description

显示屏、终端
本申请要求在2019年6月25日提交中国国家知识产权局、申请号为201910557030.5的中国专利申请的优先权，发明名称为“显示屏、终端”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示屏、终端。
背景技术
随着显示技术的发展，高屏占比的终端设备成为较受消费者喜爱的产品类型。而光学器件，由于需要采集到终端设备显示面所在侧的光线，必须在终端设备的显示面占据一定区域，因此，成为了限制终端设备全屏显示的主要影响因素。
对于包括有机发光二极管(organic light-emitting diode，OLED)显示屏的终端设备，由于OLED显示屏并非完全不透光的，为了简化结构，常采用的一种设计是将光学器件设置在OLED显示屏的背面，光学器件的受光面朝向OLED显示屏的背面。然而，由于OLED显示屏的透过率只有3％-5％左右，因此，将光学器件设置在OLED显示屏的背面时，由于射进光学器件的光量较少，导致光学器件的性能受到影响。
因此，如何在光学器件设置在OLED显示屏的背面时，提高OLED显示屏的透过率，从而提高光学器件的光接收量，成为本领域技术人员需要解决的技术问题。
发明内容
本申请实施例提供一种显示屏、终端，用于解决如何提高OLED显示屏的透过率的问题。
为达到上述目的，本实施例采用如下技术方案：
第一方面，提供一种显示屏，显示屏包括衬底和设置在衬底上的至少一个高密度像素组和至少一个低密度像素组；高密度像素组包括多个阵列排布的第一像素，低密度像素组包括多个阵列排布的第二像素；第一像素包括至少三个用于分别显示三原色的第一亚像素，第一亚像素至少包括第一驱动电路和与第一驱动电路电连接的第一发光器件，第一驱动电路用于驱动第一发光器件发光；第二像素包括至少三个用于分别显示三原色的第二亚像素，第二亚像素至少包括第二驱动电路和与第二驱动电路电连接的第二发光器件，第二驱动电路用于驱动第二发光器件发光；多个阵列排布的第一像素所在的第一显示区的像素密度大于多个阵列排布的第二像素所在的第二显示区的像素密度。通过将显示区分为第一显示区和第二显示区，并使第一显示区中阵列排布的第一像素的像素密度大于第二显示区中阵列排布的第二像素的像素密度，使得第二显示区的晶体管的数量小于第一显示区的晶体管的数量。相当于第二显示区中透光区域的面积增加，开口率增大，局部区域整体透过率提升，以使得第二显示区的环境光透过率大于第一显示区的环境光透过率。
可选的，显示屏还包括设置在第一驱动电路和第二驱动电路远离衬底一侧的像素界定层；像素界定层包括多个交叉设置的挡墙以及由多个交叉设置的挡墙围设成的多个位于第一亚像素和第二亚像素的第一开口；第二发光器件包括沿远离衬底的方向依次层叠设置的空穴注入层、空穴传输层、电子传输层以及电子注入层，空穴注入层、空穴传输层、电子传输层以及电子注入层中的至少一种位于第一开口内。由于空穴注入层、空穴传输层、电子传输层以及电子注入层虽然均为透光膜层，但对透过率还是会有一定的影响。因此，通过使第二发光器 件中的空穴注入层、空穴传输层、电子传输层以及电子注入层中的至少一种仅位于第一开口内，不延伸至相邻第二像素之间的空白区域内，可避免空穴注入层、空穴传输层、电子传输层以及电子注入层这些膜层对第二显示区的透过率的影响，进一步提高第二显示区的透过率。
可选的，像素界定层还包括由多个交叉设置的挡墙围设成的至少一个第二开口；第二开口位于相邻第二像素之间，用于间隔相邻的第二像素。可减小挡墙对环境光的遮挡。
可选的，相邻的第二开口相连通。进一步减小挡墙对环境光的遮挡。
可选的，第二驱动电路包括多个晶体管；晶体管包括导电层和与导电层层叠设置的第一绝缘层，同一第二驱动电路中多个晶体管共用同一第一绝缘层；相邻第二驱动电路中的第一绝缘层之间间隔设置；第一绝缘层为栅绝缘层或钝化层。由于栅绝缘层和钝化层虽然均为透光膜层，但对透过率还是会有一定的影响。因此，通过使栅绝缘层和钝化层中的至少一种为块状结构，不延伸至相邻第二像素之间的空白区域内，可避免栅绝缘层和钝化层这些膜层对第二显示区的透过率的影响，进一步提高第二显示区的透过率。
可选的，显示屏还包括第一遮光层，第一遮光层包括多个独立设置的遮光块，每一第二驱动电路对应一遮光块；第二驱动电路在衬底上的正投影位于与该第二驱动电路对应的遮光块在衬底上的正投影内。通过设置遮光块，并使遮光块覆盖第二驱动电路，可以避免第二驱动电路中的栅极、源漏电极层以及晶体管之间的连接线之间形成光栅，从而避免环境光发生衍射，保证光学器件采集信息的准确性。
可选的，显示屏还包括填补层，填补层包括多个独立设置的填补块；第二驱动电路在衬底上的正投影的轮廓的至少一部分为折线，填补块在衬底上的正投影，与和该填补块对应的第二驱动电路的折线的凹陷位置所在的区域重合；填补层设置在第二驱动电路靠近衬底一侧。通过设置填补块，对第二驱动电路在衬底上的正投影的轮廓上的小特征进行填补，避免第二驱动电路形成光栅，从而可以避免第二驱动电路影响显示屏下方光学器件的正常工作。
可选的，显示屏还包括填补层，填补层包括多个独立设置的填补块；第二驱动电路在衬底上的正投影的轮廓的至少一部分为折线，填补块在衬底上的正投影，与和该填补块对应的第二驱动电路的折线的凹陷位置所在的区域重合；填补层设置在第二驱动电路远离衬底一侧。
可选的，显示屏还包括填补层，填补层包括多个独立设置的填补块；第二驱动电路在衬底上的正投影的轮廓的至少一部分为折线，填补块在衬底上的正投影，与和该填补块对应的第二驱动电路的折线的凹陷位置所在的区域重合；填补层与第二驱动电路中的至少一层导电层同层同材料。可以降低显示屏的厚度。
可选的，显示屏还包括用于向第二驱动电路传输驱动信号的第二信号线组，第二信号线组包括交叉设置的第二数据线和多条第二信号线；第二数据线用于传输数据电压；第二信号线用于传输工作电压，或者向第二驱动电路中的一个晶体管的栅极提供选通信号；显示屏还包括第二遮光层，第二遮光层包括多个独立设置的遮光条，每一第二信号线组对应一遮光条；第二信号线组在衬底上的正投影中的至少部分位于遮光条在衬底上的正投影内。通过单独设置一层第二遮光层，对第二信号线组中信号线进行遮挡，使得当外界环境光入射时，第二信号线组所在区域是完全不透光的。可避免信号线形成光栅，消除因第二信号线组中信号线引起的衍射，保证光学器件的性能。
可选的，显示屏还包括用于向第二驱动电路传输驱动信号的第二信号线组，第二信号线组包括多条第二信号线；第二信号线用于传输工作电压，或者向第二驱动电路中的一个晶体管的栅极提供选通信号；多条第二信号线中，部分作为第一子信号线，部分作为第二子信号线；显示屏还包括位于第一子信号线和第二子信号线之间的第二绝缘层；第一子信号线和第 二子信号线交替排布，且第一子信号线在衬底上的正投影与位于该第一子信号线两侧的第二子信号线在衬底上的正投影均交叠。通过将第二信号线分为异层设置的两部分，并使利用不同层之间的信号线相互遮挡，可以遮挡位于同一层的信号线形成的间隙，相当于消除了信号线之间的间隙，即消除信号线线带来的衍射。无需增加新的膜层结构，可简化制备工艺，并使显示屏轻薄化。
可选的，显示屏还包括用于向第二驱动电路传输驱动信号的第二信号线组，第二信号线组包括交叉设置的第二数据线和多条第二信号线；第二数据线用于传输数据电压；第二信号线用于传输工作电压，或者向第二驱动电路中的一个晶体管的栅极提供选通信号；构成第二数据线或第二信号线的材料为透明导电材料。通过将第二信号组中信号线采用透明导电材料制备，不仅可以避免第二信号组中信号线形成光栅，而且还可以避免第二信号组中信号线遮光。从而可提高光学器件的光接收效果和光接收量。
可选的，显示屏还包括用于向第一驱动电路传输驱动信号的第一信号线组和用于向第二驱动电路传输驱动信号的第二信号线组；第一信号线组包括多条第一信号线；第一信号线用于传输工作电压，或者向第一驱动电路中的一个晶体管的栅极提供选通信号；第二信号线组包括多条第二信号线；第二信号线用于传输工作电压，或者向第二驱动电路中的一个晶体管的栅极提供选通信号；沿第一信号线的走线方向，显示屏包括两个分别位于低密度像素组两侧，且与该低密度像素组并排设置的高密度像素组；多个阵列排布的第二像素中的每行第二像素，与多个阵列排布的第一像素中的一行第一像素同行设置；每一行第一像素包括多个阵列排布的第一亚像素；每一行第二像素包括多个阵列排布的第二亚像素；每行第一像素中，位于同一行的第一亚像素电连接的第一信号线与每行第二像素中，位于同一行的第二亚像素电连接的第二信号线共用。第一高密度像素组和第二高密度像素组中位于同一行的第一亚像素不共用同一第一信号线，在第二显示区中没有设置第二像素的位置处不用设置第一信号线，可以避免第一信号线对环境光的遮挡，进一步提高第二显示区的透过率。
可选的，显示屏还包括用于向第一驱动电路传输驱动信号的第一信号线组和用于向第二驱动电路传输驱动信号的第二信号线组；第一信号线组包括第一数据线；第一数据线用于传输数据电压；第二信号线组包括第二数据线；第二数据线用于传输数据电压；沿第一数据线的走线方向，显示屏包括两个分别位于低密度像素组两侧，且与该低密度像素组并排设置的高密度像素组；多个阵列排布的第二像素中的每列第二像素，与多个阵列排布的第一像素中的一列第一像素同列设置；每一列第一像素包括多个阵列排布的第一亚像素；每一列第二像素包括多个阵列排布的第二亚像素；每列第一像素中，位于同一列的第一亚像素电连接的第一数据线，与每列第二像素中，位于同一列的第二亚像素电连接的第二数据线共用；两个高密度像素组中，位于同一列的第一亚像素电连接的两个第一数据线，通过连接线耦接，连接线绕开第二显示区。第三高密度像素组和第四高密度像素组中位于同一列的第一亚像素分别连接的第一数据线通过连接线耦接，连接线不穿过第二显示区，而是绕过第二显示区。在第二显示区中没有设置第二像素的位置处不用设置第一数据线，可以避免第一数据线对环境光的遮挡，进一步提高第二显示区的透过率。
可选的，显示屏还包括设置在第一驱动电路和第二驱动电路远离衬底一侧的黑矩阵层；第一驱动电路在衬底上的正投影、第一信号线组在衬底上的正投影、第二驱动电路在衬底上的正投影以及第二信号线组在衬底上的正投影均位于黑矩阵层在衬底上的正投影内。通过设置黑矩阵层，并使黑矩阵层覆盖第一驱动电路、第一信号线组、第二驱动电路、第二信号线组。这样一来，一方面可以避免环境光照射到第一驱动电路、第一信号线组、第二驱动电路、 第二信号线组上。另一方面，即使部分环境光从第一发光器件和第二发光器件处射到了第一驱动电路、第一信号线组、第二驱动电路、第二信号线组上，黑矩阵层也可以对第一驱动电路、第一信号线组、第二驱动电路、第二信号线组反射的环境光进行遮挡，可降低反射光对显示用光的干扰。
可选的，第一发光器件包括第一阴极，第二发光器件包括第二阴极；第一阴极的厚度大于第二阴极的厚度。通过将第二显示区中的第二发光器件中的第二阴极的厚度减薄，可以提高第二阴极的透过率，从而可以提升第二显示区的透过率。
可选的，每一第二发光器件包括第二阴极；相邻第二阴极之间间隔设置。通过在相邻第二像素之间的空白区域不设置第二阴极，可消除第二阴极对环境光的过滤作用，进一步提高第二显示区的透过率。
可选的，显示屏还包括设置在第一驱动电路远离衬底一侧的偏振层；偏振层上设置有第三开口，第三开口位于第二显示区。将偏振层仅设置在第一显示区，第二显示区中不设置偏振层。这样一来，偏振层不会对穿过第二显示区的环境光有滤除作用，可提升第二显示区的透过率。
可选的，显示屏还包括位于相邻第二像素之间的多个第三发光器件；位于多个阵列排布的第二像素中的相邻两行之间的一行第三发光器件，与多个阵列排布的第一像素中的一行第一发光器件同行设置。通过在相邻第二像素之间空白区域仅设置第三发光器件，而不设置驱动电路。由于第三发光器件为透光结构，因此对第二显示区的透过率的影响较小。这样一来，本示例提供的显示屏在提高第二显示区的透过率的基础上，不改变现有制备电致发光层时的工艺，可节省成本。
可选的，显示屏还包括位于相邻第二像素之间的多个第三发光器件；位于多个阵列排布的第二像素中的相邻两列之间的一列第三发光器件，与多个阵列排布的第一像素中的一列第一发光器件同列设置。
可选的，显示屏还包括设置在第一发光器件和第二发光器件远离衬底一侧的彩色滤光层；彩色滤光层至少包括分别对应三原色的三种彩色滤光图案；其中，每一第一发光器件对应一与该第一发光器件发光颜色相同的彩色滤光图案，每一第二发光器件对应一与该第二发光器件发光颜色相同的彩色滤光图案。通过在第一发光器件和第二发光器件远离衬底一侧的彩色滤光层，使得反射光经过彩色滤光层后，才能射出显示屏。以彩色滤光层中的红色彩色滤光图案为例，反射光射向红色彩色滤光图案时，反射光中只有红光可以穿过红色彩色滤光图案，反射光中的绿光和蓝光无法穿过红色彩色滤光图案。这就意味着，红色彩色滤光图案滤除了反射光中的至少三分之二的光线。同理，反射光中只有绿光可以穿过绿色彩色滤光图案，反射光中只有蓝光可以穿过蓝色彩色滤光图案。因此，本示例中的彩色滤光层可对反射光起到较好的过滤作用，使得显示屏在不设置偏振片时也能有较好的显示效果。
第二方面，提供一种终端，包括第一方面任一项的显示屏；终端还包括设置在显示屏背面且受光面朝向显示屏的光学器件，光学器件在显示屏上的正投影位于第二显示区。
可选的，光学器件包括第一摄像头；第一摄像头的焦距小于4mm。通过设定第一摄像头的焦距小于4mm，可降低光栅衍射对第一摄像头成像的影响。
可选的，光学器件包括第一摄像头；第一摄像头的光圈大于f/2.2，其中，f为第一摄像头的焦距。通过增大第一摄像头的光圈，可一定程度上增加第一摄像头的进光量。使用大光圈的第一摄像头能够在一定程度上弥补显示屏透过率对进光量的影响，提升第一摄像头的拍照效果。
可选的，第一摄像头包括影像传感器，影像传感器的像素尺寸大于0.8um。使用大像素尺寸的第一摄像头能够在一定程度上弥补显示屏透过率对进光量的影响，提升第一摄像头的拍照效果。
可选的，终端还包括处理单元；光学器件还包括第二摄像头；第二摄像头的分辨率大于8M；第一摄像头和第二摄像头均与处理单元电连接；第一摄像头用于向处理单元传输图片的对比度数据，第二摄像头用于向处理单元传输图片的分辨率数据；处理单元用于对对比度数据和分辨率数据进行处理，生成目标图像。可以弥补单个摄像头拍照质量低的缺陷。
附图说明
图1为本申请实施例提供的一种终端的框架示意图；
图2a为本申请实施例提供的一种光学器件与显示屏的位置关系示意图；
图2b为本申请实施例提供的一种显示屏的亚像素排布示意图；
图2c为本申请实施例提供的一种驱动电路的结构示意图；
图2d为本申请实施例提供的另一种驱动电路的结构示意图；
图2e为本申请实施例提供的一种显示屏的结构示意图；
图2f为本申请实施例提供的一种像素界定层的结构示意图；
图3a为本申请实施例提供的一种高密度像素组和低密度像素组的排布方式示意图；
图3b为本申请实施例提供的另一种高密度像素组和低密度像素组的排布方式示意图；
图3c为本申请实施例提供的一种显示屏中亚像素的排布示意图；
图3d为本申请实施例提供的一种第一像素的结构示意图；
图3e为本申请实施例提供的一种第二像素的结构示意图；
图4a-图4d为本申请实施例提供的一种显示屏的区域划分示意图；
图5a-图5f为本申请实施例提供的另一种显示屏的区域划分示意图；
图6为本申请实施例提供的一种第一显示区和第二显示区对环境光的透过情况示意图；
图7为本申请实施例提供的另一种显示屏中亚像素的排布示意图；
图8为本申请实施例提供的一种蒸镀过程示意图；
图9为本申请实施例提供的一种显示屏的俯视示意图；
图10a为沿图9中A-A′向的剖视示意图；
图10b为沿图9中B-B′向的剖视示意图；
图10c为本申请实施例提供的另一种显示屏的俯视示意图；
图10d为本申请实施例提供的又一种显示屏的俯视示意图；
图11a为本申请实施例提供的又一种显示屏的俯视示意图；
图11b为本申请实施例提供的又一种显示屏的俯视示意图；
图12a为沿图11b中C-C′向的一种剖视示意图；
图12b为沿图11b中C-C′向的另一种剖视示意图；
图12c为沿图11b中C-C′向的又一种剖视示意图；
图12d为沿图11b中C-C′向的又一种剖视示意图；
图13为本申请实施例提供的一种环境光衍射过程示意图；
图14a为本申请实施例提供的又一种显示屏的俯视示意图；
图14b为沿图14a中D-D′向的剖视示意图；
图15a为本申请实施例提供的一种第二驱动电路的俯视示意图；
图15b为本申请实施例提供的一种填补块与第二驱动电路的位置关系示意图；
图16a为本申请实施例提供的一种遮光条与第二信号线的位置关系示意图；
图16b为本申请实施例提供的另一种遮光条与第二信号线的位置关系示意图；
图17a为本申请实施例提供的一种第一子信号线和第二子信号线的位置关系示意图；
图17b为沿图17a中E-E′向的剖视示意图；
图18a为本申请实施例提供的一种显示屏中的第二信号线的结构示意图；
图18b为本申请实施例提供的一种显示屏中常规的第二信号线的结构示意图；
图18c为本申请实施例提供的一种第二信号线与栅极驱动电路的连接关系示意图；
图19a为本申请实施例提供的一种显示屏中的第二数据线的结构示意图；
图19b为本申请实施例提供的一种显示屏中常规的第二数据线的结构示意图；
图20a为本申请实施例提供的一种黑矩阵层在显示屏中的结构示意图；
图20b为本申请实施例提供的另一种黑矩阵层在显示屏中的结构示意图；
图21为本申请实施例提供的一种第一阴极和第二阴极的结构示意图；
图22a-图22c为本申请实施例提供的一种第一阴极和第二阴极的制备过程示意图；
图23a为本申请实施例提供的又一种显示屏的俯视示意图；
图23b为沿图23a中H-H′向的剖视示意图；
图24a为本申请实施例提供的又一种显示屏的俯视示意图；
图24b为沿图24a中M-M′向的剖视示意图；
图25为本申请实施例提供的一种显示屏的结构示意图；
图26为本申请实施例提供的一种终端的结构示意图；
图27为本申请实施例提供的一种第一摄像头的结构示意图；
图28为本申请实施例提供的一种第一摄像头接收衍射光的光路示意图；
图29为本申请实施例提供的一种影像传感器的结构示意图；
图30为本申请实施例提供的另一种终端的结构示意图。
附图标记：
01-终端；10-壳体组件；20-显示屏；21-第一像素；211-第一亚像素；212-第一驱动电路；213-第一发光器件；214-第一信号线组；2141-第一数据线；2142-第一信号线；2143-连接线；22-第二像素；221-第二亚像素；222-第二驱动电路；223-第二发光器件；224-第二信号线组；2241-第二数据线；2242-第二信号线；22421-第一子信号线；22422-第二子信号线；23-衬底；24-第三发光器件；241-栅极；242-栅绝缘层；243-有源层；244-源漏电极层；245-钝化层；246-平坦层；25-像素界定层；251-挡墙；252-第一开口；253-第二开口；26-第二绝缘层；27-遮光块；28-填补块；29-遮光条；30-光学器件；31-第一摄像头；311-线路连接；312-影像传感器；3121-像素块；313-红外滤光片；314-对焦马达；315-镜头组；32-第二摄像头；40-栅极驱动电路。50-黑矩阵层；60-第一掩模板；61-开口区域；62-遮挡区域；70-第二掩模板；71-开口部；72-遮挡部；80-偏振层；81-通孔；90-彩色滤光层；91-彩色滤光图案；100-处理单元。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。
以下，术语“第一”、“第二”等仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。
此外，本申请中，“上”、“下”等方位术语是相对于附图中的部件示意置放的方位来定义的，应当理解到，这些方向性术语是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中部件所放置的方位的变化而相应地发生变化。
在本申请中，除非另有明确的规定和限定，术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或成一体；可以是直接相连，也可以通过中间媒介间接相连。
本申请实施例提供一种终端。该终端可以为平板电脑、手机、电子阅读器、遥控器、个人计算机(personal computer，PC)、笔记本电脑、个人数字助理(personal digital assistant，PDA)、车载设备、网络电视、可穿戴设备、电视机等具有显示界面的产品，以及智能手表、智能手环等智能显示穿戴产品。本申请实施例对上述终端的具体形式不做特殊限制。以下实施例为了方便说明，均是以终端为手机为例进行的举例说明。
如图1所示，上述终端01，主要包括壳体组件10和显示屏20。
显示屏20用于显示画面，壳体组件10用于对显示屏20进行承载和保护。显示屏20位于壳体组件10内。
其中，显示屏10能够实现自发光。显示屏10可以为有机发光二极管(organic light emitting diode，OLED)显示屏。
在此基础上，如图1所示，终端01还包括光学器件30，光学器件30设置在显示屏20的与出光面a1相对的背面a2一侧，且光学器件30的受光面朝向显示屏20。
其中，光学器件30为包括光敏传感器的部件。光学器件30例如可以为前置摄像头、指纹传感器等。
如图2a所示，显示屏20划分出显示区A和位于显示区A周边的周边区B。
其中，不对显示区A和周边区B的相对位置关系和形状进行限定，本申请实施例中以周边区B围绕显示区A一周为例进行示意。
可以理解的是，终端01包括的光学器件30，通过采集透过显示屏20射向该光学器件30的环境光来实现具体功能。而显示屏20只有通过显示区A才透光，因此，如图2a所示，光学器件30在显示屏20上的正投影位于显示屏20的显示区A。
如图2b所示，上述显示区A包括多个亚像素(sub pixel)P，每一像素包括至少三个分别用于显示三原色的亚像素P。为了方便说明，本申请中上述多个亚像素P是以矩阵形式排列为例进行的说明。
例如，每一像素中至少包括一个红色亚像素P、一个绿色亚像素P、一个蓝色亚像素P。
可以理解的是，本申请中示意的亚像素P的形状和排列方式仅为示意，不做任何限定。
此外，每一亚像素P内设置有驱动电路Q和与该驱动电路Q电连接的OLED，驱动电路Q用于控制OLED进行显示。
示例的，在一些实施例中，如图2c所示，该驱动电路Q包括电容Cst和多个开关晶体管(M1、M2、M3、M5、M6、M7)以及一个驱动晶体管M4。即，7T1C结构。
在一些实施例中，如图2d所示，该驱动电路Q包括电容Cst和一个开关晶体管M1以及女一个驱动晶体管M2。即，2T1C结构。
当然，驱动电路Q也可以是其他结构，本申请实施例中仅是一种示意。
关于驱动电路Q与发光器件OLED在显示屏20中的层叠设置方式，如图2e所示，显示屏20包括衬底23和设置在衬底23上的亚像素P。图2e中示意出衬底23上设置有两个亚像素P。
亚像素P中的上述驱动电路Q，包括如图2e所示的驱动晶体管M4。驱动电路Q中的其他晶体管与驱动晶体管M4同步形成、同层设置。
如图2e所示，亚像素P中的上述发光器件OLED，设置在驱动晶体管M4远离衬底23一侧。OLED包括沿远离衬底23的方向依次设置的阳极a、电致发光层(emitting material layer，EML)、阴极c。
阳极a与驱动晶体管M4的第二极电连接，接收驱动晶体管M4产生的驱动电流I sd，电致发光层EML在驱动电流I sd的驱动下发光。
相邻亚像素P之间设置有像素界定层25，像素界定层25用于防止相邻亚像素P发出的光发生混光。
如图2f所示，像素界定层25包括多个横纵交叉的挡墙251以及由多个横纵交叉的挡墙251围设成的多个第一开口252。一个第一开口252位于一个亚像素P。
其中，如图2e所示，驱动电路Q位于挡墙251靠近衬底23一侧，OLED位于第一开口252内。
在此基础上，为了提高光学器件30的采光效果，从而提高光学器件30的检测精度，对显示屏20中的亚像素P进行重新排布。
在一些实施例中，如图3a所示，显示屏20包括设置在衬底23上至少一个高密度像素组G和至少一个低密度像素组D；高密度像素组G包括多个阵列排布的第一像素21和低密度像素组D包括多个阵列排布的第二像素22。
图3a中以显示屏20包括一个低密度像素组D，四个高密度像素组G为例进行示意。其中，低密度像素组D的上、下、左、右分别设置一个高密度像素组G。
如图3a所示，将沿水平方向X排列成一排的像素称为同一行像素。将沿竖直方向Y排列成一排的像素称为同一列像素。
在一些实施例中，如图3a所示，沿水平方向X，低密度像素组D中的一行第二像素22和高密度像素组G中的一行第一像素21位于同一行。如，高密度像素组G中的第三行第一像素21，和低密度像素组D中的第一行第二像素22位于同一行，构成显示屏20中从上至下的第三行像素。
沿竖直方向Y，低密度像素组D中的一列第二像素22和高密度像素组G中的一列第一像素21位于同一列，如，高密度像素组G中的第四列第一像素21，和低密度像素组D中的第一列第二像素22位于同一列，构成显示屏20中从左至右的第四列像素。
即，每行第二像素22，与多行第一像素21中的一行同行设置。每列第二像素22，与多列第一像素21中的一列同列设置。
也就是说，无论是沿行方向，还是沿列方向，相邻第二像素22之间的间距至少与一个第二亚像素221的尺寸相等，相邻第二像素22之间的间距为第二亚像素221尺寸的整数倍。也可以理解为，原本应设置第二亚像素22的位置不再设置第二亚像素22，而改为空白区域。
在一些实施例中，如图3b所示，沿水平方向X，低密度像素组D中的一行第二像素22和高密度像素组G中的一行第一像素21不位于同一行。
沿竖直方向Y，低密度像素组D中的一列第二像素22和高密度像素组G中的一列第一像素21不位于同一列。
以下，为了便于说明，以低密度像素组D中的一行第二像素22和高密度像素组G中的一行第一像素21位于同一行，低密度像素组D中的一列第二像素22和高密度像素组G中的一列第一像素21位于同一列为例进行说明。
如图3a所示，每个第一像素21包括至少三个用于分别显示三原色的第一亚像素211。
可以理解的是，每个第一像素21包括的多个第一亚像素211中，至少包括一个红色第一亚像素R1、一个绿色第一亚像素G1、一个蓝色第一亚像素B1。图3a中以一个第一像素21包括四个第一亚像素211为例进行示意，四个第一亚像素211分别为一个红色第一亚像素R1、两个绿色第一亚像素G1、一个蓝色第一亚像素B1。
如图3c所示，每一第一亚像素211至少包括第一驱动电路212和与第一驱动电路212的第一发光器件213，第一驱动电路212用于驱动第一发光器件213发光。
图3c中以一个第一像素21包括三个第一亚像素211为例进行示意。
如图3a所示，每个第二像素22包括至少三个用于分别显示三原色的第二亚像素221。
可以理解的是，每个第二像素22包括的多个第二亚像素221中，至少包括一个红色第二亚像素R2、一个绿色第二亚像素G2、一个蓝色第二亚像素B2。图3a中以一个第二像素22包括四个第二亚像素221为例进行示意，四个第二亚像素221分别为一个红色第二亚像素R2、两个绿色第二亚像素G2、一个蓝色第二亚像素B2。
如图3c所示，每一第二亚像素221至少包括第二驱动电路222和与第二驱动电路222电连接的第二发光器件223，第二驱动电路222用于驱动第二发光器件223发光。
图3c中以一个第二像素22包括三个第二亚像素221为例进行示意。
其中，在一些实施例中，如图3d所示，第一驱动电路212例如可以与上述图2c所示的驱动电路Q相同。如图3e所示，第二驱动电路222例如可以与上述图2c所示的驱动电路Q相同。例如，均为7T1C结构。
在一些实施例中，第一驱动电路212和第二驱动电路例如可以与上述图2d所示的驱动电路Q相同。例如，均为2T1C结构。
也就是说，本申请实施例中，显示同种颜色光的第一亚像素211和显示同种颜色光的第二亚像素221的结构可以相同。
其中，多个阵列排布的第一像素21所在的区域为第一显示区A1，多个阵列排布的第二像素22所在的区域为第二显示区A2。
基于此，如图4a所示，显示区A包括第一显示区A1和第二显示区A2。不对第一显示区A1和第二显示区A2的相对位置关系和形状进行限定。
第一显示区A1有高密度像素组G布满，第二显示区A2由低密度像素组D布满。
在一些实施例中，如图4a-图4d所示，第二显示区A2位于第一显示区A1的一侧。
在一些实施例中，如图5a-图5f所示，第一显示区A1包围第二显示区A2。
其中，第二显示区A2可以如图5a-图5d所示，为一个区域；也可以如图5e-图5f所示，为多个区域。在第二显示区A2为多个区域的情况下，每个区域中设置有一个低密度像素组D。
如图3a所示，多个阵列排布的第一像素21所在的第一显示区A1的像素密度大于多个阵列排布的第二像素22所在的第二显示区A2的像素密度。
像素密度(pixels per inch，PPI)，是指每英寸屏幕所拥有的像素数量。第一显示区A1的像素密度大于第二显示区A2的像素密度，可以理解为如图3a所示，第一显示区A1中相邻第一像素21之间的距离小于第二显示区A2中相邻第二像素22之间的距离。也就是说，相同面积内，设置的第一像素110的数量大于第二像素120的数量。
由于第一显示区A1的像素密度大于第二显示区A2的像素密度，因此，如图3c所示，第一显示区A1的第一驱动电路112的密集度大于第二显示区A2的第二驱动电路122的密集度，使得第一显示区A1的晶体管的数量大于第二显示区A2的晶体管的数量。
如图6所示，光学器件30位于显示屏20的背面a2，由于第一驱动电路212和第二驱动电路222中的晶体管为遮光材料，环境光射向第一驱动电路212和第二驱动电路222后，会对环境光进行遮挡，导致光线无法透过，从而无法射向光学器件30。由于第二显示区A2中存在不设置第二驱动电路122的空白区域，因此，第二显示区A2的环境光透过率大于第一显示区A1的环境光透过率。
本申请实施例中，通过将显示区A分为第一显示区A1和第二显示区A2，并使第一显示区A1中阵列排布的第一像素21的像素密度大于第二显示区A2中阵列排布的第二像素22的像素密度，使得第二显示区A2的晶体管的数量小于第一显示区A1的晶体管的数量。相当于第二显示区A2中透光区域的面积增加，开口率增大，局部区域整体透过率提升，以使得第二显示区A2的环境光透过率大于第一显示区A1的环境光透过率。
基于此，为了降低第二驱动电路222对环境光的遮挡，本示例中将第二驱动电路222设置为图2d所示的2T1C结构。相比设置为如图2c所示的7T1C结构，可减少晶体管的数量，从而减少第二驱动电路222的占用面积。从而降低第二驱动电路222的遮光效果，提高第二显示区A2的透过率。
基于此，当将光学器件30设置在第二显示区A2时，可进一步增加光学器件30的环境光接收率，从而提高光学器件30性能。
为了能够进一步提高终端01中光学器件30的性能，在本申请实施例提供的上述显示屏20的基础上，通过以下示例中的结构对终端01进一步改进。
示例一
为了减少制备显示屏20时，对制备工艺做出的改变，对显示屏20的结构进行改进。
在一些实施例中，如图7所示，显示屏20还包括位于相邻第二像素221之间的多个第三发光器件24。
位于多个阵列排布的第二像素22中的相邻两行之间的一行第三发光器件24，与多个阵列排布的第一像素21中的一行第一亚像素211中的第一发光器件213同行设置。
位于多个阵列排布的第二像素22中的相邻两列之间的一列第三发光器件24，与多个阵列排布的第一像素21中的一列第一亚像素211中的第一发光器件213同列设置。
也就是说，多个第三发光器件24的排布规律，与多个阵列排布的第一像素21中，第一亚像素211中的第一发光器件213的排布规律相同。
这样一来，如图7所示，从整体来看，显示屏20中的第一发光器件213、第二发光器件223以及第三发光器件24呈阵列排布。第一发光器件213、第二发光器件223以及第三发光器件24中，发相同颜色光的发光器件的结构相同。
因此，制备如图7所示的显示屏20中的第一发光器件213、第二发光器件223以及第三发光器件24，和制备如图2b所示的显示屏20中的发光器件，采用的掩模板可以相同，无需改变制备工艺。
示例的，第一发光器件213、第二发光器件223以及第三发光器件24均包括EML，EML通过蒸镀工艺制备得到。
如图8所示，蒸镀制备EML时，衬底23通过上方的磁板41固定，精细金属掩模板(fine metal mask，FMM)42通过张网定位，处于衬底23的下方，最下面为蒸镀使用的坩埚43。坩埚43内放置有有机发光材料，加热坩埚43后，有机发光材料蒸发，喷向FMM42。
FMM42上遮蔽区域421会遮挡衬底23，使有机发光材料附着在FMM上。FMM42上开口区域422没有遮挡衬底23，有机发光材料会附着在衬底23上，形成EML。
可以理解的是，在形成EML时，每次蒸镀，只形成发一种颜色光的EML。
基于此，例如，形成发红光的EML时，FMM42上遮蔽区域421应同时遮挡发蓝光的EML和发绿光的EML所在位置，FMM42上开口区域422对应发红光的EML所在位置。
可以理解的是，从图3c中可以看出，第一显示区A1中第一驱动电路212和第二显示区A2中第二驱动电路222的排布规律不同，第一显示区A1中第一发光器件213和第二显示区A2中第二发光器件223的排布规律不同。而常规工艺下，如图2b所示，整个显示屏20中驱动电路Q和发光器件OLED的排布规律是相同的。因此，为了不改变现有的制备工艺，仍能继续使用现有的掩模板。
因此，本示例中在相邻第二像素221之间空白区域仅设置第三发光器件24，而不设置驱动电路。由于第三发光器件24为透光结构，因此对第二显示区A2的透过率的影响较小。这样一来，本示例提供的显示屏20在提高第二显示区A2的透过率的基础上，不改变现有制备电致发光层时的工艺，可节省成本。
可以理解的是，图3c中第二显示区A2中没有第三发光器件24，相邻第二发光器件223之间为空白区域。因此，制备图3c所示的显示屏20和图7所示的显示屏20采用的FMM42的结构不同，但制备工艺仍然相同。通过调整FMM42上遮蔽区域421和开口区域422的形状，可分别制备出图3c所示的结构和图7所示的结构。
示例二
为了进一步提高空白区域的透过率，对显示屏20中第二发光器件223的结构进行改进。
如图9所示，像素界定层25包括多个交叉设置的挡墙251以及由多个交叉设置的挡墙251围设成的多个第一开口252。
可以理解的是，像素界定层25设置在第一驱动电路212和第二驱动电路222远离衬底23一侧。
其中，多个第一开口252位于第一亚像素211和第二亚像素221。
示例的，如图10a所示，一个第一开口252位于一个第一亚像素211。
也就是说，显示屏20中的每个第一亚像素211对应一个第一开口252，第一开口252界定出与其对应的第一亚像素211的透光范围。每个第二亚像素221对应一个第一开口252，第一开口252界定出与其对应的第二亚像素221的透光范围。
基于此，如图9所示，每一第一发光器件213和每一第二发光器件223分别对应一个第一开口252，相邻第二像素22之间的间隙处的第一开口252中未设置第二发光器件223。
如图10a所示，第一发光器件213包括沿远离衬底23的方向依次层叠设置的空穴注入层(hole inject layer，HIL)、空穴传输层(hole transport layer，HTL)、电致发光层EML、电子传输层(electron transport layer，ETL)以及电子注入层(electron inject layer，EIL)。多个第一发光器件213中的HIL、HTL、ETL以及EIL中的每层为一体结构，一个EML位于一个第一开口252内。
如图10b所示，第二发光器件223包括沿远离衬底23的方向依次层叠设置的HIL、HTL、EML、ETL以及EIL。第二发光器件223中的HIL、HTL、ETL以及EIL中的至少一种仅位于第一开口252内，不延伸至相邻第二像素22之间的空白区域内。一个EML位于一个第一开口252内。
图10b中，以多个第二发光器件223中的EIL为一体结构，HIL、HTL以及ETL均为独立的块状结构为例进行示意。
从俯视图上来看，以显示屏20中的HIL为例，HIL的结构如图10c所示，第二发光器 件223中的HIL为块状结构，多个第一发光器件213中的HIL为一体结构。
上述HIL，例如可以通过上述示例一中示意的蒸镀工艺制备得到。通过改变图8中示意的FMM 42中开口区域422和遮蔽区域421的图案，使开口区域422对应待形成的HIL所在区域，并使遮蔽区域421对应无需形成HIL的区域，从而制备得到HIL。
上述HIL，例如还可以通过构图工艺制备得到。示例的，构图工艺可以包括：首先，在形成有第二驱动电路223的衬底23上镀上氧化钼薄膜。其次，进入黄光室喷上感光极强的光阻液(例如光刻胶)。再者，套上掩模板照射蓝紫光，对光阻液进行曝光。随后，送到显影区喷洒显影液，可以去除照光后的光阻，未光照的光阻保留下来，对氧化钼薄膜进行保护，没有光阻遮挡区域的氧化钼薄膜露出。然后，刻蚀掉没有光阻遮挡的氧化钼薄膜。最后，去除保留的光阻。这样一来，保留下来的结构就是所需要的HIL。
可以理解的是，掩模板包括遮挡区域和开口区域，进行蓝紫光曝光时，将掩模板放在衬底23和光源之间，此时氧化钼薄膜上喷上了光阻。光阻被掩模板的遮蔽区域遮挡的区域没有被蓝紫光照射到，也就是没有进行曝光，与掩模板开口区域对应的光阻被蓝紫光照射到，也就是进行了曝光。曝光之后的光阻会被去除掉，没有曝光的光阻保留下来。没有光阻遮挡的氧化钼薄膜最后会被刻蚀掉，也就是说，遮挡区域对应的氧化钼薄膜会被保留下来，形成所需要的HIL。开口区域对应的氧化钼薄膜会被刻蚀掉。
其中，第一发光器件213和第二发光器件223中的HIL可以通过同一次构图工艺制备得到。
基于此，第一发光器件213和第二发光器件223中的HTL、ETL以及EIL也可以通过上述构图工艺制备得到。可以通过改变掩膜板中遮挡区域和开口区域的结构，可以在衬底23上形成不同图案，以制备得到上述第一发光器件213和第二发光器件223。
同一第二像素22中的多个第二亚像素221中的每个第二亚像素221均包括一个第二发光器件223。在一些实施例中，为了简化构图工艺，对于属于同一第二像素22的多个第二发光器件223来讲，如图10d所示，多个第二发光器件223包括的HIL连为一体结构。
由于HIL、HTL、ETL以及EIL虽然均为透光膜层，但对透过率还是会有一定的影响。因此，通过使第二发光器件223中的HIL、HTL、ETL以及EIL中的至少一种仅位于第一开口252内，不延伸至相邻第二像素22之间的空白区域内，可避免HIL、HTL、ETL以及EIL这些膜层对第二显示区A2的透过率的影响，进一步提高第二显示区A2的透过率。
示例三
示例三与示例二的不同在于：像素界定层25的结构不同。
如图11a所示，像素界定层25还包括由多个交叉设置的挡墙251围设成的至少一个第二开口253。
第二开口253位于多个阵列排布的第二像素22中相邻第二像素22之间，用于间隔相邻的第二像素22。
也就是说，由于相邻第二像素22之间无需设置第二亚像素221，因此，无需设置成第一开口252的结构，而是设置成至少贯穿三个第二亚像素221的第二开口253的结构。这样一来，相比图10b所示，相邻第二像素22之间的空白区域中不设置挡墙251。由于挡墙251为遮光材料，因此，不设置挡墙251可进一步提高第二显示区A2的透过率。根据第二像素22的排布对了不同，第二开口253的结构也不同。如图11a所示，相邻第二像素22之间只间隔一行亚像素时，第二开口253只贯穿一行亚像素。
在一些实施例中，为了进一步减小挡墙251对环境光的遮挡，如图11b所示，相邻的第 二开口253相连通。
即，当多个第二开口253之间不设置第二像素22时，多个第二开口253相连通。
也就是说，当整行第二像素22和整行第二像素22间隔设置时，相邻行之间的间隙贯通。整列第二像素22和整列第二像素22间隔设置时，相邻列之间的间隙贯通。
示例四
为了进一步提高空白区域的透过率，对显示屏20中第二驱动电路222的结构进行改进。
如图3e所示，第二驱动电路222包括多个晶体管。
每个晶体管包括导电层和与导电层层叠设置的第一绝缘层。
其中，以第二驱动电路222中的驱动晶体管M4为例，如图12a所示，驱动晶体管M4包括沿远离衬底23的方向依次层叠设置在衬底23上的栅极241、栅绝缘层242、有源层243、源漏电极层244以及钝化层245。
其中，源漏电极层244包括第一极和第二极，第一极例如可以为源电极，第二极为漏电极。
导电层例如可以是栅极241，也可以是源漏电极层244。第一绝缘层可以是栅绝缘层242或者钝化层245。
为了便于制备，同一第二驱动电路222中多个晶体管共用同一第一绝缘层。
在此基础上，相邻第二驱动电路222中的第一绝缘层之间间隔设置。
也就是说，每个第二驱动电路222中的第一绝缘层为块状结构，多个第二驱动电路222中的第一绝缘层均为独立结构，相互之间具有间隙。也可以理解为，第一绝缘层不延伸至第二像素22之间的空白区域内。
例如，如图12a所示，上述导电层为源漏电极层244，第一绝缘层为钝化层245。每个第二驱动电路222中的钝化层245为块状结构，相邻第二驱动电路222中的钝化层245之间通过间隙间隔设置，而非一体结构。
可以理解的是，第二驱动电路222中的多个晶体管中的各膜层均是同层设置，例如，图3e所示的晶体管M1、晶体管M2、晶体管M3、驱动晶体管M4、晶体管M5、晶体管M6、晶体管M7中的栅极是通过同一次构图工艺制备得到。
示例的，构图工艺可以包括：首先，在衬底23上镀上金属薄膜。其次，进入黄光室喷上感光极强的光阻液(例如光刻胶)。再者，套上掩模板照射蓝紫光，对光阻液进行曝光。随后，送到显影区喷洒显影液，可以去除照光后的光阻，未光照的光阻保留下来，对金属薄膜进行保护，没有光阻遮挡区域的金属薄膜露出。然后，刻蚀掉没有光阻遮挡的金属薄膜。最后，去除保留的光阻。这样一来，保留下来的结构就是所需要的栅极图案。
可以理解的是，掩模板包括遮挡区域和开口区域，进行蓝紫光曝光时，将掩模板放在衬底23和光源之间，此时金属薄膜上喷上了光阻。光阻被掩模板的遮蔽区域遮挡的区域没有被蓝紫光照射到，也就是没有进行曝光，与掩模板开口区域对应的光阻被蓝紫光照射到，也就是进行了曝光。曝光之后的光阻会被去除掉，没有曝光的光阻保留下来。没有光阻遮挡的金属薄膜最后会被刻蚀掉，也就是说，遮蔽区域对应的金属薄膜会被保留下来，形成所需要的栅极图案。开口区域对应的金属薄膜会被刻蚀掉。
基于此，晶体管中的其他膜层也可以通过上述构图工艺制备得到。可以通过改变掩膜板中遮挡区域和开口区域的结构，可以在衬底23上形成不同图案，以制备得到上述第二驱动电路222。
可以理解的是，显示屏20中的第一驱动电路212和第二驱动电路222可以同步形成。
由于第二驱动电路222中的晶体管是同步形成的，因此，本示例中仅以第二驱动电路222中的驱动晶体管M4为例，对第二驱动电路222中的各膜层进行示意。
在一种情况下，驱动晶体管M4为底栅型晶体管。
如图12a所示，驱动晶体管M4包括沿远离衬底23的方向依次层叠设置在衬底23上的栅极241、栅绝缘层242、有源层243、源漏电极层244以及钝化层245。
其中，源漏电极层244包括第一极和第二极，第一极例如可以为源电极，第二极为漏电极。
上述导电层为源漏电极层244，第一绝缘层为钝化层245。每个第二驱动电路222中的钝化层245为块状结构，相邻第二驱动电路222中的钝化层245之间通过间隙间隔设置，而非一体结构。
如图12b所示，上述导电层还为栅极241，第一绝缘层还为栅绝缘层242。每个第二驱动电路222中的栅绝缘层242为块状结构，相邻第二驱动电路222中的栅绝缘层242之间通过间隙间隔设置，而非一体结构。
在另一种情况下，驱动晶体管M4为顶栅型晶体管。
如图12c所示，驱动晶体管M4包括沿远离衬底23的方向依次层叠设置在衬底23上的有源层243、栅绝缘层242、栅极241、钝化层245以及源漏电极层244。
上述导电层为栅极241和源漏电极层244，第一绝缘层为栅绝缘层242和钝化层245。每个第二驱动电路222中的栅绝缘层242和钝化层245为块状结构，相邻第二驱动电路222中的栅绝缘层242和钝化层245之间通过间隙间隔设置，而非一体结构。
当然，可以理解的是，当驱动晶体管M4远离衬底23一侧还需设置其他绝缘膜层时(例如设置平坦层)，该绝缘膜层也可以和栅绝缘层242的结构相同。
可以理解的是，如图12c所示，本示例中以每个第二驱动电路222中的栅绝缘层242和钝化层245延伸至第二发光器件223所在区域为例进行示意。栅绝缘层242和钝化层245也可以不延伸至第二发光器件223所在区域，只位于第二驱动电路223所在区域。在此情况下，第二驱动电路222远离衬底23一侧可以根据需要设置平坦层246。
由于栅绝缘层242和钝化层245虽然均为透光膜层，但对透过率还是会有一定的影响。因此，通过使栅绝缘层242和钝化层245中的至少一种为块状结构，不延伸至相邻第二像素22之间的空白区域内，可避免栅绝缘层242和钝化层245这些膜层对第二显示区A2的透过率的影响，进一步提高第二显示区A2的透过率。
在一些实施例中，上述第一绝缘层的材料为遮光材料。第一绝缘层在衬底23上的正投影与第二发光器件223在衬底23上的正投影交错。
由于第一绝缘层是用于防止相邻导电层之间短路的，因此，第二驱动电路222中的导电层在衬底23上的正投影均位于第一绝缘层在衬底23上的正投影内。
第一绝缘层在衬底23上的正投影与第二发光器件223在衬底23上的正投影交错，可以理解为，第一绝缘层不延伸至第二发光器件223所在区域，只位于第二驱动电路222所在区域。
如图12d所示，上述第一绝缘层为钝化层245，钝化层245的材料为遮光材料，钝化层245在衬底23上的正投影与第二发光器件223在衬底23上的正投影无交叠。
如图3e所示，第二驱动电路222中包括多个晶体管，多个晶体管之间通过连接线连接，连接线与连接线之间存在间隙。由于连接线本身的线宽及连接线之间的间隙的宽度都是微米级的，因此，这些连接线之间就构成了光栅。如图13所示，当环境光穿过连接线构成的光栅 时，会发生衍射。衍射后的光线具有明暗条纹，影响光学器件30采集信息的准确性。
因此，本示例中通过将第一绝缘层的材料选取为遮光材料，并使第一绝缘层覆盖连接线之间的间隙，可以避免连接线之间形成光栅，从而避免环境光发生衍射，保证光学器件30采集信息的准确性。
示例五
通过单独设置遮光层，对第二驱动电路222形成的光栅进行遮挡。
如图14a所示，显示屏20还包括第一遮光层，第一遮光层包括多个独立设置的遮光块27，每一第二驱动电路222对应一遮光块27。
此处，由于相邻第二像素22之间的间隙处未设置第二驱动电路222，对应位置处不设置遮光块27。
需要说明的是，为了示意出第二亚像素221设置遮光块27和不设置遮光块27时的区别，图14a中部分第二亚像素221中未示意出遮光块27。
其中，第一遮光层可以位于第二驱动电路222靠近衬底23一侧，也可以位于第二驱动电路222远离衬底23一侧。
由于遮光块27距离第二驱动电路222越近，对第二驱动电路222的遮光效果越好。因此，在一些实施例中，如图14b所示，遮光块27位于第二发光器件223靠近衬底23一侧。
可以理解的是，在遮光块27的材料为树脂材料时，如图14b所示，遮光块27可以与第二驱动电路222中的导电层(以栅极241为例)直接接触。在遮光块27的材料为导电材料时，遮光块27与第二驱动电路222中的导电层之间应设置有绝缘层。
第二驱动电路222在衬底23上的正投影位于与该第二驱动电路222对应的遮光块27在衬底23上的正投影内。也就是说，遮光块27完全覆盖第二驱动电路222。
可以理解的是，遮光块27不遮挡显示用光，在一些实施例中，如图14a所示，遮光块27在衬底23上的正投影与第二发光器件223在衬底23上的正投影交错。
也就是说，遮光块27不延伸至第二发光器件223所在区域。
本示例中通过设置遮光块27，并使遮光块27覆盖第二驱动电路222，可以避免第二驱动电路222中的栅极21、源漏电极层224以及晶体管之间的连接线之间形成光栅，从而避免环境光发生衍射，保证光学器件30采集信息的准确性。
此外，由于第二驱动电路222所在区域本身透过率就比较低，因此，设置第一遮光层对透过率的影响也比较小，不会影响光学器件30的性能。
示例六
通过对第二驱动电路222进行平滑处理，对第二驱动电路222形成的光栅进行遮挡。
如图15a所示，第二驱动电路222在衬底23上的正投影的轮廓的至少一部分为折线。例如图15a中虚线框中的部分。
在此基础上，显示屏20还包括填补层，如图15b所示，填补层包括多个独立设置的填补块28。
其中，如图15b所示，以一个第二亚像素221为例，填补块28在衬底23上的正投影，与和该填补块28对应的第二驱动电路222的折线的凹陷位置所在的区域重合。
可以理解的是，当第二驱动电路222的折线处包括多个凹陷位置时，一个填补块28对应一个凹陷位置，多个填补块28的形状不完全相同。
也就是说，填补块28将第二驱动电路222的边缘位置凹凸不平的区域填平，以使填补块28和第二驱动电路222作为一个整体时，该整体在衬底23上的正投影为凸多边形。
此处，不对填补块28的材料进行限定，可以是导电材料，也可以是非导电材料。应当明白的是，在填补块28的材料为导电材料时，填补块28应不影响第二驱动电路222中的栅极241、源漏电极层244的性能。
在一些实施例中，为了便于制备，填补层可以设置在第二驱动电路222远离衬底23一侧，填补层也可以设置在第二驱动电路222靠近衬底23一侧。
可以理解的是，在填补层的材料为导电材料时，填补层和第二驱动电路222之间设置有至少一层绝缘层。
在一些实施例中，为了降低显示屏20的厚度，填补层与第二驱动电路222中的至少一层导电层同层同材料。
也就是说，填补层的材料为导电材料，在通过构图工艺制备第二驱动电路222中的某一层导电层时，同时形成填补层。
此处，应当明白的是，以填补层和第二驱动电路222中的栅极241同层同材料为例，虽然填补层和第二驱动电路222中的栅极241通过同一次构图工艺制备得到，但若填补层和栅极241电连接后会影响第二驱动电路222的性能，则填补层和栅极241应为分立结构。若填补层和栅极241电连接后不会影响第二驱动电路222的性能，则填补层和栅极241可以为一体结构。
此外，填补层并不限定为只有一层结构，也可以是由多层结构组合而成。例如，填补层可以包括第一子填补层和第二子填补层。第一子填补层可以和第二驱动电路222中的栅极221同层同材料，第二子填补层可以和第二驱动电路222中的源漏电极层224同层同材料。第一子填补层和第二子填补层共同拼接出填补层的形状。
由于第二驱动电路222的边缘是凹凸不平不规则的形状，第二驱动电路222在衬底23上的正投影的轮廓的至少一部分为折线，也就是第二驱动电路222在衬底23上的正投影的轮廓上会有很多小特征，这些小特征的尺寸在微米级别，也会对光线产生衍射作用，从而影响到显示屏20下方光学器件30的正常工作。
因此，本示例中，通过设置填补块28，对第二驱动电路222在衬底23上的正投影的轮廓上的小特征进行填补，避免第二驱动电路222形成光栅，从而可以避免第二驱动电路222影响显示屏20下方光学器件30的正常工作。
示例七
通过单独设置第二遮光层，对显示屏20上的信号线形成的光栅进行遮挡。
显示屏20，如图16a所示，还包括用于向第二驱动电路222传输驱动信号的第二信号线组224，第二信号线组224包括交叉设置的第二数据线2241和多条第二信号线2242；第二数据线2241用于传输数据电压；第二信号线2242用于传输工作电压，或者向第二驱动电路222中的一个晶体管的栅极241提供选通信号。
其中，第二信号线2242例如可以包括多条第二栅线和多条第二电压线。一条第二栅线用于向第二驱动电路222中的一个晶体管的栅极241提供选通信号，选通信号是指控制晶体管的栅极241开启或关闭的信号。一条第二电压线用于向第二驱动电路222中的一个晶体管的第一极或第二极提供电压信号。
以图16a所示的第二驱动电路222为例，工作电压包括初始信号Vint、高电平电源电压信号ELVDD、低电平电源电压信号ELVSS。选通信号包括第一扫描信号N-1、第二扫描信号N、使能信号EM。
可以理解的是，通常情况下，如图16a所示，沿第二信号线2242的走线方向排布的同一 行第二亚像素221共用同一第二信号线组224中的第二信号线2242，但一行第二亚像素221中的每个第二亚像素221单独连接一条第二数据线2241。
显示屏20，如图16a所示，还包括第二遮光层，第二遮光层包括多个独立设置的遮光条29，每一第二信号线组224对应一遮光条29。
应当明白的是，无论一个第二信号线组224连接一个第二亚像素221，还是连接一行第二亚像素221，该第二信号组224均是对应一个遮光条29。
在此基础上，如图16a所示，第二信号线组224在衬底23上的正投影中的至少部分位于遮光条29在衬底23上的正投影内。
在一些实施例中，如图16a所示，第二信号线组224中的第二信号线2242在衬底23上的正投影位于遮光条29在衬底23上的正投影内，但第二信号线组224中的第二数据线2241在衬底23上的正投影并不位于遮光条29在衬底23上的正投影内。
也就是说，遮光条29仅覆盖第二信号线组224中的第二信号线2242，不覆盖第二信号线组224中的第二数据线2241。
应当明白的是，如图16a所示，若第二信号线组224中的第二信号线2242中的部分位于第二亚像素221的上方，部分位于第二亚像素221的下方，此时，遮光条29也可以分为第一子遮光条和第二子遮光条。
在一些实施例中，如图16b所示，第二信号线组224中的第二数据线2241在衬底23上的正投影位于遮光条29在衬底23上的正投影内，但第二信号线组224中的第二信号线2242在衬底23上的正投影并不位于遮光条29在衬底23上的正投影内。
也就是说，遮光条29仅覆盖第二信号线组224中的第二数据线2241，不覆盖第二信号线组224中的第二信号线2242。
可以理解的是，如图16b所示，通常情况下，沿第二数据线241的走线方向排布的一列第二亚像素221中，共用同一第二信号线组224中的第二数据线241，但一列第二亚像素221中的每个第二亚像素221单独连接一个第二信号线组224中的第二信号线2242。
在此基础上，如图16b所示，在一些实施例中，两列第二亚像素221连接的第二数据线2242相邻，而并非如图16a所示的间隔一列第二亚像素221。
在这种情况下，如图16b所示，相邻的两条第二数据线2241可以共用同一遮光条29。
此处，不对第二遮光层的设置位置进行限定，可以设置在第二信号线组224靠近衬底23一侧，也可以设置在第二信号线组224远离衬底23一侧。当然，在第二信号线组224中的多条信号线异层设置的情况下，第二遮光层还可以设置在相邻两层信号线之间。
在此基础上，不对第二遮光层的材料进行限定，可以是导电材料，也可以是非导电材料。
可以理解的是，在第二遮光层的材料为导电材料的情况下，第二遮光层和第二信号线组224中的信号线之间应设置有绝缘层。
在第二遮光层的材料为非导电材料的情况下，若第二信号线组224中的多条信号线异层设置，第二遮光层可以充当相邻两层信号线之间的绝缘层，从而可以减少膜层数量。
由于第二信号线组224中包括多条信号线，信号线与信号线之间存在间隙，由于信号线本身的线宽(例如2.5μm)及信号线之间间隙的宽度(例如3μm)都是微米级的，这些信号线之间就构成了光栅，当环境光穿过时会发生如图13所示的衍射，从而影响到显示屏20下方光学器件30的正常工作。
因此，本示例中通过单独设置一层第二遮光层，对第二信号线组224中信号线进行遮挡，使得当外界环境光入射时，第二信号线组224所在区域是完全不透光的。可避免信号线形成 光栅，消除因第二信号线组224中信号线引起的衍射，保证光学器件30的性能。
此外，由于第二信号线组224所在区域本身透过率就比较低，因此，设置第二遮光层对透过率的影响也比较小，不会影响光学器件30的性能。
示例八
通过设置第二信号线组224中信号线的排布方式，消除第二信号线组224中信号线形成的光栅。
第二信号线组224的多条第二信号线2242中，部分作为第一子信号线，部分作为第二子信号线。
示例的，第二信号线2242中的初始信号Vint、高电平电源电压信号ELVDD、低电平电源电压信号ELVSS作为第一子信号线。第二信号线2242中的第一扫描信号N-1、第二扫描信号N、使能信号EM作为第二子信号线。
如图17a所示，第一子信号线22421和第二子信号线22422沿同一方向延伸。沿垂直与第一子信号线22421和第二子信号线22422的延伸方向，第一子信号线22421和第二子信号线22422交替排布，且第一子信号线22421在衬底23上的正投影与位于该第一子信号线22421两侧的第二子信号线22422在衬底23上的正投影均交叠。
也就是说，第一子信号线22421和位于该第一子信号线22421两侧的第二子信号线22422搭接。这样一来，第二子信号线22422和位于该第二子信号线22422两侧的第一子信号线22421也搭接。
如图17b所示，显示屏20还包括位于第一子信号线22421和第二子信号线22422之间的第二绝缘层26。
从截面图上来看，要实现第一子信号线22421在衬底23上的正投影与位于该第一子信号线22421两侧的第二子信号线22422在衬底23上的正投影均交叠，相邻第一子信号线22421之间的间隙h1小于第二子信号线22422的线宽h2，相邻第二子信号线22422之间的间隙h3小于第一子信号线22421的线宽h4。
其中，可以是第一子信号线22421设置在第二子信号线22422靠近衬底23一侧，也可以是第二子信号线22422设置在第一子信号线22421靠近衬底23一侧。
本示例中，通过将第二信号线2242分为异层设置的两部分，并使利用不同层之间的信号线相互遮挡，可以遮挡位于同一层的信号线形成的间隙，相当于消除了信号线之间的间隙，即消除信号线线带来的衍射。无需增加新的膜层结构，可简化制备工艺，并使显示屏20轻薄化。
示例九
通过将第二信号线组224中信号线的材料选取为透明材料，以消除第二信号线组224中信号线形成的光栅。
显示屏20，如图16a所示，还包括用于向第二驱动电路222传输驱动信号的第二信号线组224，第二信号线组224包括交叉设置的第二数据线2241和多条第二信号线2242；第二数据线2241用于传输数据电压；第二信号线2242用于传输工作电压，或者向第二驱动电路222中的一个晶体管的栅极241提供选通信号。
在一些实施例中，构成第二数据线2241的材料为透明导电材料。
在一些实施例中，构成第二信号线2242的材料为透明导电材料。
透明导电材料例如可以是铟锌氧化物(indium zinc oxide，IZO)、铟锡氧化物(indium tin oxide，ITO)、铝锌氧化物(Al zinc oxide，AZO)、铟氟氧化物(indium F oxide，IFO)中的 至少一种。
本示例中，通过将第二信号组224中信号线采用透明导电材料制备，不仅可以避免第二信号组224中信号线形成光栅，而且还可以避免第二信号组224中信号线遮光。从而可提高光学器件30的光接收效果和光接收量。
示例十
通过调整第二信号线组224中第二信号线2242的排布方式，降低第二信号线2242对第二显示区A2透过率的影响。
如图18a所示，显示屏还20包括用于向第一驱动电路212传输驱动信号的第一信号线组214和用于向第二驱动电路222传输驱动信号的第二信号线组224。
第一信号线组214包括多条第一信号线2142；第一信号线2142用于传输工作电压，或者向第一驱动电路212中的一个晶体管的栅极提供选通信号。
工作电压和选通信号的种类，可以参考上述示例七中的相关描述。
第二信号线组224包括多条第二信号线2242；第二信号线2242用于传输工作电压，或者向第二驱动电路222中的一个晶体管的栅极提供选通信号。
沿第一信号线2142的走线方向，显示屏20包括两个分别位于低密度像素组D两侧，且与该低密度像素组并排设置的高密度像素组G。
也就是说，低密度像素组D的左侧设置有第一高密度像素组G1，低密度像素组D的右侧设置有第二高密度像素组G2。
多个阵列排布的第二像素22中的每行第二像素22，与多个阵列排布的第一像素21中的一行第一像素21同行设置。
可以理解为，第一高密度像素组G1和第二高密度像素组G2中均设置有多个阵列排布的第一像素21，多个阵列排布的第一像素21分布有多行第一像素21，图18a中以第一高密度像素组G1和第二高密度像素组G2均包括三行第一像素21为例。
每个低密度像素组D中设置有多个阵列排布的第二像素22，多个阵列排布的第二像素22分布有至少一行第二像素22，图18a中以每个低密度像素组D包括两行第二像素22为例。
两行第二像素22中的每行与第一高密度像素组G1中三行第一像素21中的一行同行设置，并且与第二高密度像素组G2中三行第一像素21中的一行同行设置。
也就是说，如图18a中示意的第一行像素①和第三行像素③，一行像素由第一高密度像素组G1中的一行第一像素21、低密度像素组D中的一行第二像素22、第二高密度像素组G2中的一行第一像素21组成。
或者，如图18a中示意的第二行像素②，一行像素由第一高密度像素组G1中的一行第一像素21、第二高密度像素组G2中的一行第一像素21组成。在这种结构下，第一高密度像素组G1中的一行第一像素21和第二高密度像素组G2中的一行第一像素21之间间隔有第二显示区A2。
每一行第一像素21包括多个阵列排布的第一亚像素211；每一行第二像素22包括多个阵列排布的第二亚像素221。
图18a中以每个第一像素21包括四个第一亚像素211，每行第一像素21包括两行第一亚像素211为例进行示意。以每个第二像素22包括四个第二亚像素221，每行第二像素22包括两行第二亚像素221为例进行示意。
也就是说，图18a中示意的第一行像素①包括两行亚像素，每行亚像素即包括第一亚像素211，又包括第二亚像素221。
每行第一像素21中，位于同一行的第一亚像素211电连接的第一信号线2142与每行第二像素22中，位于同一行的第二亚像素221电连接的第二信号线2242共用。
示例的，图18a中示意的第一行像素①中，一行第二像素22和一行第一像素21同行设置。在这种结构下，第一高密度像素组G1中该行第一像素21中的第一行第一亚像素211、该行第二像素22中的第一行第二亚像素221、第二高密度像素组G2中该行第一像素21中的第一行第一亚像素211，共用同一第二信号线2242，不再单独设置第一信号线2142。
同理，第一高密度像素组G1中该行第一像素21中的第二行第一亚像素211、该行第二像素22中的第二行第二亚像素221、第二高密度像素组G2中该行第一像素21中的第二行第一亚像素211，共用同一第二信号线2242，不再单独设置第一信号线2142。
图18a中示意的第二行像素②中，该行没有设置第二像素22，仅包括一行第一像素21。在这种结构下，第一高密度像素组G1中该行第一像素21中的第一行第一亚像素211共用同一第一信号线2142，第二高密度像素组G2中该行第一像素21中的第一行第一亚像素211共用同一第一信号线2142。但两个高密度像素组G中的该行第一像素21中的第一行第一亚像素211不共用同一第一信号线2142。
也就是说，第二行像素②中，第一高密度像素组G1中的第一行第一亚像素211连接一条第一信号线2142，第二高密度像素组G2中的第一行第一亚像素211连接一条第一信号线2142，两条第一信号线2142在第二显示区A2处断开，不相互连接。
同理，第一高密度像素组G1中的第二行第一亚像素211连接一条第一信号线2142，第二高密度像素组G2中的第二行第一亚像素211连接一条第一信号线2142，两条第一信号线2142在第二显示区A2处断开，不相互连接。
图18a中示意的第三行像素③中，与第一行像素①中的结构相同。
也就是说，如图18a所示，若第一高密度像素组G1和第二高密度像素组G2中的某一行第一亚像素211与低密度像素组D中的一行第二亚像素221同行，则该行第一亚像素共用同一第二信号线2242。若第一高密度像素组G1和第二高密度像素组G2中的某一行第一亚像素211没有与低密度像素组D中的一行第二亚像素221同行，第一高密度像素组G1和第二高密度像素组G2中的该行第一亚像素211之间间隔有第二显示区A2，则第一高密度像素组G1和第二高密度像素组G2中的该行第一亚像素211分别独立连接一条第一信号线2142。
这样一来，对比图18b中所示的常规设置，即，将第一高密度像素组G1和第二高密度像素组G2中位于同一行的第一亚像素211共用同一第一信号线2142，且第一信号线2142穿过第二显示区A2。图18a中示意的结构，第一高密度像素组G1和第二高密度像素组G2中位于同一行的第一亚像素211不共用同一第一信号线2142，在第二显示区A2中没有设置第二像素22的位置处不用设置第一信号线2142，可以避免第一信号线2142对环境光的遮挡，进一步提高第二显示区A2的透过率。
此外，由于第二显示区A2中信号线越少，造成的衍射现象越弱。因此，通过在第二显示区A2中没有设置第二像素22的位置处不用设置第一信号线2142，可以降低第二显示区A2中信号线的数量，从而降低衍射干扰。
可以理解的是，如图18c所示，显示屏20在显示的过程中，第一高密度像素阵列G1中与第一亚像素211耦接的第一信号线2142，和第二高密度像素阵列G2中与第一亚像素211耦接的第一信号线2142，分别单独连接一个栅极驱动电路40，独立驱动，此时显示屏20为双边驱动显示屏。
对于显示屏20中的第二信号线2242，可以如图18c所示，单独连接一个栅极驱动电路 40。
其中，栅极驱动电路40可以是阵列基板行驱动(gate driver on array，GOA)电路，也可以是栅极驱动集成电路(integrated circuit，IC)。
示例十一
通过调整第二信号线组224中第二数据线2241的排布方式，降低第二数据线2241对第二显示区A2透过率的影响。
显示屏20，如图19a所示，还包括用于向第一驱动电212传输驱动信号的第一信号线组214和用于向第二驱动电路222传输驱动信号的第二信号线组224。
第一信号线组214包括第一数据线2141；第一数据线2141用于传输数据电压。
第二信号线组224包括第二数据线2241；第二数据线2241用于传输数据电压。
沿第一数据线2141的走线方向，显示屏20包括两个分别位于低密度像素组D两侧，且与该低密度像素组D并排设置的高密度像素组G。
也就是说，低密度像素组D上侧设置有第三高密度像素组G3和第四高密度像素组G4。
多个阵列排布的第二像素中的每列第二像素，与多个阵列排布的第一像素中的一列第一像素同列设置。
可以理解为，第三高密度像素组G3和第四高密度像素组G4中均设置有多个阵列排布的第一像素21，多个阵列排布的第一像素21分布有多列第一像素21，图19a中以第三高密度像素组G3和第四高密度像素组G4均包括五列第一像素21为例。
每个低密度像素组D中设置有多个阵列排布的第二像素22，多个阵列排布的第二像素22分布有至少一列第二像素22，图19a中以每个低密度像素组D包括三列第二像素22为例。
三列第二像素22中的每列与第三高密度像素组G3中五列第一像素21中的一列同列设置，并且与第四高密度像素组G4中五列第一像素21中的一列同行设置。
也就是说，如图19a中示意的第一列像素⑴、第三列像素⑶、第五列像素⑸，一列像素由第三高密度像素组G3中的一列第一像素21、低密度像素组D中的一列第二像素22、第四高密度像素组G4中的一列第一像素21组成。
或者，如图19a中示意的第二列像素⑵、第四列像素⑷，一列像素由第三高密度像素组G3中的一列第一像素21、第四高密度像素组G4中的一列第一像素21组成。在这种结构下，第三高密度像素组G3中的一列第一像素21和第四高密度像素组G4中的一列第一像素21之间间隔有第二显示区A2。
每一列第一像素21包括多个阵列排布的第一亚像素221；每一列第二像素22包括多个阵列排布的第二亚像素221。
图19a中以每个第一像素21包括四个第一亚像素211，每列第一像素21包括两列第一亚像素211为例进行示意。以每个第二像素22包括四个第二亚像素221，每列第二像素22包括两列第二亚像素221为例进行示意。
也就是说，图19a中示意的第一列像素⑴包括两列亚像素，每列亚像素即包括第一亚像素211，又包括第二亚像素221。
每列第一像素21中，位于同一列的第一亚像素211电连接的第一数据线2141，与每列第二像素22中，位于同一列的第二亚像素221电连接的第二数据线2241共用。
两个高密度像素组G中，位于同一列的第一亚像素21电连接的两个第一数据线2141，通过连接线2143耦接，连接线2143绕开第二显示区A2。
示例的，图19a中示意的第一列像素⑴、第三列像素⑶、第五列像素⑸中，一列第二像 素22和一列第一像素21同列设置。在这种结构下，第三高密度像素组G3中该列第一像素21中的第一列第一亚像素211、该列第二像素22中的第一列第二亚像素221、第四高密度像素组G4中该列第一像素21中的第一列第一亚像素211，共用同一第二数据线2241，不再单独设置第一数据线2141。
同理，第三高密度像素组G3中该列第一像素21中的第二列第一亚像素211、该列第二像素22中的第二列第二亚像素221、第四高密度像素组G4中该列第一像素21中的第二列第一亚像素211，共用同一第二数据线2241，不再单独设置第一数据线2141。
图19a中示意的第二列像素⑵、第四列像素⑷中，该列没有设置第二像素22，仅包括一列第一像素21。在这种结构下，第三高密度像素组G3中该列第一像素21中的第一列第一亚像素211共用同一第一数据线2141，第四高密度像素组G4中该列第一像素21中的第一列第一亚像素211共用同一第一数据线2141。两个高密度像素组G中的该列第一像素21中的第一列第一亚像素211分别连接的两条第一数据线2141通过连接线2143耦接。
其中，连接线2143从第二显示区A2的外围绕过，即，连接线2143位于第一显示区A1，不进入第二显示区A2。
也就是说，第二列像素⑵、第四列像素⑷中，第三高密度像素组G3中的第一列第一亚像素211连接一条第一数据线2141，第四高密度像素组G4中的第一列第一亚像素211连接一条第一数据线2141，两条第一数据线2141通过连接线2143耦接。
同理，第三高密度像素组G3中的第二列第一亚像素211连接一条第一数据线2141，第四高密度像素组G4中的第二列第一亚像素211连接一条第一数据线2141，两条第一数据线2141通过连接线2143耦接。
也就是说，如图19a所示，若第三高密度像素组G3和第四高密度像素组G4中的某一列第一亚像素211与低密度像素组D中的一列第二亚像素221同列，则该列第一亚像素211共用同一第二数据线2241。
若第三高密度像素组G3和第四高密度像素组G4中的某一列第一亚像素211没有与低密度像素组D中的一列第二亚像素221同列，第三高密度像素组G3和第四高密度像素组G4中的该列第一亚像素211之间间隔有第二显示区A2，则第三高密度像素组G3和第四高密度像素组G4中的该列第一亚像素211分别独立连接一条第一数据线2141，且两条第一数据线2141通过连接线2143耦接。
这样一来，对比图19b中所示的常规设置，即，将第三高密度像素组G3和第四高密度像素组G4中位于同一列的第一亚像素211共用同一第一数据线2141，且第一数据线2141穿过第二显示区A2。图19a中示意的结构，即，第三高密度像素组G3和第四高密度像素组G4中位于同一列的第一亚像素211分别连接的第一数据线2141通过连接线2143耦接，连接线2143不穿过第二显示区A2，而是绕过第二显示区A2。在第二显示区A2中没有设置第二像素22的位置处不用设置第一数据线2141，可以避免第一数据线2141对环境光的遮挡，进一步提高第二显示区A2的透过率。
此外，由于第二显示区A2中信号线越少，造成的衍射现象越弱。因此，通过使位于同一列的两条第一数据线2141通过连接线2143耦接，并且连接线2143不穿过第二显示区A2，而是绕过第二显示区A2，可以降低第二显示区A2中信号线的数量，从而降低衍射干扰。
示例十二
显示屏20中设置黑矩阵层，避免环境光射向第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224，减少环境光在第一驱动电路212、第一信号线组214、 第二驱动电路222、第二信号线组224处的反射，提高显示屏20的显示效果。
如图20a所示，显示屏20还包括设置在第一驱动电路212和第二驱动电路222远离衬底23一侧的黑矩阵层50。
例如，黑矩阵层50，可以设置在第一驱动电路212和第二驱动电路222与第一发光器件213和第二发光器件223之间，也可以设置在第一发光器件213和第二发光器件223远离衬底23一侧。
第一驱动电路212在衬底23上的正投影、第一信号线组214在衬底23上的正投影、第二驱动电路222在衬底24上的正投影以及第二信号线组224在衬底23上的正投影均位于黑矩阵层50在衬底23上的正投影内。
第一信号线组214可以包括第一数据线2141和第一信号线2142中的至少一种，第二信号线组224可以包括第二数据线224和第二信号线2242中的至少一种。
黑矩阵层50可以包括多个黑矩阵条，黑矩阵层50具体的形状，与第一信号线组214和第二信号线组224中信号线的设置方式有关。
如图20a所示，若显示屏20中设置有示例十一中所示的连接线2143，则黑矩阵层50还可以覆盖连接线2143。
如图20b所示，若显示屏20中不设置连接线2143，第一数据线2241直接穿过第二显示区A2，则黑矩阵层50覆盖位于第二显示区A2中的第一数据线2241。
图20b所示黑矩阵层50的图案与如图20a所示的黑矩阵层50的图案不同。
由于环境光照射到显示屏20中后，显示屏20中的第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224会对环境光进行反射，这部分反射光会对显示用光进行干扰。
本示例中，通过设置黑矩阵层50，并使黑矩阵层50覆盖第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224。这样一来，一方面可以避免环境光照射到第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224上。另一方面，即使部分环境光从第一发光器件213和第二发光器件223处射到了第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224上，黑矩阵层50也可以对第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224反射的环境光进行遮挡，可降低反射光对显示用光的干扰。
示例十三
通过将阴极第二发光器件223中的第二阴极做薄，降低第二阴极的滤光作用，提高第二显示区A2的透过率。
如图21所示，第一发光器件213包括第一阴极c1，第二发光器件223包括第二阴极c2。第一阴极c1的厚度h5大于第二阴极c2的厚度h6。
以下，对第一阴极c1和第二阴极c2的制备方法进行举例说明。
例如可以采用蒸镀工艺形成第一阴极c1和第二阴极c2。
示意的，首先，采用如图22a所示的第一掩模板60对形成有电子注入层EIL的衬底23进行遮挡，蒸镀A*x％的时间。
如图22a所示，第一掩模板60包括开口区域61和遮挡区域62，开口区域61对应第一显示区A1和第二显示区A2。
其中，A为形成第一阴极c1所需的时间。x为设定值，x的取值与第二以及c2的厚度有关，0<x<1。
第一次蒸镀完成后，形成阴极薄膜c3，阴极薄膜c3覆盖第一显示区A1和第二显示区A2。此时，如图22b所示，阴极薄膜c3的厚度h6与第二阴极c1的厚度h6相等。
其次，采用如图22c所示的第二掩模板70对形成有阴极薄膜c3的衬底23进行遮挡，蒸镀A*(1-x％)的时间。
如图22c所示，第二掩模板70包括开口部71和遮挡部72，开口部71仅对应第一显示区A1，遮挡部72对第二显示区A2进行遮挡。
相当于，第二次蒸镀仅对第一显示区A1进行蒸镀，对第二显示区A2不蒸镀，以增加第一显示区A1中阴极薄膜c3的厚度，形成如图21所示的第一阴极c1。阴极薄膜c3中位于第二显示区A2的部分作为图21所示的第二阴极c2。
可以理解的是，第二阴极c2的厚度与蒸镀时间的长短有关，而第二阴极c2越薄，透过率就越高。因此从提升第二显示区A2透过率的角度来讲，第一次蒸镀时间x越短越好。但是另一方面，第二阴极c2的电阻率等电学性能也与第二阴极c2的厚度有关，第二阴极c2的厚度越薄，其电学性能越差，会影响其正常功能，因此第一次蒸镀时间也不能太短，需要同时兼顾透过率和电学性能的需求。
本示例中，通过将第二显示区A2中的第二发光器件223中的第二阴极c2的厚度减薄，可以提高第二阴极c2的透过率，从而可以提升第二显示区A2的透过率。
示例十四
将第二显示区A2中的第二阴极c2图案化处理，对于没有设置第二亚像素221的区域不形成第二阴极c2。
显示屏20中的每一第二发光器件223包括第二阴极c2，如图23a所示，相邻第二阴极c2之间间隔设置。
也就是说，如图23b所示，没有设置第二亚像素221的区域不形成第二阴极c2。
其中，多个第二阴极c2可以电连接，也可以不电连接。
此处，如图23a所示，第一显示区A1中的多个第一发光器件211包括的第一阴极c1可以为一体结构。
第一阴极c1和第二阴极c2例如可以通过构图工艺制备得到。
第一阴极c1和第二阴极c2也可以通过蒸镀工艺制备得到，需要蒸镀第一阴极c1和第二阴极c2的区域对应掩模板的开口区域，不需要蒸镀第一阴极c1和第二阴极c2的区域对应掩模板的遮挡区域。
第一阴极c1和第二阴极c2还可以通过激光切割工艺制备得到，激光切割去除多余区域的阴极材料。
第一阴极c1和第二阴极c2还可以通过湿法刻蚀工艺制备得到，刻蚀掉多余区域的阴极材料。
本示例中，通过在相邻第二像素22之间的空白区域不设置第二阴极c2，可消除第二阴极c2对环境光的过滤作用，进一步提高第二显示区A2的透过率。
示例十五
显示屏20中设置有偏振层，但偏振层在对应第二显示区A2的位置处有第三开口，偏振层仅位于第一显示区A1。
如图24a所示，显示屏20还包括偏振层80；偏振层80上设置有第三开口，第三开口位于第二显示区A2。
如图24b所示，偏振层80设置在第一驱动电路212远离衬底23一侧。
其中，偏振层80可以为制作好的偏振片(polarizer)。在此情况下，可以将偏振片贴附于显示屏20的出光侧的表面上。
偏振片主要包括：沿远离衬底23的方向依次层叠设置的异形薄膜层、压敏胶(pressure sensitive adhesive，PSA)层、聚乙烯醇(polyvinyl alcohol，PVA)层、三醋酸纤维素(tri-acetate cellulose，TAC)层、聚对苯二甲酸类塑料(polyethylene terephthalate，PET)保护层。
其中，起到偏光作用的是PVA层，TAC层用来隔绝水和空气，保护PVA层不被水和空气接触，PSA层是用来将偏振片粘贴于显示屏20的出光侧的表面上，异形薄膜层起到保护PSA层的作用，保护层起到保护TAC的作用。
或者，偏振层80可以为线栅偏振层(grid polarizer，GP)。示例的，在显示屏20的制备过程中，可以采用溅射、纳米压印、光刻等方式将线栅偏振层集成在显示屏20中。
构成线栅偏振层的材料可以为金属。示例的，构成线栅偏振层的材料包括但不限于铝(Al)、铜(Cu)、银(Ag)、金(Au)和铬(Cr)等。
关于偏振层80的制备方式，例如可以是先制备一层覆盖整个显示区A的偏振膜层，然后通过激光切割的方式去除位于第二显示区A2的偏振膜层，以制备得到仅位于第一显示区A1的偏振层80。其中，偏振膜层中去除部分的图案与第二显示区A2的图案相同，保留下来的图案覆盖第一显示区A1。
偏振层80的制备方式，也可以是在制备过程中，仅在第一显示区A1处制备，不在第二显示区A2处制备，以省去切割工艺。
当环境光穿过偏振层80射向显示屏20背面的光学器件30时，无论偏振层80是偏振片，还是线栅偏振层，偏振层80的透过率都不到50％，会极大的影响第二显示区A2的透过率。基于此，为了提升第二显示区A2的透过率，将偏振层80仅设置在第一显示区A1，第二显示区A2中不设置偏振层80。这样一来，偏振层80不会对穿过第二显示区A2的环境光有滤除作用，可提升第二显示区A2的透过率。
示例十六
显示屏20还设置有彩色滤光层，对显示屏20中的反射光进行过滤，降低反射光对显示用光的干扰。
如图25所示，显示屏20还包括设置在第一发光器件213和第二发光器件223远离衬底23一侧的彩色滤光层90。
彩色滤光层90至少包括分别对应三原色的三种彩色滤光图案91。
例如，彩色滤光层90包括红色彩色滤光图案、绿色彩色滤光图案以及蓝色彩色滤光图案。
其中，每一第一发光器件213对应一与该第一发光器件213发光颜色相同的彩色滤光图案91，每一第二发光器件223对应一与该第二发光器件223发光颜色相同的彩色滤光图案91。
也就是说，一个第一发光器件213对应一个彩色滤光图案，一个第二发光器件223对应一个彩色滤光图案。
例如，发红光的第一发光器件213对应红色彩色滤光图案，发绿光的第一发光器件213对应绿色彩色滤光图案，发蓝光的第一发光器件213对应蓝色彩色滤光图案。
发红光的第二发光器件223对应红色彩色滤光图案，发绿光的第二发光器件223对应绿色彩色滤光图案，发蓝光的第二发光器件223对应蓝色彩色滤光图案。
可以理解的是，当外界环境光射入显示屏20后，显示屏20中第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224等反光结构，会对环境光进行反射，导致反射光对显示用光造成干扰，影响显示效果。本示例中，通过在第一发光器件213和第二 发光器件223远离衬底23一侧的彩色滤光层90，使得反射光经过彩色滤光层90后，才能射出显示屏20。以彩色滤光层90中的红色彩色滤光图案91为例，反射光射向红色彩色滤光图案91时，反射光中只有红光可以穿过红色彩色滤光图案91，反射光中的绿光和蓝光无法穿过红色彩色滤光图案91。这就意味着，红色彩色滤光图案91滤除了反射光中的至少三分之二的光线。同理，反射光中只有绿光可以穿过绿色彩色滤光图案91，反射光中只有蓝光可以穿过蓝色彩色滤光图案91。因此，本示例中的彩色滤光层90可对反射光起到较好的过滤作用，使得显示屏20在不设置偏振片时也能有较好的显示效果。
此外，由于每一第一发光器件213对应一与该第一发光器件213发光颜色相同的彩色滤光图案91，每一第二发光器件223对应一与该第二发光器件223发光颜色相同的彩色滤光图案91。因此，发红光的第一发光器件213和发红光的第二发光器件223发出的红光不会被红色彩色滤光图案91遮挡，发绿光的第一发光器件213和发绿光的第二发光器件223发出的绿光不会被绿色彩色滤光图案91遮挡，发蓝光的第一发光器件213和发蓝光的第二发光器件223发出的蓝光不会被蓝色彩色滤光图案91遮挡。基于此，设置彩色滤光层90也不会对显示用光产生滤除，相比设置偏振层(会滤除50％的显示用光)，可提高显示亮度。
示例十七
光学器件30包括摄像头，通过对摄像头的结构进行改进，以提高摄像头的拍摄效果。
终端01，包括上述任一种显示屏20。
在此基础上，光学器件30在显示屏20上的正投影位于显示屏20的第二显示区A2，且光学器件30的受光面朝向显示屏20的背面。
光学器件30，如图26所示，包括第一摄像头31。
可以理解的是，第一摄像头31的受光面朝向显示屏20的背面，是指，第一摄像头31的镜头组朝向显示屏20的背面。
在此基础上，第一摄像头31的焦距小于4mm。例如为3.8mm、3.5mm、3.3mm、3.0mm、2.5mm。
如图27所示，第一摄像头31主要包括线路连接板311、影像传感器312、红外滤光片313、对焦马达314、镜头组315。
环境光穿过镜头组315照射到红外滤光片313，对红外光进行滤除。影像传感器312将接收到的光强转化为电流，传输至线路连接板311，线路连接板311完成图像处理。
镜头组315到影像传感器312的距离称为焦距f。
基于本示例中的终端01的结构，由于显示屏20中的第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224等部件，不可避免的会形成一些等效光栅，环境光经过第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224构成的等效光栅后，在第一摄像头31上成像，整个成像系统的结构，如图28所示。
如图28所示，由于显示屏20中构成了等效光栅，当放置在显示屏下方的光学器件30是用于成像的且成像系统中包含透镜，例如光学器件30为第一摄像头31，镜头组315中包括透镜。则环境光经过第二显示区A2后在光学器件中成像，整个过程就构成了图28所示的光栅衍射系统。
其中，第一驱动电路212、第一信号线组214、第二驱动电路222、第二信号线组224等部件构成了等效光栅，等效光栅的透光区域长度为m、不透光区域长度为n、则光栅周期d＝m+n。
光栅衍射中j级主极大所在位置与中心位置之间的距离y＝j*f*λ/d。其中j为主极大的级 数、f为光学器件的焦距、λ为入射光的波长、d为光栅的周期。由于主极大的位置距离中心位置的距离y越大，衍射现象越明显。因此，要降低衍射对第一摄像头31的影响，就要减小各级主极大距离中心位置的距离y。当入射光波长λ和光栅周期d相同时，各级主极大距中心的距离y与第一摄像头31的焦距f成正比。因此，选择焦距f小的第一摄像头31可以降低光栅衍射对第一摄像头31成像的影响。
因此，本示例中，通过设定第一摄像头31的焦距小于4mm，可降低光栅衍射对第一摄像头31成像的影响。
在此基础上，影像传感器312的像素尺寸大于0.8um。例如，为1.0um、1.2um、1.4um、1.5um、1.8um、2.0um。
如图29所示，影像传感器312包括多个用于感光的像素块3121，每个像素块3121是影像传感器312成像的最小分辨率。
影像传感器312的像素尺寸是指像素块3121的尺寸，即，像素块3121沿其排布方向上的宽度。
每个像素块3121主要包括感光二极管(photodiode)，感光二极管在接受光线照射之后能够产生输出电流，而电流的强度则与光照的强度对应，从而实现图像采集。
可以理解的是，当光栅衍射中j级主极大所在位置与中心之间的距离y＝jfλ/d相同时，即在第一摄像头31的影像传感器312上，衍射产生的j级主极大的偏移距离是相同的。
设像素块3121的尺寸为s，j级主极大所在位置与中心之间的距离y＝jfλ/d，则j级主极大偏移像素块3121的个数N＝y/s。由于j级主极大偏移像素块3121的个数越少，对成像效果影响越弱。因此，当j级主极大偏离中心的距离y一定时，像素块3121的尺寸s越大，j级主极大偏移像素块3121的个数越少，对成像效果影响越弱。因此，本示例中选择像素尺寸大的第一摄像头31能够降低光栅衍射对第一摄像头31成像的影响。
此外，像素块3121的尺寸s越大，像素块3121能接收到的光强越强，因此，使用大像素尺寸的第一摄像头31能够在一定程度上弥补显示屏20透过率对进光量的影响，提升第一摄像头31的拍照效果。
在此基础上，在一些实施例中，第一摄像头31的光圈大于f/2.2。
由于第一摄像头31的拍摄效果，不仅与光强有关，还与第一摄像头31的光圈的大小有关，光圈越大第一摄像头31的进光量越大，拍摄效果越好。因此，通过增大第一摄像头31的光圈，可一定程度上增加第一摄像头31的进光量。使用大光圈的第一摄像头31能够在一定程度上弥补显示屏20透过率对进光量的影响，提升第一摄像头31的拍照效果。
示例十八
通过设置两个摄像头，来提升拍摄效果。
如图30所示，终端01还包括处理单元100；光学器件30还包括第二摄像头32；第二摄像头32的分辨率大于8M。
第二摄像头32的分辨率例如为16M。
也就是说，第一摄像头31和第二摄像头32在显示屏20上的投影均位于显示屏20的第二显示区A2。
第一摄像头31和第二摄像头32均与处理单元100电连接。
需要说明的是，由示例十七可知，第一摄像头31包括线路连接板311，第二摄像头32可以与第一摄像头31共用同一线路连接板311。
第一摄像头31用于向处理单元100传输图片的对比度数据，第二摄像头32用于向处理 单元100传输图片的分辨率数据。
也就是说，在同一时刻，第一摄像头31采集一幅图片，第二摄像头32也采集一幅图片。由于第一摄像头31的像素尺寸大，拍照亮度高，采集的图片的对比度高。因此，第一摄像头31向处理单元100传输图片的对比度数据。由于第二摄像头32的分辨率大，拍照的细腻性好，采集的图片的分辨率高。因此，第二摄像头32向处理单元100传输图片的分辨率数据。
处理单元100用于对对比度数据和分辨率数据进行处理，生成目标图像。
处理单元100将第一摄像头31采集的图片和第二摄像头32采集的图片相融合，生成对比度高，分辨率高的图片，即生成清晰且细腻的高质量图片。从而可以弥补单个摄像头拍照质量低的缺陷。
以上，仅为本申请的具体实施方式，但申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (22)

  1. 一种显示屏，其特征在于，所述显示屏包括衬底和设置在所述衬底上的至少一个高密度像素组和至少一个低密度像素组；所述高密度像素组包括多个阵列排布的第一像素，所述低密度像素组包括多个阵列排布的第二像素；
    第一像素包括至少三个用于分别显示三原色的第一亚像素，所述第一亚像素至少包括第一驱动电路和与所述第一驱动电路电连接的第一发光器件，所述第一驱动电路用于驱动所述第一发光器件发光；
    第二像素包括至少三个用于分别显示三原色的第二亚像素，所述第二亚像素至少包括第二驱动电路和与所述第二驱动电路电连接的第二发光器件，所述第二驱动电路用于驱动所述第二发光器件发光；
    所述多个阵列排布的第一像素所在的第一显示区的像素密度大于所述多个阵列排布的第二像素所在的第二显示区的像素密度。
  2. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括设置在所述第一驱动电路和所述第二驱动电路远离所述衬底一侧的像素界定层；
    所述像素界定层包括多个交叉设置的挡墙以及由所述多个交叉设置的挡墙围设成的多个位于所述第一亚像素和所述第二亚像素的第一开口；
    所述第二发光器件包括沿远离所述衬底的方向依次层叠设置的空穴注入层、空穴传输层、电子传输层以及电子注入层，所述空穴注入层、所述空穴传输层、所述电子传输层以及所述电子注入层中的至少一种位于所述第一开口内。
  3. 根据权利要求2所述的显示屏，其特征在于，所述像素界定层还包括由所述多个交叉设置的挡墙围设成的至少一个第二开口；
    所述第二开口位于相邻所述第二像素之间，用于间隔相邻的所述第二像素。
  4. 根据权利要求3所述的显示屏，其特征在于，相邻的所述第二开口相连通。
  5. 根据权利要求1所述的显示屏，其特征在于，所述第二驱动电路包括多个晶体管；
    所述晶体管包括导电层和与所述导电层层叠设置的第一绝缘层，同一所述第二驱动电路中多个所述晶体管共用同一所述第一绝缘层；相邻所述第二驱动电路中的所述第一绝缘层之间间隔设置；
    所述第一绝缘层为栅绝缘层或钝化层。
  6. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括第一遮光层，所述第一遮光层包括多个独立设置的遮光块，每一所述第二驱动电路对应一所述遮光块；
    所述第二驱动电路在所述衬底上的正投影位于与该第二驱动电路对应的所述遮光块在所述衬底上的正投影内。
  7. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括填补层，所述填补层包括多个独立设置的填补块；
    所述第二驱动电路在所述衬底上的正投影的轮廓的至少一部分为折线，所述填补块在所述衬底上的正投影，与和该填补块对应的所述第二驱动电路的所述折线的凹陷位置所在的区域重合；
    所述填补层设置在所述第二驱动电路靠近所述衬底一侧；
    或者，所述填补层设置在所述第二驱动电路远离所述衬底一侧；
    或者，所述填补层与所述第二驱动电路中的至少一层导电层同层同材料。
  8. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括用于向所述第二驱动 电路传输驱动信号的第二信号线组，所述第二信号线组包括交叉设置的第二数据线和多条第二信号线；所述第二数据线用于传输数据电压；所述第二信号线用于传输工作电压，或者向所述第二驱动电路中的一个晶体管的栅极提供选通信号；
    所述显示屏还包括第二遮光层，所述第二遮光层包括多个独立设置的遮光条，每一所述第二信号线组对应一所述遮光条；
    所述第二信号线组在所述衬底上的正投影中的至少部分位于所述遮光条在所述衬底上的正投影内。
  9. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括用于向所述第二驱动电路传输驱动信号的第二信号线组，所述第二信号线组包括多条第二信号线；所述第二信号线用于传输工作电压，或者向所述第二驱动电路中的一个晶体管的栅极提供选通信号；
    多条所述第二信号线中，部分作为第一子信号线，部分作为第二子信号线；
    所述显示屏还包括位于所述第一子信号线和第二子信号线之间的第二绝缘层；
    所述第一子信号线和所述第二子信号线交替排布，且所述第一子信号线在所述衬底上的正投影与位于该第一子信号线两侧的所述第二子信号线在所述衬底上的正投影均交叠。
  10. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括用于向所述第二驱动电路传输驱动信号的第二信号线组，所述第二信号线组包括交叉设置的第二数据线和多条第二信号线；所述第二数据线用于传输数据电压；所述第二信号线用于传输工作电压，或者向所述第二驱动电路中的一个晶体管的栅极提供选通信号；
    构成所述第二数据线或所述第二信号线的材料为透明导电材料。
  11. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括用于向所述第一驱动电路传输驱动信号的第一信号线组和用于向所述第二驱动电路传输驱动信号的第二信号线组；
    所述第一信号线组包括多条第一信号线；所述第一信号线用于传输工作电压，或者向所述第一驱动电路中的一个晶体管的栅极提供选通信号；
    所述第二信号线组包括多条第二信号线；所述第二信号线用于传输工作电压，或者向所述第二驱动电路中的一个晶体管的栅极提供选通信号；
    沿所述第一信号线的走线方向，所述显示屏包括两个分别位于所述低密度像素组两侧，且与该低密度像素组并排设置的所述高密度像素组；
    所述多个阵列排布的第二像素中的每行第二像素，与所述多个阵列排布的第一像素中的一行第一像素同行设置；
    每一行第一像素包括多个阵列排布的所述第一亚像素；每一行第二像素包括多个阵列排布的所述第二亚像素；
    每行第一像素中，位于同一行的第一亚像素电连接的所述第一信号线与每行第二像素中，位于同一行的第二亚像素电连接的所述第二信号线共用。
  12. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括用于向所述第一驱动电路传输驱动信号的第一信号线组和用于向所述第二驱动电路传输驱动信号的第二信号线组；
    所述第一信号线组包括第一数据线；所述第一数据线用于传输数据电压；
    所述第二信号线组包括第二数据线；所述第二数据线用于传输数据电压；
    沿所述第一数据线的走线方向，所述显示屏包括两个分别位于所述低密度像素组两侧，且与该低密度像素组并排设置的所述高密度像素组；
    所述多个阵列排布的第二像素中的每列第二像素，与所述多个阵列排布的第一像素中的一列第一像素同列设置；
    每一列第一像素包括多个阵列排布的所述第一亚像素；每一列第二像素包括多个阵列排布的所述第二亚像素；
    每列第一像素中，位于同一列的第一亚像素电连接的所述第一数据线，与每列第二像素中，位于同一列的第二亚像素电连接的所述第二数据线共用；
    两个所述高密度像素组中，位于同一列的第一亚像素电连接的两个所述第一数据线，通过连接线耦接，所述连接线绕开所述第二显示区。
  13. 根据权利要求11或12所述的显示屏，其特征在于，所述显示屏还包括设置在所述第一驱动电路和所述第二驱动电路远离所述衬底一侧的黑矩阵层；
    所述第一驱动电路在所述衬底上的正投影、所述第一信号线组在所述衬底上的正投影、所述第二驱动电路在所述衬底上的正投影以及所述第二信号线组在所述衬底上的正投影均位于所述黑矩阵层在所述衬底上的正投影内。
  14. 根据权利要求1所述的显示屏，其特征在于，所述第一发光器件包括第一阴极，所述第二发光器件包括第二阴极；
    所述第一阴极的厚度大于所述第二阴极的厚度。
  15. 根据权利要求1所述的显示屏，其特征在于，每一所述第二发光器件包括第二阴极；相邻所述第二阴极之间间隔设置。
  16. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括设置在所述第一驱动电路远离所述衬底一侧的偏振层；
    所述偏振层上设置有第三开口，所述第三开口位于所述第二显示区。
  17. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括位于相邻所述第二像素之间的多个第三发光器件；
    位于所述多个阵列排布的第二像素中的相邻两行之间的一行所述第三发光器件，与所述多个阵列排布的第一像素中的一行所述第一发光器件同行设置；
    或者，
    位于所述多个阵列排布的第二像素中的相邻两列之间的一列所述第三发光器件，与所述多个阵列排布的第一像素中的一列所述第一发光器件同列设置。
  18. 根据权利要求1所述的显示屏，其特征在于，所述显示屏还包括设置在所述第一发光器件和所述第二发光器件远离所述衬底一侧的彩色滤光层；
    所述彩色滤光层至少包括分别对应三原色的三种彩色滤光图案；
    其中，每一所述第一发光器件对应一与该第一发光器件发光颜色相同的所述彩色滤光图案，每一所述第二发光器件对应一与该第二发光器件发光颜色相同的所述彩色滤光图案。
  19. 一种终端，其特征在于，包括权利要求1-18任一项所述的显示屏；
    所述终端还包括设置在所述显示屏背面且受光面朝向所述显示屏的光学器件，所述光学器件在所述显示屏上的正投影位于第二显示区。
  20. 根据权利要求19所述的终端，其特征在于，所述光学器件包括第一摄像头；
    所述第一摄像头的焦距小于4mm；
    或者，
    所述第一摄像头的光圈大于f/2.2，其中，f为所述第一摄像头的焦距。
  21. 根据权利要求19所述的终端，其特征在于，所述光学器件包括第一摄像头；所述第 一摄像头包括影像传感器，所述影像传感器的像素尺寸大于0.8um。
  22. 根据权利要求21所述的终端，其特征在于，所述终端还包括处理单元；所述光学器件还包括第二摄像头；所述第二摄像头的分辨率大于8M；
    所述第一摄像头和所述第二摄像头均与所述处理单元电连接；
    所述第一摄像头用于向所述处理单元传输图片的对比度数据，所述第二摄像头用于向所述处理单元传输图片的分辨率数据；
    所述处理单元用于对所述对比度数据和所述分辨率数据进行处理，生成目标图像。
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