WO2020235537A1 - キャリア付金属箔並びにその使用方法及び製造方法 - Google Patents
キャリア付金属箔並びにその使用方法及び製造方法 Download PDFInfo
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- WO2020235537A1 WO2020235537A1 PCT/JP2020/019685 JP2020019685W WO2020235537A1 WO 2020235537 A1 WO2020235537 A1 WO 2020235537A1 JP 2020019685 W JP2020019685 W JP 2020019685W WO 2020235537 A1 WO2020235537 A1 WO 2020235537A1
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- carrier
- layer
- metal foil
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- metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
- H05K3/025—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B15/01—Layered products comprising a layer of metal all layers being exclusively metallic
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- H—ELECTRICITY
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
- H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
Definitions
- the present invention relates to a metal foil with a carrier and a method of using and manufacturing the same.
- multi-layered printed wiring boards have become widespread. Such multilayer printed wiring boards are used in many portable electronic devices for the purpose of weight reduction and miniaturization. Further, the multilayer printed wiring board is required to further reduce the thickness of the interlayer insulating layer and further reduce the weight of the wiring board.
- the coreless build-up method is a method in which insulating layers and wiring layers are alternately laminated (build-up) to form multiple layers without using a so-called core substrate.
- the coreless build-up method it has been proposed to use a copper foil with a carrier so that the support and the multilayer printed wiring board can be easily peeled off.
- Patent Document 1 Japanese Unexamined Patent Publication No.
- an insulating resin layer is attached to the carrier surface of a copper foil with a carrier to form a support, and the ultrathin copper layer side of the copper foil with a carrier is resisted.
- a method for manufacturing a package substrate for mounting an element is disclosed.
- Patent Document 2 International Publication No. 2017/150283 discloses a copper foil with a carrier in which a release layer, an antireflection layer, and an ultrathin copper layer are formed by sputtering on a carrier such as glass or ceramics. Has been done. Further, in Patent Document 3 (International Publication No.
- an intermediate layer for example, an adhesive metal layer and a peeling auxiliary layer
- a peeling layer and an ultrathin copper layer for example, a film thickness
- a carrier such as glass or ceramics.
- a copper foil with a carrier formed by sputtering (300 nm) is disclosed.
- an intermediate layer made of a predetermined metal is interposed to provide excellent stability of the mechanical peel strength of the carrier, and the antireflection layer exhibits a desirable dark color. It is also taught to improve visibility in inspections (eg, automated imaging inspection (AOI)).
- AOI automated imaging inspection
- Patent Document 4 Japanese Unexamined Patent Publication No. 2015-35551 describes the formation of a metal release layer on the main surface of a support made of glass or a silicon wafer, the formation of an insulating resin layer on the main surface, and the formation of an insulating resin layer on the main surface.
- methods of manufacturing semiconductor devices including forming solder bumps on the surface of a secondary mounting pad and secondary mounting.
- Patent Document 5 Japanese Unexamined Patent Publication No. 9-74062
- a step of forming a pattern indicating a crystal orientation on a semiconductor wafer, a step of detecting the pattern, and a predetermined wafer are defined based on the detection result.
- a semiconductor exposure method including a step of positioning at an exposure position and a step of exposing and transferring the first circuit pattern onto the positioned wafer is disclosed. According to Patent Document 5, by performing exposure transfer by such a method, it is possible to expose at an accurate position with respect to the crystal orientation, and it is possible to expose at the same position even with different devices. Has been done.
- the above-mentioned build is performed on a copper foil with a glass carrier (or a copper foil with a ceramic carrier) provided with an ultrathin copper layer having a reduced thickness, as shown in Patent Documents 2 and 3. It is conceivable to form a rewiring layer by the up method or the like.
- a coarse circuit of 10 ⁇ m / 10 ⁇ m) is formed (first stage circuit formation).
- a fine circuit is formed through exposure using an exposure apparatus for forming a fine circuit and subsequent development (second-stage circuit formation).
- second-stage circuit formation the process is complicated and a rough circuit is formed first, so that high alignment accuracy is required to further form a fine circuit, which causes a decrease in yield.
- Cheap As described above, although an alignment technique using a pattern showing a crystal orientation formed on a semiconductor (Si) wafer is known (see Patent Document 5), a copper foil with a carrier is like a semiconductor (Si) wafer in the first place. Since it is not a single crystal, it is impossible to form a pattern indicating the crystal orientation itself, and an alignment mark suitable for a metal foil with a carrier is desired.
- the present inventors have now provided the same alignment mark for both rough circuit exposure and fine circuit exposure during wiring formation by providing a processed portion forming an alignment mark on the carrier itself in a metal foil with a carrier. As a result, it was found that a rough circuit and a fine circuit can be formed at the same time in a one-step circuit forming process.
- both the exposure for the rough circuit and the exposure for the fine circuit at the time of wiring formation can be performed with reference to the same alignment mark, and as a result, the rough circuit and the fine circuit are made into a one-step circuit. It is an object of the present invention to provide a metal foil with a carrier which can be formed at the same time in the forming process.
- the carrier is a metal foil with a carrier provided with a carrier, a release layer provided on at least one surface of the carrier, and a metal layer provided on the release layer.
- a metal foil with a carrier is provided.
- it is a method of forming wiring through exposure and development using the carrier-attached metal foil, with the positioning region of the carrier-attached metal foil as a reference prior to exposure.
- Including the process of aligning Provided is a method in which exposure of a plurality of circuits having different circuit widths is performed separately, and development of the plurality of circuits is performed at the same time.
- the method for producing a metal foil with a carrier includes: The process of preparing a carrier and A step of processing a predetermined region on at least one surface of the carrier to form a processed portion constituting at least two of the alignment marks, thereby defining at least two positioning regions. A step of forming the release layer and the metal layer on at least one surface of the carrier in order. Methods are provided, including.
- FIGS. 4 and 5 It is a figure for demonstrating the maximum depth d and the outer diameter ⁇ of the recess shown in FIGS. 4 and 5. It is an enlarged view of the part surrounded by the dotted line in FIG. 6, and is the figure for demonstrating the angle ⁇ and the radius of curvature r. It is a process flow diagram for demonstrating an example of a procedure for exposing and developing a metal foil with a carrier of this invention.
- the carrier-attached metal foil 10 includes a carrier 12, a release layer 16, and a metal layer 18 in this order.
- the carrier 12 is made of, for example, glass or ceramics.
- the release layer 16 is provided on at least one surface of the carrier 12.
- the metal layer 18 is provided on the release layer 16.
- the carrier-attached metal foil 10 may further have an intermediate layer 14 between the carrier 12 and the release layer 16.
- Each of the intermediate layer 14, the peeling layer 16, and the metal layer 18 may be a single layer composed of one layer, or may be a multilayer composed of two or more layers.
- the metal foil 10 with a carrier may be configured by sequentially providing the above-mentioned various layers on both sides of the carrier 12 so as to be vertically symmetrical.
- the carrier-attached metal foil 10 of the present invention has a wiring region W and at least two positioning regions P, as shown in FIGS. 2 and 3.
- the wiring area W is a wiring area in which the carrier 12, the release layer 16, and the metal layer 18 are present over the entire area.
- the positioning region P is a region forming an alignment mark used for alignment at the time of wiring formation accompanied by exposure and development.
- the positioning region P is defined by a processed portion provided on at least one surface of the carrier 12 described above (that is, the surface on the side where the release layer 16 and the metal layer 18 are provided).
- the wiring area W is an area used for forming the wiring
- the positioning area P is a reference area for positioning prior to exposure.
- the above-mentioned various layers may or may not be present in the entire area or a part thereof.
- the metal foil 10 with a carrier may have a region other than the wiring region W and the positioning region P (that is, a region not used as a reference for wiring formation and alignment).
- the carrier described later may be present. -There may be a region where the peel strength between the metal layers is high, or a region where the carrier-metal layers do not peel off.
- both the rough circuit and the fine circuit can be formed simultaneously in the one-step circuit forming process (that is, the rough circuit and the fine circuit can be developed at the same time).
- wiring formation typically refers to the formation of a rewiring layer
- the rewiring layer includes a layer including an insulating layer and a wiring layer formed inside and / or on the surface of the insulating layer.
- a chip electrode arranged on a semiconductor chip and terminals arranged on a printed wiring board at a pitch larger than that of the chip electrode can be electrically connected.
- the rough circuit means a circuit having a circuit width larger than 5 ⁇ m and 500 ⁇ m or less.
- the rough circuit itself may constitute a rewiring layer, or may be a circuit for use in forming the rewiring layer (so-called dummy circuit).
- the fine circuit means a circuit having a circuit width of 0.1 ⁇ m or more and 5 ⁇ m or less.
- the number of alignment marks (in other words, the number of positioning regions P separated from each other) of the carrier-attached metal foil 10 is preferably 2 or more and 200 or less, more preferably 4 or more and 100 or less, still more preferably 6. More than 50 pieces or less.
- a plurality of polygonal (typically quadrangular) microcircuit assembly regions in which microcircuits are aggregated are generally formed so as to be separated from each other, and the number of alignment marks is the number of microcircuits.
- the number of aggregation regions is preferably 2 times or more and 8 times or less, and more preferably 3 times or more and 6 times or less.
- a preferable shape (planar view shape) of the alignment mark include a circle, a cross shape, a polygon shape (for example, a rectangle), and a combination thereof, and a circle is particularly preferable.
- Positioning by an exposure device is generally performed by detecting the edge of the alignment mark and specifying the position of the center point of the alignment mark. However, when the alignment mark has a circular shape, the center point is specified. It is possible to reduce the error and perform positioning with even higher accuracy.
- the alignment mark preferably has a recess 12a provided in the carrier 12. That is, as shown in FIG. 4, the processed portion constituting the alignment mark may itself be a recess 12a. By doing so, as a result of emphasizing the difference in brightness or color difference between the recess 12a and its surroundings, the visibility of the edge of the alignment mark (that is, the edge of the recess 12a) is improved, and positioning can be performed with higher accuracy. ..
- the alignment mark preferably has a convex portion 12b provided on the carrier 12. That is, as shown in FIG. 5, the processed portion forming the alignment mark may include a concave portion 12a and a convex portion 12b surrounded by the concave portion 12a.
- the difference in brightness or color difference between the convex portion 12b and its surroundings (that is, the concave portion 12a) is emphasized, and as a result, the visibility of the edge of the convex portion 12b at the alignment mark is improved, and positioning is performed with higher accuracy. Can be done.
- the maximum depth d of the recess 12a is preferably 0.1 ⁇ m or more and 1000 ⁇ m or less, more preferably 0.5 ⁇ m or more and 800 ⁇ m or less, still more preferably 1.0 ⁇ m or more and 500 ⁇ m or less, and particularly preferably. Is 3.0 ⁇ m or more and 400 ⁇ m or less.
- the maximum depth is within such a range, a decrease in the mechanical strength of the carrier can be suppressed, deformation and cracking of the carrier during the manufacturing process can be effectively prevented, and after various layers are laminated on the carrier.
- the concave portion 12a has a circular shape in a plan view and its outer diameter ⁇ is 50 ⁇ m or more and 5000 ⁇ m or less, more preferably 70 ⁇ m or more and 3000 ⁇ m or less, still more preferably 80 ⁇ m or more and 1000 ⁇ m or less, and particularly preferably. Is 100 ⁇ m or more and 500 ⁇ m or less.
- the angle ⁇ formed by the main surface s of the carrier 12 and the tangent line t of the inner wall surface of the recess 12a is 40 ° or more and 130 ° or less. It is preferable to have it.
- the lower limit of the angle ⁇ is more preferably 60 ° or more, still more preferably 80 ° or more.
- the upper limit of the angle ⁇ is not particularly limited, but from the viewpoint of facilitating processing, the angle ⁇ is typically 130 ° or less, preferably 110 ° or less.
- the viewpoint of further improving the visibility of the alignment mark as shown in FIG.
- the open end of the recess 12a is rounded, and the radius of curvature r of the rounded open end is 100 ⁇ m or less. It is preferably 50 ⁇ m or less, more preferably 20 ⁇ m or less.
- the lower limit of the radius of curvature r is not particularly limited, but the radius of curvature r is typically 0.1 ⁇ m or more.
- the carrier 12 is preferably made of glass or ceramics. Unlike resin carriers, glass carriers or ceramic carriers have high dimensional stability, so the misalignment of alignment marks can be effectively reduced even when heat treatment is performed, and therefore alignment is highly accurate. It becomes possible to do.
- the form of the carrier 12 may be any of a sheet, a film and a plate. Further, the carrier 12 may be one in which these sheets, films, plates and the like are laminated. For example, it is preferable that the carrier 12 can function as a rigid support such as a glass plate or a ceramic plate.
- Preferred examples of the ceramics constituting the carrier 12 include alumina, zirconia, silicon nitride, aluminum nitride, and various other fine ceramics.
- a material having a coefficient of thermal expansion (CTE) of less than 25 ppm / K typically 1.0 ppm / K or more and 23 ppm / K or less
- CTE coefficient of thermal expansion
- examples of such materials include ceramics and glass as described above.
- the carrier 12 preferably has a Vickers hardness of 100 HV or more, more preferably 150 HV or more and 2500 HV or less. As a material satisfying these characteristics, it is particularly preferable that the carrier 12 is made of glass.
- the carrier 12 When glass is used as the carrier 12, there are advantages such as being lightweight, having a low coefficient of thermal expansion, having high insulating properties, being rigid and having a flat surface, and being able to make the surface of the metal layer 18 extremely smooth. Further, when the carrier 12 is made of glass, it has surface flatness (coplanarity) which is advantageous for forming fine circuits, desmear in the wiring manufacturing process, and chemical resistance in various plating processes, and the carrier. There is an advantage that a chemical separation method can be adopted when peeling the carrier from the attached metal foil.
- the glass constituting the carrier 12 include quartz glass, borosilicate glass, non-alkali glass, soda lime glass, aluminosilicate glass, and combinations thereof, and more preferably non-alkali glass, soda lime glass, and the like. And a combination thereof, particularly preferably non-alkali glass.
- Alkaline-free glass is a glass containing silicon dioxide, aluminum oxide, boron oxide, and alkaline earth metal oxides such as calcium oxide and barium oxide as main components, and further containing boric acid, which is substantially free of alkali metal. That is.
- This non-alkali glass is stable with a low coefficient of thermal expansion in the range of 3 ppm / K or more and 5 ppm / K or less in a wide temperature range from 0 ° C to 350 ° C, so that warpage of the glass in a process involving heating is minimized. There is an advantage that it can be done.
- the thickness of the carrier 12 is preferably 100 ⁇ m or more and 2000 ⁇ m or less, more preferably 300 ⁇ m or more and 1800 ⁇ m or less, and further preferably 400 ⁇ m or more and 1100 ⁇ m or less. If the thickness is within such a range, it is possible to reduce the thickness of the wiring and the warpage that occurs when electronic components are mounted, while ensuring an appropriate strength that does not interfere with handling.
- the surface of the carrier 12 adjacent to the release layer 16 is measured in accordance with JIS B 0601-2001 using a laser microscope, and is 0.1 nm or more. It preferably has an arithmetic mean roughness Ra of 70 nm or less, more preferably 0.5 nm or more and 60 nm or less, still more preferably 1.0 nm or more and 50 nm or less, particularly preferably 1.5 nm or more and 40 nm or less, and most preferably 2.0 nm. It is 30 nm or more and 30 nm or less.
- the intermediate layer 14 provided as desired may have a one-layer structure or a two-layer or more structure.
- the intermediate layer 14 is a first intermediate layer 14a provided directly above the carrier 12 and a second intermediate layer provided adjacent to the release layer 16.
- the first intermediate layer 14a is preferably a layer made of at least one metal selected from the group consisting of Ti, Cr, Al and Ni, from the viewpoint of ensuring adhesion to the carrier 12.
- the first intermediate layer 14a may be a pure metal or an alloy.
- the thickness of the first intermediate layer 14a is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 300 nm or less, further preferably 18 nm or more and 200 nm or less, and particularly preferably 20 nm or more and 100 nm or less.
- the second intermediate layer 14b is preferably a layer made of Cu from the viewpoint of controlling the peel strength from the peeling layer 16 to a desired value.
- the thickness of the second intermediate layer 14b is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, further preferably 15 nm or more and 300 nm or less, and particularly preferably 20 nm or more and 200 nm or less.
- Another intervening layer may be present between the first intermediate layer 14a and the second intermediate layer 14b, and examples of the constituent materials of the intervening layer include Ti, Cr, Mo, Mn, W and Ni. Examples thereof include an alloy of at least one metal selected from the group consisting of Cu and Cu.
- the intermediate layer 14 has a one-layer structure, the above-mentioned first intermediate layer 14a may be adopted as it is as an intermediate layer, or the first intermediate layer 14a and the second intermediate layer 14b may be used in the middle of the one layer. It may be replaced with an alloy layer.
- This intermediate alloy layer has a content of at least one metal selected from the group consisting of Ti, Cr, Mo, Mn, W, Al and Ni of 1.0 at% or more and a Cu content of 30 at. It is preferably composed of a copper alloy of% or more.
- the thickness of the intermediate alloy layer is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, further preferably 15 nm or more and 300 nm or less, and particularly preferably 20 nm or more and 200 nm or less.
- the thickness of each layer described above is a value measured by analyzing the layer cross section with an energy dispersive X-ray spectroscopic analyzer (TEM-EDX) of a transmission electron microscope.
- TEM-EDX energy dispersive X-ray spectroscopic analyzer
- the metal constituting the intermediate layer 14 may contain unavoidable impurities due to raw material components, film forming steps, and the like. Further, although not particularly limited, when the intermediate layer 14 is exposed to the atmosphere after the film formation, the presence of oxygen mixed due to the film formation is allowed.
- the intermediate layer 14 may be manufactured by any method, but a layer formed by a magnetron sputtering method using a metal target is particularly preferable because it can improve the uniformity of the film thickness distribution.
- the peeling layer 16 is a layer that enables or facilitates peeling of the carrier 12 and, if present, the intermediate layer 14.
- the release layer 16 may be either an organic release layer or an inorganic release layer.
- the organic component used in the organic release layer include nitrogen-containing organic compounds, sulfur-containing organic compounds, and carboxylic acids.
- Examples of the nitrogen-containing organic compound include a triazole compound and an imidazole compound.
- examples of the inorganic component used in the inorganic release layer include at least one of Cu, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, In, Sn, Zn, Ga, and Mo. Examples thereof include the above metal oxides and carbons.
- the release layer 16 is preferably a layer mainly containing carbon from the viewpoint of ease of release and film forming property, more preferably a layer mainly composed of carbon or hydrocarbon, and further preferably hard. It is a layer made of amorphous carbon, which is a carbon film.
- the release layer 16 (that is, the carbon layer) preferably has a carbon concentration of 60 atomic% or more, more preferably 70 atomic% or more, still more preferably 80 atomic% or more, and particularly preferably 85, as measured by XPS. Atomic% or more.
- the upper limit of the carbon concentration is not particularly limited and may be 100 atomic%, but 98 atomic% or less is realistic.
- the release layer 16 may contain unavoidable impurities (for example, oxygen, carbon, hydrogen, etc. derived from the surrounding environment such as atmosphere). Further, metal atoms may be mixed in the release layer 16 (particularly the carbon layer) due to the film forming method of the metal layer 18 or the like to be laminated later. Carbon has low mutual diffusivity and reactivity with carriers, and prevents the formation of metal bonds due to high-temperature heating between the metal layer and the bonding interface even when pressed at a temperature exceeding 300 ° C. , It is possible to maintain a state in which the carrier can be easily peeled off and removed.
- unavoidable impurities for example, oxygen, carbon, hydrogen, etc. derived from the surrounding environment such as atmosphere.
- metal atoms may be mixed in the release layer 16 (particularly the carbon layer) due to the film forming method of the metal layer 18 or the like to be laminated later.
- Carbon has low mutual diffusivity and reactivity with carriers, and prevents the formation of metal bonds due to high-temperature heating
- the peeling layer 16 is preferably a layer formed by a vapor phase method such as sputtering from the viewpoint of suppressing excessive impurities in amorphous carbon and the continuous productivity of other layers.
- the thickness of the release layer 16 (particularly the carbon layer) is preferably 1 nm or more and 20 nm or less, and more preferably 1 nm or more and 10 nm or less. This thickness is a value measured by analyzing the layer cross section with an energy dispersive X-ray spectrophotometer (TEM-EDX) of a transmission electron microscope.
- TEM-EDX energy dispersive X-ray spectrophotometer
- the release layer 16 may include a metal oxide layer and a carbon layer, or may be a layer containing a metal oxide and carbon.
- the metal oxide layer when the metal foil 10 with a carrier includes the intermediate layer 14, the carbon layer contributes to stable peeling of the carrier 12, and the metal oxide layer is used for heating the metal elements derived from the intermediate layer 14 and the metal layer 18. The accompanying diffusion can be suppressed, and as a result, stable peelability can be maintained even after heating at a high temperature of, for example, 350 ° C. or higher.
- the metal oxide layer contains metal oxides composed of Cu, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, In, Sn, Zn, Ga, Mo and combinations thereof. It is preferably a layer.
- the metal oxide layer is a layer formed by a reactive sputtering method in which a metal target is used and sputtering is performed in an oxidizing atmosphere, which is particularly preferable because the film thickness can be easily controlled by adjusting the film formation time. ..
- the thickness of the metal oxide layer is preferably 0.1 nm or more and 100 nm or less.
- the upper limit of the thickness of the metal oxide layer is more preferably 60 nm or less, further preferably 30 nm or less, and particularly preferably 10 nm or less. This thickness is a value measured by analyzing the layer cross section with an energy dispersive X-ray spectrophotometer (TEM-EDX) of a transmission electron microscope.
- TEM-EDX energy dispersive X-ray spectrophotometer
- the order in which the metal oxide layer and the carbon layer are laminated is not particularly limited.
- the release layer 16 may exist in a mixed phase state (that is, a layer containing metal oxide and carbon) in which the boundary between the metal oxide layer and the carbon layer is not clearly specified.
- the peeling layer 16 is a metal-containing layer in which the surface adjacent to the metal layer 18 is a fluorinated surface and / or a nitrided surface. It may be. It is preferable that the metal-containing layer has a region in which the sum of the fluorine content and the nitrogen content is 1.0 atomic% or more (hereinafter, referred to as “(F + N) region”) over a thickness of 10 nm or more. , (F + N) region is preferably present on the metal layer 18 side of the metal-containing layer.
- the thickness of the (F + N) region is a value specified by performing elemental analysis in the depth direction of the carrier-attached metal foil 10 using XPS.
- the fluorinated surface or the nitriding surface can be preferably formed by reactive ion etching (RIE) or reactive sputtering method.
- the metal element contained in the metal-containing layer preferably has a negative standard electrode potential.
- Preferred examples of the metal element contained in the metal-containing layer include Cu, Ag, Sn, Zn, Ti, Al, Nb, Zr, W, Ta, Mo and combinations thereof (for example, alloys and intermetallic compounds). ..
- the content of the metal element in the metal-containing layer is preferably 50 atomic% or more and 100 atomic% or less.
- the metal-containing layer may be a single layer composed of one layer, or may be a multilayer composed of two or more layers.
- the thickness of the entire metal-containing layer is preferably 10 nm or more and 1000 nm or less, more preferably 30 nm or more and 500 nm or less, further preferably 50 nm or more and 400 nm or less, and particularly preferably 100 nm or more and 300 or less.
- the thickness of the metal-containing layer itself is a value measured by analyzing the layer cross section with an energy dispersive X-ray spectrophotometer (TEM-EDX) of a transmission electron microscope.
- TEM-EDX energy dispersive X-ray spectrophotometer
- the metal layer 18 is a layer made of metal.
- the metal layer 18 may have a one-layer structure or a two-layer or more structure.
- the metal layer 18 is formed on the surface side of the release layer 16 opposite to the carrier 12 from the first metal layer 18a to the mth metal layer (m is 2 or more).
- m is 2 or more.
- Each metal layer up to (integer of) can be laminated in order.
- the thickness of the entire metal layer 18 is preferably 1 nm or more and 2000 nm or less, preferably 100 nm or more and 1500 nm or less, more preferably 200 nm or more and 1000 nm or less, further preferably 300 nm or more and 800 nm or less, and particularly preferably 350 nm or more and 500 nm or less. ..
- the thickness of the metal layer 18 is a value measured by analyzing the layer cross section with an energy dispersive X-ray spectrophotometer (TEM-EDX) of a transmission electron microscope.
- TEM-EDX energy dispersive X-ray spectrophotometer
- the first metal layer 18a imparts desired functions such as an etching stopper function and an antireflection function to the metal foil 10 with a carrier.
- Preferred examples of the metal constituting the first metal layer 18a include Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, Mo and combinations thereof, and more preferably Ti, Zr. , Al, Cr, W, Ni, Mo and combinations thereof, more preferably Ti, Al, Cr, Ni, Mo and combinations thereof, particularly preferably Ti, Mo and combinations thereof.
- These elements have the property of not being dissolved in a flash etching solution (for example, a copper flash etching solution), and as a result, can exhibit excellent chemical resistance to the flash etching solution.
- the first metal layer 18a is a layer that is less likely to be etched by the flash etching solution than the second metal layer 18b described later, and can therefore function as an etching stopper layer. Further, since the above-mentioned metal constituting the first metal layer 18a also has a function of preventing light reflection, the first metal layer 18a is for improving visibility in an image inspection (for example, automatic image inspection (AOI)). It can also function as an antireflection layer.
- the first metal layer 18a may be a pure metal or an alloy.
- the metal constituting the first metal layer 18a may contain unavoidable impurities due to raw material components, film forming steps, and the like. Further, the upper limit of the content of the metal is not particularly limited, and may be 100 atomic%.
- the first metal layer 18a is preferably a layer formed by a physical vapor deposition (PVD) method, and more preferably a layer formed by sputtering.
- the thickness of the first metal layer 18a is preferably 1 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, further preferably 30 nm or more and 300 nm or less, and particularly preferably 50 nm or more and 200 nm or less.
- Preferred examples of the metals constituting the second metal layer 18b are the transition elements of Group 4, Group 5, Group 6, Group 9, Group 10 and Group 11, Al, and combinations thereof (for example,). (Alloys and intermetal compounds), more preferably Group 4 and Group 11 transition elements, Al, Nb, Co, Ni, Mo, and combinations thereof, still more preferably Group 11 transition elements, Ti. , Al, Mo, and combinations thereof, particularly preferably Cu, Ti, Mo, and combinations thereof, most preferably Cu.
- the second metal layer 18b may be manufactured by any method, for example, a wet film forming method such as an electrolytic metal plating method and an electrolytic metal plating method, or a physical vapor deposition (PVD) method such as sputtering and vacuum deposition.
- a particularly preferable second metal layer 18b is a metal layer formed by a physical vapor deposition (PVD) method such as a sputtering method or vacuum vapor deposition from the viewpoint of easily supporting fine pitching due to ultrathinning, and most preferably. It is a metal layer produced by a sputtering method. Further, the second metal layer 18b is preferably a non-roughened metal layer.
- PVD physical vapor deposition
- the second metal layer 18b is subjected to preliminary roughening or soft etching treatment as long as it does not interfere with the formation of a wiring pattern during manufacturing of the printed wiring board.
- the thickness of the second metal layer 18b is preferably 10 nm or more and 1000 nm or less, more preferably 20 nm or more and 900 nm or less, still more preferably 30 nm or more and 700 nm or less, and further more. It is preferably 50 nm or more and 600 nm or less, particularly preferably 70 nm or more and 500 nm or less, and most preferably 100 nm or more and 400 nm or less. It is preferable that the metal layer having a thickness within such a range is produced by a sputtering method from the viewpoint of in-plane uniformity of the film thickness and productivity in the form of a sheet or a roll.
- the surface of the second metal layer 18b opposite to the first metal layer 18a has an arithmetic mean roughness Ra of 1.0 nm or more and 100 nm or less measured in accordance with JIS B 0601-2001. It is more preferably 2.0 nm or more and 40 nm or less, further preferably 3.0 nm or more and 35 nm or less, particularly preferably 4.0 nm or more and 30 nm or less, and most preferably 5.0 nm or more and 15 nm or less.
- the metal layer 18 has a single layer structure, it is preferable to use the above-mentioned second metal layer 18b as it is as the metal layer 18.
- the metal layer 18 has an m layer (m is an integer of 3 or more)
- the first metal layer 18a to the (m-1) metal layer of the metal layer 18 are described above.
- the outermost layer of the metal layer 18, that is, the mth metal layer has the above-mentioned structure of the second metal layer 18b.
- the metal foil 10 with a carrier may be provided with a region as a cutting allowance so that the metal layer 18 is difficult to peel off from the carrier 12 at the cutting portion. That is, after forming the wiring on the carrier-attached metal foil 10, the carrier-attached metal foil 10 is cut so as to have a size that can be processed by the mounting equipment when mounting the chip or the like, for example, from several tens of mm square to several hundreds. Downsizing to about mm square can be performed. In this respect, since the peeling strength of the peeling layer 16 exposed at the cutting interface of the metal foil 10 with a carrier is low, the metal layer 18 may be peeled off from the carrier 12 due to a load during or after cutting.
- a region where the peel strength between the carrier and the metal layer is high for example, a region where the peel strength measured according to JIS Z 0237-2009 is 30 gf / cm or more and 3000 gf / cm or less
- a region where the metal layers do not peel off for example, a region where the peeling layer does not exist
- the maximum height Rz measured in accordance with JIS B 0601-2001 is 1.0 ⁇ m or more and 30.0 ⁇ m.
- the non-peeling region can be formed by, for example, (i) forming various layers while arranging the frame configured in a predetermined pattern in a state of floating from the surface of the carrier 12.
- various layers are formed on the carrier 12 to obtain a provisional metal foil with a carrier, and then the provisional metal foil with a glass carrier is subjected to a predetermined pattern by a method such as laser irradiation. It can also be formed by heating in a shape.
- the thickness of the entire metal foil 10 with a carrier is not particularly limited, but is preferably 500 ⁇ m or more and 3000 ⁇ m or less, more preferably 700 ⁇ m or more and 2500 ⁇ m or less, still more preferably 900 ⁇ m or more and 2000 ⁇ m or less, and particularly preferably 1000 ⁇ m or more and 1700 ⁇ m or less.
- the size of the metal foil 10 with a carrier is not particularly limited, but is preferably 10 cm square or more, more preferably 20 cm square or more, and further preferably 25 cm square or more.
- the upper limit of the size of the metal foil 10 with a carrier is not particularly limited, but 1000 cm square is given as one guideline for the upper limit. Further, the metal foil 10 with a carrier is in a form that can be handled independently before and after the formation of the wiring.
- a carrier is prepared, (2) a predetermined area of the carrier is processed to form an alignment mark, and (3) peeling is performed on the carrier. It can be manufactured by forming various layers such as a layer and a metal layer.
- the carrier 12 is prepared.
- the carrier 12 is preferably made of glass or ceramics.
- the surface of the metal layer 18 laminated on the carrier 12 via the release layer 16 also has a flat shape on the wiring region W, and is on the wiring region W.
- the flat surface of the metal layer 18 of the above allows the formation of a fine circuit.
- the preferred materials and characteristics of the carrier 12 are as described above.
- the processed portion forming the alignment mark is formed only on one surface of the carrier 12 and the film formation of various layers is performed. However, in the case of manufacturing a metal foil with a double-sided carrier, Needless to say, the same operation may be performed on the other surface of the carrier 12 to form a processed portion forming an alignment mark and to form various layers.
- a predetermined region on the surface of the carrier 12 is machined to form a machined portion forming at least two alignment marks, whereby at least two positioning regions P are formed.
- preferable processing methods include an etching method, a blast method, a laser ablation method, and a combination thereof, and from the viewpoint of improving throughput, a blast method, a laser ablation method, and a combination thereof are more preferable.
- the processing by the blasting process can be performed by projecting a particulate medium (projection material) from a nozzle onto a predetermined region on the surface of the carrier 12 (that is, a region where a processed portion forming an alignment mark should be formed). ..
- the discharge diameter of the nozzle is preferably 0.1 mm or more and 10.0 mm or less, and more preferably 0.2 mm or more and 8.5 mm or less.
- the particle size of the media is preferably 1.0 ⁇ m or more and 1000 ⁇ m or less, more preferably 10.0 ⁇ m or more and 800 ⁇ m or less, and the projection amount is preferably 10 g / min or more and 3000 g / min or less, more preferably 20 g.
- the discharge pressure of the media is preferably 0.01 MPa or more and 1.0 MPa or less, and more preferably 0.05 MPa or more and 0.8 MPa or less.
- Preferred examples of media materials include alumina, zirconia, silicon carbide, iron, aluminum, zinc, glass, steel, green carbonite and boron carbide.
- the Mohs hardness of the media is preferably 4 or more, more preferably 5.5 or more, still more preferably 6.0 or more.
- processing by etching treatment a wet process using a solution containing hydrofluoric acid (hydrofluoric acid) and a reactive ion using a process gas containing fluorine (for example, CF 4 or SF 6 ) are used.
- a dry process by etching RIE: Reactive ion etching
- the processing by laser ablation process for example a YAG laser, YLF laser, YVO 4 laser, carbon dioxide laser, CW (continuous wave) lasers, and can be carried out using solid UV laser.
- the processing conditions are not particularly limited, and the known conditions may be adopted as they are, or the known conditions may be appropriately changed according to the material of the carrier 12.
- masking in order to selectively process (particularly blasting or etching) a desired region. Specifically, it is preferable to form a masking layer on a portion other than a predetermined region on the surface of the carrier 12 (that is, a region where a processed portion forming an alignment mark should be formed) before processing. In this case, it is desirable to remove the masking layer after processing.
- An intermediate layer 14 (for example, a first intermediate layer 14a and a second intermediate layer 14b) is optionally formed on the surface of the carrier 12 on the side where the processed portion forming the alignment mark is formed.
- the release layer 16 and the metal layer 18 (for example, the first metal layer 18a and the second metal layer 18b) are formed into a film, thereby forming a wiring region W.
- the film formation of each of the intermediate layer 14 (if present), the peeling layer 16, and the metal layer 18 is performed by the physical vapor deposition (PVD) method from the viewpoint of easily supporting fine pitching due to ultrathinning. Is preferable.
- PVD physical vapor deposition
- Examples of the physical vapor deposition (PVD) method include a sputtering method, a vacuum vapor deposition method, and an ion plating method, in which the film thickness can be controlled in a wide range from 0.05 nm to 5000 nm, and a wide width or area.
- the sputtering method is most preferable because it can ensure the uniformity of the film thickness.
- the film formation by the physical vapor deposition (PVD) method may be performed using a known vapor phase deposition apparatus according to known conditions, and is not particularly limited.
- the sputtering method may be various known methods such as magnetron sputtering, bipolar sputtering method, opposed target sputtering method, etc., but magnetron sputtering has a high film forming speed and productivity. It is preferable in terms of high point. Sputtering may be performed with either a DC (direct current) or RF (radio frequency) power source. Further, although a plate-type target whose target shape is widely known can be used, it is desirable to use a cylindrical target from the viewpoint of target utilization efficiency.
- the film formation of each of the intermediate layer 14 (if present), the peeling layer 16, and the metal layer 18 by the physical vapor deposition (PVD) method (preferably the sputtering method) will be described.
- the intermediate layer 14 is composed of the first intermediate layer 14a and the second intermediate layer 14b
- the release layer 16 is the carbon layer
- the metal layer 18 is the first metal layer. It shall be composed of 18a and a second metal layer 18b.
- the film thickness of the first intermediate layer 14a by the physical vapor deposition (PVD) method involves a target composed of at least one metal selected from the group consisting of Ti, Cr, Al and Ni. It is preferable to use magnetron sputtering in a non-oxidizing atmosphere because the film thickness distribution uniformity can be improved.
- the purity of the target is preferably 99.9 wt% or more.
- As the gas used for sputtering it is preferable to use an inert gas such as argon gas.
- the flow rate of the argon gas may be appropriately determined according to the sputtering chamber size and the film forming conditions, and is not particularly limited.
- the pressure at the time of film formation is preferably in the range of 0.1 Pa or more and 20 Pa or less.
- This pressure range may be set by adjusting the film forming power and the flow rate of argon gas according to the device structure, capacity, exhaust capacity of the vacuum pump, rated capacity of the film forming power source, and the like.
- the sputtering power is film thickness uniformity of the film formation, in consideration of productivity and the like may be appropriately set within a range of 0.05 W / cm 2 or more 10.0 W / cm 2 or less per unit area of the target.
- the formation of the second intermediate layer 14b by the physical vapor deposition (PVD) method is performed by magnetron sputtering in a non-oxidizing atmosphere using a copper target to improve the film thickness distribution uniformity. It is preferable in that it can be done.
- the purity of the copper target is preferably 99.9 wt% or more.
- As the gas used for sputtering it is preferable to use an inert gas such as argon gas.
- the flow rate of the argon gas may be appropriately determined according to the sputtering chamber size and the film forming conditions, and is not particularly limited.
- the pressure at the time of film formation is preferably in the range of 0.1 Pa or more and 20 Pa or less.
- This pressure range may be set by adjusting the film forming power and the flow rate of argon gas according to the device structure, capacity, exhaust capacity of the vacuum pump, rated capacity of the film forming power source, and the like.
- the sputtering power is film thickness uniformity of the film formation, in consideration of productivity and the like may be appropriately set within a range of 0.05 W / cm 2 or more 10.0 W / cm 2 or less per unit area of the target.
- the film formation of the release layer 16 by the physical vapor deposition (PVD) method is preferably performed using a carbon target in an inert atmosphere such as argon.
- the carbon target is preferably composed of graphite, but may contain unavoidable impurities (eg, oxygen or carbon derived from the surrounding environment such as atmosphere).
- the purity of the carbon target is preferably 99.99 wt% or more, more preferably 99.999 wt% or more.
- the pressure at the time of film formation is preferably in the range of 0.1 Pa or more and 20 Pa or less.
- This pressure range may be set by adjusting the film forming power and the flow rate of argon gas according to the device structure, capacity, exhaust capacity of the vacuum pump, rated capacity of the film forming power source, and the like. Further, the sputtering power is film thickness uniformity of the film formation, in consideration of productivity and the like may be appropriately set within a range of 0.05 W / cm 2 or more 10.0 W / cm 2 or less per unit area of the target.
- the film formation of the first metal layer 18a by the physical vapor deposition (PVD) method (preferably the sputtering method) consists of a group consisting of Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni and Mo. It is preferably carried out by the magnetron sputtering method using a target composed of at least one selected metal. The purity of the target is preferably 99.9% or more.
- the film formation of the first metal layer 18a by the magnetron sputtering method is preferably performed under an atmosphere of an inert gas such as argon at a pressure of 0.1 Pa or more and 20 Pa or less.
- the sputtering pressure is more preferably 0.2 Pa or more and 15 Pa or less, and further preferably 0.3 Pa or more and 10 Pa or less.
- the pressure range may be controlled by adjusting the film forming power and the flow rate of argon gas according to the device structure, capacity, exhaust capacity of the vacuum pump, rated capacity of the film forming power source, and the like.
- the flow rate of the argon gas may be appropriately determined according to the sputtering chamber size and the film forming conditions, and is not particularly limited.
- the sputtering power is film thickness uniformity of the film formation, in consideration of productivity and the like may be appropriately set within a range of 1.0 W / cm 2 or more 15.0W / cm 2 or less per unit area of the target.
- the carrier temperature at the time of film formation is preferably adjusted within the range of 25 ° C. or higher and 300 ° C. or lower, more preferably 40 ° C. or higher and 200 ° C. or lower, and further preferably 50 ° C. or higher and 150 ° C. or lower.
- the formation of the second metal layer 18b by the physical vapor deposition (PVD) method is performed by Cu, Au, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni and Mo. It is preferably carried out in an inert atmosphere such as argon using a target composed of at least one metal selected from the group consisting of.
- a metal target such as a copper target is preferably composed of a metal such as metallic copper, but may contain unavoidable impurities. The purity of the metal target is preferably 99.9% or more, more preferably 99.99%, still more preferably 99.999% or more.
- a stage cooling mechanism may be provided during sputtering.
- the pressure at the time of film formation is preferably in the range of 0.1 Pa or more and 20 Pa or less. This pressure range may be set by adjusting the film forming power and the flow rate of argon gas according to the device structure, capacity, exhaust capacity of the vacuum pump, rated capacity of the film forming power source, and the like.
- the sputtering power is film thickness uniformity of the film formation, in consideration of productivity and the like may be appropriately set within a range of 0.05 W / cm 2 or more 10.0 W / cm 2 or less per unit area of the target.
- Wiring for example, a rewiring layer
- a method of forming wiring through exposure and development using the metal foil 10 with a carrier includes a step of aligning the metal foil 10 with a carrier with reference to a positioning region P prior to exposure. Further, in this method, exposure of a plurality of circuits having different circuit widths (preferably having a fine circuit and a rough circuit) is performed separately, and the development of the plurality of circuits is performed at the same time.
- the photoresist 20 is laminated on the surface of the metal layer 18 of the metal foil 10 with a carrier.
- a known material generally used for producing a rewiring layer can be used.
- the photoresist 20 may be either a negative type or a positive type, and may be either a film type or a liquid type.
- the photoresist 20 is preferably a photosensitive film, for example, a photosensitive dry film.
- the surface of the photoresist 20 on the wiring region W is exposed for the rough circuit. Further, prior to the exposure for the rough circuit, the first alignment is performed with reference to the positioning region P of the metal foil 10 with a carrier. As a result, as shown in FIG. 8 (ii), the exposed portion 20a for the rough circuit is formed.
- the exposure for the rough circuit is preferably performed using an exposure apparatus having a wide exposure area (for example, 250 mm square).
- Examples of the exposure method of the exposure apparatus include a stepper method and a Laser Direct Imaging (LDI) method, but the stepper method is preferable from the viewpoint of exposure resolution.
- examples of the photomask used in the stepper type exposure apparatus include a glass mask and a Cr mask, but it is preferable to use a Cr mask from the viewpoint of performing exposure with high accuracy.
- the surface of the photoresist 20 on the wiring region W is exposed for fine circuits. Further, prior to the exposure for the fine circuit, the second alignment is performed with reference to the positioning region P of the metal foil 10 with a carrier. As a result, as shown in FIG. 8 (iii), the exposed portion 20b for a fine circuit is formed.
- a stepper method is preferable as the exposure method of the exposure apparatus for a fine circuit, and a Cr mask is preferable as the photomask used in the stepper type exposure apparatus.
- an exposure device having a wide exposure area used for exposure for a rough circuit is generally inferior in exposure resolution, it is common to perform exposure for a rough circuit and exposure for a fine circuit using the same exposure device. It is difficult to.
- the rewiring layer formed by the method of the present invention preferably has a ratio R / F of the maximum circuit width R of the rough circuit to the minimum circuit width F of the fine circuit of 2.0 or more and 500 or less. It is more preferably 5.0 or more and 300 or less, and further preferably 10 or more and 100 or less.
- the same exposure device is used for rough exposure. Needless to say, exposure for circuits and fine circuits may be performed.
- the photoresist 20 is developed to form a resist pattern 22 composed of a rough circuit pattern 22a and a fine circuit pattern 22b.
- the development is not particularly limited as long as it is carried out according to a known method and conditions generally used for producing a rewiring layer using a commercially available developer or the like.
- the exposure for the fine circuit and the exposure for the rough circuit are performed separately, and the fine circuit and the rough circuit are developed. Are performed at the same time, whereby a rough circuit and a fine circuit can be formed at the same time in a one-step circuit forming process.
- a rewiring layer which is a layer including an insulating layer and a wiring layer formed inside and / or on the surface of the insulating layer, is formed.
- Various operations in this step may be performed according to known methods and conditions generally used for manufacturing the rewiring layer, and are not particularly limited.
- a process of mounting an electronic element such as a chip on the rewiring layer may be performed to manufacture a semiconductor package. Further, the carrier 12, the intermediate layer 14 (if present) and the peeling layer 16 may be removed by a known method. As described above, the process of mounting the chip after forming the rewiring layer in this way is a method called the RDL-First method. According to this method, it is possible to perform an electrical inspection of the wiring layer on the surface of the coreless support and each build-up wiring layer to be laminated after that before mounting the chip, so that defective parts of each wiring layer can be avoided. , The chip can be mounted only on the non-defective part.
- the RDL-First method is economically advantageous as compared with the Chip-First method, which is a method of sequentially laminating wiring layers on the surface of the chip, in that wasteful use of the chip can be avoided.
- the electronic element mounted on the rewiring layer assumed as an arbitrary process include a semiconductor element, a chip capacitor, a resistor and the like.
- the electronic element mounting method include a flip chip mounting method and a die bonding method.
- the flip chip mounting method is a method of joining the mounting pad of an electronic element and the rewiring layer.
- NCF Non-Conducive Film
- the bonding is preferably performed using a low melting point metal such as solder, but an anisotropic conductive film or the like may also be used.
- the die bonding bonding method is a method of bonding the surface of the electronic element opposite to the mounting pad surface to the rewiring layer. For this adhesion, it is preferable to use a paste or film, which is a resin composition containing a thermosetting resin and a thermally conductive inorganic filler.
- Example 1 As shown in FIG. 1, after forming the processed portion forming the alignment mark on the carrier 12, the intermediate layer 14 (first intermediate layer 14a and second intermediate layer 14b), the carbon layer as the release layer 16, and the carbon layer as the release layer 16
- the metal layer 18 was formed in this order to prepare a metal foil 10 with a carrier.
- the specific procedure is as follows.
- carrier A glass sheet (material: soda lime glass) having a thickness of 200 mm ⁇ 250 mm and a thickness of 1.1 mm was prepared as the carrier 12.
- a masking layer was formed on the surface of the carrier 12 in a pattern in which six circular machined regions (exposed portions) having a diameter of 400 ⁇ m were arranged so as to be separated from each other.
- the masking layer was formed by roll lamination using a photosensitive film.
- a blower blasting device BSP-50D, manufactured by Alps Engineering Co., Ltd.
- a hole having a target depth of 200 ⁇ m is provided on the surface of the carrier 12 in which a portion other than the circular processing region is covered with a masking layer.
- the carrier 12 By projecting a medium (material: green carbonite) having a particle size of 0.05 mm from a nozzle having a discharge diameter of 0.4 mm at a discharge pressure of 0.5 MPa or more for 2 to 5 seconds, the carrier 12 is formed. The exposed part was blasted. In this way, six recesses 12a were formed on the surface of the carrier 12 as processed portions forming the alignment mark, and the positioning region P was defined. Then, the masking layer was removed.
- a medium material: green carbonite
- a titanium layer having a thickness of 100 nm was formed as the first intermediate layer 14a on the surface (the surface on which the recess was formed) of the carrier 12 by sputtering under the following equipment and conditions.
- -Equipment Single-wafer magnetron sputtering equipment (manufactured by Canon Tokki Corporation, MLS464)
- -Target Titanium target with a diameter of 8 inches (203.2 mm) (purity 99.999%)
- -Ultimate vacuum less than 1 x 10 -4
- Second Intermediate Layer On the first intermediate layer 14a, a Cu layer having a thickness of 100 nm as a second intermediate layer 14b was formed by sputtering under the following equipment and conditions.
- -Equipment Single-wafer DC sputtering equipment (manufactured by Canon Tokki Inc., MLS464)
- -Target Cu target with a diameter of 8 inches (203.2 mm) (purity 99.98%)
- -Ultimate vacuum less than 1 x 10 -4
- Pa-Gas Argon gas (flow rate: 100 sccm) -Sputtering pressure: 0.35Pa -Sputtering power: 1000W (6.2W / cm 2 ) -Temperature during film formation: 40 ° C
- amorphous carbon layer having a thickness of 6 nm was formed as a release layer 16 on the Cu layer by sputtering under the following equipment and conditions.
- -Equipment Single-wafer DC sputtering equipment (manufactured by Canon Tokki Inc., MLS464)
- -Target Carbon target with a diameter of 8 inches (203.2 mm) (purity 99.999%)
- -Ultimate vacuum less than 1 x 10 -4
- -Temperature during film formation 40 ° C
- a titanium layer having a thickness of 100 nm was formed as the first metal layer 18a on the surface of the release layer 16 by sputtering under the following equipment and conditions.
- -Equipment Single-wafer DC sputtering equipment (manufactured by Canon Tokki Inc., MLS464)
- -Target Titanium target with a diameter of 8 inches (203.2 mm) (purity 99.999%)
- Carrier gas Ar (flow rate: 100 sccm)
- -Ultimate vacuum less than 1 x 10 -4
- Pa-Sputtering pressure 0.35 Pa -Sputtering power: 1000W (3.1W / cm 2 )
- Second Metal Layer A Cu layer having a thickness of 300 nm as a second metal layer 18b is formed on the first metal layer 18a by sputtering under the following equipment and conditions to obtain a carrier-attached metal foil 10. It was. -Equipment: Single-wafer DC sputtering equipment (manufactured by Canon Tokki Inc., MLS464) -Target: Cu target with a diameter of 8 inches (203.2 mm) (purity 99.98%) -Ultimate vacuum: less than 1 x 10 -4 Pa-Carrier gas: Ar (flow rate: 100 sccm) -Sputtering pressure: 0.35Pa -Sputtering power: 1000W (3.1W / cm 2 ) -Temperature during film formation: 40 ° C
- Example 2 In the process of forming the alignment mark, the angle ⁇ formed by the main surface s of the carrier 12 and the tangent line t of the inner wall surface of the recess 12a and the radius of curvature r of the open end of the recess 12a can be determined by appropriately changing the blasting conditions.
- the metal foil 10 with a carrier was produced in the same manner as in Example 1 except that it was changed. Further, the measurement of the concave portion constituting the alignment mark was also performed in the same manner as in Example 1.
- Examples 3-5 In the process of forming the alignment mark, the metal foil 10 with a carrier was produced in the same manner as in Example 1 except that the recesses forming the six alignment marks were formed by the laser ablation treatment instead of the blast treatment. Further, the measurement of the concave portion constituting the alignment mark was also performed in the same manner as in Example 1. The laser ablation treatment was performed by irradiating 6 points on the surface of the carrier 12 separated from each other with a solid UV laser under the following conditions.
- the metal foils 10 with carriers of Evaluation Examples 1 to 5 were evaluated in various ways as shown below. The evaluation results are as shown in Table 1.
- the metal foil 10 with a carrier was transferred from the rough circuit exposure apparatus to the fine circuit exposure apparatus (UX-7 series manufactured by Ushio, Inc.).
- the pattern information of the positioning region P in the metal foil 10 with a carrier was detected and aligned by the exposure apparatus for a fine circuit, and the surface on the wiring region W was exposed to a pattern having a circuit width of 2 ⁇ m. ..
- the metal foil 10 with a carrier was developed under known conditions to form a resist pattern 22 composed of a rough circuit pattern 22a and a fine circuit pattern 22b.
- the metal foil 10 with a carrier was electrolytically copper-plated under known conditions, and then the resist pattern 22 was peeled off.
- ⁇ Evaluation 2 Carrier cracking frequency> The cracking frequency of the carrier 12 was evaluated by the following procedure. First, five glass sheets (material: soda lime glass) having a thickness of 100 mm ⁇ 100 mm and a thickness of 1.1 mm were prepared, and recesses forming nine alignment marks were formed in each of them under the same conditions as in Examples 1 to 5. For the aiming position (center point) of the recesses that make up each alignment mark, the coordinates of one corner (edge) of the glass sheet are set as the reference point (0,0), and the coordinates of the corners located diagonally are defined as (0,0).
- the ratio of the surface strength of the glass sheet having the recesses forming the alignment mark to the surface strength of the glass sheet forming the recesses forming the alignment mark was calculated and rated according to the following criteria.
- ⁇ Evaluation 3 Visibility of alignment mark> The visibility of the alignment mark was evaluated by the following procedure. Similar to Evaluation 2, after forming recesses forming nine alignment marks on the five glass sheets under the same conditions as in Examples 1 to 5, the intermediate layer 14 (first intermediate layer 14a and first intermediate layer 14a and first) under the conditions of Example 1. 2 The intermediate layer 14b), the carbon layer as the release layer 16, and the metal layer 18 (the first metal layer 18a and the second metal layer 18b) were formed in this order to prepare a metal foil 10 with a carrier. Then, using the above-mentioned exposure apparatus, the formed alignment mark was repeatedly recognized 10 times, and the dimensional error of the center point of the alignment mark was measured.
- ⁇ Evaluation 4 Processing stains> The evaluation of processing stains was evaluated by the following procedure. Similar to Evaluation 2, after forming recesses forming 9 alignment marks on 5 glass sheets under the same conditions as in Examples 1 to 5, the periphery of the recesses forming the alignment marks was observed with a laser microscope (maximum). 5 mm x 5 mm field of view). The degree of discoloration observed around the recess was rated according to the following criteria. -Evaluation A: There is no discoloration around the recess, or there is discoloration around the recess, but the discoloration is within the range of less than 5 ⁇ m from the outer edge of the recess.
- -Evaluation B Although there is discoloration around the recess, the discoloration is within the range of 100 ⁇ m or less from the outer edge of the recess.
- -Evaluation C There is discoloration around the recess, and the discoloration extends over 100 ⁇ m from the outer edge of the recess.
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Abstract
Description
その全域にわたって前記キャリア、前記剥離層及び前記金属層が存在する配線用領域と、
前記キャリア付金属箔の前記少なくとも一方の面に設けられ、露光及び現像を伴う配線形成時の位置合わせに用いられるアライメントマークを成す、少なくとも2つの位置決め用領域と、
を有する、キャリア付金属箔が提供される。
回路幅の異なる複数の回路の露光が別々に行われ、かつ、前記複数の回路の現像が同時に行われる、方法が提供される。
キャリアを用意する工程と、
前記キャリアの少なくとも一方の面の所定領域を加工して、少なくとも2つの前記アライメントマークを構成する加工部を形成し、それにより少なくとも2つの位置決め用領域を画定する工程と、
前記キャリアの前記少なくとも一方の面に、前記剥離層及び前記金属層を順に形成する工程と、
を含む、方法が提供される。
本発明のキャリア付金属箔の一例が図1及び2に模式的に示される。図1及び2に示されるように、キャリア付金属箔10は、キャリア12と、剥離層16と、金属層18とをこの順に備えたものである。キャリア12は、例えばガラス又はセラミックスで構成される。剥離層16はキャリア12の少なくとも一方の面上に設けられる。金属層18は剥離層16上に設けられる。所望により、キャリア付金属箔10は、キャリア12と剥離層16との間に中間層14をさらに有していてもよい。中間層14、剥離層16及び金属層18の各々は、1層から構成される単層であってもよく、2層以上から構成される多層であってもよい。キャリア付金属箔10は、キャリア12の両面に上下対称となるように上述の各種層を順に備えてなる構成としてもよい。そして、本発明のキャリア付金属箔10は、図2及び3に示されるように、配線用領域Wと、少なくとも2つの位置決め用領域Pとを有する。配線用領域Wは、その全域にわたってキャリア12、剥離層16及び金属層18が存在する配線用の領域である。一方、位置決め用領域Pは、露光及び現像を伴う配線形成時の位置合わせに用いられるアライメントマークを成す領域である。位置決め用領域Pは、キャリア12の上述した少なくとも一方の面(すなわち剥離層16及び金属層18が設けられる側の面)に設けられた加工部によって画定される。すなわち、配線用領域Wは配線の形成に用いられる領域である一方、位置決め用領域Pは露光に先立ち位置合わせを行う際の基準となる領域である。なお、位置決め用領域Pには、上述の各種層がその全域ないし一部に存在していてもよいし、一切存在していなくてもよい。また、キャリア付金属箔10には、配線用領域W及び位置決め用領域P以外の領域(すなわち配線の形成及び位置合わせの基準に用いられない領域)が存在していてもよく、例えば後述するキャリア-金属層間の剥離強度が高い領域、又はキャリア-金属層間が剥離しない領域が存在していてもよい。このように、キャリア付金属箔10において、キャリア12自体にアライメントマークを構成する加工部を設けることにより、配線形成時のラフ回路用の露光及び微細回路用の露光の両方を同じアライメントマークを基準として行うことができ、その結果、ラフ回路及び微細回路の両方を1段階の回路形成プロセスで同時に形成することが可能(すなわちラフ回路及び微細回路を同時に現像することが可能)となる。
本発明のキャリア付金属箔10は、(1)キャリアを用意し、(2)キャリアの所定領域を加工して、アライメントマークを形成し、(3)キャリア上に剥離層、金属層等の各種層を成膜することにより製造することができる。
まず、キャリア12を用意する。キャリア12はガラス又はセラミックスで構成されるのが好ましい。一般的にガラス製品及びセラミックス製品は平坦性に優れるため、キャリア12上に剥離層16を介して積層された金属層18の配線用領域W上の表面も平坦な形状となり、配線用領域W上の金属層18の平坦面が微細回路の形成を可能とする。キャリア12の好ましい材質や特性については前述したとおりである。なお、以下の説明においては、キャリア12の一方の表面にのみアライメントマークを構成する加工部の形成、及び各種層の成膜を行っているが、両面キャリア付金属箔を製造する場合には、キャリア12の他方の表面にも同様の操作を行って、アライメントマークを構成する加工部の形成、及び各種層の成膜を行ってよいことはいうまでもない。
次に、キャリア12の表面の所定領域を加工して、少なくとも2つのアライメントマークを構成する加工部を形成し、それにより少なくとも2つの位置決め用領域Pを画定する。好ましい加工手法の例としては、エッチング法、ブラスト法、レーザーアブレーション法、及びそれらの組合せが挙げられ、スループットを向上させる観点から、より好ましくはブラスト法、レーザーアブレーション法、及びそれらの組合せである。特に、ブラスト法を用いてアライメントマークを構成する加工部を形成するのが好ましく、こうすることで加工汚れ(例えば加工に起因するキャリアの変質や異物の飛散等)をより一層低減することができる。ブラスト処理による加工は、キャリア12表面の所定領域(すなわちアライメントマークを構成する加工部が形成されるべき領域)に対して粒子状のメディア(投射材)をノズルから投射することにより行うことができる。好ましいノズルの吐出径は0.1mm以上10.0mm以下であり、より好ましくは0.2mm以上8.5mm以下である。メディアの粒径は1.0μm以上1000μm以下であるのが好ましく、より好ましくは10.0μm以上800μm以下であり、投射量は10g/分以上3000g/分以下であるのが好ましく、より好ましくは20g/分以上2000g/分以下である。また、好ましいメディアの吐出圧力は0.01MPa以上1.0MPa以下であり、より好ましくは0.05MPa以上0.8MPa以下である。メディアの材質の好ましい例としては、アルミナ、ジルコニア、炭化ケイ素、鉄、アルミニウム、亜鉛、ガラス、スチール、グリーンカーボナイト及びボロンカーバイトが挙げられる。メディアのモース硬度は4以上が好ましく、より好ましくは5.5以上、さらに好ましくは6.0以上である。また、エッチング処理による加工の好ましい例としては、フッ酸(フッ化水素酸)を含む溶液を用いたウエットプロセス、及びフッ素を含むプロセスガス(例えばCF4やSF6等)を用いた反応性イオンエッチング(RIE:Reactive ion etching)によるドライプロセスが挙げられる。一方、レーザーアブレーション処理による加工は、例えばYAGレーザー、YLFレーザー、YVO4レーザー、炭酸ガスレーザー、CW(連続発振)レーザー、及び固体UVレーザー等を用いて行うことができる。加工条件は特に限定されず、公知の条件をそのまま採用してもよいし、キャリア12の材質に合わせて公知の条件を適宜変更してもよい。
アライメントマークを構成する加工部が形成された側のキャリア12の表面に、所望により中間層14(例えば第1中間層14a及び第2中間層14b)、剥離層16、及び金属層18(例えば第1金属層18a及び第2金属層18b)を成膜し、これにより配線用領域Wを形成する。中間層14(存在する場合)、剥離層16、及び金属層18の各層の成膜は、極薄化によるファインピッチ化に対応しやすい観点から、物理気相堆積(PVD)法により行われるのが好ましい。物理気相堆積(PVD)法の例としては、スパッタリング法、真空蒸着法、及びイオンプレーティング法が挙げられるが、0.05nmから5000nmまでといった幅広い範囲で膜厚制御できる点、広い幅ないし面積にわたって膜厚均一性を確保できる点等から、最も好ましくはスパッタリング法である。特に、中間層14(存在する場合)、剥離層16、及び金属層18の全ての層をスパッタリング法により形成することで、製造効率が格段に高くなる。物理気相堆積(PVD)法による成膜は公知の気相成膜装置を用いて公知の条件に従って行えばよく特に限定されない。例えば、スパッタリング法を採用する場合、スパッタリング方式は、マグネトロンスパッタリング、2極スパッタリング法、対向ターゲットスパッタリング法等、公知の種々の方法であってよいが、マグネトロンスパッタリングが、成膜速度が速く生産性が高い点で好ましい。スパッタリングはDC(直流)及びRF(高周波)のいずれの電源で行ってもよい。また、ターゲット形状も広く知られているプレート型ターゲットを使用することができるが、ターゲット使用効率の観点から円筒形ターゲットを用いることが望ましい。以下、中間層14(存在する場合)、剥離層16、及び金属層18の各層の物理気相堆積(PVD)法(好ましくはスパッタリング法)による成膜について説明する。なお、以下の説明において、キャリア付金属箔10は、中間層14が第1中間層14a及び第2中間層14bから構成され、剥離層16が炭素層であり、金属層18が第1金属層18a及び第2金属層18bから構成されるものとする。
本発明のキャリア付金属箔10を使用して配線(例えば再配線層)を形成することができる。すなわち、本発明の好ましい態様によれば、キャリア付金属箔10を使用して露光及び現像を経て配線を形成する方法が提供される。この方法は露光に先立ちキャリア付金属箔10の位置決め用領域Pを基準として位置合わせを行う工程を含む。また、この方法は回路幅の異なる複数の回路(好ましくは微細回路とラフ回路とを有する)の露光が別々に行われ、かつ、当該複数の回路の現像が同時に行われる。以下、本発明のキャリア付金属箔10を使用した再配線層の好ましい形成方法の一例について説明する。この方法は、(1)キャリア付金属箔にフォトレジストを積層し、(2)第一の位置合わせ後にラフ回路用の露光を行い、(3)第二の位置合わせ後に微細回路用の露光を行い、(4)現像を行ってレジストパターンを形成した後、(5)回路形成を行うことを含む。
図8(i)に示されるように、キャリア付金属箔10の金属層18の表面にフォトレジスト20を積層する。フォトレジスト20は再配線層の製造に一般的に用いられる公知の材料が使用可能である。フォトレジスト20はネガ型及びポジ型のいずれであってもよく、フィルムタイプ及び液状タイプのいずれであってもよい。フォトレジスト20は感光性フィルムであるのが好ましく、例えば感光性ドライフィルムである。
チップ実装に必要な粗いデザインを形成すべく、フォトレジスト20の配線用領域W上の表面にラフ回路用の露光を行う。また、ラフ回路用の露光に先立ち、キャリア付金属箔10の位置決め用領域Pを基準として第一の位置合わせを行う。これにより、図8(ii)に示されるように、ラフ回路用露光部20aを形成する。ラフ回路用の露光は、露光エリアの広い(例えば250mm角)露光装置を用いて行うのが好ましい。露光装置の露光方式の例としてはステッパー方式及びLaser Direct Imaging(LDI)方式が挙げられるが、露光解像度の観点から好ましくはステッパー方式である。また、ステッパー方式の露光装置に用いるフォトマスクの例としてはガラスマスクやCrマスク等が挙げられるが、高精度に露光を行う観点からCrマスクを用いるのが好ましい。
次いで、フォトレジスト20の配線用領域W上の表面に微細回路用の露光を行う。また、微細回路用の露光に先立ち、キャリア付金属箔10の位置決め用領域Pを基準として第二の位置合わせを行う。これにより、図8(iii)に示されるように、微細回路用露光部20bを形成する。微細回路用の露光装置の露光方式はステッパー方式が好ましく、ステッパー方式の露光装置に用いるフォトマスクはCrマスクが好ましい。ここで、ラフ回路用の露光に用いられる露光エリアの広い露光装置は概して露光解像度に劣るため、ラフ回路用の露光と微細回路用の露光とを同一の露光装置を用いて行うことは一般的に困難である。この点、キャリア付金属箔10自体に位置決め用領域Pが存在することで、別々の露光装置を用いた場合でも、同一のアライメントマークを基準として高精度に位置合わせを行うことができる。その結果、従来のように2段階の露光現像を経ることなく、1回の現像でラフ回路用及び微細回路用のレジストパターンを同時に形成することが可能となる。上記観点から、本発明の方法により形成される再配線層は、微細回路の最小回路幅Fに対するラフ回路の最大回路幅Rの比R/Fが2.0以上500以下であるのが好ましく、より好ましくは5.0以上300以下、さらに好ましくは10以上100以下である。なお、ラフ回路用の露光と微細回路用の露光とを同一の露光装置を用いて行うことが可能な場合(例えば上記比R/Fが小さい場合)には、同一の露光装置を用いてラフ回路用及び微細回路用の露光を行ってよいことはいうまでもない。
図8(iv)に示されるように、フォトレジスト20の現像を行うことにより、ラフ回路用パターン22a及び微細回路用パターン22bで構成されるレジストパターン22を形成する。現像は、市販の現像液等を用いて再配線層の製造に一般的に用いられる公知の手法及び条件に従い行えばよく特に限定されない。このように、本発明のキャリア付金属箔を用いた再配線層の好ましい形成方法は、微細回路用の露光とラフ回路用の露光とが別々に行われ、かつ、微細回路及びラフ回路の現像が同時に行われるものであり、これにより、ラフ回路及び微細回路を1段階の回路形成プロセスで同時に形成することができる。
レジストパターン22間に電気めっき(例えば電気銅めっき)を施した後、レジストパターン22を剥離し、レジストパターン22の剥離により露出した金属層18の不要部分(すなわち配線パターンを形成しない部分)をエッチングにより除去して、ラフ回路及び微細回路を有する第1配線層を形成する。その後、キャリア付金属箔10の第1配線層が形成された面に絶縁層及び第n配線層(nは2以上の整数)を交互に形成する。こうして、絶縁層と当該絶縁層の内部及び/又は表面に形成された配線層とを含む層である再配線層が形成されたコアレス支持体を得ることができる。本工程における各種操作は、再配線層の製造に一般的に用いられる公知の手法及び条件に従い行えばよく特に限定されない。
図1に示されるように、キャリア12上にアライメントマークを構成する加工部を形成した後、中間層14(第1中間層14a及び第2中間層14b)、剥離層16としての炭素層、及び金属層18(第1金属層18a及び第2金属層18b)をこの順に成膜してキャリア付金属箔10を作製した。具体的な手順は以下のとおりである。
200mm×250mmで厚さ1.1mmのガラスシート(材質:ソーダライムガラス)をキャリア12として用意した。
キャリア12の表面にマスキング層を、直径400μmの6つの円形状加工領域(露出部分)が互いに離間して配置されるパターンに形成した。このマスキング層の形成は、感光性フィルムを用いてロールラミネーションにより行った。次に、ブロワブラスト装置(株式会社アルプスエンジニアリング製、BSP―50D)を用いて、マスキング層で上記円形状加工領域以外の部分が被覆されたキャリア12の表面に対して、狙い深さ200μmの穴が形成されるように、吐出径0.4mmのノズルから、粒径0.05mmのメディア(材質:グリーンカーボナイト)を0.5MPa以上の吐出圧力で2~5秒間投射することで、キャリア12の露出部分に対してブラスト処理を行った。こうして、キャリア12の表面にアライメントマークを構成する加工部として凹部12aを6個形成し、位置決め用領域Pを画定した。その後、マスキング層を除去した。
キャリア12の上記表面(凹部が形成された側の面)に第1中間層14aとして厚さ100nmのチタン層を以下の装置及び条件でスパッタリングにより形成した。
‐ 装置:枚葉式マグネトロンスパッタリング装置(キヤノントッキ株式会社製、MLS464)
‐ ターゲット:直径8インチ(203.2mm)のチタンターゲット(純度99.999%)
‐ 到達真空度:1×10-4Pa未満
‐ キャリアガス:Ar(流量:100sccm)
‐ スパッタリング圧:0.35Pa
‐ スパッタリング電力:1000W(3.1W/cm2)
‐ 成膜時温度:40℃
第1中間層14aの上に、第2中間層14bとして厚さ100nmのCu層を以下の装置及び条件でスパッタリングにより形成した。
‐ 装置:枚葉式DCスパッタリング装置(キヤノントッキ株式会社製、MLS464)
‐ ターゲット:直径8インチ(203.2mm)のCuターゲット(純度99.98%)
‐ 到達真空度:1×10-4Pa未満
‐ ガス:アルゴンガス(流量:100sccm)
‐ スパッタリング圧:0.35Pa
‐ スパッタリング電力:1000W(6.2W/cm2)
‐ 成膜時温度:40℃
Cu層の上に、剥離層16として厚さ6nmのアモルファスカーボン層を以下の装置及び条件でスパッタリングにより形成した。
‐ 装置:枚葉式DCスパッタリング装置(キヤノントッキ株式会社製、MLS464)
‐ ターゲット:直径8インチ(203.2mm)の炭素ターゲット(純度99.999%)
‐ 到達真空度:1×10-4Pa未満
‐ キャリアガス:Ar(流量:100sccm)
‐ スパッタリング圧:0.35Pa
‐ スパッタリング電力:250W(0.7W/cm2)
‐ 成膜時温度:40℃
剥離層16の表面に、第1金属層18aとして厚さ100nmのチタン層を以下の装置及び条件でスパッタリングにより形成した。
‐ 装置:枚葉式DCスパッタリング装置(キヤノントッキ株式会社製、MLS464)
‐ ターゲット:直径8インチ(203.2mm)のチタンターゲット(純度99.999%)
‐ キャリアガス:Ar(流量:100sccm)
‐ 到達真空度:1×10-4Pa未満
‐ スパッタリング圧:0.35Pa
‐ スパッタリング電力:1000W(3.1W/cm2)
第1金属層18aの上に、第2金属層18bとして膜厚300nmのCu層を以下の装置及び条件でスパッタリングにより形成して、キャリア付金属箔10を得た。
‐ 装置:枚葉式DCスパッタリング装置(キヤノントッキ株式会社製、MLS464)
‐ ターゲット:直径8インチ(203.2mm)のCuターゲット(純度99.98%)
‐ 到達真空度:1×10-4Pa未満
‐ キャリアガス:Ar(流量:100sccm)
‐ スパッタリング圧:0.35Pa
‐ スパッタリング電力:1000W(3.1W/cm2)
‐ 成膜時温度:40℃
レーザー顕微鏡(オリンパス株式会社製 LEXT OLS3000)を用いて、アライメントマークを構成する凹部12aについて観察を行った。観察像の画像解析を行うことにより、凹部12aの最大深さd、凹部12aを平面視したときの外径φ、キャリア12の主面sと凹部12aの内壁面の接線tとがなす角度θ、並びに凹部12aの開放端の曲率半径rを測定した。解析には上記顕微鏡に搭載されているツール、及び、画像解析ソフトImageJを併用した。各パラメータについて、3つの円形状加工領域で測定した値の平均値を算出した。結果は表1に示されるとおりであった。なお、凹部12aの形状はキャリア上に各種層を積層した後(すなわちアライメントマークを成す凹部)においても実質同一であると考えられる。
アライメントマークの形成工程において、ブラスト処理の条件を適宜変更することにより、キャリア12の主面sと凹部12aの内壁面の接線tとがなす角度θ、及び凹部12aの開放端の曲率半径rを変化させたこと以外は、例1と同様にしてキャリア付金属箔10の作製を行った。また、アライメントマークを構成する凹部の測定も例1と同様にして行った。
アライメントマークの形成工程において、ブラスト処理に代えて、レーザーアブレーション処理により6つのアライメントマークを構成する凹部を形成したこと以外は、例1と同様にしてキャリア付金属箔10の作製を行った。また、アライメントマークを構成する凹部の測定も例1と同様にして行った。レーザーアブレーション処理は、キャリア12の表面における互いに離間した6地点に対して固体UVレーザーを以下の条件で照射することにより行った。
[レーザー加工条件]
‐ 装置:東レエンジニアリング株式会社製レーザーパターニング装置
‐ 出力:35mW
‐ 波長:355nm
‐ 狙い径:400μm(例3及び4)又は2000μm(例5)
‐ 狙い深さ:200μm(例3及び5)又は100μm(例4)
例1~5のキャリア付金属箔10について、以下に示されるとおり、各種評価を行った。評価結果は表1に示されるとおりであった。
キャリア付金属箔10の露光現像性能を以下の手順により評価した。図8に示されるように、キャリア付金属箔10の第2金属層18b上にフォトレジスト20を積層した。このキャリア付金属箔10をラフ回路用露光装置(ウシオ電機株式会社製、UX-5シリーズ)に搬入した。ラフ回路用露光装置にてキャリア付金属箔10における位置決め用領域Pのパターン情報の検出及び位置合わせを行い、配線用領域W上の表面に対して回路幅が100μmとなるパターンで露光を行った。その後、直ちにキャリア付金属箔10をラフ回路用露光装置から微細回路用露光装置(ウシオ電機株式会社製、UX-7シリーズ)に移した。微細回路用露光装置にてキャリア付金属箔10における位置決め用領域Pのパターン情報の検出及び位置合わせを行い、配線用領域W上の表面に対して回路幅が2μmとなるパターンで露光を行った。キャリア付金属箔10に対して公知の条件で現像を行い、ラフ回路用パターン22a及び微細回路用パターン22bで構成されるレジストパターン22を形成した。レジストパターン22形成後のキャリア付金属箔10に公知の条件で電気銅めっきを行い、その後レジストパターン22を剥離した。レジストパターン22の剥離によって露出した金属層18の不要部分を公知の条件でエッチング除去した。こうして、キャリア付金属箔10上に回路幅100μmのラフ回路及び回路幅2μmの微細回路を形成した。回路形成後のキャリア付金属箔10をSEMにて観察した。その結果、例1~5のいずれのキャリア付金属箔10においても、ラフ回路及び微細回路が狙いのデザインどおりに形成されていることを確認できた。
キャリア12の割れ頻度を以下の手順により評価した。まず、100mm×100mmで厚さ1.1mmのガラスシート(材質:ソーダライムガラス)を5枚用意し、それぞれに例1~5と同様の条件で9つのアライメントマークを構成する凹部を形成した。各アライメントマークを構成する凹部の狙い位置(中心点)は、ガラスシートの1つの角(端部)の座標を基準点(0,0)と定め、その対角に位置する角の座標を(100,100)としたときに、(25,25)、(50,25)、(75,25)、(25,50)、(50,50)、(75,50)、(25,75)、(50,75)、及び(75,75)の座標でそれぞれ示される地点とした。次いで、アライメントマークを構成する凹部を形成したガラスシート、及び比較対象としてアライメントマークを構成する凹部を形成していないガラスシート(100mm×100mm、厚さ1.1mm、材質:ソーダライムガラス)に、規格番号:ASTM C1499-01に準拠したガラスのリング曲げ試験を実施した。アライメントマークを構成する凹部を形成していないガラスシートの面強度に対する、アライメントマークを構成する凹部を形成したガラスシートの面強度の比を算出し、以下の基準で格付けした。
‐評価A:面強度の比が0.9以上
‐評価B:面強度の比が0.7以上0.9未満
‐評価C:面強度の比が0.7未満
アライメントマークの視認性を以下の手順により評価した。評価2と同様、5枚のガラスシートに例1~5と同様の条件で9つのアライメントマークを構成する凹部を形成した後、例1の条件で、中間層14(第1中間層14a及び第2中間層14b)、剥離層16としての炭素層、及び金属層18(第1金属層18a及び第2金属層18b)をこの順に成膜してキャリア付金属箔10を作製した。その後、上記露光装置を用いて、形成したアライメントマークを10回繰り返し認識させて、アライメントマークの中心点の寸法誤差を測定した。次いで寸法誤差の平均値を算出し、以下の基準で格付けした。
‐評価A:寸法誤差の平均値が±50μm未満
‐評価B:寸法誤差の平均値が±50μm以上±150μm未満
‐評価C:寸法誤差の平均値が±150μm以上
加工汚れの評価を以下の手順により評価した。評価2と同様、5枚のガラスシートに例1~5と同様の条件で9つのアライメントマークを構成する凹部を形成した後、レーザー顕微鏡でアライメントマークを構成する凹部周囲の観察を行った(最大5mm×5mm視野)。凹部周囲に観察された変色の広がりの程度を以下の基準で格付けした。
‐評価A:凹部の周辺に変色が無いか、又は凹部の周辺に変色があるもののその変色が凹部の外縁から5μm未満の範囲内に収まっている。
‐評価B:凹部の周辺に変色が有るものの、その変色が凹部の外縁から100μm以下の範囲内に収まっている。
‐評価C:凹部の周辺に変色が有り、その変色が凹部の外縁から100μmを超える範囲に及んでいる。
Claims (14)
- キャリアと、前記キャリアの少なくとも一方の面上に設けられる剥離層と、前記剥離層上に設けられる金属層とを備えたキャリア付金属箔であって、
前記キャリア付金属箔が、
その全域にわたって前記キャリア、前記剥離層及び前記金属層が存在する配線用領域と、
前記キャリア付金属箔の前記少なくとも一方の面に設けられ、露光及び現像を伴う配線形成時の位置合わせに用いられるアライメントマークを成す、少なくとも2つの位置決め用領域と、
を有する、キャリア付金属箔。 - 前記アライメントマークの形状が、円形、十字形及び多角形からなる群から選択される少なくとも一種である、請求項1に記載のキャリア付金属箔。
- 前記アライメントマークが前記キャリアに設けられた凹部を有する、請求項1又は2に記載のキャリア付金属箔。
- 前記凹部の最大深さが0.1μm以上1000μm以下である、請求項3に記載のキャリア付金属箔。
- 前記凹部の平面視形状が、外径50μm以上5000μm以下の円形である、請求項3又は4に記載のキャリア付金属箔。
- 前記キャリアの主面と、前記凹部の内壁面の接線とがなす角度が40°以上である、請求項3~5のいずれか一項に記載のキャリア付金属箔。
- 前記凹部の開放端が丸みを帯びており、該丸みを帯びた開放端の曲率半径が100μm以下である、請求項3~6のいずれか一項に記載のキャリア付金属箔。
- 前記アライメントマークを2個以上200個以下有する、請求項1~7のいずれか一項に記載のキャリア付金属箔。
- 前記キャリアがガラス又はセラミックスで構成される、請求項1~8のいずれか一項に記載のキャリア付金属箔。
- 請求項1~9のいずれか一項に記載のキャリア付金属箔を使用して露光及び現像を経て配線を形成する方法であって、露光に先立ち前記キャリア付金属箔の前記位置決め用領域を基準として位置合わせを行う工程を含み、
回路幅の異なる複数の回路の露光が別々に行われ、かつ、前記複数の回路の現像が同時に行われる、方法。 - 前記配線を形成する方法が再配線層を形成する方法であり、前記複数の回路は、回路幅が0.1μm以上5μm以下である微細回路と、回路幅が5μmより大きく500μm以下であるラフ回路とを有するものである、請求項10に記載の方法。
- 前記微細回路の最小回路幅Fに対する前記ラフ回路の最大回路幅Rの比R/Fが2.0以上500以下である、請求項11に記載の方法。
- 請求項1~9のいずれか一項に記載のキャリア付金属箔の製造方法であって、
キャリアを用意する工程と、
前記キャリアの少なくとも一方の面の所定領域を加工して、少なくとも2つの前記アライメントマークを構成する加工部を形成し、それにより少なくとも2つの位置決め用領域を画定する工程と、
前記キャリアの前記少なくとも一方の面に、前記剥離層及び前記金属層を順に形成する工程と、
を含む、方法。 - 前記アライメントマークの形成が、エッチング法、ブラスト法、及びレーザーアブレーション法から選択される少なくとも一種の方法を用いて行われる、請求項13に記載の方法。
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