WO2020177516A1 - 阵列基板、显示面板及其制备方法 - Google Patents

阵列基板、显示面板及其制备方法 Download PDF

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WO2020177516A1
WO2020177516A1 PCT/CN2020/075068 CN2020075068W WO2020177516A1 WO 2020177516 A1 WO2020177516 A1 WO 2020177516A1 CN 2020075068 W CN2020075068 W CN 2020075068W WO 2020177516 A1 WO2020177516 A1 WO 2020177516A1
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layer
dielectric layer
substrate
array substrate
inorganic
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PCT/CN2020/075068
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English (en)
French (fr)
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刘弘
方业周
王凤国
武新国
郭志轩
李凯
田亮
王海东
马波
杨越
张东
冯宇
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京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Publication of WO2020177516A1 publication Critical patent/WO2020177516A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to an array substrate, a display panel, and their preparation methods.
  • Curved LCD Liquid Crystal Display
  • OLED Organic Light Emitting Display
  • the embodiment of the present disclosure discloses an array substrate, which includes a substrate, a flexible base film, a protective layer and various functional layers of a thin film transistor, wherein the flexible base film is located between the substrate and the protective layer.
  • the interlayer dielectric layer in the thin film transistor includes an inorganic dielectric layer and an organic dielectric layer that are stacked.
  • the material of the protective layer includes SiOx.
  • the thickness range of the protective layer includes 0.2-0.3 ⁇ m.
  • the material of the inorganic dielectric layer includes at least SiNx.
  • the thickness of the inorganic medium layer includes 0.1-0.3 ⁇ m.
  • the material of the organic medium layer includes polysilsesquioxane photosensitive resin.
  • the thickness of the organic medium layer ranges from 0.8 to 1.2 ⁇ m.
  • the substrate includes a glass substrate.
  • the flexible base film includes a polyimide (PI) layer.
  • PI polyimide
  • the embodiment of the present disclosure also discloses a display panel, which includes the above-mentioned array substrate.
  • the display panel is a curved liquid crystal display panel.
  • the embodiment of the present disclosure also discloses a method for preparing the array substrate, the method including:
  • the functional layers of thin film transistors including interlayer dielectric layers
  • the interlayer dielectric layer includes an organic dielectric layer and an inorganic dielectric layer that are stacked.
  • the material of the protective layer includes SiOx.
  • the material of the inorganic dielectric layer includes at least SiNx, and the thickness of the inorganic dielectric layer ranges from 0.1 to 0.3 ⁇ m.
  • the material of the organic medium layer includes polysilsesquioxane photosensitive resin.
  • the substrate includes a glass substrate.
  • forming a protective layer on the side of the flexible base film away from the substrate includes:
  • a protective layer is formed on the side of the flexible base film away from the substrate using the CVD method.
  • forming the interlayer dielectric layer includes:
  • the first inorganic dielectric layer is etched using the organic dielectric layer as a mask to obtain the inorganic dielectric layer.
  • the embodiment of the present disclosure also discloses a method for manufacturing a curved liquid crystal display panel, the method including:
  • the color filter substrate and the array substrate of the pair box are bent and manufactured.
  • Fig. 1 is a schematic diagram of an array substrate structure in an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of the structure of a conventional array substrate
  • FIG. 3 is a schematic diagram of the structure of the PI layer and the protective layer in an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of the structure of an inorganic medium layer and an organic medium layer in an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of an array substrate structure in another embodiment of the present disclosure.
  • FIG. 6 is a flowchart of steps of a method for manufacturing an array substrate in another embodiment of the present disclosure.
  • FIG. 7 is a step flow chart of the sub-steps of a method for manufacturing an array substrate in another embodiment of the present disclosure.
  • the substrate is usually made on a glass substrate.
  • TFT thin-film transistor
  • CF color filter
  • the embodiments of the present disclosure are proposed to provide an array structure, a display device, and a manufacturing method of the array structure that at least partially solve the above-mentioned problems.
  • the embodiment of the present disclosure provides an array substrate, including a substrate 101, a flexible base film (for example, a polyimide (PI) layer) 102, a protective layer 103, a buffer layer, and a thin film laminated and disposed on the substrate 101
  • a flexible base film for example, a polyimide (PI) layer
  • PI polyimide
  • the functional layer of the thin film transistor includes an interlayer dielectric layer; wherein the flexible base film 102 is attached to the substrate 101; the interlayer dielectric layer includes a laminated inorganic dielectric layer 105 And the organic medium layer 106.
  • the corresponding layers located between the protective layer 103 and the dielectric layer (the inorganic dielectric layer 105 and the organic dielectric layer 106) are collectively denoted by the reference numeral 104.
  • the array substrate may be applied to a flexible display screen.
  • the partial schematic diagram of the conventional array substrate shown in FIG. 2 includes: a substrate 201, a PI layer 202, a buffer layer 204 and various functional layers of thin film transistors.
  • the functional layers of the thin film transistor include an interlayer dielectric layer 205.
  • the PI layer 202 of the array substrate is disposed on the substrate 201.
  • the substrate 201 is laser lifted to expose the PI layer 202 and then the boxed TFT And CF for bending production.
  • the substrate 201 is laser lifted to expose the PI layer 202 and then the boxed TFT And CF for bending production.
  • the laser energy is too high, irradiating the polysilicon (active layer) of the thin film transistor is likely to cause abnormal electrical characteristics.
  • the embodiment of the present disclosure is provided with a protective layer 303 on the PI layer 302 on the substrate 301, which can prevent the PI base from being affected by water vapor and impurities while absorbing the energy of the laser, preventing the laser from affecting the polysilicon (to isolate Protective layer function).
  • the interlayer dielectric layer 205 is an inorganic dielectric layer and has a thickness of about 0.55 ⁇ m, it is easy to cause the fracture of the dielectric layer and cause the SD metal line and signal line to break during the bending process. , There are a lot of dot-line defects.
  • 404 is a partial functional layer (such as a gate insulating layer) of a thin film transistor
  • 405 is an inorganic dielectric layer
  • 406 is an organic dielectric layer.
  • the interlayer dielectric layer is set to be an inorganic dielectric layer 405 and an organic dielectric layer 406, and the thickness of the inorganic dielectric layer 405 is set to 0.1-0.3 ⁇ m, which reduces the thickness of the inorganic dielectric layer and increases the organic
  • the dielectric layer 406 improves the ductility and flatness of the dielectric layer, and solves the problem of the traditional interlayer dielectric layer fracture during bending.
  • the array substrate shown includes a laminated substrate 501, a flexible base film (such as a PI layer) 502, a protective layer 503, and various functional layers of the thin film transistor array substrate.
  • the functional layer includes an inorganic dielectric layer 505 and an organic dielectric layer 506 as the interlayer dielectric layer of the thin film transistor. With the interlayer dielectric layer as the boundary, the functional layer of the thin film transistor may also include the interlayer dielectric layer near the liner.
  • the array substrate may also include a light shielding layer 5042 and a buffer layer 5043 located on the side of the active layer 5041 close to the substrate, and a planarization layer 507 located on the side of the organic medium layer 506 away from the substrate (for example, acrylic planarization Layer), a passivation layer 508, a pixel electrode 509, and a COM electrode (common electrode) 510.
  • FIG. 5 shows a thin film transistor with a top gate structure.
  • the thin film transistor may also have a bottom gate structure. In the bottom gate structure, the array substrate does not include a light shielding layer.
  • the material of the protective layer includes silicon oxide (SiOx), and the thickness of the protective layer ranges from 0.2-0.3 ⁇ m.
  • the protective layer is used to prevent the PI base of the thin film transistor from being affected by moisture and impurities while absorbing laser energy, so as to prevent the laser from affecting the electrical characteristics of the P-Si.
  • SiOx is used to make the protective layer.
  • the SiOx has good thermal insulation properties and can slow down the amorphous silicon (a- The cooling rate of Si) increases the crystal grain size and enhances the step coverage.
  • the thickness of the protective layer in the embodiments of the present disclosure includes 0.2-0.3 ⁇ m. When the thickness of the protective layer is less than 0.2 ⁇ m, the thermal insulation and laser absorption ability of the protective layer may not completely prevent the laser from causing the polysilicon in the transistor. Influence: When the thickness of the protective layer is greater than 0.3 ⁇ m, the thickness requirement of the thin film transistor array substrate may be affected.
  • the material of the inorganic dielectric layer includes at least silicon nitride (SiNx), and the thickness of the inorganic dielectric layer includes 0.1-0.3 ⁇ m; the material of the organic dielectric layer includes polysilsesquioxane photosensitive resin
  • the thickness of the organic medium layer ranges from 0.8 to 1.2 ⁇ m.
  • the main composition of the polysilsesquioxane photosensitive resin is (RSiO 1.5 )n, and its polymer structure can be trapezoidal, dendritic or lantern-shaped, and has higher heat resistance, insulation and flatness.
  • the material of the inorganic dielectric layer may include SiNx or SiNx and SiOx.
  • the material of the traditional dielectric layer is SiNx and/or SiOx, and the thickness is about 0.55 microns. When bending, the thickness of the dielectric layer is too thick, which will easily cause the dielectric layer to break, which will cause the SD metal wire set on the dielectric layer to break .
  • the dielectric layer in this embodiment includes an inorganic dielectric layer and an organic dielectric layer, and the thickness of the inorganic dielectric layer is between 0.1-0.3 ⁇ m. Since the thickness of the inorganic dielectric layer is reduced and the organic dielectric layer is increased, the dielectric The ductility and flatness of the layer prevent the fracture of the dielectric layer. In addition, the organic medium layer is in contact with the SD layer, which can provide a buffer for the SD layer.
  • the protective layer is used to prevent the substrate from being affected by moisture and impurities during other processes; at the same time, it is used to isolate heat and absorb laser energy when the substrate is separated by laser, so as to prevent the laser from affecting the thin film transistor.
  • Polysilicon affects electrical characteristics.
  • the interlayer dielectric layer includes an inorganic dielectric layer and an organic dielectric layer. Compared with the traditional interlayer dielectric layer including only an inorganic dielectric layer and the inorganic dielectric layer is relatively thick, the embodiment of the present disclosure reduces the thickness of the inorganic dielectric layer , And an organic dielectric layer is added, which improves the ductility and flatness of the interlayer dielectric layer, and can prevent the fracture of the interlayer dielectric layer.
  • the embodiment of the present disclosure also provides a display panel, the display panel includes the above-mentioned array substrate, the array substrate includes a substrate, a flexible base film, a protective layer, and functional layers of thin film transistors, wherein the flexible base film is provided with a lining Between the bottom and the protective layer, and the thin film transistor functional layer includes an interlayer dielectric layer, the interlayer dielectric layer may include an inorganic dielectric layer and an organic dielectric layer that are stacked.
  • the material of the protective layer includes SiOx, and the thickness of the protective layer ranges from 0.2 to 0.3 ⁇ m.
  • the material of the inorganic dielectric layer includes at least SiNx, and the thickness of the inorganic dielectric layer ranges from 0.1 to 0.3 ⁇ m.
  • the material of the organic medium layer includes polysilsesquioxane photosensitive resin, and the thickness of the organic medium layer includes 0.8-1.2 ⁇ m.
  • the substrate includes a glass substrate.
  • the flexible base film includes a PI layer.
  • the protective layer is used to prevent the substrate from being affected by moisture and impurities during other processes; at the same time, it is used to isolate heat and absorb laser energy when laser separation of the substrate (such as Glass), so as to avoid laser interference.
  • the polysilicon in the transistor causes an influence on the electrical characteristics.
  • the medium layer includes an inorganic medium layer and an organic medium layer. Compared with the traditional medium layer only includes an inorganic medium layer and the inorganic medium layer is relatively thick, the embodiment of the present disclosure reduces the thickness of the inorganic medium layer and adds a layer of organic medium. The layer improves the ductility and flatness of the dielectric layer and can prevent the dielectric layer from breaking.
  • FIG. 6 there is shown a flow chart of a method for preparing a film structure in an embodiment of the present disclosure.
  • step 601 a substrate is provided.
  • the substrate is a glass substrate.
  • Step 602 forming a flexible base film on the substrate.
  • the flexible base film is a PI layer
  • the PI layer is formed of a polyimide (PI) material
  • the PI molecular backbone may have a stable imide aromatic heterocyclic structure, which is stretched The performance can reach 200MPa.
  • Step 603 forming a protective layer on the side of the flexible base film away from the substrate.
  • the previously manufactured PI layer is attached to the substrate, and a protective layer is formed on the PI layer by the CVD method.
  • the protective layer is made of SiOx and has a thickness of 0.2-0.3 ⁇ m.
  • the CVD (Chemical Vapor Deposition, chemical vapor deposition) method refers to the introduction of gaseous or liquid reactant vapor and other gases required for the reaction into the reaction chamber, and a chemical reaction occurs on the surface of the substrate to form a thin film the process of.
  • the CVD method has the characteristics of low deposition temperature, easy control of film composition, film thickness proportional to deposition time, good uniformity, repeatability, and excellent step coverage.
  • the protective layer is used to prevent the substrate from being affected by water vapor and impurities while being able to absorb the energy of the laser, so as to avoid the influence of the laser on the polysilicon.
  • Step 604 forming the active layer, the gate insulating layer and the gate layer of the thin film transistor.
  • the active layer, the gate insulating layer, and the gate layer of the thin film transistor are fabricated according to a conventional process, and this embodiment does not specifically limit it.
  • an interlayer dielectric layer is formed on the side of the gate layer away from the substrate.
  • the interlayer dielectric layer includes an organic dielectric layer and an inorganic dielectric layer.
  • the step 605 may include:
  • Step 701 using a CVD method to form a first inorganic dielectric layer on the side of the gate layer away from the substrate.
  • the material of the first inorganic dielectric layer is SiNx or SiOx and SiNx.
  • the material of the first inorganic dielectric layer is formed by a CVD method with a thickness of 0.1-0.3 ⁇ m, which improves the traditional
  • the inorganic dielectric layer is relatively thick (thickness is about 0.55 microns), and when bending, it is easy to cause the defect of fracture of the inorganic dielectric layer.
  • Step 702 coating an organic medium layer material on the first inorganic medium layer (on the side away from the substrate) to form a first organic medium layer.
  • the organic medium layer material includes polysilsesquioxane photosensitive resin, and the organic medium layer sizing material is coated on the first inorganic medium layer to form a thickness of 0.8-1.2 ⁇ m
  • adding an organic dielectric layer to the dielectric layer can improve the ductility and flatness of the dielectric layer and prevent the dielectric layer from breaking.
  • the coating refers to applying the organic medium layer material to the first inorganic medium layer at one time to obtain a solid continuous film.
  • Step 703 Use a mask to pattern the first organic medium layer to obtain a second organic medium layer.
  • photoresist is first coated on the first organic medium layer, and then a pre-made mask is used to cover the first organic medium layer coated with the photoresist, and the exposure is carried out.
  • the photoresist is removed by etching with a specific reagent to obtain a second organic medium layer.
  • Step 704 curing the second organic medium layer to obtain an organic medium layer
  • the second dielectric layer is photocured at 250° C. using a UV curing machine, and the photocuring time is between 25 min and 35 min. After the photocuring is completed, the organic dielectric layer is obtained.
  • Step 705 etching the first inorganic dielectric layer using the organic dielectric layer as a mask to obtain the inorganic dielectric layer.
  • the organic medium layer is used as a mask to etch the first inorganic medium layer, and the same pattern as that on the organic medium layer is obtained on the first inorganic medium layer, and then the inorganic medium layer is obtained.
  • the specific process flow of step 605 can be as follows: the inorganic dielectric layer passes through Dep (film formation) ⁇ Activation (activation) ⁇ Hydrogen (hydrogenation) (adding H compound to the inorganic dielectric layer and the insulating layer during hydrogenation) ) ⁇ The organic medium layer is formed by Coating ⁇ Mask ⁇ Curing (curing at 250°C). Finally, a complete dielectric layer is obtained by Etch (dry etching of the inorganic dielectric layer). The method maintains one Mask process to form an inorganic dielectric layer and an organic dielectric layer.
  • the protective layer is used to prevent the substrate from being affected by moisture and impurities during other processes; at the same time, it is used to isolate the heat and absorb the laser energy when the glass substrate is separated by laser, so as to prevent the laser from affecting the transistor in the transistor.
  • Polysilicon affects electrical characteristics.
  • the interlayer dielectric layer includes an inorganic dielectric layer and an organic dielectric layer. Compared with the traditional interlayer dielectric layer only includes an inorganic dielectric layer and the inorganic dielectric layer is relatively thick, the embodiment of the present disclosure reduces the thickness of the inorganic dielectric layer and increases An organic dielectric layer improves the ductility and flatness of the interlayer dielectric layer, and can prevent the fracture of the interlayer dielectric layer.

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Abstract

一种阵列基板、显示面板及其制备方法，所述阵列基板包括衬底（101）、柔性基膜（102）、保护层（103）和薄膜晶体管的各功能层（104），其中所述柔性基膜（102）位于所述衬底（101）和所述保护层（103）之间。

Description

阵列基板、显示面板及其制备方法
相关申请的交叉引用
本公开要求2019年3月5日提交的、发明名称为“一种阵列基板、显示装置以及阵列基板的制备方法”的中国专利申请No.201910165143.0的优先权，其全部内容通过引用结合在此。
技术领域
本公开涉及显示技术领域，特别是涉及一种阵列基板、显示面板以及它们的制备方法。
背景技术
目前，曲面屏显示已经趋于主流，曲面LCD(Liquid Crystal Display，液晶显示器)相对于曲面OLED(Organic Light Emitting Display，有机电致发光显示器)在成本、信赖性、使用寿命上都拥有极大优势。
公开内容
本公开实施例公开了一种阵列基板，包括衬底、柔性基膜、保护层和薄膜晶体管的各功能层，其中柔性基膜位于衬底和保护层之间。
进一步的，所述薄膜晶体管中的层间介质层包括层叠设置的无机介质层和有机介质层。
进一步的，所述保护层的材质包括SiOx。
进一步的，所述保护层的厚度范围包括0.2-0.3μm。
进一步的，所述无机介质层的材质至少包括SiNx。
进一步的，所述无机介质层的厚度范围包括0.1-0.3μm。
进一步的，所述有机介质层的材质包括聚倍半硅氧烷感光树脂。
进一步的，所述有机介质层的厚度范围包括0.8-1.2μm。
进一步的，所述衬底包括玻璃衬底。
进一步的，所述柔性基膜包括聚酰亚胺(PI)层。
本公开实施例还公开了一种显示面板，所述显示面板包括上述的阵列基板。
进一步的，所述显示面板为曲面液晶显示面板。
本公开实施例还公开了一种阵列基板的制备方法，所述方法包括：
提供衬底；
在所述衬底上形成柔性基膜；
在所述柔性基膜远离衬底的一侧上形成保护层；
形成薄膜晶体管的各功能层，所述功能层包括层间介质层
进一步的，所述层间介质层包括层叠设置的有机介质层和无机介质层。
进一步的，所述保护层的材质包括SiOx。
进一步的，所述无机介质层的材质至少包括SiNx，所述无机介质层的厚度范围包括0.1-0.3μm。
进一步的，所述有机介质层的材质包括聚倍半硅氧烷感光树脂。
进一步的，所述衬底包括玻璃衬底。
进一步的，在所述柔性基膜远离衬底的一侧上形成保护层包括：
利用CVD法在柔性基膜远离衬底的一侧上形成保护层。
进一步的，形成层间介质层包括：
利用CVD法形成第一无机介质层；
在无机介质层上涂覆有机介质层材料，形成第一有机介质层；
利用掩膜版对第一有机介质层进行图案化处理，得到第二有机介质层；
对所述第二有机介质层进行固化，得到所述有机介质层；
以有机介质层为掩膜对第一无机介质层进行蚀刻，得到无机介质层。
本公开实施例还公开了一种曲面液晶显示面板的制备方法，所述方法包括：
将彩膜基板与上述的阵列基板对盒；
将所述阵列基板的衬底进行激光剥离；
露出柔性基膜后对对盒的彩膜基板和阵列基板进行弯曲制作。
附图说明
图1是本公开一个实施例中的一种阵列基板结构示意图；
图2是传统的阵列基板结构示意图；
图3是本公开一个实施例中PI层和保护层的结构示意图；
图4是本公开一个实施例中无机介质层和有机介质层的结构示意图；
图5是本公开另一个实施例中的一种阵列基板结构示意图；
图6是本公开再一个实施例中一种阵列基板制备方法的步骤流程图；
图7是本公开再一个实施例中一种阵列基板制备方法中子步骤的步骤流程图。
具体实施方式
目前，在进行曲面LCD工艺时，通常将基板制作在玻璃(Glass)基板上，待TFT(thin-film transistor，薄膜晶体管)和CF(color filter，彩膜)对盒工艺完成后，将两边玻璃剥离，露出基板工程塑料进行弯曲制作，但这种工艺常会出现以下缺点：
1.进行激光剥离玻璃基板时，激光能量过高照射到P-Si(polycrystalline silicon，多晶硅)容易造成电学特性异常；
2.在进行弯曲时，容易造成层间介质层断裂进而造成SD(源漏极)金属线断裂，出现大量点线类不良。
鉴于上述问题，提出了本公开实施例以便提供一种至少部分地解决上述问题的一种阵列结构、显示装置以及阵列结构的制备方法。
为使本公开的目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本公开作进一步详细的说明。
参照图1，示出了本公开一种阵列基板的示意图之一。
本公开实施例提供了一种阵列基板，包括衬底101，层叠设置在所述衬底101上的柔性基膜(例如聚酰亚胺(PI)层)102、保护层103、缓冲层和薄膜晶体管各个功能层，所述薄膜晶体管的功能层包括层间介质层；其中，所述柔性基膜102贴附在所述衬底101上；所述层间介质层包括层叠设置的无机介质层105和有机介质层106。为清楚起见，将位于保护层103和介质层(无机介 质层105和有机介质层106)之间的相应层(缓冲层、栅极绝缘层等)统一用附图标记104表示。
本公开实施例中，所述阵列基板可以应用于柔性显示屏中。
如图2所示的传统阵列基板部分示意图，包括：衬底201、PI层202、缓冲层204和薄膜晶体管各个功能层，所述薄膜晶体管的功能层包括层间介质层205。在进行曲面LCD工艺时，该阵列基板的PI层202设置于衬底201上，在TFT和CF对盒工艺完成后，将衬底201进行激光剥离，露出PI层202后对对盒后的TFT和CF进行弯曲制作。其中，在进行激光剥离时，由于激光能量过高，照射到薄膜晶体管的多晶硅(有源层)上容易造成电学特性异常。参考图3，本公开的实施例在衬底301上的PI层302上设置保护层303，能够防止PI基受水汽及杂质影响同时能够吸收激光的能量，避免激光对多晶硅造成影响(起到隔离保护层作用)。
如图2所示的传统阵列基板示意图，由于层间介质层205为无机介质层，且厚度为0.55μm左右，在进行弯曲制作时，容易造成介质层的断裂进而造成SD金属线以及信号线断裂，出现大量点线类不良。而在本公开的实施例中，参照图4，其中404为薄膜晶体管的部分功能层(例如栅绝缘层)，405为无机介质层，406为有机介质层。本实施例将层间介质层设置为无机介质层405和有机介质层406两层，并且将无机介质层405的厚度设置为0.1-0.3μm，减小了无机介质层的厚度，并且增加了有机介质层406，提升了介质层的延展性和平坦性，解决了在进行弯曲时传统层间介质层断裂的问题。
在一个具体的实施例中，参考图5，所示阵列基板包括层叠的衬底501、柔性基膜(例如PI层)502、保护层503、和薄膜晶体管阵列基板的各个功能层。所述功能层中包括作为薄膜晶体管的层间介质层的无机介质层505和有机介质层506，以所述层间介质层为界，薄膜晶体管的功能层还可以包括位于层间介质层靠近衬底一侧的有源层5041、栅绝缘层5044和栅极层5045；以及位于层间介质层远离衬底一侧的SD层5046。进一步地，阵列基板还可以包括位于有源层5041靠近衬底的一侧的遮光层5042和缓冲层5043，以及位于有机介质层506远离衬底的一侧的平坦化层507(例如亚克力平坦化层)、钝化层508、像素电极509和COM电极(公共电极)510。图5所示为具有顶栅结构的薄膜晶体管，薄膜晶体管也可以具有底栅结构。在底栅结构中，阵列基板不 包括遮光层。
可选的，所述保护层的材质包括氧化硅(SiOx)，所述保护层的厚度范围包括0.2-0.3μm。
本公开实施例中，所述保护层用于防止薄膜晶体管的PI基受水汽及杂质的影响同时吸收激光能量，防止激光对P-Si造成电学特性的影响。本实施例中采用SiOx制作保护层，所述SiOx具有较好的绝热性能，在晶化过程(例如准分子激光退火(Excimer Laser Annealing,ELA)晶化过程)中可以减缓非晶硅(a-Si)的冷却速率，使晶粒尺寸增大、台阶覆盖力增强。本公开实施例中的保护层厚度范围包括0.2-0.3μm，当保护层的厚度小于0.2μm时，所述保护层的绝热性和吸收激光的能力可能不能完全避免激光对晶体管中的多晶硅造成的影响；当保护层的厚度大于0.3μm时，可能会影响所述薄膜晶体管阵列基板的厚度要求。
可选的，所述无机介质层的材质至少包括氮化硅(SiNx)，所述无机介质层的厚度范围包括0.1-0.3μm；所述有机介质层的材质包括聚倍半硅氧烷感光树脂，所述有机介质层的厚度范围包括0.8-1.2μm。聚倍半硅氧烷感光树脂的主体组成为(RSiO 1.5)n，其高分子结构可呈梯形、树枝型或灯笼型等结构，具有更高的耐热性，绝缘性，平坦性。
本公开实施例中，所述无机介质层的材质可以包括SiNx或SiNx和SiOx。传统的介质层的材料为SiNx和/或SiOx，厚度在0.55微米左右，在进行弯曲时，由于介质层的厚度过厚，容易造成介质层断裂，进而造成设置在介质层上的SD金属线断裂。
本实施例中的介质层包括无机介质层和有机介质层，且无机介质层的厚度在0.1-0.3μm之间，由于减小了无机介质层的厚度，并且增加了有机介质层，能够提高介质层的延展性和平坦性，防止介质层的断裂。另外，有机介质层与SD层接触，可以对SD层提供缓冲作用。
本公开实施例中，所述保护层用于防止基板在进行其他工艺时受水汽及杂质的影响；同时用于在激光分离衬底时，隔绝热量、吸收激光能量，避免激光对薄膜晶体管中的多晶硅造成电学特性的影响。所述层间介质层包括无机介质层和有机介质层，相对于传统的层间介质层只包括无机介质层、且无机介质层比较厚的情形，本公开实施例将无机介质层的厚度减小，并增加了一层有机介 质层，提升了层间介质层的延展性和平坦性，能够防止层间介质层的断裂。
本公开实施例还提供了一种显示面板，所述显示面板包括上述的阵列基板，所述阵列基板包括衬底、柔性基膜、保护层和薄膜晶体管的各功能层，其中柔性基膜设置衬底和保护层之间，并且薄膜晶体管功能层包括层间介质层，所述层间介质层可以包括层叠设置的无机介质层和有机介质层。
所述保护层的材质包括SiOx，所述保护层的厚度范围包括0.2-0.3μm。
所述无机介质层的材质至少包括SiNx，所述无机介质层的厚度范围包括0.1-0.3μm。
所述有机介质层的材质包括聚倍半硅氧烷感光树脂，所述有机介质层的厚度范围包括0.8-1.2μm。
所述衬底包括玻璃衬底。
所述柔性基膜包括PI层。
本公开实施例中，所述保护层用于防止基板在进行其他工艺时受水汽及杂质的影响；同时用于在激光分离衬底(例如Glass)时，隔绝热量、吸收激光能量，避免激光对晶体管中的多晶硅造成电学特性的影响。所述介质层包括无机介质层和有机介质层，相对传统的介质层只包括无机介质层且无机介质层比较厚，本公开实施例将无机介质层的厚度减小，并增加了一层有机介质层，提升了介质层的延展性和平坦性，能够防止介质层的断裂。
参照图6，示出了本公开实施例中的一种膜层结构的制备方法流程图。
步骤601，提供衬底。
本实施例中，所述衬底为玻璃衬底。
步骤602，在所述衬底上形成柔性基膜。
本实施例中，所述柔性基膜为PI层，所述PI层由聚酰亚胺(PI)材料形成，所述PI分子主链中可以具有稳定的酰亚胺芳杂环结构，拉伸性可达200MPa。
步骤603，在所述柔性基膜远离衬底的一侧上形成保护层。
本公开实施例中，将之前已经制作完成的PI层贴附到衬底上，利用CVD法在PI层上形成保护层，所述保护层的材质为SiOx，厚度为0.2-0.3μm。所述CVD(Chemical Vapor Deposition,化学气相淀积)法，指把含有构成薄膜元 素的气态反应剂或液态反应剂的蒸气及反应所需其它气体引入反应室，在衬底表面发生化学反应生成薄膜的过程。所述CVD法具有沉积温度低，薄膜成份易控，膜厚与淀积时间成正比，均匀性，重复性好，台阶覆盖性优良的特点。
本公开实施例中，所述保护层用于防止基板受水汽及杂质影响同时能够吸收激光的能量，避免激光对多晶硅造成影响。
步骤604，形成薄膜晶体管的有源层、栅绝缘层和栅极层。
本公开实施例中，所述薄膜晶体管的有源层、栅绝缘层和栅极层根据传统工艺制作，本实施例不作具体限制。
步骤605，在所述栅极层远离衬底的一侧上形成层间介质层，所述层间介质层包括有机介质层和无机介质层。
本公开实施例中，参考图7，所述步骤605可以包括：
步骤701，利用CVD法在栅极层远离衬底的一侧上形成第一无机介质层。
在本公开实施例中，所述第一无机介质层的材质为SiNx或者SiOx和SiNx，将所述第一无机介质层材料利用CVD法形成厚度为0.1-0.3μm厚的膜层，改进了传统的无机介质层较厚(厚度在0.55微米左右)，在进行弯曲时，容易导致无机介质层断裂的缺点。
步骤702，在第一无机介质层上(在远离衬底的一侧)进行有机介质层材料的涂覆，形成第一有机介质层。
在本公开实施例中，所述有机介质层材质包括聚倍半硅氧烷感光树脂，将所述有机介质层胶料涂覆到所述第一无机介质层上形成厚度为0.8-1.2μm的膜层，本实施例在所述介质层增加了有机介质层能够提高介质层的延展性和平坦性，防止介质层的断裂。
所述涂覆指将有机介质层材料一次施涂到所述第一无机介质层上得到固态连续膜。
步骤703，利用掩膜版对第一有机介质层进行图案化处理，得到第二有机介质层。
本公开实施例中，首先在第一有机介质层上涂布光刻胶，然后用预先制作好的掩模板盖在涂布了光刻胶的第一有机介质层上，进行曝光，曝光完成后用特定试剂腐蚀除去光刻胶，得到第二有机介质层。
步骤704，对第二有机介质层进行固化，得到有机介质层；
本公开实施例中，可选地，使用UV光固化机在250℃下对第二介质层进行光固化，光固化时间为25min-35min之间，光固化完成后，得到有机介质层。
步骤705，以有机介质层为掩膜对第一无机介质层蚀刻，得到无机介质层。
在本公开实施例中，利用有机介质层为掩膜版，对第一无机介质层进行蚀刻，在第一无机介质层上得到和有机介质层上相同的图案，进而获得无机介质层。
本公开实施例中，步骤605的具体工艺流程可以如下：无机介质层通过Dep(成膜)→Activation(活化)→Hydrogen(加氢)(加氢时在无机介质层和绝缘层中加入H建)→有机介质层通过Coating(涂覆)→Mask(掩膜)→Curing(250℃固化)形成。最后通过Etch(对无机介质层进行干刻)得到完整的介质层，所述方法保持1道Mask工序就能够形成无机介质层和有机介质层。
本公开实施例中，所述保护层用于防止基板在进行其他工艺时受水汽及杂质的影响；同时用于在激光分离Glass衬底时，隔绝热量、吸收激光能量，避免激光对晶体管中的多晶硅造成电学特性的影响。所述层间介质层包括无机介质层和有机介质层，相对传统的层间介质层只包括无机介质层且无机介质层比较厚，本公开实施例将无机介质层的厚度减小，并增加了一层有机介质层，提升了层间介质层的延展性和平坦性，能够防止层间介质层的断裂。
尽管已描述了本公开的一些实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括上述实施例以及落入本公开实施例范围的所有变更和修改。
最后，还需要说明的是，在本文中，诸如第一和第二之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。
以上对本公开所提供的一种膜层结构、显示装置和一种膜层结构的制备方法，进行了详细介绍，本文中应用了具体个例对本公开的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本公开的方法及其核心思想；同时，对于本领域的一般技术人员，依据本公开的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本公开的限制。

Claims (20)

  1. 一种阵列基板，包括衬底、柔性基膜、保护层和薄膜晶体管的各功能层，其中所述柔性基膜位于所述衬底和所述保护层之间。
  2. 根据权利要求1所述的阵列基板，其中，所述薄膜晶体管的功能层包括层间介质层，所述层间介质层包括层叠设置的无机介质层和有机介质层。
  3. 根据权利要求1或2所述的阵列基板，其中，所述保护层的材质包括SiOx。
  4. 根据权利要求1-3中任一项所述的阵列基板，其中，所述保护层的厚度范围包括0.2-0.3μm。
  5. 根据权利要求2所述的阵列基板，其中，所述无机介质层的材质至少包括SiNx。
  6. 根据权利要求2或5所述的阵列基板，其中，所述无机介质层的厚度范围包括0.1-0.3μm。
  7. 根据权利要求2所述的阵列基板，其中，所述有机介质层的材质包括聚倍半硅氧烷感光树脂。
  8. 根据权利要求2或7所述的阵列基板，其中，所述有机介质层的厚度范围包括0.8-1.2μm。
  9. 根据权利要求1-8中任一项所述的阵列基板，其中，所述衬底包括玻璃衬底。
  10. 根据权利要求1-9中任一项所述的阵列基板，其中，所述柔性基膜包括聚酰亚胺(PI)层。
  11. 一种显示面板，所述显示面板包括如权利要求1-10任一项所述的阵列基板。
  12. 根据权利要求11所述的显示面板，其中所述显示面板为曲面液晶显示面板。
  13. 一种阵列基板的制备方法，包括：
    提供衬底；
    在所述衬底上形成柔性基膜；
    在所述柔性基膜远离所述衬底的一侧上形成保护层；
    形成薄膜晶体管的各功能层，所述功能层包括层间介质层。
  14. 根据权利要求13所述的制备方法，其中，所述层间介质层包括层叠设置的无机介质层和有机介质层。
  15. 根据权利要求13或14所述的制备方法，其中，所述保护层的材质包括SiOx。
  16. 根据权利要求14所述的制备方法，其中，所述无机介质层的厚度范围包括0.1-0.3μm。
  17. 根据权利要求13-16中任一项所述的制备方法，其中，所述衬底包括玻璃衬底。
  18. 根据权利要求13所述的制备方法，其中，所述在所述柔性基膜远离衬底的一侧上形成保护层包括：
    利用CVD法在柔性基膜远离衬底的一侧上形成保护层。
  19. 根据权利要求14所述的制备方法，其中，形成层间介质层包括：
    利用CVD法形成第一无机介质层；
    在所述第一无机介质层上涂覆有机介质层材料，形成第一有机介质层；
    利用掩膜版对第一有机介质层进行图案化处理，得到第二有机介质层；
    对所述第二有机介质层进行固化，得到所述有机介质层；
    以所述有机介质层为掩膜对第一无机介质层进行蚀刻，得到无机介质层。
  20. 一种曲面液晶显示面板的制备方法，包括：
    将彩膜基板与如权利要求1-10中任一项所述的阵列基板对盒；
    将所述阵列基板的衬底进行激光剥离；
    露出柔性基膜后对对盒的彩膜基板和阵列基板进行弯曲制作。
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