WO2020093400A1 - 软硬结合电路板及其制作方法 - Google Patents

软硬结合电路板及其制作方法 Download PDF

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Publication number
WO2020093400A1
WO2020093400A1 PCT/CN2018/114914 CN2018114914W WO2020093400A1 WO 2020093400 A1 WO2020093400 A1 WO 2020093400A1 CN 2018114914 W CN2018114914 W CN 2018114914W WO 2020093400 A1 WO2020093400 A1 WO 2020093400A1
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WO
WIPO (PCT)
Prior art keywords
layer
circuit board
conductive circuit
protective layer
copper
Prior art date
Application number
PCT/CN2018/114914
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English (en)
French (fr)
Inventor
侯宁
李卫祥
Original Assignee
庆鼎精密电子（淮安）有限公司
鹏鼎控股(深圳)股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 庆鼎精密电子（淮安）有限公司, 鹏鼎控股(深圳)股份有限公司 filed Critical 庆鼎精密电子（淮安）有限公司
Priority to CN201880028351.XA priority Critical patent/CN111434190B/zh
Priority to PCT/CN2018/114914 priority patent/WO2020093400A1/zh
Priority to US16/713,337 priority patent/US11140776B2/en
Publication of WO2020093400A1 publication Critical patent/WO2020093400A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0277—Bendability or stretchability details
    • H05K1/028—Bending or folding regions of flexible printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/05—Flexible printed circuits [FPCs]
    • H05K2201/058—Direct connection between two or more FPCs or between flexible parts of rigid PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles

Definitions

  • the invention relates to a circuit board and a manufacturing method thereof, in particular to a soft and hard combined circuit board and a manufacturing method thereof.
  • a method for manufacturing a soft and hard circuit board includes the following steps: providing a first circuit board and a first substrate, and pressing the first substrate to the first circuit board through a first adhesive layer On the surface of the first substrate, the first substrate includes a second base layer pressed onto the surface of the first adhesive layer, a protective layer formed on the surface of the second base layer, and a first formed on the surface of the protective layer A copper layer; making the first copper layer form a third conductive circuit layer; partially covering the protective layer exposed by the third conductive circuit layer, and exposing the third conductive circuit layer and the cover region Removing the protective layer; providing a second copper layer, and laminating the second copper on the surface of the third conductive circuit layer through a second adhesive layer, the second copper layer and the second The adhesive layers are all subjected to pre-window treatment to form a window opening area, the window opening area is located at the remaining protective layer; the protective layer at the window opening area is removed; and the second copper layer is formed The fifth conductive circuit layer.
  • a soft and hard circuit board includes: a first circuit board; a first adhesive layer adhered to the surface of the first circuit board; a first substrate adhered to the surface of the first adhesive layer.
  • the first substrate includes a second base layer pressed onto the surface of the first adhesive layer, a protective layer formed on the surface of the second base layer, and a third conductive circuit layer formed on the surface of the protective layer; A second adhesive layer bonded to the third conductive circuit layer; and a fifth conductive circuit layer bonded to the second adhesive layer;
  • the soft-hard circuit board includes a window opening area, At the window opening area, the protective layer, the third conductive circuit layer, the second adhesive layer and the fifth conductive circuit layer are all removed.
  • the second base layer at the window opening area is protected by a protective layer, and then the protective layer is removed, so that the second base layer is intact after the production is completed, which can be solved in black
  • the carbon and copper on the second base layer are damaged and other bad conditions can be effectively protected, and the circuit layer at the window area can be effectively protected.
  • the protective layer serves as a seed layer, which can improve the Copper effect. Compared with the traditional removal of the cover film in the open area, the process is saved and the efficiency is improved.
  • FIG. 1 is a schematic cross-sectional view of a first circuit board according to an embodiment of the present invention.
  • FIG. 2 is a schematic cross-sectional view of pressing the first substrate on the first circuit board shown in FIG. 1.
  • FIG. 3 is a schematic cross-sectional view of openings in the first circuit board and the first substrate shown in FIG. 2.
  • FIG. 4 is a schematic cross-sectional view of the hole in FIG. 3 by plating, filling, etching, and the like.
  • FIG. 5 is a schematic cross-sectional view of the bare protective layer shown in FIG. 4 being removed.
  • FIG. 6 is a schematic cross-sectional view of a semi-finished product in which a second copper layer is pressed on the first circuit board and the first substrate shown in FIG. 5 to form a hard-flex circuit board.
  • FIG. 7 is a schematic cross-sectional view of openings in the semi-finished circuit board of the rigid-flex circuit board shown in FIG. 6.
  • FIG. 8 is a schematic cross-sectional view of removing the protective layer at the window-opening area of the semi-finished circuit board of the hard and soft circuit board shown in FIG. 7.
  • FIG. 9 is a schematic cross-sectional view of forming a soft-hard circuit board by electroplating, etching, developing, removing film, and printing a solder mask process on the semi-finished product surface of the soft-hard circuit board shown in FIG. 8.
  • Hard and soft circuit board 100 First circuit board 10 First level 11 First conductive circuit layer 13 Second conductive circuit layer 15 First substrate 20 Second level twenty one The protective layer twenty three First copper layer 25 Third conductive circuit layer 251 Fourth conductive circuit layer 253 First receiving hole 26 First glue layer 30 First through hole 40 Dry film 50 Second copper layer 60 Fifth conductive circuit layer 61 Second receiving hole 62 Sixth conductive circuit layer 63 Second glue layer 70 Protective layer 80 Window area 101
  • a manufacturing method of a rigid-flex circuit board 100 includes the following steps:
  • a first circuit board 10 is provided.
  • the first circuit board 10 includes a flexible first base layer 11 and is formed on two opposite surfaces of the first base layer 11 and is electrically The first conductive circuit layer 13 and the second conductive circuit layer 15 are connected.
  • the material of the first base layer 11 can be selected from polyimide (PI), liquid crystal polymer (LCP), polyetheretherketone (PEEK), polyethylene terephthalate One of Polyethylene Terephthalate (PET) and Polyethylene Naphthalate (PEN).
  • PI polyimide
  • LCP liquid crystal polymer
  • PEEK polyetheretherketone
  • PET Polyethylene Terephthalate
  • PEN Polyethylene Naphthalate
  • the first conductive circuit layer 13 and the second conductive circuit layer 15 pass through two copper layers formed on two opposite surfaces of the first base layer 11 through drilling, copper plating, etching, lamination, exposure, and film removal process (Developping Etching Stripping (DES) is formed.
  • DES Developping Etching Stripping
  • Step S2 please refer to FIG. 2, two first substrates 20 are provided, and the two first substrates 20 are respectively pressed onto the two surfaces of the first circuit board 10 through the two first adhesive layers 30 .
  • the first substrate 20 includes a flexible second base layer 21 pressed onto the surface of the first adhesive layer 30, a protective layer 23 formed on the surface of the second base layer 21, and formed on the protective layer 23 The surface of the first copper layer 25.
  • the first adhesive layer 30 directly presses the first substrate 20 on both surfaces of the first circuit board 10, but it is not limited thereto. In other embodiments, the first adhesive layer 30 may only press the second base layer 21 on both surfaces of the first circuit board 10, and then may be sputtered on the second base layer 21
  • the protective layer 23 is formed by other methods, and finally a first copper layer 25 is formed on the surface of the protective layer 23.
  • the material of the second base layer 21 can be selected from polyimide (PI), liquid crystal polymer (LCP), polyetheretherketone (PEEK), polyethylene terephthalate One of Polyethylene Terephthalate (PET) and Polyethylene Naphthalate (PEN).
  • PI polyimide
  • LCP liquid crystal polymer
  • PEEK polyetheretherketone
  • PET Polyethylene Terephthalate
  • PEN Polyethylene Naphthalate
  • the material of the second base layer 21 is the same as the material of the first base layer 11.
  • the material of the protective layer 23 is Ni / Cr or Ti.
  • the material of the protective layer 23 can also be selected from Cu, Ag, Al, Zn, Sn, Fe, etc., as long as it is a material that can form a protective layer on the surface of the second base layer 21 by sputtering.
  • the material of the first adhesive layer 30 is a tacky resin. More specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenol resin, urea resin, melamine-formaldehyde resin And at least one of polyimide and the like.
  • Step S3 referring to FIG. 3, a hole-making process is performed on the laminated first circuit board 10 and the first substrate 20, and the first is opened along the lamination direction of the first substrate 20, the first adhesive layer 30 and the first circuit board 10
  • the through hole 40 defines a plurality of first accommodating holes 26 in the first substrate 20.
  • the first through hole 40 penetrates the two first substrates 20, the two first adhesive layers 30 and the first circuit board 10.
  • the first accommodating hole 26 is a blind hole, which penetrates the first substrate 20 and the first adhesive layer 30 and exposes the first circuit board 10.
  • the first through hole 40 and the at least two first receiving holes 26 are formed by laser. In other embodiments, the first through hole 40 and the at least two first receiving holes 26 may be formed by other methods, such as mechanical drilling, stamping and forming.
  • Step S4 a plating, etching, lamination, exposure, and stripping (DES) process is performed on the laminated first circuit board 10 and the first substrate 20 to make two first substrates
  • Two first copper layers 25 on 20 are respectively etched to form a third conductive circuit layer 251 and a fourth conductive circuit layer 253, and the first conductive circuit layer 13, the second conductive circuit layer 15, the third
  • the conductive circuit layer 251 and the fourth conductive circuit layer 253 are electrically connected to each other, while the third conductive circuit layer 251 and the fourth conductive circuit layer 253 are electrically connected to the first conductive circuit layer 13 or the second conductive circuit layer 15 respectively Sexual connection.
  • Step S5 referring to FIG. 5, the exposed protective layer 23 of the third conductive circuit layer 251 and the fourth conductive circuit layer 253 is partially covered with a dry film 50, etc., and the third conductive circuit layer 251 and the fourth conductive circuit layer 253 The remaining protective layer 23 exposed is removed, and then the dry film 50 is removed.
  • the dry film 50 is a peelable film.
  • the remaining remaining protective layer 23 is removed by etching.
  • Step S6 please refer to FIG. 6, two second copper layers 60 are provided, and the two second copper layers 60 are pressed against the third conductive circuit layer 251 and the second A semi-finished product of the hard and soft circuit board 100 is formed on the surface of the four conductive circuit layers 253. Both the second copper layer 60 and the two second adhesive layers 70 are pre-opened to form a window opening area 101 on the semi-finished product of the hard and soft circuit board 100, and the window opening area 101 is located on the The protective layer 23 after the film is covered.
  • the pre-window treatment of the second copper layer 60 and the two second adhesive layers 70 is performed by punching to form a window.
  • the pre-windowing treatment may be by other methods, such as mechanical drilling, laser, and the like.
  • the material of the second adhesive layer 70 is a tacky resin. More specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin And at least one of polyimide and the like.
  • Step S7 referring to FIG. 7, a hole-making process is performed on the semi-finished product of the soft-hard circuit board 100, a second accommodating hole 62 is opened in the second copper layer 60, and the soft-hard circuit board 100 Shadow processing is performed on semi-finished products.
  • the second accommodating hole 62 is a blind hole, which penetrates the second copper layer 60 and the second adhesive layer 70.
  • the second accommodating hole 62 is formed by laser. In other embodiments, the second accommodating hole 62 may be formed by other methods, such as mechanical drilling, stamping and forming.
  • step S8 referring to FIG. 8, the protective layer 23 at the window opening area 101 is removed.
  • the protective layer 23 of the window area 101 is removed after pressing. Therefore, there are features in the structure, that is, there is a protective layer 23 at the edge of the window area 101 to distinguish it from other circuit boards, such as removing the protective layer before pressing.
  • the protective layer 23 is removed by etching. In other embodiments, the protective layer 23 can be removed by other methods, such as laser, mechanical stripping and the like.
  • Step S9 please refer to FIG. 9, the electroplating, etching, lamination, exposure, stripping (DES) and printed solder resist processes are performed on the semi-finished products of the soft and hard circuit board 100, so that the two second
  • the copper layer 60 forms a fifth conductive circuit layer 61 and a sixth conductive circuit layer 63, respectively.
  • the fifth conductive circuit layer 61 and the sixth conductive circuit layer 63 are electrically connected to the third conductive circuit layer 251 or the fourth conductive circuit layer 253, respectively.
  • a protective layer 80 is formed outside the fifth conductive circuit layer 61 and the sixth conductive circuit layer 63.
  • the protective layer 80 may be a solder mask or a cover layer (CVL) commonly used in the industry.
  • CVL cover layer
  • a preferred embodiment of the present invention further provides a rigid-flex circuit board 100 including a first circuit board 10 and respectively bonded to the first circuit board through two first adhesive layers 30 10 Two first substrates 20 on two surfaces, and a fifth conductive circuit layer 61 and a sixth conductive circuit layer 63 that are respectively adhered to the corresponding one of the first substrates 20 through two second adhesive layers 70 and cover
  • the protective layer 80 on the outer side of the circuit board 100 is softly and rigidly combined.
  • the first circuit board 10 includes a flexible first base layer 11 and a first conductive circuit layer 13 and a second conductive circuit layer 15 that are respectively formed on two opposite surfaces of the first base layer 11 and are electrically connected.
  • the first substrate 20 includes a flexible second base layer 21 pressed onto the surface of the first adhesive layer 30, a protective layer 23 formed on the surface of the second base layer 21, and formed on the protective layer 23 The third conductive circuit layer 251 and the fourth conductive circuit layer 253 on the surface.
  • the first conductive circuit layer 13, the second conductive circuit layer 15, the third conductive circuit layer 251 and the fourth conductive circuit layer 253 are electrically connected to each other, and the third conductive circuit layer 251 and The fourth conductive circuit layer 253 is electrically connected to the first conductive circuit layer 13 or the second conductive circuit layer 15 respectively, and the fifth conductive circuit layer 61 and the sixth conductive circuit layer 63 are respectively connected to the third conductive circuit layer 251 or the third The four conductive circuit layers 253 are electrically connected.
  • the rigid-flex circuit board 100 includes a window area 101.
  • the protective layer 23, the third conductive circuit layer 251, the fourth conductive circuit layer 253, the second adhesive layer 70, the fifth conductive circuit layer 61 and the sixth conductive circuit layer 63 are all After being removed, the edge of the windowing area 101 is surrounded by a protective layer 23.
  • the second base layer 21 at the window area 101 is protected by the protective layer 23, and then the protective layer 23 is removed, so that the second base layer 21 is completed After the intact, it can solve the bad conditions such as damage to the carbon and copper on the second base layer 21 after the black shadow treatment, which can effectively protect the circuit layer at the window area 101.
  • the protective layer 21 serves as a seed layer
  • the copper-up effect of the first copper layer 25 on the second base layer 21 is improved. Compared with the traditional removal of the cover film (CVL) in the open area, the process is saved and the efficiency is improved.

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

一种软硬结合电路板的制作方法，其包括以下步骤：提供一第一线路板及一第一基板，并通过一第一胶层将第一基板压合于第一线路板的表面上，第一基板包括一压合于第一胶层表面的第二基层、形成于第二基层表面的一保护层及形成于保护层表面的一第一铜层；使得第一铜层形成第三导电线路层；对第三导电线路层裸露的保护层进行部分遮盖，将第三导电线路层及遮盖区裸露的保护层除去；提供一第二铜层，并通过一第二胶层将第二铜层压合于第三导电线路层的表面上，第二铜层及第二胶层均经过预开窗处理，形成开窗区，开窗区位于剩余保护层处；将开窗区处的保护层除去；及使得第二铜层形成第五导电线路层。本发明还提供一种软硬结合电路板。

Description

软硬结合电路板及其制作方法 技术领域
本发明涉及一种电路板及其制作方法，尤其涉及一种软硬结合电路板及其制作方法。
背景技术
近年来，电子产品被广泛应用在日常工作和生活中，软硬结合板相对一般硬性电路板+软板的设计，拥有薄、轻、易组装、电气信号传输、产品信赖度更佳等优点，随着消费性电子产品对于质量与轻薄短小的要求日趋严苛，电路板转采软硬结合板设计的比例也日渐增加。传统的软硬结合板或需开盖的多层FPC产品，在开盖区通常需贴一层CVL来保护内层线路，但是这样会增加CVL的冲型、贴、压合、烘烤等制程，制作成本上升，并且开盖区外露的聚酰亚胺(PI)材质在金属化过黑影上碳或化铜时，致密性差，会导致铜皮破损。
发明内容
有鉴于此，有必要提供一种能解决上述问题的软硬结合电路板的制作方法。
还提供一种上述制作方法制作的软硬结合电路板。
一种软硬结合电路板的制作方法，其包括以下步骤：提供一第一线路板及一第一基板，并通过一第一胶层将所述第一基板压合于所述第一线路板的表面上，所述第一基板包括一压合于所述第一胶层表面的第二基层、形成于所述第二基层表面的一保护层及形成于所述保护层表面的一第一铜层；使得所述第一铜层形成第三导电线路层；对所述第三导电线路层裸露的所述保护层进行部分遮盖，将所述第三导电线路层及遮盖区裸露的所述保护层除去；提供一第二铜层，并通过一第二胶层将所述第二铜层压合于所述第三导电线 路层的表面上，所述第二铜层及所述第二胶层均经过预开窗处理，形成开窗区，所述开窗区位于剩余所述保护层处；将所述开窗区处的所述保护层除去；及使得所述第二铜层形成第五导电线路层。
一种软硬结合电路板，包括：一第一线路板；粘合于所述第一线路板表面的一第一胶层；粘合于所述第一胶层表面的一第一基板，所述第一基板包括一压合于所述第一胶层表面的第二基层、形成于所述第二基层表面的一保护层及形成于所述保护层表面的一第三导电线路层；粘合于所述第三导电线路层外的一第二胶层；及粘合于所述第二胶层外的一第五导电线路层；所述软硬结合电路板包括一个开窗区，在所述开窗区处所述保护层、所述第三导电线路层、所述第二胶层及所述第五导电线路层均被除去。
本发明的软硬结合电路板，在黑影处理时，开窗区处的第二基层通过保护层进行保护，随后将保护层除去，从而使得第二基层在制作完成后完好，可解决在黑影处理后，第二基层上碳、化铜出现破损等不良的状况，进而能够有效地保护开窗区处的线路层，同时保护层作为种子层，可提高第二基层上第一铜层的上铜效果。与传统的开盖区贴覆盖膜再除去相比，节省了流程，提高了效率。
附图说明
图1是本发明一实施方式的第一线路板的剖视示意图。
图2是在图1所示的第一线路板上压合第一基板的剖视示意图。
图3是在图2所示的第一线路板及第一基板上开孔的剖视示意图。
图4是对图3中的开孔进行电镀填孔及蚀刻等的剖视示意图。
图5是对图4所示的裸露的保护层进行除去的剖视示意图。
图6是在图5所示第一线路板及第一基板上压合第二铜层形成软硬结合电路板的半成品的剖视示意图。
图7是在图6所示软硬结合电路板的半成品上开孔的剖视示意图。
图8是对图7所示软硬结合电路板的半成品开窗区处的保护层进行除去的剖视示意图。
图9是在图8所示软硬结合电路板的半成品表面进行电镀、蚀刻、显影、去膜、印刷防焊制程形成软硬结合电路板的剖视示意图。
主要元件符号说明
软硬结合电路板 100
第一线路板 10
第一基层 11
第一导电线路层 13
第二导电线路层 15
第一基板 20
第二基层 21
保护层 23
第一铜层 25
第三导电线路层 251
第四导电线路层 253
第一容置孔 26
第一胶层 30
第一通孔 40
干膜 50
第二铜层 60
第五导电线路层 61
第二容置孔 62
第六导电线路层 63
第二胶层 70
防护层 80
开窗区 101
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另有定义，本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本发明。
下面结合附图，对本发明的一些实施方式作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
请参阅图1至图9，本发明一实施方式中软硬结合电路板100的制作方法，其包括以下步骤：
步骤S1，请参阅图1，提供一第一线路板10，所述第一线路板10包括一可挠性的第一基层11及分别形成于所述第一基层11两相对表面上且电性连接的第一导电线路层13与第二导电线路层15。
所述第一基层11的材质可选自聚酰亚胺(polyimide，PI)、液晶聚合物(liquid crystal polymer，LCP)、聚醚醚酮(polyetheretherketone，PEEK)、聚对苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)以及聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)等中的一种。
所述第一导电线路层13与第二导电线路层15通过形成于第一基层11两相对表面上的两层铜层经过钻孔、镀铜、蚀刻、压膜、曝光、去膜制程(Developping Etching Stripping，DES)形成。
步骤S2，请参阅图2，提供两个第一基板20，并通过两个第一胶层30将所述两个第一基板20分别压合于所述第一线路板10的两个表面上。
所述第一基板20包括一压合于所述第一胶层30表面的可挠性的第二基层21、形成于所述第二基层21表面的保护层23及形成于所述保护层23表面的第一铜层25。
在本实施方式中，第一胶层30直接将所述第一基板20压合于所述第一线路板10的两个表面上，但不限于此。在其他实施例中，所述第一胶层30也可只将所述第二基层21压合于所述第一线路板10的两个表面上，然后可在第二基层21上通过溅射等方式形成保护层23，最后在所述保护层23表面形成第一铜层25。
所述第二基层21的材质可选自聚酰亚胺(polyimide，PI)、液晶聚合物(liquid crystal polymer，LCP)、聚醚醚酮(polyetheretherketone，PEEK)、聚对苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)以及聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)等中的一种。本实施例中，所述第二基层21的材质与所述第一基层11的材质相同。
本实施方式中，所述保护层23的材质为Ni/Cr或Ti。所述保护层23的材质还可选自Cu、Ag、Al、Zn、Sn、Fe等，只要是能够通过溅射在第二基层21的表面形成保护层的材料都可以。
在本实施方式中，所述第一胶层30的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
步骤S3，请参阅图3，对压合的第一线路板10及第一基板20进行开孔制程，沿第一基板20、第一胶层30及第一线路板10的层叠方向开设第一通孔40，在第一基板20上开设多个第一容置孔26。所述第一通孔40贯穿两个所述第一基板20、两个第一胶层30及第一线路板10。所述第一容置孔26为一盲孔，其贯穿所述第一基板20及第一胶层30并暴露第一线路板10。
在本实施方式中，所述第一通孔40及至少两个第一容置孔26通过镭射形成。在其他实施方式中，所述第一通孔40及至少两个第一容置孔26可通过其他方式形成，如机械钻孔、冲压成型等。
步骤S4，请参阅图4，对压合的第一线路板10及第一基板20进行电镀、蚀刻、压膜、曝光、去膜制程(Developping Etching Stripping，DES)制程，使得两个第一基板20上的两个第一铜层25分别蚀刻形成第三导电线路层 251及第四导电线路层253，并且所述第一导电线路层13、所述第二导电线路层15、所述第三导电线路层251及所述第四导电线路层253相互电性连接，同时所述第三导电线路层251及第四导电线路层253分别与第一导电线路层13或第二导电线路层15电性连接。
步骤S5，请参阅图5，采用干膜50等对第三导电线路层251及第四导电线路层253裸露的保护层23进行部分遮盖，并对第三导电线路层251及第四导电线路层253裸露的剩余保护层23进行除去，随后将所述干膜50移除。
在本实施方式中，所述干膜50为一可剥离型膜。
在本实施方式中，通过蚀刻方式将裸露的剩余保护层23除去。
步骤S6，请参阅图6，提供两个第二铜层60，并通过两个第二胶层70将所述两个第二铜层60分别压合于所述第三导电线路层251及第四导电线路层253的表面上形成软硬结合电路板100的半成品。所述第二铜层60及两个第二胶层70均经过预开窗处理，在所述软硬结合电路板100的半成品上形成开窗区101，所述开窗区101位于所述干膜覆盖后的所述保护层23处。
在本实施方式中，所述第二铜层60及两个第二胶层70的预开窗处理通过冲压成型开窗。在其他实施方式中，所述预开窗处理可通过其他方式，如机械钻孔、镭射等。
在本实施方式中，所述第二胶层70的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
步骤S7，请参阅图7，对所述软硬结合电路板100的半成品进行开孔制程，在第二铜层60上开设第二容置孔62，并在所述软硬结合电路板100的半成品上进行黑影处理。所述第二容置孔62为一盲孔，其贯穿所述第二铜层60及第二胶层70。
在本实施方式中，所述第二容置孔62通过镭射形成。在其他实施方式 中，所述第二容置孔62可通过其他方式形成，如机械钻孔、冲压成型等。
在所述软硬结合电路板100的半成品上进行黑影处理时，所述保护层23的外侧会上碳。
步骤S8，请参阅图8，对所述开窗区101处的所述保护层23进行除去。
开窗区101的保护层23在压合后去除，因此，在结构上会有特征即开窗区101边缘会有保护层23，以区别于其他电路板，如压合前去除保护层等。
在本实施方式中，所述保护层23通过蚀刻除去。在其他实施方式中，所述保护层23可通过其他方式除去，如激光、机械剥除等。
步骤S9，请参阅图9，对所述软硬结合电路板100的半成品进行电镀、蚀刻、压膜、曝光、去膜制程(Developping Etching Stripping，DES)及印刷防焊制程，使得两个第二铜层60分别形成第五导电线路层61及第六导电线路层63，所述第五导电线路层61及第六导电线路层63分别与第三导电线路层251或第四导电线路层253电性连接，并且在所述第五导电线路层61及第六导电线路层63外形成一防护层80。
在本实施例中，所述防护层80可为一业界常用的阻焊层(solder mask)或一覆盖膜(cover layer，即CVL)。
请参阅图9，本发明一较佳实施方式还提供一种软硬结合电路板100，其包括一第一线路板10、通过两个第一胶层30分别粘合于所述第一线路板10两个表面的两个第一基板20、通过两个第二胶层70分别粘合于相应的一个所述第一基板20外的第五导电线路层61与第六导电线路层63及覆盖于软硬结合电路板100外侧的防护层80。
所述第一线路板10包括一可挠性的第一基层11及分别形成于所述第一基层11两相对表面上且电性连接的第一导电线路层13与第二导电线路层15。
所述第一基板20包括一压合于所述第一胶层30表面的可挠性的第二基层21、形成于所述第二基层21表面的保护层23及形成于所述保护层23表面的第三导电线路层251及第四导电线路层253。
所述第一导电线路层13、所述第二导电线路层15、所述第三导电线路层251及所述第四导电线路层253相互电性连接，且所述第三导电线路层251及第四导电线路层253分别与第一导电线路层13或第二导电线路层15电性连接，所述第五导电线路层61及第六导电线路层63分别与第三导电线路层251或第四导电线路层253电性连接。
所述软硬结合电路板100包括一个开窗区101。在所述开窗区101处所述保护层23、所述第三导电线路层251、第四导电线路层253、第二胶层70、第五导电线路层61及第六导电线路层63均被除去，所述开窗区101边缘有保护层23环绕。
本发明提供的软硬结合电路板100，在黑影处理时，开窗区101处的第二基层21通过保护层23进行保护，随后将保护层23除去，从而使得第二基层21在制作完成后完好，可解决在黑影处理后，第二基层21上碳、化铜出现破损等不良的状况，进而能够有效地保护开窗区101处的线路层，同时保护层21作为种子层，可提高第二基层21上第一铜层25的上铜效果。与传统的开盖区贴覆盖膜(CVL)再除去相比，节省了流程，提高了效率。
以上所述，仅是本发明的较佳实施方式而已，并非对本发明任何形式上的限制，虽然本发明已是较佳实施方式揭露如上，并非用以限定本发明，任何熟悉本专业的技术人员，在不脱离本发明技术方案范围内，当可利用上述揭示的技术内容做出些许更动或修饰为等同变化的等效实施方式，但凡是未脱离本发明技术方案内容，依据本发明的技术实质对以上实施方式所做的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (10)

  1. 一种软硬结合电路板的制作方法，其包括以下步骤：
    提供一第一线路板及一第一基板，并通过一第一胶层将所述第一基板压合于所述第一线路板的表面上，所述第一基板包括一压合于所述第一胶层表面的第二基层、形成于所述第二基层表面的一保护层及形成于所述保护层表面的一第一铜层；
    使得所述第一铜层形成第三导电线路层；
    对所述第三导电线路层裸露的所述保护层进行部分遮盖，将所述第三导电线路层及遮盖区裸露的所述保护层除去；
    提供一第二铜层，并通过一第二胶层将所述第二铜层压合于所述第三导电线路层的表面上，所述第二铜层及所述第二胶层均经过预开窗处理，形成开窗区，所述开窗区位于剩余所述保护层处；
    将所述开窗区处的所述保护层除去；及
    使得所述第二铜层形成第五导电线路层。
  2. 如权利要求1所述的软硬结合电路板的制作方法，其特征在于，使得所述第一铜层形成第三导电线路层包括：对压合的所述第一线路板及所述第一基板进行开孔制程，在所述第一基板上开设第一通孔及多个第一容置孔，所述第一通孔贯穿两个所述第一基板、两个所述第一胶层及所述第一线路板，所述第一容置孔贯穿所述第一基板及所述第一胶层并暴露所述第一线路板；对所述第一基板进行电镀、蚀刻制程，使得所述第一基板上的所述第一铜层蚀刻形成第三导电线路层，并且所述第一线路板及所述第三导电线路层相互电性连接。
  3. 如权利要求1所述的软硬结合电路板的制作方法，其特征在于，在将所述开窗区处的所述保护层除去的步骤之前还包括：进行开孔制程，在所述第二铜层上开设第二容置孔，所述第二容置孔贯穿所述第二铜层及所述第二胶层；并进行黑影处理。
  4. 如权利要求1所述的软硬结合电路板的制作方法，其特征在于，所述 第一线路板包括一第一基层及分别形成于所述第一基层两相对表面上且电性连接的第一导电线路层与第二导电线路层。
  5. 如权利要求1所述的软硬结合电路板的制作方法，其特征在于，对所述第三导电线路层裸露的所述保护层进行部分遮盖，将所述第三导电线路层及遮盖区裸露的所述保护层除去包括：采用干膜对所述第三导电线路层裸露的所述保护层进行部分遮盖，对所述第三导电线路层及遮盖区裸露的所述保护层进行除去，并将所述干膜移除。
  6. 如权利要求1所述的软硬结合电路板的制作方法，其特征在于，所述保护层的材质选自Ni、Cr、Ti、Cu、Ag、Al、Zn、Sn、Fe中的一种。
  7. 一种软硬结合电路板，包括：
    一第一线路板；
    粘合于所述第一线路板表面的一第一胶层；
    粘合于所述第一胶层表面的一第一基板，所述第一基板包括一压合于所述第一胶层表面的第二基层、形成于所述第二基层表面的一保护层及形成于所述保护层表面的一第三导电线路层；
    粘合于所述第三导电线路层外的一第二胶层；及
    粘合于所述第二胶层外的一第五导电线路层；
    所述软硬结合电路板包括一个开窗区，在所述开窗区处所述保护层、所述第三导电线路层、所述第二胶层及所述第五导电线路层均被除去。
  8. 如权利要求7所述的软硬结合电路板，其特征在于，所述保护层的材质选自Ni、Cr、Ti、Cu、Ag、Al、Zn、Sn、Fe中的一种。
  9. 如权利要求7所述的软硬结合电路板，其特征在于，所述第一线路板包括一第一基层及分别形成于所述第一基层两相对表面上且电性连接的第一导电线路层与第二导电线路层。
  10. 如权利要求7所述的软硬结合电路板，其特征在于，所述软硬结合电路板还包括覆盖于所述第五导电线路层外侧的防护层。
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