WO2020077704A1 - 一种显示面板及其制作方法 - Google Patents

一种显示面板及其制作方法 Download PDF

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Publication number
WO2020077704A1
WO2020077704A1 PCT/CN2018/114369 CN2018114369W WO2020077704A1 WO 2020077704 A1 WO2020077704 A1 WO 2020077704A1 CN 2018114369 W CN2018114369 W CN 2018114369W WO 2020077704 A1 WO2020077704 A1 WO 2020077704A1
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Prior art keywords
layer
substrate
via hole
pattern
display panel
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Ceased
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PCT/CN2018/114369
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English (en)
French (fr)
Inventor
卜呈浩
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/326,203 priority Critical patent/US11349104B2/en
Publication of WO2020077704A1 publication Critical patent/WO2020077704A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to the field of display, in particular to a display panel and a method of manufacturing the same.
  • OLED Organic Light-Emitting Diode
  • LCD Liquid crystal displays
  • OLED has the advantages of more power saving, thinner, and wide viewing angle, which is unmatched by LCD. At present, people have higher requirements on the screen ratio of the display panel.
  • the display panels on the market mainly focus on static edge bending, that is, only the edges of the display panel are bent with a fixed radius of curvature, and the display area is not bent, which cannot achieve dynamic bending in the true sense. Therefore, it is necessary to optimize the design of the display panel so that the screen can be truly flexible, bendable and curlable; furthermore, how to design the etching process of the main vias in the display panel also needs to be optimized.
  • the etching process of the main via hole in the existing display panel is a relatively complicated problem.
  • a method for manufacturing a display panel including:
  • Step S10 Provide a substrate, and sequentially form a water-oxygen barrier layer, a buffer layer, an active layer, a first gate insulating layer, a first gate layer, a second gate insulating layer, and a second gate on the substrate Layers and interlayer dielectric layers to form a first substrate including a display area and a non-display area;
  • Step S20 a first via hole is formed in the non-display area of the first substrate, and a second via hole is formed in the display area of the first substrate, the first via hole contacts the substrate and penetrates the partition Film layers other than the substrate, the second via hole is in contact with the water-oxygen barrier layer and penetrates other film layers except the substrate and the water-oxygen barrier layer;
  • Step S30 Fill the first via hole and the second via hole with a flexible material to form a flexible layer located in the first via hole and a stress relief unit located in the second via hole, respectively;
  • Step S40 forming a third via hole in the display area of the first substrate, the third via hole being in contact with the active layer;
  • Step S50 forming a metal layer on the interlayer dielectric layer, the metal layer filling the third via hole.
  • the first via includes a first region of the first via and a second region of the first via that overlap each other.
  • the step S20 includes:
  • Step S201 Perform a yellow light process using a first photomask to form the first area of the first via hole in the non-display area of the first substrate, the pattern of the first photomask and the first photomask Match the pattern of the first area of the hole;
  • Step S202 performing a yellow light process using a second photomask to form a second area of the first via in the first via, thereby forming a first via, the pattern of the second photomask and the The pattern of the second area of the first via hole matches;
  • Step S203 Perform a yellow light process using a third photomask to form a second via in the display area of the first substrate, and the pattern of the third photomask matches the pattern of the second via.
  • the step S20 includes:
  • Step S201 Perform a yellow light process using a first photomask to form the first area of the first via hole in the non-display area of the first substrate, the pattern of the first photomask and the first photomask Match the pattern of the first area of the hole;
  • Step S202 using a fourth photomask to perform a yellow light process to form a second region of the first via in the first region of the first via, while forming a second region in the display region of the first substrate Vias, the pattern of the fourth photomask matches the pattern of the second area of the first via and the pattern of the second via.
  • the step S40 includes: performing a yellow light process using a fifth photomask to form a third via hole in the display area of the first substrate, the fifth photomask and the The pattern of the third via hole matches.
  • a method for manufacturing a display panel including:
  • Step S10 Provide a substrate, and sequentially form a water-oxygen barrier layer, a buffer layer, an active layer, a first gate insulating layer, a first gate layer, a second gate insulating layer, and a second gate on the substrate Layers and interlayer dielectric layers to form a first substrate including a display area and a non-display area;
  • Step S20 forming a first via hole in the non-display area of the first substrate, a second via hole and a third via hole in the display area of the first substrate, the first via hole being in contact with the substrate And penetrates other film layers except the substrate , the second via is in contact with the water and oxygen barrier layer and penetrates other film layers except the substrate and the water and oxygen barrier layer, the first Three vias are in contact with the active layer;
  • Step S30 Fill a flexible material in the first via and the second via to form a flexible layer in the first via and a stress relief unit in the second via, respectively;
  • Step S40 forming a metal layer on the interlayer dielectric layer, the metal layer filling the third via hole;
  • the first via hole, the second via hole and the third via hole are prepared by gas etching, and the etching gas includes hydrogen gas.
  • the first via includes a first region of the first via and a second region of the first via that overlap each other.
  • the step S20 includes:
  • Step S201 Perform a yellow light process using a first photomask to form the first area of the first via hole in the non-display area of the first substrate, the pattern of the first photomask and the first photomask Match the pattern of the first area of the hole;
  • Step S202 using a sixth photomask to perform a yellow light process to form a second region of the first via in the first region of the first via, and at the same time form a second region in the display region of the first substrate
  • the pattern of the sixth photomask matches the pattern of the second region of the first via hole, the pattern of the second via hole, and the pattern of the third via hole.
  • the step S20 includes: performing a yellow light process using a seventh photomask to form a first via hole, a second via hole and a third via hole on the first substrate.
  • the pattern of the seventh photomask matches the pattern of the first via, the pattern of the second via, and the pattern of the third via.
  • the substrate is a flexible substrate
  • the preparation material of the flexible substrate is polyimide
  • a dry etching process is used to form the first via.
  • the second via hole is located between the pixel units in the display area, and is separated from the functional device in the display area.
  • the flexible material is an organic material.
  • it further includes forming a planarization layer, an anode layer, a pixel definition layer, and a support layer on the metal layer.
  • a display panel includes a display area and a non-display area provided at the periphery of the display area.
  • the display panel includes: a substrate and a barrier that are sequentially stacked Water-oxygen layer, buffer layer, active layer, first gate insulating layer, first gate layer, second gate insulating layer, second gate layer, interlayer dielectric layer, and those provided in the display area of the display panel A metal layer and a stress relief unit, a flexible layer provided in the non-display area of the display panel;
  • the metal layer is disposed on the interlayer dielectric layer, and contacts the active layer through a third via
  • the stress relief unit is disposed in the second via
  • the flexible layer is disposed on the In a via hole
  • the first via hole contacts the substrate and penetrates other film layers except the substrate
  • the second via hole contacts the water and oxygen barrier layer and penetrates the substrate Other than the bottom layer and the water and oxygen barrier layer.
  • the substrate is a flexible substrate
  • the preparation material of the flexible substrate is polyimide
  • the first via hole is formed by a dry etching process.
  • the second via hole is located between the pixel units in the display area, and is separated from the functional device in the display area.
  • the flexible material is an organic material.
  • it further includes a planarization layer, an anode layer, a pixel definition layer, and a support layer formed on the metal layer.
  • This application provides a display panel and a manufacturing method thereof.
  • different etching schemes can be selected according to actual needs during the preparation of vias in the display panel, The use times of the photomask are reduced, and the manufacturing process of the display panel is simplified.
  • FIG. 1 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of the application
  • 2a-2g are schematic structural diagrams of a method for manufacturing a display panel provided by an embodiment of this application.
  • 3a-3b are schematic structural diagrams of step S20 in a method for manufacturing a display panel according to another embodiment of the present application.
  • FIG. 4 is a schematic flowchart of a method for manufacturing a display panel according to another embodiment of the application.
  • 5a-5d are schematic structural diagrams of a method for manufacturing a display panel provided by yet another embodiment of the present application.
  • step S20 is a schematic structural diagram of step S20 in a method for manufacturing a display panel according to still another embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a display panel according to yet another embodiment of the present application.
  • FIG. 1 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of the present application.
  • 2a-2g are schematic structural diagrams of a method for manufacturing a display panel according to an embodiment of the present application. This application provides a method for manufacturing a display panel. include:
  • a substrate 11 is provided, on which a water-oxygen barrier layer 12, a buffer layer 13, an active layer 14, a first gate insulating layer 15 and a first gate layer are formed in this order 16.
  • the substrate 11 is a flexible substrate, and the flexible substrate is made of polyimide.
  • the step S10 includes: providing a substrate 11 on which a water vapor and oxygen barrier layer 12 with a thickness of 5000 angstroms and a buffer layer with a thickness of 3500 angstroms are sequentially formed using physical vapor deposition technology 13.
  • the preparation material of the buffer layer 13 is at least one of silicon nitride and silicon oxide.
  • An amorphous silicon layer with a thickness of 500 angstroms is formed on the buffer layer 13, and the amorphous silicon layer is subjected to a laser annealing process, exposure, development, and etching to form an active layer 14.
  • a first gate insulating layer 15 with a thickness of 1000 angstroms is formed on the active layer 14 using physical vapor deposition technology.
  • a gate metal with a thickness of 2500 angstroms is formed on the first gate insulating layer 15 by a sputtering process, and the gate metal is exposed and etched to form the first gate layer 16.
  • a second gate insulating layer 17 is formed on the first gate layer 16 using physical vapor deposition technology, and the second gate insulating layer 17 may be made of silicon nitride.
  • a gate metal is formed on the second gate insulating layer 17 using a sputtering process, and the gate metal is exposed and etched to form the second gate layer 18. Subsequently, an interlayer dielectric layer 19 with a thickness of 5000 angstroms is formed on the second gate layer 18 using physical vapor deposition technology.
  • Step S20 Form a first via 20 in the non-display area b of the first substrate A, and form a second via 21 in the display area a of the first substrate A.
  • the first via 20 and the The substrate 11 is in contact with and penetrates other film layers except the substrate 11
  • the second via hole 21 is in contact with the water and oxygen barrier layer 12 and penetrates the substrate 11 and the water and oxygen barrier layer Film layers other than 12.
  • the first via hole 20 includes a first via hole first region 20a and a first via hole second region 20b that are superimposed on each other.
  • the step S20 includes:
  • step S201 a first photomask is used to perform a yellow light process to form the first via first area 20a in the non-display area a of the first substrate A, the first photomask The pattern of matches the pattern of the first region 20a of the first via.
  • a dry etching process is used to form the first via first region 20a.
  • the target depth of the first region 20a of the first via is 6000 angstroms to 9000 angstroms.
  • step S202 using a second photomask to perform a yellow light process to form a first via second region 20b in the first via 20, and then form a first via 20, the first
  • the pattern of the two masks matches the pattern of the second region 20b of the first via.
  • dry etching is used to etch all the inorganic film layers within the second region 20b of the first via hole to form the first via hole 20 in contact with the substrate 11
  • the first via 20 is in contact with the substrate 11 and penetrates other film layers except the substrate 11.
  • step S203 a third photomask is used for yellow light processing to form a second via 21 in the display area a of the first substrate A, the pattern of the third photomask and the first The patterns of the two vias 21 match.
  • the second via 21 is located between the pixel units in the display area a and is separated from the functional device in the display area, and the second via 21 is filled with a flexible material to relieve the display panel Bending stress experienced during bending.
  • the step S20 includes:
  • a first photomask is used to perform a yellow light process to form the first via first area 20a in the non-display area a of the first substrate A.
  • the first photomask The pattern of matches the pattern of the first region 20a of the first via.
  • the fourth photomask is processed with a yellow light process to form the first via second area 20b in the first via first area 20a and at the same time in the display area a of the first substrate A
  • a second via 21 is formed, and the pattern of the fifth photomask matches the pattern of the second region 20b of the first via and the pattern of the second via 21.
  • the second embodiment uses a mask to form the first via hole second region 20b and the second via hole 21, which can achieve the effect of saving one mask.
  • step S30 filling the first via 20 and the second via 21 with a flexible material to form the flexible layer 22 in the first via 20 and the second via 21, respectively ⁇ ⁇ Stressrelease unit 23.
  • the flexible material is an organic material.
  • a third via 24 is formed in the display area a of the first substrate A, and the third via 24 is in contact with the active layer 14.
  • the target depth of the third via 24 may be the total thickness of the interlayer dielectric layer 19, the second gate insulating layer 17, and the first gate insulating layer 15.
  • a metal layer 25 is formed on the interlayer dielectric layer, and the metal layer 25 fills the third via 24.
  • the manufacturing method of the display panel further includes: forming a planarization layer, an anode layer, a pixel definition layer, and a support layer on the metal layer.
  • a method for manufacturing a display panel is also proposed, please refer to FIGS. 4 and 5a-5d.
  • the manufacturing method of the display panel shown includes:
  • a substrate 11 is provided, on which a water-oxygen barrier layer 12, a buffer layer 13, an active layer 14, a first gate insulating layer 15, and a first gate layer are formed in this order 16.
  • the step S10 includes: providing a substrate 11 on which a water vapor and oxygen barrier layer 12 with a thickness of 5000 angstroms and a buffer layer with a thickness of 3500 angstroms are sequentially formed using physical vapor deposition technology 13.
  • the preparation material of the buffer layer 13 is at least one of silicon nitride and silicon oxide.
  • An amorphous silicon layer with a thickness of 500 angstroms is formed on the buffer layer 13, and the amorphous silicon layer is subjected to a laser annealing process, exposure, development, and etching to form an active layer 14.
  • a first gate insulating layer 15 with a thickness of 1000 angstroms is formed on the active layer 14 using physical vapor deposition technology.
  • a gate metal with a thickness of 2500 angstroms is formed on the first gate insulating layer 15 by a sputtering process, and the gate metal is exposed and etched to form the first gate layer 16.
  • a second gate insulating layer 17 is formed on the first gate layer 16 using physical vapor deposition technology, and the second gate insulating layer 17 may be made of silicon nitride.
  • a gate metal is formed on the second gate insulating layer 17 using a sputtering process, and the gate metal is exposed and etched to form the second gate layer 18. Subsequently, an interlayer dielectric layer 19 with a thickness of 5000 angstroms is formed on the second gate layer 18 using physical vapor deposition technology.
  • step S20 forming a first via 20 in the non-display area b of the first substrate A, and forming a second via 21 and a third via in the display area a of the first substrate A 24.
  • the first via hole 20 is in contact with the substrate 11 and penetrates other film layers except the substrate 11
  • the second via hole 21 is in contact with the water and oxygen barrier layer 12 and penetrates
  • the third via 24 is in contact with the active layer 14.
  • step S20 includes:
  • step S201 a yellow mask process is performed using a first photomask to form the first via first area 20a in the non-display area a of the first substrate A, the first photomask The pattern of matches the pattern of the first region 20a of the first via;
  • a sixth mask is used to perform a yellow light process to form the first via second region 20b in the first via first region 20a, and at the same time in the first A second via hole 21 and a third via hole 24 are formed in the display area a of the substrate A, the pattern of the sixth photomask and the pattern of the first via hole second area 20b, the pattern of the second via hole 21 The pattern and the pattern of the third via 24 match.
  • the first via second region 20b, the second via 21 and the third via 24 are prepared in the same mask process, which can save two masks Process.
  • the step S20 includes: performing a yellow light process using a seventh photomask to form the first via 20, the second via 21, and the third via in the first substrate A 24.
  • the pattern of the seventh photomask matches the pattern of the first via 20, the pattern of the second via 21, and the pattern of the third via 24.
  • the first via 20, the second via 21, and the third via 24 are prepared by one mask process, which can save three mask processes , But the first via 21 does not form a step.
  • step S30 the first via hole 20 and the second via hole 21 are filled with a flexible material to form a flexible layer 22 located in the first via hole 20 and a The stress relief unit 23 in the second via 21.
  • step S40 forming a metal layer 25 on the interlayer dielectric layer 19, the metal layer 25 fills the third via 24
  • the first via hole 20, the second via hole 21 and the third via hole 24 are prepared by gas etching, and the etching gas includes hydrogen gas.
  • the etching gas includes hydrogen gas.
  • the contacting method between the metal layer 25 and the active layer 14 may be either surface contact or side contact.
  • the contact method between the metal layer 25 and the active layer 14 depends on the depth of the third via 24.
  • the first via hole 20 includes a first via hole first region 20a and a first via hole second region 20b that are superimposed on each other.
  • a display panel is also provided.
  • the display panel includes a display area a and a non-display area b disposed around the display area a.
  • the display panel includes a substrate 11, a water-oxygen barrier layer 12, a buffer layer 13, an active layer 14, a first gate insulating layer 15, a first gate layer 16, and a second gate insulating layer 17 stacked in this order.
  • the second gate layer 18, the interlayer dielectric layer 19, and the metal layer 25 and the stress relief unit 23 provided in the display area a of the display panel are provided in the flexible layer 22 of the display panel non-display area b.
  • the metal layer 25 is disposed on the interlayer dielectric layer 19, and contacts the active layer 14 through the third via 24, and the stress relief unit 23 is disposed in the second via 21
  • the flexible layer 22 is disposed in the first via 20, the first via 20 is in contact with the substrate 11 and penetrates other film layers except the substrate 11 , the second via 21 It is in contact with the water and oxygen barrier layer 12 and penetrates other film layers except the substrate 11 and the water and oxygen barrier layer 12.
  • the present application provides a display panel and a manufacturing method thereof.
  • various methods for preparing vias in a display panel different etching schemes are selected according to actual needs during the preparation of vias in the display panel, thereby reducing light

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  • Electroluminescent Light Sources (AREA)

Abstract

本申请提出了一种显示面板及其制作方法。所述显示面板的制作方法包括提供一衬底，在所述衬底上依次形成其它膜层。形成第一过孔、第二过孔和第三过孔。在所述第一过孔和所述第二过孔内填充柔性材料以分别形成柔性层和应力释放单元。在所述层间介质层上形成将所述第三过孔填充的金属层。

Description

一种显示面板及其制作方法 技术领域
本申请涉及显示领域，特别涉及一种显示面板及其制作方法。
 背景技术
在平板显示技术中，有机发光二极管（Organic Light-Emitting Diode，OLED）显示器具有轻薄、主动发光、响应速度快、可视角大、色域宽、亮度高和功耗低等众多优点，逐渐成为继液晶显示器后的第三代显示技术。相对于液晶显示器（Liquid crystal displays，LCD），OLED具有更省电，更薄，且视角宽的优势，这是LCD无法比拟的。目前，人们对显示面板的屏占比有了更高的要求。
目前市场上的显示面板主要以静态边缘弯曲为主，即只有显示面板的边缘以固定曲率半径弯折，显示区域并未进行弯折，不能达到真正意义上的可动态弯折。因此，有必要对显示面板进行优化设计，使得屏幕能够达到真正意义上的柔性化、可弯折化以及可卷曲化；再者，如何设计显示面板内主要过孔的刻蚀工艺也是需要优化的重要问题之一。
为了解决上述问题，目前亟需一种显示面板及其制作方法。
 技术问题
现有显示面板内主要过孔的蚀刻工艺相对复杂的问题。
 技术解决方案
为实现上述目的，本申请提供的技术方案如下：
根据本申请的一个方面，提供了一种显示面板的制作方法，包括：
步骤S10、提供一衬底，在所述衬底上依次形成阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以形成包括显示区域和非显示区域的第一基板；
步骤S20、在所述第一基板的非显示区域形成第一过孔，在所述第一基板的显示区域形成第二过孔，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层；
步骤S30、在所述第一过孔和所述第二过孔内填充柔性材料，以分别形成位于第一过孔内的柔性层和位于第二过孔内的应力释放单元；
步骤S40、在所述第一基板的显示区域形成第三过孔，所述第三过孔与所述有源层接触；
步骤S50、在所述层间介质层上形成金属层，所述金属层将所述第三过孔填充。
根据本申请一种实施例，所述第一过孔包括相互叠加的第一过孔第一区域和第一过孔第二区域。
根据本申请一种实施例，所述步骤S20包括：
步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
步骤S202、使用第二光罩进行黄光工艺处理，以在所述第一过孔内形成第一过孔第二区域，进而形成第一过孔，所述第二光罩的图案与所述第一过孔第二区域的图案相匹配；
步骤S203、使用第三光罩进行黄光工艺处理，以在所述第一基板的显示区域形成第二过孔，所述第三光罩的图案与所述第二过孔的图案相匹配。
根据本申请一种实施例，所述步骤S20包括：
步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
步骤S202、使用第四光罩进行黄光工艺处理，以在所述第一过孔第一区域内形成所述第一过孔第二区域，同时在所述第一基板的显示区域形成第二过孔，所述第四光罩的图案与所述第一过孔第二区域的图案以及所述第二过孔的图案相匹配。
根据本申请一种实施例，所述步骤S40包括：使用第五光罩进行黄光工艺处理，以在所述第一基板的显示区域形成第三过孔，所述第五光罩与所述第三过孔的图案相匹配。
根据本申请的另一个方面，提出了一种显示面板的制作方法，包括：
步骤S10、提供一衬底，在所述衬底上依次形成阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以形成包括显示区域和非显示区域的第一基板；
步骤S20、在所述第一基板的非显示区域形成第一过孔，在所述第一基板的显示区域第二过孔和第三过孔，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层 ，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层，所述第三过孔与所述有源层接触；
步骤S30、在所述第一过孔和所述第二过孔内填充柔性材料，以分别形成位于所述第一过孔内的柔性层和位于所述第二过孔内的应力释放单元；
步骤S40、在所述层间介质层上形成金属层，所述金属层将所述第三过孔填充；
其中，所述第一过孔、所述第二过孔和所述第三过孔采用气体蚀刻的方式进行制备，蚀刻气体包括氢气。
根据本申请一种实施例，所述第一过孔包括相互叠加的第一过孔第一区域和第一过孔第二区域。
根据本申请一种实施例，所述步骤S20包括：
步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
步骤S202、使用第六光罩进行黄光工艺处理，以在所述第一过孔第一区域内形成所述第一过孔第二区域，同时在所述第一基板的显示区域内形成第二过孔和第三过孔，所述第六光罩的图案与所述第一过孔第二区域的图案、所述第二过孔的图案以及所述第三过孔的图案相匹配。
根据本申请一种实施例，所述步骤S20包括：使用第七光罩进行黄光工艺处理，以在所述第一基板上形成第一过孔、第二过孔以及第三过孔，所述第七光罩的图案与所述第一过孔的图案、所述第二过孔的图案以及所述第三过孔的图案相匹配。
根据本申请一种实施例，所述衬底为柔性衬底，所述柔性衬底的制备材料为聚酰亚胺。
根据本申请一种实施例，采用干法刻蚀工艺形成所述第一过孔。
根据本申请一种实施例，所述第二过孔位于所述显示区域的像素单元之间，并与所述显示区域内的功能器件相分离。
根据本申请一种实施例，所述柔性材料为有机材料。
根据本申请一种实施例，还包括在所述金属层上形成平坦化层、阳极层、像素定义层以及支撑层。
根据本申请的又一个方面，还提出了一种显示面板，所述显示面板包括显示区域以及设置在所述显示区域外围的非显示区域，所述显示面板包括：依次层叠设置的衬底、阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以及设置在所述显示面板显示区域的金属层和应力释放单元，设置在所述显示面板非显示区域的柔性层；
其中，所述金属层设置在所述层间介质层上，并通过第三过孔与所述有源层接触，所述应力释放单元设置在第二过孔内，所述柔性层设置在第一过孔内，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层。
根据本申请一种实施例，所述衬底为柔性衬底，所述柔性衬底的制备材料为聚酰亚胺。
根据本申请一种实施例，所述第一过孔采用干法刻蚀工艺形成。
根据本申请一种实施例，所述第二过孔位于所述显示区域的像素单元之间，并与所述显示区域内的功能器件相分离。
根据本申请一种实施例，所述柔性材料为有机材料。
根据本申请一种实施例，还包括形成在所述金属层上的平坦化层、阳极层、像素定义层以及支撑层。
 有益效果
有益效果：本申请提供了一种显示面板及其制作方法，通过提出了多种制备显示面板中过孔的方法，以在进行显示面板过孔制备的过程中根据实际需求选择不同的蚀刻方案，减少了光罩使用次数，简化了显示面板的制作工艺。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施例提供的一种显示面板的制作方法的流程示意图；
图2a-2g为本申请一实施例提供的一种显示面板的制作方法的结构示意图；
图3a-3b为本申请另一实施例提供的一种显示面板的制作方法中步骤S20的结构示意图；
图4为本申请又一实施例提供的一种显示面板的制作方法的流程示意图；
图5a-5d为本申请又一实施例提供的一种显示面板的制作方法的结构示意图；
图6为本申请再一实施例提供的一种显示面板的制作方法中步骤S20的结构示意图；
图7为本申请又另一实施例提供的一种显示面板的结构示意图。
本申请的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
请参考图1和图2a-2g，图1为本申请一实施例提供的一种显示面板的制作方法的流程示意图。图2a-2g为本申请一实施例提供的一种显示面板的制作方法的结构示意图。本申请提供了一种显示面板的制作方法。包括：
请参考图2a，步骤S10、提供一衬底11，在所述衬底11上依次形成阻隔水氧层12、缓冲层13、有源层14、第一栅绝缘层15、第一栅极层16、第二栅绝缘层17、第二栅极层18、层间介质层19，以形成包括显示区域a和非显示区域b的第一基板A。
在一种实施例中，衬底11为柔性衬底，柔性衬底的制备材料为聚酰亚胺。
在一种实施例中，所述步骤S10包括：提供一衬底11，在衬底上采用物理气相沉积技术依次形成厚度为5000埃米的阻隔水氧层12和厚度为3500埃米的缓冲层13。所述缓冲层13的制备材料为氮化硅和氧化硅中的至少一者。在缓冲层13上形成500埃米厚的非晶硅层，并对非晶硅层进行激光退火工艺、曝光、显影、蚀刻后形成有源层14。在有源层14上采用物理气相沉积技术形成1000埃米厚的第一栅绝缘层15。在第一栅绝缘层15上采用溅射工艺形成2500埃米厚的栅极金属，并对栅极金属进行曝光、刻蚀以形成第一栅极层16。在第一栅极层16上采用物理气相沉积技术形成第二栅绝缘层17，所述第二栅绝缘层17的制备材料可以为氮化硅。在第二栅绝缘层17上采用溅射工艺形成栅极金属，并对栅极金属进行曝光、蚀刻以形成第二栅极层18。随后，在第二栅极层18上采用物理气相沉积技术形成厚度为5000埃米的层间介质层19。
请参考图2b-2d。步骤S20、在所述第一基板A的非显示区域形b成第一过孔20，在所述第一基板A的显示区域a形成第二过孔21，所述第一过孔20与所述衬底11接触并贯穿除所述衬底11以外的其它膜层 ，所述第二过孔21与所述阻隔水氧层12接触并贯穿除所述衬底11和所述阻隔水氧层12以外的其它膜层。
在一种实施例中，所述第一过孔20包括相互叠加的第一过孔第一区域20a和第一过孔第二区域20b。
在本申请的第一实施例中，所述步骤S20包括：
请参考图2b，步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板A的非显示区域a形成所述第一过孔第一区域20a，所述第一光罩的图案与所述第一过孔第一区域20a的图案相匹配。
在一种实施例中，采用干法蚀刻工艺形成所述第一过孔第一区域20a。
在一种实施例中，所述第一过孔第一区域20a的目标深度为6000埃米至9000埃米。
请参考图2c，步骤S202、使用第二光罩进行黄光工艺处理，以在所述第一过孔20内形成第一过孔第二区域20b，进而形成第一过孔20，所述第二光罩的图案与所述第一过孔第二区域20b的图案相匹配。
在一种实施例中，采用干法刻蚀将所述第一过孔第二区域20b范围内的无机膜层全部刻蚀，以形成与衬底11接触的第一过孔20，即所述第一过孔20与所述衬底11接触并贯穿除所述衬底11以外的其它膜层。
请参考图2d，步骤S203、使用第三光罩进行黄光工艺处理，以在所述第一基板A的显示区域a形成第二过孔21，所述第三光罩的图案与所述第二过孔21的图案相匹配。
在一种实施例中，第二过孔21位于显示区域a内的像素单元之间，并与显示区域内的功能器件相分离，通过在第二过孔21内填充柔性材料用以缓解显示面板在弯曲时所受到的弯曲应力。
在第二实施例中，请参考图3a-3b，所述步骤S20包括：
请参考图3a，步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板A的非显示区域a形成所述第一过孔第一区域20a，所述第一光罩的图案与所述第一过孔第一区域20a的图案相匹配。
请参考图3b，第四光罩进行黄光工艺处理，以在所述第一过孔第一区域内20a述第一过孔第二区域20b，同时在所述第一基板A的显示区域a形成第二过孔21，所述第五光罩的图案与所述第一过孔第二区域20b的图案以及所述第二过孔21的图案相匹配。相较于第一实施例中，第二实施例采用一道光罩形成第一过孔第二区域20b和第二过孔21，可以达到节省一道光罩的效果。
请参考图2e，步骤S30、在所述第一过孔20和所述第二过孔21内填充柔性材料，以分别形成位于第一过孔20内的柔性层22和位于第二过孔21内的应力释放单元23。
在一种实施例中，所述柔性材料为有机材料。
请参考图2f，步骤S40、在所述第一基板A的显示区域a形成第三过孔24，所述第三过孔24与所述有源层14接触。
在一种实施例中，所述第三过孔24的目标深度可以为层间介质层19、第二栅绝缘层17、第一栅绝缘层15的总厚度。
请参阅图2g，步骤S50、在所述层间介质层上形成金属层25，所述金属层25将所述第三过孔24填充。
在一种实施例中，显示面板的制作方法还包括：在金属层上形成平坦化层、阳极层、像素定义层以及支撑层。
根据本申请的另一个方面，还提出了一种显示面板的制作方法，请参阅图4和图5a-5d。所示显示面板的制作方法包括：
请参阅图5a，步骤S10、提供一衬底11，在所述衬底11上依次形成阻隔水氧层12、缓冲层13、有源层14、第一栅绝缘层15、第一栅极层16、第二栅绝缘层17、第二栅极层18、层间介质层19，以形成包括显示区域a和非显示区域b的第一基板21。
在一种实施例中，所述步骤S10包括：提供一衬底11，在衬底上采用物理气相沉积技术依次形成厚度为5000埃米的阻隔水氧层12和厚度为3500埃米的缓冲层13，所述缓冲层13的制备材料为氮化硅和氧化硅中的至少一者。在缓冲层13上形成500埃米厚的非晶硅层，并对非晶硅层进行激光退火工艺、曝光、显影、蚀刻后形成有源层14。在有源层14上采用物理气相沉积技术形成1000埃米厚的第一栅绝缘层15。在第一栅绝缘层15上采用溅射工艺形成2500埃米厚的栅极金属，并对栅极金属进行曝光、刻蚀以形成第一栅极层16。在第一栅极层16上采用物理气相沉积技术形成第二栅绝缘层17，所述第二栅绝缘层17的制备材料可以为氮化硅。在第二栅绝缘层17上采用溅射工艺形成栅极金属，并对栅极金属进行曝光、蚀刻以形成第二栅极层18。随后，在第二栅极层18上采用物理气相沉积技术形成厚度为5000埃米的层间介质层19。
请参阅图5b-5c，步骤S20、在所述第一基板A的非显示区域b形成第一过孔20，在所述第一基板A的显示区域a第二过孔21和第三过孔24，所述第一过孔20与所述衬底11接触并贯穿除所述衬底11以外的其它膜层 ，所述第二过孔21与所述阻隔水氧层12接触并贯穿除所述衬底11和所述阻隔水氧层12以外的其它膜层，所述第三过孔24与所述有源层14接触。
在第三实施例中，所述步骤S20包括：
请参考图5b，步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板A的非显示区域a形成所述第一过孔第一区域20a，所述第一光罩的图案与所述第一过孔第一区域20a的图案相匹配；
请参考图5c，步骤S202、使用第六光罩进行黄光工艺处理，以在所述第一过孔第一区域内20a形成所述第一过孔第二区域20b，同时在所述第一基板A的显示区域a内形成第二过孔21和第三过孔24，所述第六光罩的图案与所述第一过孔第二区域20b的图案、所述第二过孔21的图案以及所述第三过孔24的图案相匹配。
相较于第一实施例，在第三实施例中，所述第一过孔第二区域20b、第二过孔21和第三过孔24在同一道光罩工艺中制备，能够节省两道光罩制程。
在第四实施例中，所述步骤S20包括：使用第七光罩进行黄光工艺处理，以在所述第一基板A上形成第一过孔20、第二过孔21以及第三过孔24，所述第七光罩的图案与所述第一过孔20的图案、所述第二过孔21的图案以及所述第三过孔24的图案相匹配。
请参阅图6，相较于第一实施例，在第四实施例中，第一过孔20、第二过孔21以及第三过孔24采用一道光罩工艺制备，能够节省三道光罩制程，但是第一过孔21不会形成台阶。
请参阅图5c，步骤S30、在所述第一过孔20和所述第二过孔21内填充柔性材料，以分别形成位于所述第一过孔20内的柔性层22和位于所述第二过孔21内的应力释放单元23。
请参阅图5d，步骤S40、在所述层间介质层19上形成金属层25，所述金属层25将所述第三过孔24填充
其中，所述第一过孔20、所述第二过孔21和所述第三过孔24采用气体蚀刻的方式进行制备，蚀刻气体包括氢气。通过在蚀刻气体中加入氢气，进而减慢对有源层14的侵蚀。
在一种实施例中，金属层25与有源层14的接触方式即可以为表面接触，也可以为侧面接触。金属层25与有源层14的接触方式取决于第三过孔24的深度。
在一种实施例中，所述第一过孔20包括相互叠加的第一过孔第一区域20a和第一过孔第二区域20b。
根据本申请的又有一个方面，还提供了一种显示面板。请参阅图7，所述显示面板包括显示区域a以及设置在所述显示区域a外围的非显示区域b。所述显示面板包括：依次层叠设置的衬底11、阻隔水氧层12、缓冲层13、有源层14、第一栅绝缘层15、第一栅极层16、第二栅绝缘层17、第二栅极层18、层间介质层19，以及设置在所述显示面板显示区域a的金属层25和应力释放单元23，设置在所述显示面板非显示区域b的柔性层22。
其中，所述金属层25设置在所述层间介质层19上，并通过第三过孔24与所述有源层14接触，所述应力释放单元23设置在所述第二过孔21内，所述柔性层22设置在第一过孔20内，所述第一过孔20与所述衬底11接触并贯穿除所述衬底11以外的其它膜层 ，所述第二过孔21与所述阻隔水氧层12接触并贯穿除所述衬底11和所述阻隔水氧层12以外的其它膜层。
本申请提供了一种显示面板及其制作方法，通过提出了多种制备显示面板中过孔的方法，以在进行显示面板过孔制备的过程中根据实际需求选择不同的蚀刻方案，减少了光罩使用次数，简化了显示面板的制作工艺。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板的制作方法，其包括：
    步骤S10、提供一衬底，在所述衬底上依次形成阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以形成包括显示区域和非显示区域的第一基板；
    步骤S20、在所述第一基板的非显示区域形成第一过孔，在所述第一基板的显示区域形成第二过孔，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层；
    步骤S30、在所述第一过孔和所述第二过孔内填充柔性材料，以分别形成位于第一过孔内的柔性层和位于第二过孔内的应力释放单元；
    步骤S40、在所述第一基板的显示区域形成第三过孔，所述第三过孔与所述有源层接触；
    步骤S50、在所述层间介质层上形成金属层，所述金属层将所述第三过孔填充。
  2. 根据权利要求1所述的显示面板的制作方法，其中，所述第一过孔包括相互叠加的第一过孔第一区域和第一过孔第二区域。
  3. 根据权利要求2所述的显示面板的制作方法，其中，所述步骤S20包括：
    步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
    步骤S202、使用第二光罩进行黄光工艺处理，以在所述第一过孔内形成第一过孔第二区域，进而形成第一过孔，所述第二光罩的图案与所述第一过孔第二区域的图案相匹配；
    步骤S203、使用第三光罩进行黄光工艺处理，以在所述第一基板的显示区域形成第二过孔，所述第三光罩的图案与所述第二过孔的图案相匹配。
  4. 根据权利要求2所述的显示面板的制作方法，其中，所述步骤S20包括：
    步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
    步骤S202、使用第四光罩进行黄光工艺处理，以在所述第一过孔第一区域内形成所述第一过孔第二区域，同时在所述第一基板的显示区域形成第二过孔，所述第四光罩的图案与所述第一过孔第二区域的图案以及所述第二过孔的图案相匹配。
  5. 根据权利要求1所述的显示面板的制作方法，其中，所述步骤S40包括：使用第五光罩进行黄光工艺处理，以在所述第一基板的显示区域形成第三过孔，所述第五光罩与所述第三过孔的图案相匹配。
  6. 一种显示面板的制作方法，其包括：
    步骤S10、提供一衬底，在所述衬底上依次形成阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以形成包括显示区域和非显示区域的第一基板；
    步骤S20、在所述第一基板的非显示区域形成第一过孔，在所述第一基板的显示区域第二过孔和第三过孔，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层 ，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层，所述第三过孔与所述有源层接触；
    步骤S30、在所述第一过孔和所述第二过孔内填充柔性材料，以分别形成位于所述第一过孔内的柔性层和位于所述第二过孔内的应力释放单元；
    步骤S40、在所述层间介质层上形成金属层，所述金属层将所述第三过孔填充；
    其中，所述第一过孔、所述第二过孔和所述第三过孔采用气体蚀刻的方式进行制备，蚀刻气体包括氢气。
  7. 根据权利要求6所述的显示面板的制作方法，其中，所述第一过孔包括相互叠加的第一过孔第一区域和第一过孔第二区域。
  8. 根据权利要求7所述的显示面板的制作方法，其中，所述步骤S20包括：
    步骤S201、使用第一光罩进行黄光工艺处理，以在所述第一基板的非显示区域形成所述第一过孔第一区域，所述第一光罩的图案与所述第一过孔第一区域的图案相匹配；
    步骤S202、使用第六光罩进行黄光工艺处理，以在所述第一过孔第一区域内形成所述第一过孔第二区域，同时在所述第一基板的显示区域内形成第二过孔和第三过孔，所述第六光罩的图案与所述第一过孔第二区域的图案、所述第二过孔的图案以及所述第三过孔的图案相匹配。
  9. 根据权利要求6所述的显示面板的制作方法，其中，所述步骤S20包括：使用第七光罩进行黄光工艺处理，以在所述第一基板上形成第一过孔、第二过孔以及第三过孔，所述第七光罩的图案与所述第一过孔的图案、所述第二过孔的图案以及所述第三过孔的图案相匹配。
  10. 根据权利要求6所述的显示面板的制作方法，其中，所述衬底为柔性衬底，所述柔性衬底的制备材料为聚酰亚胺。
  11. 根据权利要求6所述的显示面板的制作方法，其中，采用干法刻蚀工艺形成所述第一过孔。
  12. 根据权利要求6所述的显示面板的制作方法，其中，所述第二过孔位于所述显示区域的像素单元之间，并与所述显示区域内的功能器件相分离。
  13. 根据权利要求6所述的显示面板的制作方法，其中，所述柔性材料为有机材料。
  14. 根据权利要求6所述的显示面板的制作方法，其中，还包括在所述金属层上形成平坦化层、阳极层、像素定义层以及支撑层。
  15. 一种显示面板，其包括显示区域以及设置在所述显示区域外围的非显示区域，所述显示面板包括：依次层叠设置的衬底、阻隔水氧层、缓冲层、有源层、第一栅绝缘层、第一栅极层、第二栅绝缘层、第二栅极层、层间介质层，以及设置在所述显示面板显示区域的金属层和应力释放单元，设置在所述显示面板非显示区域的柔性层；
    其中，所述金属层设置在所述层间介质层上，并通过第三过孔与所述有源层接触，所述应力释放单元设置在第二过孔内，所述柔性层设置在第一过孔内，所述第一过孔与所述衬底接触并贯穿除所述衬底以外的其它膜层，所述第二过孔与所述阻隔水氧层接触并贯穿除所述衬底和所述阻隔水氧层以外的其它膜层。
  16. 根据权利要求15所述的显示面板，其中，所述衬底为柔性衬底，所述柔性衬底的制备材料为聚酰亚胺。
  17. 根据权利要求15所述的显示面板，其中，所述第一过孔采用干法刻蚀工艺形成。
  18. 根据权利要求15所述的显示面板，其中，所述第二过孔位于所述显示区域的像素单元之间，并与所述显示区域内的功能器件相分离。
  19. 根据权利要求15所述的显示面板，其中，所述柔性材料为有机材料。
  20. 根据权利要求15所述的显示面板，其中，还包括形成在所述金属层上的平坦化层、阳极层、像素定义层以及支撑层。
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