WO2019237496A1 - 显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法 - Google Patents

显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法 Download PDF

Info

Publication number
WO2019237496A1
WO2019237496A1 PCT/CN2018/100698 CN2018100698W WO2019237496A1 WO 2019237496 A1 WO2019237496 A1 WO 2019237496A1 CN 2018100698 W CN2018100698 W CN 2018100698W WO 2019237496 A1 WO2019237496 A1 WO 2019237496A1
Authority
WO
WIPO (PCT)
Prior art keywords
package
panel
bonding
pins
joint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/100698
Other languages
English (en)
French (fr)
Inventor
童培谦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to US16/092,337 priority Critical patent/US11184982B2/en
Publication of WO2019237496A1 publication Critical patent/WO2019237496A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/1613Constructional details or arrangements for portable computers
    • G06F1/1633Constructional details or arrangements of portable computers not specific to the type of enclosures covered by groups G06F1/1615 - G06F1/1626
    • G06F1/1656Details related to functional adaptations of the enclosure, e.g. to provide protection against EMI, shock, water, or to host detachable peripherals like a mouse or removable expansions units like PCMCIA cards, or to provide access to internal components for maintenance or to removable storage supports like CDs or DVDs, or to mechanically mount accessories
    • G06F1/1658Details related to functional adaptations of the enclosure, e.g. to provide protection against EMI, shock, water, or to host detachable peripherals like a mouse or removable expansions units like PCMCIA cards, or to provide access to internal components for maintenance or to removable storage supports like CDs or DVDs, or to mechanically mount accessories related to the mounting of internal components, e.g. disc drive or any other functional module
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/1613Constructional details or arrangements for portable computers
    • G06F1/1626Constructional details or arrangements for portable computers with a single-body enclosure integrating a flat display, e.g. Personal Digital Assistants [PDAs]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/189Power distribution
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10128Display
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/1031Surface mounted metallic connector elements
    • H05K2201/10318Surface mounted metallic pins

Definitions

  • the present invention relates to a bonding structure, and more particularly, to a display panel and a flip-chip thin film package bonding structure, a panel bonding pin, a package bonding pin, and a method for bonding a display panel to a flip-chip film packaging.
  • the flip-chip thin film packaging and bonding structure can smoothly transfer COF when the display panel (Panel) and Chip On Film (COF) package are over-expanded or under-expanded.
  • the COF pins are correctly bonded to the corresponding display panel bonding pins, thereby improving the bonding yield.
  • the design of the screen ratio of full screens needs to reduce the area of the Outer Lead Bonding (OLB) area of the display panel as much as possible.
  • OLB Outer Lead Bonding
  • IC integrated circuit
  • COF chip on film
  • the main object of the present invention is to provide a display panel and a flip-chip thin film package bonding structure, a panel bonding pin, a package bonding pin, and a display panel and a flip-chip thin film package bonding method.
  • the flip-chip package can still be smoothly moved by translating the flip-chip package.
  • the pins of the crystal film package are correctly bonded to the corresponding display panel bonding pins, thereby improving the bonding yield.
  • the present invention provides a display panel and a flip-chip film package joint structure, including:
  • a display panel has a panel substrate and a plurality of panel bonding pins.
  • a panel bonding portion is formed at one end of the panel substrate, and the plurality of panel bonding pins are disposed on the panel bonding portion and along the panel.
  • the horizontal and width directions of the joints are arranged in an array, and each of the panel joint pins is trapezoidal and extends along the longitudinal direction of the panel joints;
  • a flip-chip film package is bonded to the display panel and has a package substrate and a plurality of package bonding pins.
  • a package bonding portion is formed at one end of the package substrate, and the plurality of package bonding pins are disposed on the package substrate.
  • the package joint portion is arranged along the widthwise direction of the package joint portion, and is respectively connected to the plurality of panel joint pins.
  • Each of the package joint pins is trapezoidal and extends along the longitudinal direction of the package joint portion. Arranged so as to face in opposite directions to each of the panel engaging pins
  • each of the panel bonding pins is trapezoidal and narrows from back to front along the longitudinal direction of the panel bonding portion, and has a wide rear end portion and a narrow front end portion; and each of the package bonding pins is Trapezoidal and narrowed from back to front along the longitudinal direction of the package joint portion, and has a wide rear end block and a narrow front end block;
  • the wide rear end block is aligned with the The narrow front end portion is overlapped, and the wide rear end portion is overlapped with the narrow front end block;
  • each of the package joint pins is further moved toward each of the panel joint pins along the longitudinal direction of the package joint portion, so that The wide rear end block portion of each of the package bonding pins is superimposed on each of the panel bonding pins, and the wide rear end portion of each of the panel bonding pins is superimposed on each of the package bonding pins. on.
  • the display panel and flip-chip thin film package bonding structure of the present invention uses a trapezoidal panel bonding pin located on the display panel and a trapezoidal package bonding pin configuration located on the flip-chip thin film package.
  • the flip-chip film package is translated relative to the display panel to achieve each of the package bonding pins and the corresponding The alignment and contact of the panel bonding pins, thereby avoiding alignment and bonding failures due to insufficient or excessive expansion of the flip-chip film package, and further improving the yield of the bonding process.
  • Another object of the present invention is to provide a display panel and a flip-chip thin film package joint structure, including:
  • a display panel has a panel substrate and a plurality of panel bonding pins.
  • a panel bonding portion is formed at one end of the panel substrate, and the plurality of panel bonding pins are disposed on the panel bonding portion and along the panel.
  • the horizontal and width directions of the joints are arranged in an array, and each of the panel joint pins is trapezoidal and extends along the longitudinal direction of the panel joints;
  • a flip-chip film package is bonded to the display panel and has a package substrate and a plurality of package bonding pins.
  • a package bonding portion is formed at one end of the package substrate, and the plurality of package bonding pins are disposed on the package substrate.
  • the package joint portion is arranged along the widthwise direction of the package joint portion, and is respectively connected to the plurality of panel joint pins.
  • Each of the package joint pins is trapezoidal and extends along the longitudinal direction of the package joint portion. It is arrange
  • each of the panel joint pins is trapezoidal and narrows from back to front along the longitudinal direction of the panel joint portion, and has a wide rear end portion and a narrow front end portion; and each of the packages.
  • the bonding pin is trapezoidal and narrows from back to front along the longitudinal direction of the package bonding portion, and has a wide rear end block and a narrow front end block.
  • the wide rear end block is It overlaps with the narrow front end portion, and the wide rear end portion overlaps the narrow front end block.
  • each of the package bonding pins is further aligned with each of the panel bonding pins along a lengthwise direction of the package bonding portion. Moving so that the wide rear end portion of each of the package engagement pins is superimposed on each of the panel engagement pins, and the wide rear end portion of each of the panel engagement pins is superimposed on each of the panel engagement pins The package engages the pins.
  • the width of the wide rear end portion of each of the panel joint pins is three times the width of the narrow front end portion, and the interval between adjacent panel joint pins is the width of the narrow front end portion. Double the width.
  • the width of the wide rear end block of each of the package joint pins is three times the width of the narrow front end block, and the interval between adjacent package joint pins is the same as that of the narrow front end block. Double the width.
  • each of the panel bonding pins and the size and shape of each of the package bonding pins are substantially the same.
  • Another object of the present invention is to provide a panel joint pin for being disposed on a panel substrate of a display panel.
  • the panel joint pin is trapezoidal and includes a wide rear end portion and a narrow front end portion.
  • the width of the wide rear end portion is three times the width of the narrow front end portion.
  • Another object of the present invention is to provide a package bonding pin for being disposed on a package substrate of a flip-chip package.
  • the package bonding pin is trapezoidal and includes a wide rear end block and a narrow front end block.
  • the width of the wide back end block is three times the width of the narrow front end block.
  • Another object of the present invention is to provide a method for bonding a display panel to a flip-chip film package, including:
  • a providing step includes providing a display panel and a flip-chip thin film package, wherein:
  • the display panel has a panel substrate and a plurality of panel bonding pins.
  • a panel bonding portion is formed at one end of the panel substrate, and the plurality of panel bonding pins are disposed on the panel bonding portion and along the panel.
  • the joint portions are arranged in a widthwise direction, and each of the panel joint pins is trapezoidal and narrows from back to front along the longitudinal direction of the panel joint portion, and has a wide rear end portion and a narrow front end portion;
  • the flip-chip film package has a package substrate and a plurality of package joint pins, a package joint portion is formed at one end of the package substrate, and the plurality of package joint pins are disposed on the package joint portion and along the package joint portion.
  • the package joints are arranged in the widthwise direction of the package joints, each package joint pin is trapezoidal and narrowed from back to front along the lengthwise direction of the package joints, and has a wide rear end block and a narrow front end block. ;as well as
  • An alignment step includes aligning the plurality of package bonding pins of the flip-chip film package and contacting the plurality of panel bonding pins of the display panel, and confirming whether each of the package bonding pins is aligned And contact the corresponding panel bonding pins; if each of the package bonding pins is aligned and contacts the corresponding panel bonding pins, the next step is performed; if any of the package bonding pins is not Aligning and contacting the corresponding panel bonding pins, translating the package substrate relative to the panel substrate so that each of the package bonding pins contact each of the panel bonding pins, and performing the next step; and
  • a bonding step includes bonding each of the package bonding pins to the corresponding panel bonding pins.
  • a translation direction of the package substrate relative to the panel substrate is at least along a longitudinal direction of the package joint portion.
  • the main object of the present invention is to provide a display panel and a flip-chip thin film package bonding structure, a panel bonding pin, a package bonding pin, and a display panel and a flip-chip thin film package bonding method.
  • the flip-chip package can still be smoothly moved by translating the flip-chip package.
  • the pins of the crystal film package are correctly bonded to the corresponding display panel bonding pins, thereby improving the bonding yield.
  • FIG. 1 is a schematic side view of a joint structure between a display panel and a flip-chip film package according to the present invention.
  • FIG. 2 is a schematic top view of a display panel and a flip-chip thin film packaging bonding structure of the present invention before bonding.
  • FIG. 3 is a schematic plan view of a panel joint pin arrangement of the present invention.
  • FIG. 4 is a schematic top view of a package bonding pin arrangement of the present invention.
  • FIG. 5 is a schematic top view of the bonding of the present invention, in which a flip-chip film package is properly expanded, so that the panel bonding pins and the package bonding pins are aligned and accurately bonded.
  • FIG. 6 is a schematic plan view of the present invention during bonding, in which the flip-chip thin film package is insufficiently expanded, which causes the overall package bonding pin configuration to shrink toward the center of the configuration, and reduces the spacing between adjacent package bonding pins, resulting in panel bonding pins and packaging.
  • the engagement pins are misaligned and cannot be accurately engaged.
  • FIG. 7 is a schematic plan view of the present invention continuing from FIG. 6, in the case where the flip-chip thin film package has insufficient expansion, the package substrate of the flip-chip thin film package is further translated in a direction toward the panel substrate of the display panel, so that The wider portion of the trapezoidal package bonding pin contacts the wider portion of the corresponding panel bonding pin, so that the package bonding pin and the corresponding panel bonding pin are smoothly connected.
  • FIG. 8 is a flowchart of steps of a method for bonding a display panel to a flip-chip film package according to the present invention.
  • the bonding structure of the display panel 1 and the flip-chip film package 2 of the present invention includes: a display panel 1 and a flip-chip film package (Chip) On Film, COF) 2.
  • the display panel 1 includes a panel substrate 10 and a plurality of panel bonding pins 100.
  • a panel bonding portion 10 a is formed at one end of the panel substrate 10.
  • the plurality of panel joint pins 100 are disposed on the panel joint portion 10a, and are arranged along the widthwise direction D2 of the panel joint portion 10a. “1 to n” in FIG. 3 indicates that there are n of the plurality of panel joint pins 100.
  • Each of the panel bonding pins 100 is trapezoidal and narrows from back to front along the lengthwise direction D1 of the panel bonding portion 10a (narrowing toward the flip-chip package 2), and has a wide rear end portion 101 And a narrow front end portion 102 opposite to the wide rear end portion 101.
  • the width of the wide rear end portion 101 is three times the width of the narrow front end portion 102
  • the interval 103 between adjacent panel joint pins 100 is twice the width of the narrow front end portion 102.
  • the flip-chip film package 2 is bonded to the display panel 1 and has a package substrate 20 and a plurality of package bonding pins 200.
  • a packaging joint 20 a is formed at one end of the packaging substrate 20.
  • the plurality of package bonding pins 200 are disposed on the package bonding portion 20 a, are arranged along the widthwise direction D2 of the package bonding portion 20 a, and are respectively bonded to the plurality of panel bonding pins 100.
  • “1 to n” in FIG. 4 indicates that there are n of the plurality of package bonding pins 200.
  • Each of the package bonding pins 200 is trapezoidal and narrows from back to front (narrowing toward the display panel 1) along the longitudinal direction D1 of the package bonding portion 20a, and has a wide rear end block 201 and a Opposite the narrow front end block 202 of the wide rear end block 201.
  • each of the package bonding pins 200 When joining, when the plurality of panel joining pins 100 and the plurality of package joining pins 200 are aligned with each other, in each of the panel joining pins 100 and the each of the package joining pins 200 being joined, the wide rear An end block 201 is overlapped with the narrow front end portion 102, and the wide rear end portion 101 is overlapped with the narrow front end portion 202, as shown in FIG.
  • each of the package bonding pins 200 further moves to each of the panel bonding pins 100 along the lengthwise direction of the package bonding portion 200.
  • the width of the wide rear end block 201 is three times the width of the narrow front end block 202, and the interval 203 between adjacent package joint pins 200 is twice the width of the narrow front end block 202.
  • each of the panel bonding pins 100 and the size and shape of each of the package bonding pins 200 are substantially the same.
  • a bonding method for a display panel 1 and a flip-chip thin film package 2 includes: a providing step S01, an alignment step S02, and a bonding step S03.
  • the providing step S01 includes providing the display panel 1 described above and the flip-chip thin film package 2 described above.
  • the display panel 1 and the flip-chip film package 2 are not yet bonded.
  • the alignment step S02 includes aligning the plurality of package bonding pins 200 of the flip-chip film package 2 and contacting the plurality of panel bonding pins 100 of the display panel 1 and confirming that each of the package bondings Whether the pins 200 are aligned and contact the corresponding panel engaging pins 100. If each of the package bonding pins 200 is aligned and contacts the corresponding panel bonding pin 100, as shown in FIG. 5, then the next step is performed. Please refer to FIG. 6.
  • the flip-chip film package 2 is under-expanded or under-expanded (herein, “expansion” refers to the expansion of the package substrate 20 due to the high temperature of the bonding process), resulting in a gap between the adjacent package bonding pins 200
  • expansion refers to the expansion of the package substrate 20 due to the high temperature of the bonding process
  • the package substrate 20 is translated relative to the panel substrate 10 so that each of the packages The bonding pins 200 contact the panel bonding pins 100 respectively, and perform the next step.
  • the translation direction of the package substrate 20 relative to the panel substrate 10 is at least along the longitudinal direction D1 of the package joint portion 20a, but may also be in the longitudinal direction D1 and D2 translation in the width and width direction.
  • the bonding step S03 is the “next step” described above, and includes bonding each of the package bonding pins 200 to the corresponding panel bonding pins 100.
  • the bonding method may be soldering with solder such as tin.
  • the bonding structure of the display panel 1 and the flip-chip film package 2 of the present invention uses a trapezoidal panel bonding pin 100 on the display panel 1 and a trapezoidal package bonding on the flip-chip film package 2.
  • the pin 200 is configured to be achieved by translating the flip-chip thin film package 2 relative to the display panel 1 when the flip-chip thin film package 2 is under-expanded or over-expanded when it is bonded to the display panel 1. Alignment and contact between each of the package bonding pins 200 and the corresponding panel bonding pins 100, thereby avoiding alignment and bonding failures due to insufficient expansion or excessive expansion of the flip-chip film package 2, and Further increase the yield of the bonding process.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

本发明提供一种显示面板与覆晶薄膜封装接合结构,包括:一显示面板,具有一面板基板以及多个面板接合针脚。所述多个面板接合针脚设置在所述面板基板上,且沿着横宽方向排列配置。各所述面板接合针脚呈梯形而沿着纵长方。一覆晶薄膜封装,与所述显示面板相接合,且具有一封装基板以及多个封装接合针脚。所述多个封装接合针脚设置在所述封装基板上,沿着横宽方向排列配置,且分别接合所述多个面板接合针脚。各所述封装接合针脚呈梯形而沿着纵长方向。梯形的面板接合针脚及封装接合针脚能够对准并接合彼此。

Description

显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法 技术领域
本发明是有关于一种接合结构,特别是有关于一种显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法,所述显示面板与覆晶薄膜封装接合结构可在显示面板(Panel)与覆晶薄膜(Chip On Film, COF)封装的接合过程中发生COF膨胀过足或膨胀不足时,仍可透过平移COF的方式而顺利将COF的针脚正确接合(Bonding)到对应的显示面板接合针脚,进而提高接合良率。
背景技术
目前,市场上对于全面屏的需求越来越大,而全面屏的屏占比设计,需要尽可能大地减小显示面板(Panel)外引脚接合(Outer Lead Bonding, OLB)区的面积,为了减小OLB区的面积,积体电路(Integrated Circuits, IC)晶片接合(Bonding)到覆晶薄膜(Chip On Film, COF)封装的设计越来越普及,这样便可将COF 接合到显示面板上,然后将覆晶薄膜封装弯折(Bending)到显示面板的背面,从而有效地减小显示面板的正面面积。
然而,随着显示面板设计的像素密度,例如每英寸像素(Pixel Per Inch ,PPI)越来越大且覆晶薄膜封装的机构设计越来越小,覆晶薄膜封装与显示面板的接合针脚(Pin)数也越来越多,对于接合工艺需求也越来越精密,即使在覆晶薄膜封装对针脚进行预缩值的设计,也难免会有接合时刻覆晶薄膜封装膨胀不足或膨胀过足的情况发生,造成覆晶薄膜封装与显示面板无法正确接合而导致两者接合失败。
故,有必要提供一种显示面板与覆晶薄膜封装接合结构,以解决现有技术所存在的问题。
技术问题
本发明的主要目的在于提供一种显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法,所述显示面板与覆晶薄膜封装接合结构可在显示面板(Panel)与覆晶薄膜(Chip On Film, COF)封装的接合过程中发生覆晶薄膜封装膨胀过足或膨胀不足时,仍可透过平移覆晶薄膜封装的方式而顺利将覆晶薄膜封装的针脚正确接合(Bonding)到对应的显示面板接合针脚,进而提高接合良率。
技术解决方案
为达本发明上述目的,本发明提供一种显示面板与覆晶薄膜封装接合结构,包括:
一显示面板,具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向;以及
一覆晶薄膜封装,与所述显示面板相接合,且具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,沿着所述封装接合部的横宽方向排列配置,且分别接合所述多个面板接合针脚,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向配置成与各所述面板接合针脚朝向相反方向
其中,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块;
其中,当所述多个面板接合针脚以及所述多个封装接合针脚相互对准时,在各所述面板接合针脚与接合的各所述封装接合针脚中,所述宽后端块是与所述窄前端部叠合,所述宽后端部是与所述窄前端块相叠合;
其中,当所述多个面板接合针脚以及所述多个封装接合针脚未相互对准时,各所述封装接合针脚进一步沿所述封装接合部的纵长方向向各所述面板接合针脚移动,使各所述封装接合针脚的所述宽后端块部分叠合到各所述面板接合针脚上,且使各所述面板接合针脚的所述宽后端部部分叠合到各所述封装接合针脚上。
相较于现有技术,本发明的显示面板与覆晶薄膜封装接合结构采用了位于所述显示面板上的梯形面板接合针脚以及位于所述覆晶薄膜封装上的梯形封装接合针脚配置,能够在所述覆晶薄膜封装于接合到所述显示面板时发生膨胀不足或是膨胀过足的状况下,相对所述显示面板平移所述覆晶薄膜封装来达成各所述封装接合针脚与所对应的所述面板接合针脚的对准与接触,从而避免了因为所述覆晶薄膜封装膨胀不足或膨胀过足而导致的对准及接合失败,并进一步提高接合制程的良率。
本发明另一目的在于提供一种显示面板与覆晶薄膜封装接合结构,包括:
一显示面板,具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向;以及
一覆晶薄膜封装,与所述显示面板相接合,且具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,沿着所述封装接合部的横宽方向排列配置,且分别接合所述多个面板接合针脚,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向配置成与各所述面板接合针脚朝向相反方向。
在本发明中,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块。
在本发明中,当所述多个面板接合针脚以及所述多个封装接合针脚相互对准时,在各所述面板接合针脚与接合的各所述封装接合针脚中,所述宽后端块是与所述窄前端部叠合,所述宽后端部是与所述窄前端块相叠合。
在本发明中,当所述多个面板接合针脚以及所述多个封装接合针脚未相互对准时,各所述封装接合针脚进一步沿所述封装接合部的纵长方向向各所述面板接合针脚移动,使各所述封装接合针脚的所述宽后端块部分叠合到各所述面板接合针脚上,且使各所述面板接合针脚的所述宽后端部部分叠合到各所述封装接合针脚上。
在本发明中,各所述面板接合针脚的所述宽后端部的宽度是所述窄前端部的宽度的三倍,且相邻的面板接合针脚之间的间距是所述窄前端部的宽度的两倍。
在本发明中,各所述封装接合针脚的所述宽后端块的宽度是所述窄前端块的宽度的三倍,且相邻的封装接合针脚之间的间距是所述窄前端块的宽度的两倍。
在本发明中,各所述面板接合针脚的尺寸与形状与各所述封装接合针脚的尺寸与形状为实质相同。
本发明另一目的在于提供一种面板接合针脚,用于设置在一显示面板的面板基板上,所述面板接合针脚呈梯形且包括一宽后端部以及一窄前端部。
在本发明中,所述宽后端部的宽度是所述窄前端部的宽度的三倍。
本发明另一目的在于提供一种封装接合针脚,用于设置在一覆晶薄膜封装的封装基板上,所述封装接合针脚呈梯形且包括一宽后端块以及一窄前端块。
在本发明中,所述宽后端块的宽度是所述窄前端块的宽度的三倍。
本发明又一目的在于提供一种显示面板与覆晶薄膜封装接合方法,包括:
一提供步骤,包括提供一显示面板及一覆晶薄膜封装,其中:
所述显示面板具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及
所述覆晶薄膜封装具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,且沿着所述封装接合部的横宽方向排列配置,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块;以及
一对准步骤,包括将所述覆晶薄膜封装的所述多个封装接合针脚对准并接触所述显示面板的所述多个面板接合针脚,并确认各所述封装接合针脚是否均对准并接触所对应的各所述面板接合针脚;若各所述封装接合针脚均对准并接触所对应的所述面板接合针脚,则执行下一步骤;若有任一所述封装接合针脚是未对准并接触所对应的所述面板接合针脚,则相对所述面板基板平移所述封装基板,使各所述封装接合针脚分别接触各所述面板接合针脚,并执行下一步骤;以及
一接合步骤,包括将各所述封装接合针脚接合到所对应的所述面板接合针脚上。
在本发明中,在所述对准步骤中,所述封装基板相对面板基板的平移方向是至少沿着所述封装接合部的纵长方向。
有益效果
本发明的主要目的在于提供一种显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法,所述显示面板与覆晶薄膜封装接合结构可在显示面板(Panel)与覆晶薄膜(Chip On Film, COF)封装的接合过程中发生覆晶薄膜封装膨胀过足或膨胀不足时,仍可透过平移覆晶薄膜封装的方式而顺利将覆晶薄膜封装的针脚正确接合(Bonding)到对应的显示面板接合针脚,进而提高接合良率。
附图说明
图1是一本发明显示面板与覆晶薄膜封装接合结构的侧面示意图。
图2是本发明显示面板与覆晶薄膜封装接合结构在接合前的俯视示意图。
图3是本发的面板接合针脚配置的俯视示意图。
图4是本发明的封装接合针脚配置的俯视示意图。
图5是本发明接合时的俯视示意图,其中覆晶薄膜封装适当膨胀,使得面板接合针脚与封装接合针脚对齐并准确接合。
图6是本发明在接合时的俯视示意图,其中覆晶薄膜封装膨胀不足,使得封装接合针脚配置整体向配置的中心收缩,并使得相邻封装接合针脚的间距减小,导致面板接合针脚与封装接合针脚对不准并且无法准确接合。
图7是本发明接续图6的俯视示意图,其中在覆晶薄膜封装膨胀不足的情况下,进一步将所述覆晶薄膜封装的封装基板沿着朝向所述显示面板的面板基板的方向平移,令梯形的封装接合针脚的较宽部去接触对应的面板接合针脚的较宽处,进而使封装接合针脚与对应的面板接合针脚顺利接合。
图8是本发明显示面板与覆晶薄膜封装接合方法的步骤流程图。
本发明的实施方式
请参照图1及图2本发明显示面板1与覆晶薄膜封装2接合结构包括:一显示面板(Panel)1以及一覆晶薄膜封装(Chip On Film, COF)2。
请参照图3,所述显示面板1具有一面板基板10以及多个面板接合针脚100。
所述面板基板10的一端处形成一面板接合部10a。所述多个面板接合针脚100设置在所述面板接合部10a上,且沿着所述面板接合部10a的横宽方向D2排列配置。图3中的"1~n"是示意所述多个面板接合针脚100有n个。各所述面板接合针脚100呈梯形而沿着所述面板接合部10a的纵长方向D1由后向前缩窄(朝向所述覆晶薄膜封装2缩窄),并具有一宽后端部101以及一相对所述宽后端部101的窄前端部102。此外,所述宽后端部101的宽度是所述窄前端部102的宽度的三倍,且相邻的面板接合针脚100之间的间距103是所述窄前端部102的宽度的两倍。
请参照图4及图5,所述覆晶薄膜封装2与所述显示面板1相接合,且具有一封装基板20以及多个封装接合针脚200。
所述封装基板20的一端处形成一封装接合部20a。所述多个封装接合针脚200设置在所述封装接合部20a上,沿着所述封装接合部20a的横宽方向D2排列配置,且分别接合所述多个面板接合针脚100。图4中的"1~n"是示意所述多个封装接合针脚200有n个。各所述封装接合针脚200呈梯形而沿着所述封装接合部20a的纵长方向D1由后向前缩窄(朝向所述显示面板1缩窄),并具有一宽后端块201以及一相对所述宽后端块201的窄前端块202。当接合时,当所述多个面板接合针脚100以及所述多个封装接合针脚200相互对准时,在各所述面板接合针脚100与接合的各所述封装接合针脚200中,所述宽后端块201是与所述窄前端部102叠合,所述宽后端部101是与所述窄前端块202相叠合,如图4所示。当所述多个面板接合针脚100以及所述多个封装接合针脚未相互对准时,各所述封装接合针脚200进一步沿所述封装接合部200的纵长方向向各所述面板接合针脚100移动,使各所述封装接合针脚200的所述宽后端块201部分叠合到各所述面板接合针脚100上,且使各所述面板接合针脚100的所述宽后端部101部分叠合到各所述封装接合针脚200上,如图5所示。此外,所述宽后端块201的宽度是所述窄前端块202的宽度的三倍,且相邻的封装接合针脚200之间的间距203是所述窄前端块202的宽度的两倍。
在本发明中,各所述面板接合针脚100的尺寸与形状与各所述封装接合针脚200的尺寸与形状为实质相同。
请参照图8,本发明显示面板1与覆晶薄膜封装2接合方法,包括:一提供步骤S01、一对准步骤S02、以及一接合步骤S03。
如图3及图4所示,所述提供步骤S01包括提供如上所述的显示面板1及如上所述的覆晶薄膜封装2。在所述提供步骤S01中,所述显示面板1以及所述覆晶薄膜封装2尚未接合。
所述对准步骤S02包括将所述覆晶薄膜封装2的所述多个封装接合针脚200对准并接触所述显示面板1的所述多个面板接合针脚100,并确认各所述封装接合针脚200是否均对准并接触所对应的各所述面板接合针脚100。若各所述封装接合针脚200均对准并接触所对应的所述面板接合针脚100,如图5所示,则执行下一步骤。请参照图6,通常在所述覆晶薄膜封装2因膨胀过足或膨胀不足(此处所称膨胀是指所述封装基板20因接合制程的高温而膨胀)而导致相邻封装接合针脚200间距过大或过小的情况下,会使得所述多个封装接合针脚200无法完全对准所述多个面板接合针脚100。
请参照图7,若有任一所述封装接合针脚200是未对准并接触所对应的所述面板接合针脚100,则相对所述面板基板10平移所述封装基板20,使各所述封装接合针脚200分别接触各所述面板接合针脚100,并执行下一步骤。此外,在所述对准步骤S02中,所述封装基板20相对面板基板10的平移方向是至少沿着所述封装接合部20a的纵长方向D1,但也可为同时在纵长方向D1与横宽方向D2平移。
所述接合步骤S03,即是上述的"下一步骤",包括将各所述封装接合针脚200接合到所对应的所述面板接合针脚100上。所述接合的方式可为以锡等焊料进行焊接。
相较于现有技术,本发明的显示面板1与覆晶薄膜封装2接合结构采用了位于所述显示面板1上的梯形面板接合针脚100以及位于所述覆晶薄膜封装2上的梯形封装接合针脚200配置,能够在所述覆晶薄膜封装2于接合到所述显示面板1时发生膨胀不足或是膨胀过足的状况下,相对所述显示面板1平移所述覆晶薄膜封装2来达成各所述封装接合针脚200与所对应的所述面板接合针脚100的对准与接触,从而避免了因为所述覆晶薄膜封装2膨胀不足或膨胀过足而导致的对准及接合失败,并进一步提高接合制程的良率。

Claims (14)

  1. 一种显示面板与覆晶薄膜封装接合结构,包括:
    一显示面板,具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向;以及
    一覆晶薄膜封装,与所述显示面板相接合,且具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,沿着所述封装接合部的横宽方向排列配置,且分别接合所述多个面板接合针脚,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向配置成与各所述面板接合针脚朝向相反方向
    其中,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块;
    其中,当所述多个面板接合针脚以及所述多个封装接合针脚相互对准时,在各所述面板接合针脚与接合的各所述封装接合针脚中,所述宽后端块是与所述窄前端部叠合,所述宽后端部是与所述窄前端块相叠合;
    其中,当所述多个面板接合针脚以及所述多个封装接合针脚未相互对准时,各所述封装接合针脚进一步沿所述封装接合部的纵长方向向各所述面板接合针脚移动,使各所述封装接合针脚的所述宽后端块部分叠合到各所述面板接合针脚上,且使各所述面板接合针脚的所述宽后端部部分叠合到各所述封装接合针脚上。
  2. 一种显示面板与覆晶薄膜封装接合结构,包括:
    一显示面板,具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向;以及
    一覆晶薄膜封装,与所述显示面板相接合,且具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,沿着所述封装接合部的横宽方向排列配置,且分别接合所述多个面板接合针脚,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向配置成与各所述面板接合针脚朝向相反方向。
  3. 如权利要求2所述的显示面板与覆晶薄膜封装接合结构,其中:
    各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及
    各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块。
  4. 如权利要求3所述的显示面板与覆晶薄膜封装接合结构,其中:当所述多个面板接合针脚以及所述多个封装接合针脚相互对准时,在各所述面板接合针脚与接合的各所述封装接合针脚中,所述宽后端块是与所述窄前端部叠合,所述宽后端部是与所述窄前端块相叠合。
  5. 如权利要求3所述的显示面板与覆晶薄膜封装接合结构,其中:当所述多个面板接合针脚以及所述多个封装接合针脚未相互对准时,各所述封装接合针脚进一步沿所述封装接合部的纵长方向向各所述面板接合针脚移动,使各所述封装接合针脚的所述宽后端块部分叠合到各所述面板接合针脚上,且使各所述面板接合针脚的所述宽后端部部分叠合到各所述封装接合针脚上。
  6. 如权利要求3所述的显示面板与覆晶薄膜封装接合结构,其中:各所述面板接合针脚的所述宽后端部的宽度是所述窄前端部的宽度的三倍,且相邻的面板接合针脚之间的间距是所述窄前端部的宽度的两倍。
  7. 如权利要求3所述的显示面板与覆晶薄膜封装接合结构,其中:各所述封装接合针脚的所述宽后端块的宽度是所述窄前端块的宽度的三倍,且相邻的封装接合针脚之间的间距是所述窄前端块的宽度的两倍。
  8. 如权利要求3所述的显示面板与覆晶薄膜封装接合结构,其中:各所述面板接合针脚的尺寸与形状与各所述封装接合针脚的尺寸与形状为实质相同。
  9. 一种面板接合针脚,用于设置在一显示面板的面板基板上,所述面板接合针脚呈梯形且包括一宽后端部以及一窄前端部。
  10. 如权利要求9所述的面板接合针脚,其中:所述宽后端部的宽度是所述窄前端部的宽度的三倍。
  11. 一种封装接合针脚,用于设置在一覆晶薄膜封装的封装基板上,所述封装接合针脚呈梯形且包括一宽后端块以及一窄前端块。
  12. 如权利要求11所述的封装接合针脚,其中:所述宽后端块的宽度是所述窄前端块的宽度的三倍。
  13. 一种显示面板与覆晶薄膜封装接合方法,包括:
    一提供步骤,包括提供一显示面板及一覆晶薄膜封装,其中:
    所述显示面板具有一面板基板以及多个面板接合针脚,所述面板基板的一端处形成一面板接合部,所述多个面板接合针脚设置在所述面板接合部上,且沿着所述面板接合部的横宽方向排列配置,各所述面板接合针脚呈梯形而沿着所述面板接合部的纵长方向由后向前缩窄,并具有一宽后端部以及一窄前端部;以及
    所述覆晶薄膜封装具有一封装基板以及多个封装接合针脚,所述封装基板的一端处形成一封装接合部,所述多个封装接合针脚设置在所述封装接合部上,且沿着所述封装接合部的横宽方向排列配置,各所述封装接合针脚呈梯形而沿着所述封装接合部的纵长方向由后向前缩窄,并具有一宽后端块以及一窄前端块;以及
    一对准步骤,包括将所述覆晶薄膜封装的所述多个封装接合针脚对准并接触所述显示面板的所述多个面板接合针脚,并确认各所述封装接合针脚是否均对准并接触所对应的各所述面板接合针脚;若各所述封装接合针脚均对准并接触所对应的所述面板接合针脚,则执行下一步骤;若有任一所述封装接合针脚是未对准并接触所对应的所述面板接合针脚,则相对所述面板基板平移所述封装基板,使各所述封装接合针脚分别接触各所述面板接合针脚,并执行下一步骤;以及
    一接合步骤,包括将各所述封装接合针脚接合到所对应的所述面板接合针脚上。
  14. 如权利要求13所述的显示面板与覆晶薄膜封装接合方法,其中:在所述对准步骤中,所述封装基板相对面板基板的平移方向是至少沿着所述封装接合部的纵长方向。
PCT/CN2018/100698 2018-06-15 2018-08-15 显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法 Ceased WO2019237496A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/092,337 US11184982B2 (en) 2018-06-15 2018-08-15 Display panel and chip-on-film (COF) package bonding structure, panel bonding pins, package bonding pins, and display panel and COF package bonding method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810621832.3 2018-06-15
CN201810621832.3A CN108878679A (zh) 2018-06-15 2018-06-15 接合结构、面板接合针脚、封装接合针脚、及其接合方法

Publications (1)

Publication Number Publication Date
WO2019237496A1 true WO2019237496A1 (zh) 2019-12-19

Family

ID=64339257

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/100698 Ceased WO2019237496A1 (zh) 2018-06-15 2018-08-15 显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法

Country Status (3)

Country Link
US (1) US11184982B2 (zh)
CN (1) CN108878679A (zh)
WO (1) WO2019237496A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12266663B2 (en) 2021-08-17 2025-04-01 Chengdu Boe Optoelectronics Technology Co., Ltd. Display panel having a bonding region
CN113724618A (zh) * 2021-08-27 2021-11-30 京东方科技集团股份有限公司 一种显示装置及其邦定方法、显示设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000098414A (ja) * 1998-09-22 2000-04-07 Hitachi Ltd 液晶表示装置
CN1521536A (zh) * 2003-02-14 2004-08-18 友达光电股份有限公司 外引脚结构
CN108022517A (zh) * 2016-10-31 2018-05-11 昆山国显光电有限公司 驱动电路载体、显示面板及平板显示器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9974175B2 (en) * 2013-04-29 2018-05-15 Samsung Display Co., Ltd. Electronic component, electric device including the same, and bonding method thereof
CN105720028B (zh) * 2016-02-04 2018-06-05 京东方科技集团股份有限公司 一种覆晶薄膜、柔性显示面板及显示装置
US10665151B2 (en) 2016-10-31 2020-05-26 Kunshan New Flat Panel Display Technology Center Co., Ltd. Driver circuit carrier, display panel, tablet display, and manufacturing method
CN106784376A (zh) * 2016-12-27 2017-05-31 固安翌光科技有限公司 一种薄膜封装结构、包含其的oled屏体及其封装方法
KR102451017B1 (ko) * 2017-08-16 2022-10-04 엘지디스플레이 주식회사 플렉서블 표시 장치
KR102477744B1 (ko) * 2017-10-23 2022-12-15 엘지디스플레이 주식회사 표시패널 및 표시장치
CN110557887B (zh) * 2018-05-31 2021-10-12 京东方科技集团股份有限公司 电路对位组件及显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000098414A (ja) * 1998-09-22 2000-04-07 Hitachi Ltd 液晶表示装置
CN1521536A (zh) * 2003-02-14 2004-08-18 友达光电股份有限公司 外引脚结构
CN108022517A (zh) * 2016-10-31 2018-05-11 昆山国显光电有限公司 驱动电路载体、显示面板及平板显示器

Also Published As

Publication number Publication date
US20210212213A1 (en) 2021-07-08
CN108878679A (zh) 2018-11-23
US11184982B2 (en) 2021-11-23

Similar Documents

Publication Publication Date Title
KR100682403B1 (ko) 표시장치
US10971465B2 (en) Driving chip, display substrate, display device and method for manufacturing display device
WO2020103292A1 (zh) 液晶显示装置
CN100501538C (zh) 驱动电路以及包括该驱动电路的液晶显示器件
WO2019237496A1 (zh) 显示面板与覆晶薄膜封装接合结构、面板接合针脚、封装接合针脚、及显示面板与覆晶薄膜封装接合方法
TWI666490B (zh) 電子裝置
CN101217135B (zh) 薄膜覆晶封装结构
JPH09203907A (ja) 液晶表示装置及びその製造装置
TW201330203A (zh) 封裝結構及其製法
TWI395301B (zh) 使用在金屬氧化物半導體場效電晶體球閘陣列封裝技術上之摺疊框架載體
JPH11312759A (ja) フェイスダウンボンディング用基板またはプリント配線板もしくはフレキシブル配線板またはその基板の形設方法
CN116564196A (zh) 显示模组及显示装置
JPH08304845A (ja) 液晶表示装置
US11650245B2 (en) Test system and signal transmission circuit board thereof
JP4995883B2 (ja) 半導体フリップチップ構造体
TWI409917B (zh) 降低翹曲之晶片佈局及其方法
KR102023923B1 (ko) 인쇄회로기판 및 이를 포함한 평판 표시 장치
JP2003086629A (ja) Cof型半導体装置及びその製造方法
CN207336990U (zh) 驱动芯片、显示基板及显示装置
CN101477970A (zh) 电路基板及其应用
TWI231876B (en) Package structure for a LCD driver IC
JP2005121757A (ja) 基板接続構造、電子部品、液晶表示装置および電子部品の製造方法
CN101800210A (zh) 降低翘曲的芯片布局及其方法
CN118870655A (zh) 应用于压接工艺的热压头与软性印刷电路板的接合方法
JP2001134210A (ja) 表示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18922810

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18922810

Country of ref document: EP

Kind code of ref document: A1