WO2019169879A1 - 驱动芯片及显示装置 - Google Patents

驱动芯片及显示装置 Download PDF

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Publication number
WO2019169879A1
WO2019169879A1 PCT/CN2018/112564 CN2018112564W WO2019169879A1 WO 2019169879 A1 WO2019169879 A1 WO 2019169879A1 CN 2018112564 W CN2018112564 W CN 2018112564W WO 2019169879 A1 WO2019169879 A1 WO 2019169879A1
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WIPO (PCT)
Prior art keywords
bumps
buffer
bump
height
driving chip
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Application number
PCT/CN2018/112564
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English (en)
French (fr)
Inventor
刘练彬
梁恒镇
兰传艳
吴国强
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/756,976 priority Critical patent/US11217549B2/en
Publication of WO2019169879A1 publication Critical patent/WO2019169879A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
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Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a driving chip and a display device.
  • Flexible substrates are increasingly used in display devices due to their thinness and good impact resistance.
  • the flexible substrate is generally fixed on the glass substrate, and then the flexible display panel manufacturing process is performed.
  • a driver integrated circuit (Driver IC) needs to be bound to the display panel, and the display panel is driven by the driving integrated circuit to display the screen.
  • Embodiments of the present application provide a driving chip including a substrate and a plurality of connection bumps disposed on the substrate and a plurality of buffer bumps.
  • Each of the connection bump and the buffer bump is disposed on the first surface of the substrate, the buffer bump has a first end surface having a height a, and the connection bump has a connection bump end surface having a height b, a ⁇ b, The height is the distance from the corresponding end face of the connecting bump or the buffering bump to the first surface.
  • At least some of the plurality of buffer bumps of the shuttle are further provided with a second end face having a height b.
  • the plurality of buffer bumps include step bumps, and the first end surface and the second end surface form a step surface of the step bumps.
  • the plurality of buffer bumps include a first sub-bump having a height a and a second sub-bump having a height b, the first sub-bump and the second sub-bump being independently set .
  • At least a portion of the plurality of buffer bumps are disposed between adjacent connection bumps.
  • At least a portion of the plurality of buffer bumps and at least a portion of the plurality of connection bumps are alternately arranged on the first surface of the substrate on.
  • the relationship between a and b is: b/3 ⁇ a ⁇ 2b/3.
  • the plurality of buffer bumps are evenly disposed on the first surface of the substrate.
  • At least one of the plurality of connection bumps is arranged on a same line in a first direction, the plurality of buffer bumps comprising the same line along the first direction Arranged at least one set of buffer bumps.
  • the distance between the buffer bumps in the at least one portion of the plurality of connection bumps is equal to a minimum value of the distance between adjacent ones of the plurality of connection bumps.
  • a further embodiment of the present application provides a display device comprising the driver chip of any of the preceding embodiments.
  • FIG. 1 is a schematic diagram of an example of a driving chip known to the inventors of the present application.
  • FIG. 2 is a schematic diagram of a driving chip according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a driving chip according to another embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a driving chip according to another embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a driving chip according to still another embodiment of the present disclosure.
  • the connecting bump disposed on the back of the driving integrated circuit needs to contact the bare metal lead on the display panel to realize the corresponding electrical connection function.
  • the connection bumps provided on the back side of the driving integrated circuit have the same height. The applicant's inventor has found that in this case, in the binding process of the driving integrated circuit, the stresses of the multiple regions of the driving integrated circuit are different, and the binding effect is easy to occur, and the display panel is easy to display. Abnormal conditions, even cracks.
  • the driving chip shown in FIG. 1 includes a substrate 1 and a plurality of connecting bumps 2 disposed on the first surface of the substrate 1.
  • the connecting bumps 2 have a large blank area 3 between them, and the connecting bumps are connected.
  • the height of 2 is b.
  • the stresses of the plurality of regions of the driving integrated circuit are different, for example, the region of the connecting bump 2 provided with the same height and the blank region 3 are different in stress, thereby being easily tied. The effect is not good; at the same time, the display panel is prone to display abnormalities and even cracks.
  • FIG. 2 it schematically shows a driving chip provided according to an embodiment of the present application, comprising a substrate 1 and a plurality of connecting bumps 2 disposed on the substrate 1.
  • the driving chip is further provided with a plurality of
  • the buffer bump has a first end face 41 having a height a
  • the connecting bump 2 has an end face having a height b, a ⁇ b; wherein the height is specifically a distance from the end face to the surface of the substrate 1.
  • the buffering effect of the stress can be achieved; during the bonding process, the driving integrated circuit can first contact the end surface of the connecting bump 2, and can be contacted at a later stage as the pressure increases.
  • the first end face 41 of the bumper is buffered, thereby providing a technical effect of stress buffering by providing contact faces of different heights, thereby effectively improving the binding effect.
  • the buffer bumps are disposed on the blank area 3 on the substrate 1.
  • the relationship between the height a of the buffer bumps and the height b of the connection bumps 2 b/3 ⁇ a ⁇ 2b/3.
  • the height difference of the end faces is too large or too small, which further enhances the buffering effect of the buffer bumps.
  • the driver integrated circuit is bonded to the display panel by a heat-pressed Anisotropic Conductive Film (ACF) process.
  • ACF Anisotropic Conductive Film
  • a driving chip has a main structure similar to the foregoing embodiment, and also includes a substrate 1, a connection bump 2, and a buffer bump.
  • a substrate 1 a connection bump 2
  • a buffer bump a buffer bump
  • the buffer bump provided according to another embodiment further has a second end face 42 having a height b. That is, the buffer bump in this embodiment has a first end face having a height a and a second end face having a height b.
  • the stress applied to the driving integrated circuit at the initial stage of contacting the display panel can be more uniform, and the blank area 3 can be more effectively overcome due to the absence of the bump.
  • the stress difference defect can further improve the binding effect of the driving integrated circuit.
  • the buffer bump in this embodiment includes a stepped bump having a stepped surface having a height a and b, that is, the buffer bump is an integral structure of the second end surface 42 provided with the first end surface 41, as shown in FIG. Shown.
  • the buffer bump provided by the embodiment of the present application, the beneficial technical effect of the stepwise buffering can be realized; at the same time, the buffer bump of the integral structure has many advantages such as convenient manufacturing, convenient assembly and the like.
  • the plurality of connection bumps 2 of the driving chip include at least one set of connection bumps arranged along the same straight line in the first direction, the plurality of buffer bumps including the same in the first direction At least one set of buffer bumps arranged in a line.
  • the substrate 1 is provided with five connection bumps 2 arranged in the first direction, and a large blank area 3 between the fourth bump and the fifth bump is provided.
  • Two buffer bumps are disposed in the blank area 3; the arrangement direction of the buffer bumps is the same as the arrangement direction of the five connecting bumps 2, and is on the same straight line.
  • the above-described buffer bumps and the connection bumps 2 having the same alignment direction and on the same straight line can further ensure the uniform distribution characteristics of the stresses of the driving integrated circuit.
  • the distance between adjacent buffer bumps is equal to the minimum of the distance between adjacent bumps 2, thereby further improving the uniform distribution characteristics of the stresses on the driver integrated circuit.
  • the buffer bump includes a first sub-bump having a height a and a second sub-bump having a height b, the first sub-bump and the second sub-bump Arranged independently of each other; that is, the first sub-bump has a first end face 41 having a height a, and the second sub-bump has a second end face 42 having a height b.
  • the above-mentioned buffer bumps including two independently disposed sub-bumps having different heights can effectively avoid the stress concentration at the step of the integrally provided buffer bumps, that is, Effectively overcome the stress concentration defect of the joint where the first end face and the second end face of the buffer bump are integrally provided.
  • the above-mentioned independently arranged sub-bumps are more flexible in application, and can further improve the binding effect of the driving integrated circuit.
  • the buffer bumps are evenly disposed on the substrate 1.
  • the above-mentioned uniformly arranged buffer bumps can effectively ensure the uniform distribution characteristics of the stress applied to the driving integrated circuit, thereby effectively improving the binding effect of the driving integrated circuit.
  • the buffer bumps of the driving chip may be disposed between the connection bumps 2 to achieve a stress buffering technical effect of connecting the regions between the bumps 2.
  • the pitch of the adjacent connection bumps 2 is excessively large, the provision of the buffer bumps in the region between the adjacent connection bumps 2 can achieve a good stress buffering technical effect.
  • the above-described buffer bumps may also be disposed on the blank region 3 on the substrate 1, similar to the previously described embodiments, and the effect of the stress buffering technique of the driving integrated circuit at the blank region 3 can be effectively improved.
  • the buffer bumps of the driving chip include buffer bumps disposed between the connection bumps 2, and buffer bumps provided in the blank regions 3 on the substrate 1. At least a portion of the plurality of buffer bumps and at least a portion of the plurality of connection bumps are alternately arranged on the first surface of the substrate.
  • the stress buffer between the connection bumps 2 can be realized, and the stress buffering effect of the driving integrated circuit in the blank region 3 can be realized, and the binding effect of the driving integrated circuit can be effectively improved.
  • a further embodiment of the present application provides a display device comprising the drive chip of any of the preceding embodiments.
  • connection may be a fixed connection, a detachable connection, or an integral Connections; they can be connected directly or indirectly through intermediate media.
  • connecting may be a fixed connection, a detachable connection, or an integral Connections; they can be connected directly or indirectly through intermediate media.

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Abstract

一种驱动芯片及显示装置，驱动芯片包括衬底(1)和设置在衬底(1)上的多个连接凸块(2)以及多个缓冲凸块，连接凸块(2)和缓冲凸块中的每个设置在衬底(1)的第一表面。缓冲凸块具有高度为a的第一端面(41)，连接凸块(2)具有高度为b的连接凸块端面，且a＜b，高度为连接凸块(2)或缓冲凸块的相应端面到第一表面的距离。利用驱动芯片上的缓冲凸块，可实现应力的缓冲目的，进而提高驱动集成电路的绑定效果。

Description

驱动芯片及显示装置
相关申请的交叉引用
本申请要求于2018年3月5日向中国专利局提交的专利申请201820304616.1的优先权利益，并且在此通过引用的方式将该在先申请的内容并入本文。
技术领域
本公开涉及显示技术领域，具体涉及一种驱动芯片及显示装置。
背景技术
柔性基板因其轻薄且抗冲击性能好等特点而越来越广泛的应用在显示装置中。此类显示装置在制作时一般先将柔性基板固定在玻璃基板上，再进行之后的柔性显示面板制作工艺。在此过程中，需要将驱动集成电路(Driver Integrated Circuit，Driver IC)绑定在显示面板，通过驱动集成电路对显示面板驱动，以使显示面板显示画面。
发明内容
本申请的实施例提供了一种驱动芯片，包括衬底和设置在衬底上的多个连接凸块以及多个缓冲凸块。连接凸块和缓冲凸块中的每个设置在衬底的第一表面，缓冲凸块具有高度为a的第一端面，连接凸块具有高度为b的连接凸块端面，a＜b，所述高度为所述连接凸块或缓冲凸块的相应端面到所述第一表面的距离。
在一些实施例中，梭胡多个缓冲凸块中的至少一些缓冲凸块还具有高度为b的第二端面。
在一些实施例中，所述多个缓冲凸块包括阶梯凸块，所述第一端面和所述第二端面形成所述阶梯凸块的阶梯面。
在一些实施例中，所述多个缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，所述第一子凸块和第二子凸块相互独立设置。
在一些实施例中，所述多个缓冲凸块中的至少一部分缓冲凸块设置在相邻的连接凸块之间。
在一些实施例中，所述多个缓冲凸块中的至少一部分缓冲凸块与所述多个连接凸块中的至少一部分连接凸块彼此交替地布置在所述衬底的所述第一表面上。
在一些实施例中，a与b之间的关系为：b/3≤a＜2b/3。
在一些实施例中，所述多个缓冲凸块均布设置在所述衬底的所述第一表面上。
在一些实施例中，所述多个连接凸块中的至少一组连接凸块排列在第一方向上的同一直线上，所述多个缓冲凸块包括沿所述第一方向上的同一直线排列的至少一组缓冲凸块。
在一些实施例中，所述至少一部分缓冲凸块中的缓冲凸块彼此之间的距离等于所述多个连接凸块中相邻连接凸块之间距离的最小值。
本申请的另外的实施例提供了一种显示装置，包括前述实施例中任一实施例所述的驱动芯片。
这些实施例的其它特征和优点将在随后的具体实施例中阐述。并且，在没有冲突的情况下，上述各项实施例中的技术特征可以以任何方式组合，从而形成另外的不同实施例，这些不同的实施例也属于本申请的保护范围。
附图说明
附图用来提供对本申请实施例技术方案的进一步理解，并且构成说明书的一部分，与下面的具体实施例一起用于解释本公开，并不构成对本申请保护范围的限制。
图1为本申请的发明人知晓的驱动芯片的示例的示意图；
图2为本公开的一个实施例提供的驱动芯片示意图；
图3为本公开的另一实施例提供的驱动芯片示意图；
图4为本公开的另一实施例提供的驱动芯片示意图；
图5为本公开的又一实施例提供的驱动芯片示意图；
具体实施方式
下文中将结合附图对本申请的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
在驱动集成电路的绑定过程中，需要将驱动集成电路背面设置的连接凸块(Bump)接触显示面板上裸露设置的金属引线，以实现相应的电连接功能。在图1的示例中，驱动集成电路背面设置的连接凸块具有相同的高度。本申请人的发明人发现，在这种情况下，在驱动集成电路的绑定过程中，驱动集成电路的多个区域承受的应力不同，易出现绑定效果不良，同时，显示面板易出现显示异常的情况，甚至产生破裂。
具体地，图1所示的驱动芯片包括衬底1和设置在衬底1的第一表面上的多个连接凸块2，连接凸块2之间具有较大的空白区域3，连接凸块2的高度均为b。在上述驱动集成电路的绑定过程中，驱动集成电路的多个区域承受的应力不同，例如，设置有同等高度的连接凸块2的区域和空白区域3的承受应力不同，由此易出现绑定效果欠佳；同时，显示面板易出现显示异常的情况，甚至产生破裂。
如图2所示，其示意性地示出了根据本申请的实施例提供的驱动芯片，包括衬底1和设置在衬底1上的多个连接凸块2，驱动芯片还设置有多个缓冲凸块，缓冲凸块具有高度为a的第一端面41，连接凸块2具有高度为b的端面，a＜b；其中，上述高度具体为端面到衬底1表面之间的距离。
通过设置具有第一端面41的上述缓冲凸块的，能够实现应力的缓冲作用；绑定过程中，驱动集成电路可先接触连接凸块2的端面，随着压力增加，在后期即可接触到缓冲凸块的第一端面41，因而，通过提供不同高度的接触面，实现应力缓冲的技术效果，从而有效提高绑定效果。
在一些实施例中，缓冲凸块设置在衬底1上的空白区域3。通过在空白区域3中设置缓冲凸块，能够有效减小驱动集成电路的多个区域的应力差异，尤其是设置有同等高度的连接凸块2的区域和空白区域3的应力差异，最终能够进一步的提高绑定效果。
在一些实施例中，缓冲凸块的高度a与连接凸块2的高度b之间的关系：b/3≤a＜2b/3。
在一些实施例中，缓冲凸块第一端面41的高度a为连接凸块2的高度的一半，即a＝b/2；在该情形中，能够有效避免因缓冲凸块与连接凸块2的端面高度差过大或过小，进一步提升缓冲凸块的缓冲效果。
在一些实施例中，驱动集成电路通过热压各向异性导电胶膜(Anisotropic Conductive Film，ACF)工艺绑定在显示面板上。
根据本申请的另一实施例提供的驱动芯片，其主体结构与前述的实施例类似，也包括衬底1、连接凸块2和缓冲凸块。关于驱动芯片的主体结构，请参见之前实施例中的详细记载，此处旨在阐述两者之间的区别。
如图3所示，根据另一实施例提供的缓冲凸块，还具有高度为b的第二端面42。也就是说，该实施例中的缓冲凸块具有高度为a的第一端面和高度为b的第二端面。如此设置，在将驱动芯片绑定至显示面板的过程中，能够使得驱动集成电路在接触显示面板初期所受到的应力更均匀，能够更有效地克服空白区域3因未设凸块所带来的应力差异缺陷，能够进一步的提高驱动集成电路的绑定效果。
本实施例中的缓冲凸块包括阶梯凸块，阶梯凸块具有高度为a、b的阶梯面，即上述缓冲凸块为设置有第一端面41的第二端面42的一体结构，如图3所示。利用本申请该实施例提供的阶梯凸块，能够实现逐步缓冲的有益技术效果；同时，上述一体结构的缓冲凸块，具有便捷制造、便捷组装等诸多优点。
根据本申请的一些实施例，驱动芯片的多个连接凸块2包括沿第一方向上的同一直线排列的至少一组连接凸块，多个缓冲凸块包括沿所述第一方向上的同一直线排列的至少一组缓冲凸块。例如，在图3的示例中，上述衬底1上设置有沿第一方向排列的5个连接凸块2，第4个凸块和第5个凸块的之间具有较大的空白区域3；空白区域3内设置有两个缓冲凸块；缓冲凸块的排列方向与前述5个连接凸块2的排列方向相同，且处于同一直线上。上述具有相同排列方向且处于同一直线上的缓冲凸块和连接凸块2能够进一步的保证驱动集成电路的所受应力的均匀分布特性。
在一些实施例中，相邻的缓冲凸块之间的距离等于相邻连接凸块2距离中的最小值，由此能够进一步的提高驱动集成电路所受应力的均匀分布特性。
根据本申请的另外的实施例，如图4所示，缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，第一子凸块和第二子凸块相互独立设置；即第一子凸块具有高度为a的第一端面41，第二子凸块 具有高度为b的第二端面42。
在将驱动芯片绑定至显示面板的过程中，上述包括两个独立设置的具有不同高度的子凸块的缓冲凸块，能够有效避免一体设置的缓冲凸块的阶梯处的应力集中，即能够有效克服一体设置缓冲凸块的第一端面和第二端面的连接处的应力集中缺陷。上述独立设置的子凸块，应用更为灵活，能够进一步的提高驱动集成电路的绑定效果。
在一些实施例中，缓冲凸块均布设置在衬底1上。上述均布设置的缓冲凸块，能够有效保证驱动集成电路所受应力的均匀分布特性，进而能够有效提高驱动集成电路的绑定效果。
根据本申请的又一实施例，驱动芯片的缓冲凸块可以设置在连接凸块2之间，以实现连接凸块2之间区域的应力缓冲技术效果。特别地，当相邻连接凸块2的间距过大时，在相邻连接凸块2的之间区域设有缓冲凸块能够实现良好的应力缓冲技术效果。同样地，上述缓冲凸块也可以设置在衬底1上的空白区域3，与之前描述的各实施例类似，能够有效提高驱动集成电路在空白区域3处的应力缓冲技术效果。
如图5所示，驱动芯片的缓冲凸块包括设置在连接凸块2之间的缓冲凸块，和设置在所述衬底1上的空白区域3的缓冲凸块。多个缓冲凸块中的至少一部分缓冲凸块与所述多个连接凸块中的至少一部分连接凸块彼此交替地布置在所述衬底的所述第一表面上。对于该实施例，能够实现连接凸块2之间的应力缓冲，也能够实现驱动集成电路在空白区域3处的应力缓冲技术效果，能够有效提高驱动集成电路的绑定效果。
本申请的另外的实施例提供了一种显示装置，包括前述各项实施例中任一项所述的的驱动芯片。
在本申请的说明书中，术语“设置”、“相连”、“连接”、“固定”等均应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是直接相连，也可以通过中间媒介间接相连。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
另外，术语“一个实施例”、“一些实施例”、“具体实施例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示 意性表述不一定指的是相同的实施例或实例。而且，描述的具体特征、结构、材料或特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
本领域的技术人员应该明白，本说明书所述的内容仅为便于理解本申请实施例，并非用以限定本发明的实施例的数目。任何所属领域内的技术人员在不脱离本文所揭露的精神和范围的前提下，可以对这些实施例进行任何的修改与变化，本专利申请寻求的保护范围须以所附的权利要求书所界定的范围为准。

Claims (11)

  1. 一种驱动芯片，包括衬底和设置在衬底的第一表面上的多个连接凸块以及多个缓冲凸块，
    所述缓冲凸块具有高度为a的第一端面，所述连接凸块具有高度为b的连接凸块端面，a＜b，所述高度为所述连接凸块或缓冲凸块的相应端面到所述第一表面的距离。
  2. 根据权利要求1所述的驱动芯片，其中多个缓冲凸块中的至少一些缓冲凸块还具有高度为b的第二端面。
  3. 根据权利要求2所述的驱动芯片，其中所述多个缓冲凸块包括阶梯凸块，所述第一端面和所述第二端面形成所述阶梯凸块的阶梯面。
  4. 根据权利要求2所述的驱动芯片，其中所述多个缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，所述第一子凸块和第二子凸块相互独立设置。
  5. 根据权利要求1-4中任一项所述的驱动芯片，其中所述多个缓冲凸块中的至少一部分缓冲凸块设置在相邻的连接凸块之间。
  6. 根据权利要求1-4中任一项所述的驱动芯片，其中所述多个缓冲凸块中的至少一部分缓冲凸块与所述多个连接凸块中的至少一部分连接凸块彼此交替地布置在所述衬底的所述第一表面上。。
  7. 根据权利要求1-4中任一项所述的驱动芯片，其中a与b之间的关系为：b/3≤a＜2b/3。
  8. 根据权利要求1-3中任一项所述的驱动芯片，其中所述多个缓冲凸块均布设置在所述衬底的所述第一表面上。
  9. 根据权利要求1-3中任一项所述的驱动芯片，其中所述多个连接凸块中的至少一组连接凸块排列在第一方向上的同一直线上，所述多个缓冲凸块包括沿第一方向上的所述同一直线排列的至少一组缓冲凸块。
  10. 根据权利要求5所述的驱动芯片，其中所述至少一部分缓冲凸块中的缓冲凸块彼此之间的距离等于所述多个连接凸块中相邻连接凸块之间的距离中的最小值。
  11. 一种显示装置，包括权利要求1-10中任一所述的驱动芯片。
PCT/CN2018/112564 2018-03-05 2018-10-30 驱动芯片及显示装置 WO2019169879A1 (zh)

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