CN207800043U - 驱动芯片及显示装置 - Google Patents

驱动芯片及显示装置 Download PDF

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CN207800043U
CN207800043U CN201820304616.1U CN201820304616U CN207800043U CN 207800043 U CN207800043 U CN 207800043U CN 201820304616 U CN201820304616 U CN 201820304616U CN 207800043 U CN207800043 U CN 207800043U
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convex block
driving chip
height
buffering
face
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刘练彬
梁恒镇
兰传艳
吴国强
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to CN201820304616.1U priority Critical patent/CN207800043U/zh
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Priority to PCT/CN2018/112564 priority patent/WO2019169879A1/zh
Priority to US16/756,976 priority patent/US11217549B2/en
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Abstract

本文公布了一种驱动芯片及显示装置，驱动芯片包括衬底和设置在衬底上的多个连接凸块，还设置有多个缓冲凸块，所述缓冲凸块具有高度为a的第一端面，所述连接凸块具有高度为b的端面，a＜b，所述高度为端面到衬底表面之间的距离；显示装置包括所述驱动芯片。本实用新型可应用于显示技术领域，应用本实用新型能够有效克服现有技术中存在的缺陷，通过增加优选设置的凸块，实现应力的缓冲目的，进而提高驱动集成电路的绑定效果。

Description

驱动芯片及显示装置
技术领域
本申请涉及显示技术领域，具体涉及一种驱动芯片及显示装置。
背景技术
柔性基板因其轻薄且抗冲击性能好等特点而越来越广泛的应用在显示装置中。此类显示装置在制作时一般先将柔性基板固定在玻璃基板上，再进行之后的柔性显示面板制作工艺。过程中，需要将驱动集成电路(Driver Integrated Circuit,Driver IC)绑定在显示面板(Panel)，通过驱动集成电路对显示面板驱动，以使显示面板显示出预设的画面。
在驱动集成电路的绑定过程中，需要将驱动集成电路背面设置的连接凸块(Bump)接触显示面板上裸露设置的金属引线，以实现相应的电连接功能；其中，上述驱动集成电路背面设置的连接凸块的高度均相同。在上述驱动集成电路的绑定过程中，驱动集成电路的多个区域承受的应力不同，易出现绑定效果欠佳的缺陷；同时，显示面板易出现显示异常的情况，甚至产生破裂。
实用新型内容
本申请解决的技术问题是提供一种驱动芯片及显示装置，能够有效克服现有技术中存在的缺陷，通过增加优选设置的凸块，以实现应力的缓冲目的，进而提高驱动集成电路的绑定效果。
为解决上述技术问题，本申请提供了一种驱动芯片，包括衬底和设置在衬底上的多个连接凸块，还设置有多个缓冲凸块；
所述缓冲凸块具有高度为a的第一端面，所述连接凸块具有高度为b的端面，a＜b，所述高度为端面到衬底表面之间的距离。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块还具有高度为b的第二端面。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，所述第一子凸块和第二子凸块相互独立设置。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块包括阶梯凸块，所述阶梯凸块具有高度为a、b的阶梯面。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块设置在所述连接凸块之间，和/或设置在所述衬底上的空白区域。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块的高度a与连接凸块的高度b之间的关系：b/3≤a＜2b/3。
上述驱动芯片，还可具有如下特点：
所述缓冲凸块均布设置在所述衬底上。
上述驱动芯片，还可具有如下特点：
所述多个连接凸块包括沿第一方向排列的至少一组连接凸块，所述多个缓冲凸块包括沿所述第一方向排列的至少一组缓冲凸块。
上述驱动芯片，还可具有如下特点：
缓冲凸块之间的距离等于相邻连接凸块距离的最小值。
为了解决上述技术问题，本实用新型还提供了一种显示装置，包括所述的驱动芯片。
本申请上述技术方案具有如下有益效果：
相比于现有技术，本申请通过增加不同高度的凸块，以实现应力的缓冲目的，进而提高驱动集成电路的绑定效果。
本申请的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本实用新型实施例而了解。本申请的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本申请技术方案的进一步理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。
图1为现有技术中的驱动芯片示意图；
图2为本实用新型实施例一的驱动芯片示意图；
图3为本实用新型实施例二的驱动芯片示意图；
图4为本实用新型实施例三的驱动芯片示意图；
图5为本实用新型实施例四的驱动芯片示意图；
图示说明：
1-衬底，2-连接凸块，3-空白区域，41-缓冲凸块的第一端面，42-缓冲凸块的第二端面。
具体实施方式
下文中将结合附图对本申请的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
如图1所示，现有技术中的驱动芯片包括衬底1和设置在衬底1上的多个连接凸块2，连接凸块2之间具有较大的空白区域3，连接凸块2的高度均为b。在上述驱动集成电路的绑定过程中，驱动集成电路的多个区域承受的应力不同，如设置有同等高度的连接凸块2的区域和空白区域3的承受应力不同，易出现绑定效果欠佳的缺陷；同时，显示面板易出现显示异常的情况，甚至产生破裂。
为了能够有效解决上述技术问题，本实用新型提供有如下多个实施例：
实施例一：
如图2所示，本实用新型实施例一提供了一种驱动芯片，包括衬底1和设置在衬底1上的多个连接凸块2，还设置有多个缓冲凸块；缓冲凸块具有高度为a的第一端面41，连接凸块2具有高度为b的端面，a＜b；其中，上述高度具体为端面到衬底1表面之间的距离。
具体操作中，通过上述缓冲凸块第一端面41的优选设置，能够实现应力的缓冲作用；绑定过程中，驱动集成电路可先接触连接凸块2的端面，随着压力增加，在后期即可接触到缓冲凸块的第一端面41，能够通过增加不同高度的接触面，实现应力缓冲的技术效果，最终能够有效提高绑定效果。
本实施例中的缓冲凸块，优选设置在衬底1上的空白区域3。
具体操作中，通过上述优选区域的设置，能够有效减小驱动集成电路的多个区域的应力差异，尤其是设置有同等高度的连接凸块2的区域和空白区域3的应力差异，最终能够进一步的提高绑定效果。
本实施例中，缓冲凸块第一端面41的高度a与连接凸块2的高度b之间的关系：b/3≤a＜2b/3。
具体操作中，上述缓冲凸块第一端面41的高度a优选为连接凸块2的高度的一半，即a＝b/2；上述优选高度尺寸的设置，能够有效避免因缓冲凸块与连接凸块2的端面高度差过大或过小所造成的缓冲效果欠佳的缺陷。
本实施例中的驱动集成电路通过热压各向异性导电胶膜(AnisotropicConductive Film，ACF)工艺绑定在显示面板上。
实施例二：
本实用新型实施例二提供了一种驱动芯片，主体结构与实施例一类似，也包括衬底1、连接凸块2和缓冲凸块；关于主体结构的具体设置，请参见实施例一中的详细记载，此处旨在阐述两者之间的区别。
如图3所示，本实施例中的缓冲凸块，还具有高度为b的第二端面42。
具体操作中，通过高度等同于连接凸块2端面高度的第二端面42的优选设置，能够使得驱动集成电路在接触初期所受到的应力更均匀，能够有效克服现有技术中的空白区域3因未设凸块所带来的应力差异缺陷，能够进一步的提高驱动集成电路的绑定效果。
本实施例中的缓冲凸块包括阶梯凸块，阶梯凸块具有高度为a、b的阶梯面，即上述缓冲凸块为设置有第一端面41的第二端面42的一体结构。
具体操作中，上述阶梯凸块的设置，能够实现相应的逐步缓冲的有益技术效果；同时，上述一体结构的缓冲凸块，具有便捷制造、便捷组装等诸多优点。
本实施例中，多个连接凸块2包括沿第一方向排列的至少一组连接凸块2，多个缓冲凸块包括沿第一方向排列的至少一组缓冲凸块。
具体操作中，上述衬底1上设置有沿第一方向排列的5个连接凸块2，第4个凸块和第5个凸块的之间具有较大的空白区域3；空白区域3内设置有两个缓冲凸块；缓冲凸块的排列方向与连接凸块2的排列方向相同，均沿第一方向排列；上述具有相同排列方向的缓冲凸块和连接凸块2，能够进一步的保证驱动集成电路的所受应力的均匀分布特性。
本实施例中，缓冲凸块之间的距离等于相邻连接凸块2距离的最小值。
具体操作中，通过上述缓冲凸块的优选间距的设置，能够进一步的提高驱动集成电路所受应力的均匀分布特性。
实施例三：
本实用新型实施例三提供了一种驱动芯片，主体结构与实施例二类似，也包括衬底1、连接凸块2和缓冲凸块；关于主体结构的具体设置，请参见实施例二中的详细记载，此处旨在阐述两者之间的区别。
如图4所示，本实施例中的缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，第一子凸块和第二子凸块相互独立设置；即第一子凸块具有高度为a的第一端面41，第二子凸块具有高度为b的第二端面42。
具体操作中，上述包括两个独立设置的子凸块的缓冲凸块，能够有效克服一体设置缓冲凸块的阶梯处的应力集中缺陷，即能够有效克服一体设置缓冲凸块的第一端面和第二端面的连接处的应力集中缺陷；上述独立设置的子凸块，应用更为灵活，能够进一步的提高驱动集成电路的绑定效果。
本实施例中的缓冲凸块均布设置在衬底1上。
具体操作中，上述均布设置的缓冲凸块，能够有效保证驱动集成电路所受应力的均匀分布特性，进而能够有效提高驱动集成电路的绑定效果。
实施例四：
本实用新型实施例四提供了一种驱动芯片，主体结构与实施例三类似，也包括衬底1、连接凸块2和缓冲凸块；关于主体结构的具体设置，请参见实施例三中的详细记载，此处旨在阐述两者之间的区别。
本实施例中的缓冲凸块可以设置在连接凸块2之间，以实现连接凸块2之间区域的应力缓冲技术效果，当相邻连接凸块2的间距过大时，在相邻连接凸块2的之间区域设有缓冲凸块，能够实现良好的应力缓冲技术效果；上述缓冲凸块也可以设置在衬底1上的空白区域3，与实施例一、二、三的设置位置类似，能够有效提高驱动集成电路在空白区域3处的应力缓冲技术效果。
如图5所示，本实施例中的缓冲凸块包括设置在所述连接凸块2之间的部分缓冲凸块，和设置在所述衬底1上的空白区域3的部分缓冲凸块。
具体操作中，上述优选设置的缓冲凸块，能够实现连接凸块2之间的应力缓冲，也能够实现驱动集成电路在空白区域3处的应力缓冲技术效果，能够有效提高驱动集成电路的绑定效果。
实施例五：
本实用新型实施例五提供了一种显示装置，包括实施例一或实施例二或实施例三或实施例四中记载的驱动芯片。
在本申请的描述中，术语“设置”、“相连”、“连接”、“固定”等均应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是直接相连，也可以通过中间媒介间接相连。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本说明书的描述中，术语“一个实施例”、“一些实施例”、“具体实施例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或实例。而且，描述的具体特征、结构、材料或特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
本领域的技术人员应该明白，虽然本实用新型实施例所揭露的实施方式如上，但所述的内容仅为便于理解本实用新型实施例而采用的实施方式，并非用以限定本实用新型实施例。任何本实用新型实施例所属领域内的技术人员，在不脱离本实用新型实施例所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本实用新型实施例的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (10)

1.一种驱动芯片，包括衬底和设置在衬底上的多个连接凸块，其特征在于，还设置有多个缓冲凸块；
所述缓冲凸块具有高度为a的第一端面，所述连接凸块具有高度为b的端面，a＜b，所述高度为端面到衬底表面之间的距离。
2.根据权利要求1所述的驱动芯片，其特征在于，
所述缓冲凸块还具有高度为b的第二端面。
3.根据权利要求2所述的驱动芯片，其特征在于，
所述缓冲凸块包括高度为a的第一子凸块和高度为b的第二子凸块，所述第一子凸块和第二子凸块相互独立设置。
4.根据权利要求2所述的驱动芯片，其特征在于，
所述缓冲凸块包括阶梯凸块，所述阶梯凸块具有高度为a、b的阶梯面。
5.根据权利要求1-4中任一所述的驱动芯片，其特征在于，
所述缓冲凸块设置在所述连接凸块之间，和/或设置在所述衬底上的空白区域。
6.根据权利要求1-4中任一所述的驱动芯片，其特征在于，
所述缓冲凸块的高度a与连接凸块的高度b之间的关系：b/3≤a＜2b/3。
7.根据权利要求1-4中任一所述的驱动芯片，其特征在于，
所述缓冲凸块均布设置在所述衬底上。
8.根据权利要求7所述的驱动芯片，其特征在于，
所述多个连接凸块包括沿第一方向排列的至少一组连接凸块，所述多个缓冲凸块包括沿所述第一方向排列的至少一组缓冲凸块。
9.根据权利要求8所述的驱动芯片，其特征在于，
缓冲凸块之间的距离等于相邻连接凸块距离的最小值。
10.一种显示装置，其特征在于，包括权利要求1-9中任一所述的驱动芯片。
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