WO2019051955A1 - Oled 显示面板及其制备方法 - Google Patents

Oled 显示面板及其制备方法 Download PDF

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Publication number
WO2019051955A1
WO2019051955A1 PCT/CN2017/108862 CN2017108862W WO2019051955A1 WO 2019051955 A1 WO2019051955 A1 WO 2019051955A1 CN 2017108862 W CN2017108862 W CN 2017108862W WO 2019051955 A1 WO2019051955 A1 WO 2019051955A1
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Prior art keywords
planarization layer
hole
preparing
layer
anode metal
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PCT/CN2017/108862
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English (en)
French (fr)
Inventor
唐甲
张晓星
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US15/574,621 priority Critical patent/US10566398B2/en
Publication of WO2019051955A1 publication Critical patent/WO2019051955A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an OLED display panel and a method of fabricating the same.
  • OLEDs Organic light-emitting diodes
  • OLEDs have the characteristics of self-luminescence, fast response speed, wide viewing angle, etc., and have broad application prospects.
  • the vapor deposition material reaches the pixel area, the film thickness uniformity is good, and the flatness of the pixel area is relatively loose, and IJP (Ink Jet Printing) , inkjet printing) process of AMOLED ink (ink) printing into the pixel area is flowing, ink
  • IJP Ink Jet Printing
  • IJP Ink Jet Printing
  • the flatness of the base of the pixel area It is required that the maximum step difference of the entire pixel area is as small as possible.
  • the film thickness is uneven after drying, which ultimately affects the light emission. Effect, therefore Flattening Layer of IJP-AMOLED
  • the flatness of the PLN has more stringent requirements.
  • PLN is an organic photosensitive material.
  • the current solution is to thicken the PLN film.
  • the prior art IJP-AMOLED In the process, the flattening layer is difficult to achieve the flatness of the preparation requirements, the maximum step difference of the entire pixel region is large, the spreadability of the ink is not uniform, and the thickness of the luminescent layer after drying is not uniform, thereby affecting the OLED. Display panel display effect.
  • the invention provides a preparation method of an OLED display panel, which can improve the flatness of the surface of the planarization layer to solve
  • the planarization layer is difficult to achieve the flatness of the preparation requirement, and the film thickness of the luminescent layer is not uniform, which affects the technical problem of the display effect of the OLED display panel.
  • the invention provides a method for preparing an OLED display panel, the method comprising:
  • Step S10 providing a TFT array substrate, the surface of the TFT substrate having a convex portion
  • Step S20 in the TFT Preparing a first planarization layer on the surface of the array substrate, the film thickness of the first planarization layer exceeding the convex portion;
  • Step S30 preparing a second planarization layer on the surface of the first planarization layer
  • the film thickness of the second planarization layer is greater than or equal to the film thickness of the first planarization layer.
  • the step S20 further includes:
  • Step S201 preparing a first pass in a corresponding area of the first planarization layer
  • the step S30 further includes:
  • Step S301 preparing a second pass in a corresponding area of the second planarization layer
  • the second through hole being located above the corresponding first through hole.
  • the aperture of the second through hole is larger than the aperture of the first through hole, and the first through hole and the second through hole form a stepped through hole.
  • the method further includes:
  • Step S40 Preparing an anode metal layer on the surface of the second planarization layer, and patterning the anode metal layer to form an anode metal pattern array;
  • Step S50 Forming a pixel defining bank array on the surface of the second planarization layer, wherein a pixel defining bank is located between adjacent two anode metal patterns;
  • Step S60 preparing a luminescent material in a pixel region formed by the pixel defining bank.
  • the method further includes:
  • Step S40 preparing a third planarization layer on the surface of the second planarization layer
  • the step S40 further includes:
  • Step S401 preparing a third pass in a corresponding area of the third planarization layer
  • the third through hole being located above the corresponding second through hole.
  • the aperture of the third through hole is larger than the aperture of the second through hole, and the third through hole, the second through hole and the third through hole form a stepped through hole.
  • the first planarization layer is prepared using a polyimide material and the second planarization layer is prepared using a polymethyl methacrylate material.
  • the first planarization layer and the second planarization layer are both prepared using a polyimide material.
  • the invention also provides a method for preparing an OLED display panel, the method comprising:
  • Step S10 providing a TFT array substrate, the surface of the TFT substrate having a convex portion
  • Step S20 in the TFT Preparing a first planarization layer on the surface of the array substrate, the film thickness of the first planarization layer exceeding the convex portion;
  • Step S30 preparing a second planarization layer on the surface of the first planarization layer.
  • the step S20 further includes:
  • Step S201 preparing a first pass in a corresponding area of the first planarization layer
  • the step S30 further includes:
  • Step S301 preparing a second pass in a corresponding area of the second planarization layer
  • the second through hole being located above the corresponding first through hole.
  • the aperture of the second through hole is larger than the aperture of the first through hole, and the first through hole and the second through hole form a stepped through hole.
  • the method further includes:
  • Step S40 Preparing an anode metal layer on the surface of the second planarization layer, and patterning the anode metal layer to form an anode metal pattern array;
  • Step S50 Forming a pixel defining bank array on the surface of the second planarization layer, wherein a pixel defining bank is located between adjacent two anode metal patterns;
  • Step S60 preparing a luminescent material in a pixel region formed by the pixel defining bank.
  • the method further includes:
  • Step S40 preparing a third planarization layer on the surface of the second planarization layer
  • the step S40 further includes:
  • Step S401 preparing a third pass in a corresponding area of the third planarization layer
  • the third through hole being located above the corresponding second through hole.
  • the aperture of the third through hole is larger than the aperture of the second through hole, and the third through hole, the second through hole and the third through hole form a stepped through hole.
  • the first planarization layer is prepared using a polyimide material and the second planarization layer is prepared using a polymethyl methacrylate material.
  • the first planarization layer and the second planarization layer are both prepared using a polyimide material.
  • an OLED display panel produced by the above OLED display panel manufacturing method includes:
  • TFT array substrate having a convex portion on a surface thereof
  • a second planarization layer is prepared on the surface of the first planarization layer.
  • the beneficial effects of the present invention are: OLED provided by the present invention compared to the existing OLED display panel manufacturing method
  • the method for preparing the display panel, the flattening layer is prepared in two steps, and a flattening layer with higher flatness can be obtained; and the prior art IJP-AMOLED is solved.
  • the flattening layer is difficult to achieve the flatness of the preparation requirements, the maximum step difference of the entire pixel region is large, the spreadability of the ink is not uniform, and the thickness of the luminescent layer after drying is not uniform, thereby affecting the OLED. Display panel display effect.
  • FIG. 1 is a schematic flow chart of a method for preparing an OLED display panel according to the present invention
  • FIG. 2 is a schematic structural view of an OLED display panel prepared according to the preparation method of the present invention.
  • the present invention is directed to the prior art IJP-AMOLED
  • the flattening layer is difficult to achieve the flatness of the preparation requirements
  • the maximum step difference of the entire pixel area is large
  • the spreadability of the spray material (ink) is not uniform
  • the thickness of the light-emitting layer after drying is not uniform, thereby affecting the OLED.
  • the display effect of the display panel can be solved by this embodiment.
  • a method for preparing an OLED display panel includes the following steps:
  • Step S10 providing a TFT array substrate, the surface of the TFT substrate having a convex portion.
  • the method specifically includes: Step S101, providing a substrate; Step S102, preparing on the surface of the substrate TFT device.
  • Step S101 providing a substrate
  • Step S102 preparing on the surface of the substrate TFT device.
  • a scan line and a data line are simultaneously prepared, the scan line is correspondingly connected to a gate of the TFT device, and the data line is connected to the TFT The source of the device.
  • the scan line and the data line are disposed such that a region corresponding to the scan line and the data line is higher than other regions to form a convex portion.
  • Step S20 in the TFT A first planarization layer is prepared on the surface of the array substrate, and the film thickness of the first planarization layer exceeds the convex portion. Specifically, in the TFT The surface of the array substrate is coated with a photosensitive material having a thickness twice the height of the convex portion, and the photosensitive material is cured to form the first planarization layer.
  • the first planarization layer after curing corresponds to a thickness of the first planarization layer on a surface of the convex portion, and is smaller than a thickness of a film layer in other regions of the first planarization layer.
  • Step S30 Forming a second planarization layer on the surface of the first planarization layer. Specifically, a surface of the first planarization layer is coated with a photosensitive material having a certain thickness, and the photosensitive material is cured to form the second planarization layer; corresponding to the second flat above the convex portion The layer is at the same level as the second planarization layer located in other regions.
  • the first planarization layer is prepared, according to the TFT Forming the second planarization layer by a step difference of the array substrate; for example, when the maximum step difference is small, setting the film thickness of the second planarization layer to be equal to the film thickness of the first planarization layer; When the maximum step difference is small, the film thickness of the second planarization layer is set to be larger than the film thickness of the first planarization layer.
  • a third planarization layer may be prepared on the surface of the second planarization layer to reduce the maximum segment difference to within the range of values.
  • the method for preparing an OLED display panel provided by the present invention further includes the steps of preparing an OLED light emitting device:
  • Step S40 An anode metal layer is prepared on the surface of the second planarization layer, and the anode metal layer is patterned to form an anode metal pattern array.
  • Step S50 Forming a pixel-defining bank array on the surface of the second planarization layer, a pixel defining bank portion is located between adjacent two anode metal patterns; and the pixel defining bank portion is made of a hydrophobic material.
  • Step S60 Forming a luminescent material in a pixel region formed by the pixel defining bank; the luminescent material is prepared by ink printing.
  • Step S70 preparing a cathode metal layer on the luminescent material.
  • the step S20 further includes: step S201 Forming a first via hole in a corresponding region of the first planarization layer; for example, the first via hole corresponds to the pixel region for implementing the OLED light emitting device and the TFT The connection of the device; for example, the first via hole is also disposed in a non-display area of the OLED display panel for connecting the TFT device and the driving chip.
  • the step S30 further includes: step S301 Forming a second via hole in a corresponding region of the second planarization layer, the second via hole being located above the corresponding first via hole.
  • the aperture of the second through hole is larger than the aperture of the first through hole, so that the first through hole and the second through hole form a stepped through hole, thereby buffering the electrode forming film to climb, avoiding metal The film climbs off the line.
  • the surface of the second planarization layer is prepared with a third planarization layer, then Forming a third through hole in a corresponding region of the third planarization layer, wherein the third through hole is located above the corresponding second through hole; wherein a diameter of the third through hole is larger than the first hole
  • the aperture of the two through holes, the third through hole, the second through hole and the third through hole form a stepped through hole; the buffer is used for buffering the film formation of the electrode to avoid the metal film layer climbing and breaking.
  • the first planarization layer is prepared by using a polyimide material
  • the second planarization layer is prepared by using a polymethyl methacrylate material
  • the film layer formed by the polyimide material and the polymethylation The methyl acrylate material forms a film layer with better insulating properties, and the two films are tightly bonded to avoid the risk of film detachment.
  • first planarization layer and the second planarization layer are both prepared by using a polyimide material; polyimide (Polyimide, abbreviation The PI material has better flexibility, and both the first planarization layer and the second planarization layer are made of a flexible PI material, which is suitable for a bendable OLED display device.
  • the present invention also provides an OLED prepared by the above method for preparing an OLED display panel. Display panel.
  • the OLED display panel includes: a TFT array substrate 201 having a convex portion 202 on a surface thereof a first planarization layer 203 is prepared on the surface of the TFT array substrate 201, a film thickness of the first planarization layer 203 exceeds the convex portion 202; and a second planarization layer 204 Prepared on the surface of the first planarization layer 203.
  • a first via hole 205 is formed on a surface of the first planarization layer 203; a second via hole is formed on a surface of the second planarization layer 204 206, the second through hole 206 is located above the first through hole 205, and forms a stepped through hole with the first through hole 205.
  • a surface of the second planarization layer 204 is patterned with an anode metal layer 207; the second planarization layer 204 The surface is prepared with an array of pixel defining banks 208, a pixel defining bank 208 is located between adjacent two anode metal patterns; and a pixel material region formed by the pixel defining bank 208 is provided with a luminescent material 209 .
  • the beneficial effects of the present invention are: OLED provided by the present invention compared to the existing OLED display panel manufacturing method
  • the method for preparing the display panel, the flattening layer is prepared in two steps, and a flattening layer with higher flatness can be obtained; and the prior art IJP-AMOLED is solved.
  • the flattening layer is difficult to achieve the flatness of the preparation requirements, the maximum step difference of the entire pixel region is large, the spreadability of the ink is not uniform, and the thickness of the luminescent layer after drying is not uniform, thereby affecting the OLED. Display panel display effect.

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  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种OLED显示面板制备方法，方法包括：步骤S10，提供TFT阵列基板（201），TFT阵列基板（201）表面具有凸起部（202）；步骤S20，在TFT阵列基板（201）表面制备第一平坦化层（203），第一平坦化层（203）的膜厚超过凸起部（202）；以及，步骤S30，在第一平坦化层（203）表面制备第二平坦化层（204）。

Description

OLED 显示面板及其制备方法 技术领域
本发明涉及显示技术领域，尤其涉及一种 OLED 显示面板及其制备方法。
背景技术
有机发光二极管（ OLED ）具有自发光性、应答速度快、广视角等特点，应用前景广阔。
对于蒸镀 AMOLED （ Active-matrix organic light emitting diode ，主动式有机发光二极体）来讲，蒸镀材料到达像素区膜厚均匀性好，对像素区基底平坦度的要求相对较松，而 IJP （ Ink Jet Printing ，喷墨印刷）工艺的 AMOLED 的 ink （油墨）打印到像素区是流动的， ink 铺展性的主要影响因素之一是像素区基底的平坦度，要求整个像素区最大段差越小越好，超过该规格时 ink 的铺展性不均，则烘干后膜厚不均，最终影响发光效果，因此 IJP-AMOLED 的平坦化层 PLN 的平坦能力有了更苛刻的要求。
PLN 是有机感光材料，目前的应对方案是 PLN 膜层的加厚，段差越大需要越厚的 PLN ，所以存在的问题及可能的风险： 1 、 PLN 的一次平坦化能力是有限的，即当基底段差达到一定程度， PLN 已经增加至很厚（ 3um 以上）平坦度依然不能达到要求； 2 、 PLN 都有开孔设计，开孔过深对后续的薄膜沉积有影响，比如爬坡断线等不良。
综上所述，现有技术的 IJP-AMOLED 在制程中，平坦化层难以达到制备需求的平整度，整个像素区最大段差较大， ink 的铺展性不均匀，烘干后的发光层膜厚不均匀，进而影响 OLED 显示面板的显示效果。
 技术问题
本发明提供一种 OLED 显示面板的制备方法，能够提高平坦化层表面的平整度， 以解决 现有技术中因平坦化层难以达到制备需求的平整度而使得发光层膜厚不均匀，影响 OLED 显示面板的显示效果的技术问题 。
技术解决方案
为解决上述问题，本发明提供的技术方案如下：
本发明提供一种 OLED 显示面板制备方法，所述方法包括：
步骤 S10 ，提供 TFT 阵列基板，所述 TFT 基板表面具有凸起部；
步骤 S20 ，在所述 TFT 阵列基板表面制备第一平坦化层，所述第一平坦化层的膜厚超过所述凸起部；以及，
步骤 S30 ，在所述第一平坦化层表面制备第二平坦化层；
所述第二平坦化层的膜厚大于或等于所述第一平坦化层的膜厚。
根据本发明一优选实施例：
所述步骤 S20 还包括：
步骤 S201 ，在所述第一平坦化层的对应区域制备第一通
孔；
所述步骤 S30 还包括：
步骤 S301 ，在所述第二平坦化层的对应区域制备第二通
孔，所述第二通孔位于相对应的所述第一通孔的上方。
根据本发明一优选实施例，所述第二通孔的孔径大于所述第一通孔的孔径，所述第一通孔与所述第二通孔形成台阶通孔。
根据本发明一优选实施例，所述方法还包括：
步骤 S40 ，在所述第二平坦化层表面制备阳极金属层，并将所述阳极金属层经图案化处理形成阳极金属图案阵列；
步骤 S50 ，在所述第二平坦化层表面制备像素定义堤部阵列，一像素定义堤部位于相邻两阳极金属图案之间；
步骤 S60 ，在所述像素定义堤部形成的像素区域内制备发光材料。
根据本发明一优选实施例， 所述方法还包括：
步骤 S40 ，在所述第二平坦化层表面制备第三平坦化层；
所述步骤 S40 还包括：
步骤 S401 ，在所述第三平坦化层的对应区域制备第三通
孔，所述第三通孔位于相对应的所述第二通孔的上方。
根据本发明一优选实施例， 所述第三通孔的孔径大于所述第二通孔的孔径，所述第三通孔、第二通孔以及第三通孔形成台阶通孔。
根据本发明一优选实施例，所述第一平坦化层采用聚酰亚胺材料制备，所述第二平坦化层采用聚甲基丙烯酸甲酯材料制备。
根据本发明一优选实施例，所述第一平坦化层和所述第二平坦化层均采用聚酰亚胺材料制备。
本发明还提供一种 OLED 显示面板制备方法，所述方法包括：
步骤 S10 ，提供 TFT 阵列基板，所述 TFT 基板表面具有凸起部；
步骤 S20 ，在所述 TFT 阵列基板表面制备第一平坦化层，所述第一平坦化层的膜厚超过所述凸起部；以及，
步骤 S30 ，在所述第一平坦化层表面制备第二平坦化层。
根据本发明一优选实施例：
所述步骤 S20 还包括：
步骤 S201 ，在所述第一平坦化层的对应区域制备第一通
孔；
所述步骤 S30 还包括：
步骤 S301 ，在所述第二平坦化层的对应区域制备第二通
孔，所述第二通孔位于相对应的所述第一通孔的上方。
根据本发明一优选实施例，所述第二通孔的孔径大于所述第一通孔的孔径，所述第一通孔与所述第二通孔形成台阶通孔。
根据本发明一优选实施例，所述方法还包括：
步骤 S40 ，在所述第二平坦化层表面制备阳极金属层，并将所述阳极金属层经图案化处理形成阳极金属图案阵列；
步骤 S50 ，在所述第二平坦化层表面制备像素定义堤部阵列，一像素定义堤部位于相邻两阳极金属图案之间；
步骤 S60 ，在所述像素定义堤部形成的像素区域内制备发光材料。
根据本发明一优选实施例， 所述方法还包括：
步骤 S40 ，在所述第二平坦化层表面制备第三平坦化层；
所述步骤 S40 还包括：
步骤 S401 ，在所述第三平坦化层的对应区域制备第三通
孔，所述第三通孔位于相对应的所述第二通孔的上方。
根据本发明一优选实施例， 所述第三通孔的孔径大于所述第二通孔的孔径，所述第三通孔、第二通孔以及第三通孔形成台阶通孔。
根据本发明一优选实施例，所述第一平坦化层采用聚酰亚胺材料制备，所述第二平坦化层采用聚甲基丙烯酸甲酯材料制备。
根据本发明一优选实施例，所述第一平坦化层和所述第二平坦化层均采用聚酰亚胺材料制备。
依据本发明的上述目的， 提出一种由上述 OLED 显示面板制备方法制得的 OLED 显示面板，所述 OLED 显示面板包括：
TFT 阵列基板，所述 TFT 基板表面具有凸起部；
第一平坦化层，制备于所述 TFT 阵列基板表面，所述第一平坦化层的膜厚超过所述凸起部；以及，
第二平坦化层，制备于所述第一平坦化层表面。
 有益效果
本发明的有益效果为： 相较于现有的 OLED 显示面板制备方法，本发明提供的 OLED 显示面板制备方法，将平坦化层分两道工序制备，可得到较高平坦度的平坦化层；解决了 现有技术的 IJP-AMOLED 在制程中，平坦化层难以达到制备需求的平整度，整个像素区最大段差较大， ink 的铺展性不均匀，烘干后的发光层膜厚不均匀，进而影响 OLED 显示面板的显示效果。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图 1 为本发明 OLED 显示面板制备方法流程示意图；
图 2 为根据本发明制备方法制得的 OLED 显示面板结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如 [ 上 ] 、 [ 下 ] 、 [ 前 ] 、 [ 后 ] 、 [ 左 ] 、 [ 右 ] 、 [ 内 ] 、 [ 外 ] 、 [ 侧面 ] 等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本发明针对 现有技术的 IJP-AMOLED 在制程中，平坦化层难以达到制备需求的平整度，整个像素区最大段差较大，喷涂材料（ ink ）的铺展性不均匀，烘干后的发光层膜厚不均匀，进而影响 OLED 显示面板的显示效果 ，本实施例能够解决该缺陷 。
如图 1 所示，本发明提供的 OLED 显示面板的制备方法，所述方法包括如下步骤：
步骤 S10 ，提供 TFT 阵列基板，所述 TFT 基板表面具有凸起部。
在所述步骤 S10 中，具体包括：步骤 S101 ，提供一基板；步骤 S102 ，在所述基板表面制备 TFT 器件。在制备所述 TFT 器件时，同时制备扫描线和数据线，所述扫描线对应连接所述 TFT 器件的栅极，所述数据线对应连接所述 TFT 器件的源极。所述扫描线与所述数据线的设置，使得所述扫描线与所述数据线对应的区域高于其他区域，形成凸起部。
步骤 S20 ，在所述 TFT 阵列基板表面制备第一平坦化层，所述第一平坦化层的膜厚超过所述凸起部。具体的，在所述 TFT 阵列基板表面涂布厚度为所述凸起部高度两倍的感光材料，将感光材料固化形成所述第一平坦化层。
固化后的所述第一平坦化层，对应位于所述凸起部表面的所述第一平坦化层的厚度，小于所述第一平坦化层其他区域的膜层厚度。
步骤 S30 ，在所述第一平坦化层表面制备第二平坦化层。具体的，在所述第一平坦化层表面涂布具有一定厚度的感光材料，将所述感光材料固化形成所述第二平坦化层；对应位于所述凸起部上方的所述第二平坦化层，与位于其他区域的所述第二平坦化层处于同一水平高度。
在制备完所述第一平坦化层后，根据所述 TFT 阵列基板的段差值制备所述第二平坦化层；例如，当最大段差值较小时，将所述第二平坦化层膜厚设置为与所述第一平坦化层的膜厚相等；又如，当最大段差值较小时，将所述第二平坦化层膜厚设置为大于所述第一平坦化层的膜厚。
例如，当制备完所述第二平坦化层后，所述 TFT 阵列基板的最大段差值仍然大于一定范围值时，可在所述第二平坦化层表面制备第三平坦化层，以将最大段差值缩小至范围值内。
本发明提供的 OLED 显示面板的制备方法，还包括制备 OLED 发光器件的步骤：
步骤 S40 ，在所述第二平坦化层表面制备阳极金属层，并将所述阳极金属层经图案化处理形成阳极金属图案阵列。
步骤 S50 ，在所述第二平坦化层表面制备像素定义堤部阵列，一像素定义堤部位于相邻两阳极金属图案之间；所述像素定义堤部采用疏水性材料。
步骤 S60 ，在所述像素定义堤部形成的像素区域内制备发光材料；所述发光材料采用油墨印刷的方式制备。
步骤 S70 ，在所述发光材料上制备阴极金属层。
所述步骤 S20 还包括：步骤 S201 ，在所述第一平坦化层的对应区域制备第一通孔；例如，所述第一通孔对应于所述像素区域，用以实现所述 OLED 发光器件与所述 TFT 器件的连接；例如，所述第一通孔还设置于 OLED 显示面板的非显示区域，用以实现 TFT 器件与驱动芯片的连接。
所述步骤 S30 还包括：步骤 S301 ，在所述第二平坦化层的对应区域制备第二通孔，所述第二通孔位于相对应的所述第一通孔的上方。
其中，所述第二通孔的孔径大于所述第一通孔的孔径，使得所述第一通孔与所述第二通孔形成台阶通孔，从而缓冲电极成膜的爬坡，避免金属膜层爬坡断线。
如果所述第二平坦化层表面制备有第三平坦化层，则 在所述第三平坦化层的对应区域制备第三通孔，所述第三通孔位于相对应的所述第二通孔的上方；其中，所述第三通孔的孔径大于所述第二通孔的孔径，所述第三通孔、第二通孔以及第三通孔形成台阶通孔；用以缓冲电极成膜的爬坡，避免金属膜层爬坡断线。
本发明实施例中，所述第一平坦化层采用聚酰亚胺材料制备，所述第二平坦化层采用聚甲基丙烯酸甲酯材料制备；聚酰亚胺材料形成的膜层与聚甲基丙烯酸甲酯材料形成膜层，具有较佳的绝缘特性，而且两膜层间结合紧密，避免脱膜风险。
又如，所述第一平坦化层和所述第二平坦化层均采用聚酰亚胺材料制备；聚酰亚胺（ Polyimide ，简称 PI ）材料具有较佳的柔韧性，将所述第一平坦化层和所述第二平坦化层均采用具有柔韧性的 PI 材料，适用于可弯折 OLED 显示装置。
如图 2 所示，本发明还提供了一种采用上述 OLED 显示面板的制备方法制备的 OLED 显示面板。
所述 OLED 显示面板包括： TFT 阵列基板 201 ，所述 TFT 基板表面具有凸起部 202 ；第一平坦化层 203 ，制备于所述 TFT 阵列基板 201 表面，所述第一平坦化层 203 的膜厚超过所述凸起部 202 ；以及，第二平坦化层 204 ，制备于所述第一平坦化层 203 表面。
所述第一平坦化层 203 表面制备有第一通孔 205 ；所述第二平坦化层 204 表面制备有第二通孔 206 ，所述第二通孔 206 位于所述第一通孔 205 上方，与所述第一通孔 205 形成台阶通孔。
所述第二平坦化层 204 表面制备有图案化的阳极金属层 207 ；所述第二平坦化层 204 表面制备有像素定义堤部 208 阵列，一像素定义堤部 208 位于相邻两阳极金属图案之间；所述像素定义堤部 208 形成的像素区域内制备有发光材料 209 。
本发明的有益效果为： 相较于现有的 OLED 显示面板制备方法，本发明提供的 OLED 显示面板制备方法，将平坦化层分两道工序制备，可得到较高平坦度的平坦化层；解决了 现有技术的 IJP-AMOLED 在制程中，平坦化层难以达到制备需求的平整度，整个像素区最大段差较大， ink 的铺展性不均匀，烘干后的发光层膜厚不均匀，进而影响 OLED 显示面板的显示效果。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种 OLED 显示面板制备方法，其中，所述方法包括：
    步骤 S10 ，提供 TFT 阵列基板，所述 TFT 基板表面具有凸起部；
    步骤 S20 ，在所述 TFT 阵列基板表面制备第一平坦化层，所述第一平坦化层的膜厚大于所述凸起部的高度；以及，
    步骤 S30 ，在所述第一平坦化层表面制备第二平坦化层；所述第二平坦化层的膜厚大于或等于所述第一平坦化层的膜厚。
  2. 根据权利要求 1 所述的方法，其中，
    所述步骤 S20 还包括：
    步骤 S201 ，在所述第一平坦化层的对应区域制备第一通
    孔；
    所述步骤 S30 还包括：
    步骤 S301 ，在所述第二平坦化层的对应区域制备第二通
    孔，所述第二通孔位于相对应的所述第一通孔的上方。
  3. 根据权利要求 2 所述的方法，其中，所述第二通孔的孔径大于所述第一通孔的孔径，所述第一通孔与所述第二通孔形成台阶通孔。
  4. 根据权利要求 2 所述的方法，其中，所述方法还包括：
    步骤 S40 ，在所述第二平坦化层表面制备阳极金属层，并将所述阳极金属层经图案化处理形成阳极金属图案阵列，所述阳极金属图案阵列包括至少两阳极金属图案；
    步骤 S50 ，在所述第二平坦化层表面制备像素定义堤部阵列，所述像素定义堤部阵列包括至少两像素定义堤部，一所述像素定义堤部位于相邻两所述阳极金属图案之间；
    步骤 S60 ，在所述像素定义堤部形成的像素区域内制备发光材料。
  5. 根据权利要求 2 所述的方法，其中，所述方法还包括：
    步骤 S40 ，在所述第二平坦化层表面制备第三平坦化层；
    所述步骤 S40 还包括：
    步骤 S401 ，在所述第三平坦化层的对应区域制备第三通
    孔，所述第三通孔位于相对应的所述第二通孔的上方。
  6. 根据权利要求 5 所述的方法，其中，所述第三通孔的孔径大于所述第二通孔的孔径，所述第三通孔、第二通孔以及第三通孔形成台阶通孔。
  7. 根据权利要求 1 所述的方法，其中，所述第一平坦化层采用聚酰亚胺材料制备，所述第二平坦化层采用聚甲基丙烯酸甲酯材料制备。
  8. 根据权利要求 1 所述的方法，其中，所述第一平坦化层和所述第二平坦化层均采用聚酰亚胺材料制备。
  9. 一种 OLED 显示面板制备方法，其中，所述方法包括：
    步骤 S10 ，提供 TFT 阵列基板，所述 TFT 基板表面具有凸起部；
    步骤 S20 ，在所述 TFT 阵列基板表面制备第一平坦化层，所述第一平坦化层的膜厚大于所述凸起部的高度；以及，
    步骤 S30 ，在所述第一平坦化层表面制备第二平坦化层。
  10. 根据权利要求 9 所述的方法，其中，
    所述步骤 S20 还包括：
    步骤 S201 ，在所述第一平坦化层的对应区域制备第一通
    孔；
    所述步骤 S30 还包括：
    步骤 S301 ，在所述第二平坦化层的对应区域制备第二通
    孔，所述第二通孔位于相对应的所述第一通孔的上方。
  11. 根据权利要求 10 所述的方法，其中，所述第二通孔的孔径大于所述第一通孔的孔径，所述第一通孔与所述第二通孔形成台阶通孔。
  12. 根据权利要求 10 所述的方法，其中，所述方法还包括：
    步骤 S40 ，在所述第二平坦化层表面制备阳极金属层，并将所述阳极金属层经图案化处理形成阳极金属图案阵列，所述阳极金属图案阵列包括至少两阳极金属图案；
    步骤 S50 ，在所述第二平坦化层表面制备像素定义堤部阵列，所述像素定义堤部阵列包括至少两像素定义堤部，一所述像素定义堤部位于相邻两所述阳极金属图案之间；
    步骤 S60 ，在所述像素定义堤部形成的像素区域内制备发光材料。
  13. 根据权利要求 10 所述的方法，其中，所述方法还包括：
    步骤 S40 ，在所述第二平坦化层表面制备第三平坦化层；
    所述步骤 S40 还包括：
    步骤 S401 ，在所述第三平坦化层的对应区域制备第三通
    孔，所述第三通孔位于相对应的所述第二通孔的上方。
  14. 根据权利要求 13 所述的方法，其中，所述第三通孔的孔径大于所述第二通孔的孔径，所述第三通孔、第二通孔以及第三通孔形成台阶通孔。
  15. 根据权利要求 9 所述的方法，其中，所述第一平坦化层采用聚酰亚胺材料制备，所述第二平坦化层采用聚甲基丙烯酸甲酯材料制备。
  16. 根据权利要求 9 所述的方法，其中，所述第一平坦化层和所述第二平坦化层均采用聚酰亚胺材料制备。
  17. 一种使用如权利要求 9 所述的 OLED 显示面板制备方法制得的 OLED 显示面板，其中，所述 OLED 显示面板包括：
    TFT 阵列基板，所述 TFT 基板表面具有凸起部；
    第一平坦化层，制备于所述 TFT 阵列基板表面，所述第一平坦化层的膜厚大于所述凸起部的高度；以及，
    第二平坦化层，制备于所述第一平坦化层表面。
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