WO2018014645A1 - 像素电路、其驱动方法及显示面板 - Google Patents

像素电路、其驱动方法及显示面板 Download PDF

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Publication number
WO2018014645A1
WO2018014645A1 PCT/CN2017/085059 CN2017085059W WO2018014645A1 WO 2018014645 A1 WO2018014645 A1 WO 2018014645A1 CN 2017085059 W CN2017085059 W CN 2017085059W WO 2018014645 A1 WO2018014645 A1 WO 2018014645A1
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Prior art keywords
switching transistor
module
control
node
signal
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PCT/CN2017/085059
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English (en)
French (fr)
Inventor
王强
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US15/569,727 priority Critical patent/US10115345B2/en
Publication of WO2018014645A1 publication Critical patent/WO2018014645A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display panel.
  • the high resolution and low cost of display products are important development directions of current display products.
  • the area occupied by each pixel on the display panel will become smaller, which may result in a smaller storage capacitance in the pixel circuit, which may result in poor compensation characteristics of the pixel circuit.
  • the reduction of the reticle that is, the simplification of the patterning process step, will cause the storage capacitor in the pixel circuit to be composed of a metal layer (ie, a gate) and an active layer (ie, a source drain).
  • the dielectric thickness of the storage capacitor will be determined by the metal layer and the active layer, and thus is large. This also causes the storage capacitance in the pixel circuit to become small, which in turn causes the compensation characteristics of the pixel circuit to deteriorate.
  • the embodiment of the present disclosure provides a pixel circuit, a driving method thereof, and a display panel, which are used to solve the problem that the compensation characteristics of the pixel circuit existing in the prior art are poor, and the development trend of the display panel is high-resolution and low-cost cannot be satisfied. .
  • a pixel circuit includes: an initialization module for outputting an initialization signal to a first node in an initialization phase; a driving module for initializing a second node by a first power signal during an initialization phase; and outputting a driver during an illumination phase a current to the control module; a charging module for outputting the data signal to the first node in a data writing phase; and a control module for receiving a driving current from the driving module and outputting the light to the light emitting stage And a lighting module for receiving a driving current from the control module to emit light.
  • the pixel circuit further includes a maintenance module configured to maintain a potential of the second node by the first power signal during an illumination phase.
  • the initialization module includes a control terminal for receiving a first control signal, an input for receiving the initialization signal and an output connected to the first node, and wherein the initialization module Outputting the initialization signal to the first node under control of the first control signal;
  • the charging module includes a control end for receiving a second control signal, for receiving an input end of the data signal And an output connected to the first node; and wherein the charging module outputs the data signal to the first node under control of the second control signal;
  • the maintenance module includes for receiving a control end of the third control signal, configured to receive an input end of the first power signal, and an output connected to the second node; and wherein the maintenance module is under the control of the third control signal, Maintaining a potential of the second node by the first power signal;
  • the driving module includes a first control end connected to the second node, configured to receive the first a second control end of the signal for receiving the first input end of the first power signal, a second input connected to the first node, and an output connected to the
  • the maintenance module includes a first switching transistor and a sustain capacitor; a gate of the first switching transistor is configured to receive the third control signal, and a source of the first switching transistor is used to Receiving the first power signal; and connecting a drain of the first switching transistor to one of two electrodes of the sustain capacitor, and another one of the two electrodes of the sustain capacitor and the second Nodes are connected.
  • one of the two electrodes of the sustain capacitance is disposed on an electrode layer of the first switching transistor, and the other of the two electrodes of the sustain capacitance is disposed at the first switch On the metal layer of the transistor.
  • the charging module includes a second switching transistor; and wherein a gate of the second switching transistor is configured to receive the second control signal, the second opening A source of the off transistor is configured to receive the data signal, and a drain of the second switching transistor is coupled to the first node.
  • the initialization module includes a third switching transistor; and wherein a gate of the third switching transistor is configured to receive the first control signal, and a source of the third switching transistor is used to receive An initialization signal, and a drain of the third switching transistor is coupled to the first node.
  • the driving module includes a fourth switching transistor, a fifth switching transistor, and a storage capacitor; and wherein a gate of the fourth switching transistor is configured to receive the first control signal, the fourth a source of the switching transistor is connected to a drain of the fifth switching transistor and an input of the control module, a drain of the fourth switching transistor and the second node, one of two electrodes of a storage capacitor A gate of the fifth switching transistor is connected, a source of the fifth switching transistor is for receiving the first power signal, and another one of the two electrodes of the storage capacitor is connected to the first node.
  • control module includes a sixth switching transistor; and wherein a gate of the sixth switching transistor is configured to receive the third control signal, a source of the sixth switching transistor and the driving The output of the module is connected, and the drain of the sixth switching transistor is connected to the input of the lighting module.
  • the maintenance module includes a first switching transistor and a sustaining capacitor
  • the charging module includes a second switching transistor
  • the initialization module includes a third switching transistor
  • the driving module includes a fourth switching transistor, a fifth switching transistor, and a storage capacitor
  • the control module includes a sixth switching transistor; and wherein a gate of the first switching transistor is configured to receive a third control signal, a source of the first switching transistor is configured to receive a first power signal, and the first a drain of the switching transistor is connected to one of the two electrodes of the sustain capacitor; the other of the two electrodes of the sustain capacitor is connected to the second node; and a gate of the second switching transistor is used for receiving a control signal, a source of the second switching transistor is configured to receive a data signal, and a drain of the second switching transistor is coupled to the first node; a gate of the third switching transistor is configured to receive the first control a signal, a source of the third switching transistor is configured to receive an initialization signal, and a drain of the third switching transistor is
  • a display panel includes a pixel circuit as previously described.
  • a driving method of a pixel circuit as described above includes: in an initialization phase, the initialization module outputs an initialization signal to the first node, and the driving module initializes the second node by using the first power signal; in the data writing phase, the charging module outputs the data signal to the a first node; and in the illuminating phase, the maintaining module maintains a potential of the second node by the first power signal, the driving module outputs a driving current to the control module, and the control module outputs the driving current to the illuminating module
  • the light emitting module is driven to emit light.
  • the initialization module outputs the initialization signal to the first node under control of the first control signal; and the driving module is at the first control signal Controlling, by the first power signal, the second node; in the data writing phase, the charging module outputs the data signal to the a first node; in the illuminating phase, the maintaining module maintains a potential of the second node by the first power signal under control of the third control signal; the driving module is at the second node Controlling, outputting a driving current to the control module; and the control module outputs a driving current to the light emitting module under the control of the third control signal to drive the light emitting module to emit light.
  • the first control signal, the second control signal, and the third control signal are all low level signals.
  • the pixel circuit driving method as described above includes: (1) in the initialization phase, letting the first control signal be a low level signal; under the control of the first control signal, a third switching transistor and a fourth switching transistor are turned on; the third switching transistor that is turned on outputs the initialization signal to the first node; and the fourth switching transistor that is turned on causes the fifth switching transistor to function a diode to initialize the second node by the first power signal; (2) in the data writing phase, let the second The control signal is a low level signal; under the control of the second control signal, the second switching transistor is turned on, and the second switching transistor that is turned on outputs the data signal to the first node And charging the storage capacitor; and (3) causing the third control signal to be a low level signal during an illumination phase; and, under the control of the third control signal, causing the first switching transistor and the a sixth switching transistor is turned on; the first switching transistor that is turned on maintains a potential of the second node by the first power signal and the sustain capacitor; and the sixth switching
  • FIG. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 2 is a block diagram showing further details of the pixel circuit provided in FIG. 1 according to an embodiment of the present disclosure
  • FIG. 3 is a graph depicting a voltage-capacitance characteristic of a sustain capacitor provided in accordance with an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of operational timings for controlling control signals of a pixel circuit provided in accordance with an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of comparison between a pixel circuit and an existing pixel circuit in terms of compensation capability according to an embodiment of the present disclosure.
  • a pixel circuit comprising: an initialization module for outputting an initialization signal to a first node during an initialization phase; and a driving module for transmitting a first power signal pair during an initialization phase Two nodes are initialized; and output driving current to the control module in the lighting phase; a charging module for outputting the data signal to the first node in the data writing phase; and a control module for using the a driving module receives a driving current and outputs the same to the lighting module; and a lighting module configured to receive a driving current from the control module to emit light; wherein the pixel circuit further includes: a maintaining module configured to pass the The first power signal maintains the potential of the second node.
  • the pixel circuit provided according to an embodiment of the present disclosure can implement normal driving of the light emitting module The function of light.
  • the sustaining module can maintain the potential of the second node during the lighting phase, thereby ensuring that the driving module outputs a stable driving current under the control of the stable second node, thereby driving the lighting module to emit light. This helps to improve the compensation characteristics of the pixel circuit.
  • an embodiment of the present disclosure provides a display panel including the above pixel circuit provided by an embodiment of the present disclosure.
  • the display panel can be applied, for example, to any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • an embodiment of the present disclosure provides a driving method of the above pixel circuit, including: in an initialization phase, an initialization module outputs an initialization signal to a first node, and the driving module passes the first power signal to the second node. Initializing; in the data writing phase, the charging module outputs the data signal to the first node; and in the lighting phase, the maintaining module maintains the potential of the second node through the first power signal, the driving module The driving current is output to the control module, and the control module outputs a driving current to the light emitting module to drive the light emitting module to emit light.
  • initialization and/or resetting of the first node and the second node are implemented in an initialization phase, data writing is performed in a data writing phase, and a light emitting phase is performed.
  • the driving of the light emitting module is achieved and caused to emit light.
  • the driving module outputs a stable driving current to drive the lighting module to emit light under the control of the stable second node. This helps to improve the compensation characteristics of the pixel circuit.
  • a pixel circuit, a driving method thereof, and a display panel according to an embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings.
  • FIG. 1 illustrates a structural diagram of a pixel circuit provided in accordance with an embodiment of the present disclosure.
  • the pixel circuit may include: a charging module 01 , an initialization module 02 , a maintenance module 03 , a driving module 04 , a control module 05 , and a lighting module OLED .
  • the charging module 01 includes a control terminal for receiving the second control signal S2, an input terminal for receiving the data signal Vdata, and an output terminal connected to the first node P1. According to an embodiment of the present disclosure, the charging module 01 outputs the data signal Vdata to the first node P1 under the control of the second control signal S2.
  • the initialization module 02 includes an output connected to the first node P1 for receiving a control end of the first control signal S1 and an input for receiving the initialization signal Vref. end. According to an embodiment of the present disclosure, the initialization module 02 outputs the initialization signal Vref to the first node P1 under the control of the first control signal S1.
  • the maintenance module 03 includes an output connected to the second node P2 for receiving a control terminal of the third control signal S3 and an input for receiving the first power signal VDD. According to an embodiment of the present disclosure, the maintenance module 03 maintains the potential of the second node P2 by the first power signal VDD under the control of the third control signal S3.
  • the driving module includes a second input terminal connected to the first node P1, a first control terminal connected to the second node P2, and an output terminal connected to the control module 05 for receiving the first control. a second control terminal of signal S1 and a first input for receiving the first power signal VDD.
  • the driving module 04 initializes the second node P2 by the first power signal VDD under the control of the first control signal S1; and outputs the driving current to the control module under the control of the second node P2. 05.
  • the control module 05 includes an input for receiving a drive current from the drive module 04, an output coupled to the illumination module OLED, and a control terminal for receiving the third control signal S3. According to an embodiment of the present disclosure, the control module 05 outputs the driving current output from the driving module 04 to the light emitting module OLED under the control of the third control signal S3 to drive the light emitting module OLED to emit light.
  • the lighting module OLED includes a first input that receives a drive current from the control module 04 and a second input that receives the second power signal VSS.
  • the light-emitting module OLED emits light under the control of the drive current.
  • the light emitting module OLED is, for example, an organic light emitting diode.
  • the first control signal S1, the second control signal S2, the third control signal S3, the first power signal VDD, the second power signal VSS, the initialization signal Vref, and the data signal Vdata may be Set as needed.
  • a normal function of driving the light emitting module to emit light can be realized by the charging module, the initialization module, the maintenance module, the driving module, and the control module.
  • the driving module outputs a stable driving current under the control of the stable second node to drive the light emitting module to emit light. This helps to improve the compensation characteristics of the pixel circuit.
  • the pixel circuit provided according to an embodiment of the present disclosure can be applied to a high-resolution display product, thereby adapting to the trend of high-resolution and low-cost display panel.
  • FIG. 2 is a block diagram depicting further details of the pixel circuit provided in FIG. 1 in accordance with an embodiment of the present disclosure, wherein the dashed boxes represent various modules of the pixel circuit.
  • the maintenance module 03 may include a first switching transistor T1 and a sustaining capacitor Cmos.
  • the gate of the first switching transistor T1 is for receiving the third control signal S3, the source of the first switching transistor T1 is for receiving the first power signal VDD, and the two drains of the first switching transistor T1 and the sustain capacitor Cmos One of the electrodes is connected.
  • the other of the two electrodes of the sustaining capacitor Cmos is connected to the second node P2.
  • the first switching transistor T1 can be turned on under the control of the third control signal S3, and the turned-on first switching transistor T1 can output the first power supply signal VDD to one of the two electrodes of the sustaining capacitor Cmos.
  • the sustain capacitance Cmos can maintain the potential of the other of the two electrodes (ie, the second node) unchanged according to the principle of conservation of charge.
  • one of the two electrodes of the sustain capacitor Cmos is disposed on the active layer (ie, the source drain) of the first switching transistor T1, and the other of the two electrodes of the sustain capacitor Cmos is disposed in the first A switching transistor T1 is on the metal layer (ie, the gate). Since the sustain capacitor Cmos can be disposed on the existing layer of the switching transistor in the pixel circuit, no additional fabrication process is required, thereby saving manufacturing costs. Further, in this case, since the two electrodes for maintaining the capacitance are respectively composed of the active layer and the metal layer of the switching transistor, the sustain capacitance is a metal oxide semiconductor (MOS) capacitor.
  • MOS metal oxide semiconductor
  • FIG. 3 is a graph depicting a capacitance-voltage characteristic of a sustain capacitor Cmos according to an embodiment of the present disclosure.
  • the capacitance value of the MOS capacitor varies with a voltage within a fixed voltage range (ie, between b and c). Outside this fixed voltage range (ie, between a and b and between c and d), the capacitance of the MOS capacitor is fixed and does not change with voltage.
  • the capacitance value of the MOS capacitor can be set outside the above fixed voltage range, that is, between a and b and between c and d. In one embodiment, the capacitance value of the MOS capacitor can be set between a and b.
  • the capacitance value of the MOS remains unchanged.
  • the turned-on first switching transistor T1 outputs a constant first power supply signal VDD to one of the two electrodes of the sustain capacitor Cmos.
  • the potential of the other of the two electrodes will also be constant and remain unchanged, thereby maintaining the potential of the second node unchanged.
  • the initialization module 02 may include a third switching transistor T3.
  • the gate of the third switching transistor T3 is for receiving the first control signal S1
  • the source of the third switching transistor T3 is for receiving the initialization signal Vref
  • the drain of the third switching transistor T3 are connected to the first node P1.
  • the third switching transistor T3 can be turned on under the control of the first control signal S1.
  • the turned-on third switching transistor T3 can output the initialization signal Vref to the first node P1, thereby implementing initialization and/or reset of the first node P1.
  • the charging module 01 may include a second switching transistor T2.
  • the gate of the second switching transistor T2 is for receiving the second control signal S2
  • the source of the second switching transistor T2 is for receiving the data signal Vdata
  • the drain of the second switching transistor T2 is connected to the first node P1.
  • the second switching transistor T2 can be turned on under the control of the second control signal S2.
  • the turned-on second switching transistor T2 can output the data signal Vdata to the first node P1, thereby enabling writing of the data signal.
  • the driving module 04 may include a fourth switching transistor T4, a fifth switching transistor T5, and a storage capacitor Cst.
  • the gate of the fourth switching transistor T4 is for receiving the first control signal S1
  • the source of the fourth switching transistor T4 is connected to the drain of the fifth switching transistor T5 and the input of the control module 05
  • the fourth switching transistor T4 The drain is connected to the second node P2.
  • the gate of the fifth switching transistor T5 is connected to the second node P2
  • the source of the fifth switching transistor T5 is for receiving the first power signal VDD
  • the storage capacitor Cst is located between the first node P1 and the second node P2, one of the two electrodes of the storage capacitor Cst is connected to P1 and the other of the two electrodes of the storage capacitor Cst is connected to P2.
  • the fourth switching transistor T4 can be turned on under the control of the first control signal S1, and the turned-on fourth switching transistor T4 causes the fifth switching transistor T5 to function as a diode, so that initialization of the second node P2 can be achieved and / Or reset. Thereafter, the fifth switching transistor T5 can be turned on under the control of the second node P2.
  • the turned-on fifth switching transistor T5 can output a drive current to the input of the control module 05.
  • the control module 05 may include a sixth switching transistor T6.
  • the input of the control module 05 can be the source of the sixth switching transistor T6.
  • the gate of the sixth switching transistor T6 is for receiving the third control signal S3, the source of the sixth switching transistor T6 and the output of the driving module 04 (ie, the drain of the fifth switching transistor T5 and/or Or the source of the fourth switching transistor T4 is connected, and the drain of the sixth switching transistor T6 and the light emitting module OLED The first input is connected.
  • the sixth switching transistor T6 can be turned on under the control of the third control signal S3.
  • the turned-on sixth switching transistor T6 can output the driving current output from the driving module 04 to the first input end of the light emitting module OLED to drive the light emitting module OLED to emit light.
  • the light emitting module OLED is an organic light emitting diode OLED.
  • the first input of the lighting module OLED is connected to the sixth switching transistor T6 and the second input of the lighting module OLED is for receiving the second power signal VSS.
  • the light emitting module OLED emits light under the driving current output from the driving module 04.
  • the switching transistor according to the embodiment of the present disclosure may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS). Further, the source and drain of the transistor according to an embodiment of the present disclosure may be used interchangeably. Embodiments in accordance with the present disclosure are described herein with a thin film transistor as an example.
  • the third switching transistor T3 and the fourth switching transistor T4 are turned on.
  • the turned-on third switching transistor T3 outputs an initialization signal Vref to the first node P1, thereby implementing initialization and/or resetting of the first node P1.
  • the potential of the first node P1 is initialized to, for example, Vref.
  • the turned-on fourth switching transistor T4 causes the fifth switching transistor T5 to function as a diode, so initialization and/or reset of the second node P2 can be achieved by the first power supply signal VDD.
  • the potential of the second node P2 is initialized to, for example, VDD+Vth, where Vth is the threshold voltage of the fifth switching transistor T5.
  • VDD+Vth the threshold voltage of the fifth switching transistor T5.
  • the first switching transistor T1 and the sixth switching transistor T6 are turned on.
  • the turned-on first switching transistor T1 can maintain the potential of the second node P2 unchanged by the first power signal VDD, thereby ensuring that the fifth switching transistor T5 is directed to the source of the sixth switching transistor T6 under the control of the stable potential P2.
  • the turned-on sixth switching transistor T6 can output the driving current output from the fifth switching transistor T5 to the input end of the light emitting module OLED to drive the light emitting module OLED to emit light.
  • the fifth switching transistor T5 outputs a driving current to the source of the sixth switching transistor T6 under the control of the second node P2.
  • the driving current for turning on the light emitting module OLED is independent of the threshold voltage Vth of the driving transistor (ie, the fifth switching transistor T5), thereby eliminating the variation of the threshold voltage of the driving transistor on the luminance of the light emitting module OLED. influences. This greatly improves the uniformity of the luminance of the OLED of the light-emitting module.
  • the comparison result as shown in FIG. 5 can be obtained.
  • the x-axis represents the threshold voltage of the transistor
  • the y-axis represents the result of the normalization of the drive current.
  • existing pixel circuits do not include a sustaining module (ie, a first switching transistor T1 and a sustaining capacitor Cmos in a pixel circuit in accordance with an embodiment of the present disclosure). As can be seen from FIG.
  • the driving current variation of the pixel circuit according to the embodiment of the present disclosure is the smallest, and the variation range is -5% to 5%, and the pixel circuit and the application of the prior art are present.
  • the driving current of the high-resolution display product of the technical pixel circuit varies greatly, wherein the driving current of the prior art pixel circuit varies from -10% to 10%, and the pixel circuit of the prior art is applied.
  • the high-resolution display product's drive current varies from -15% to 15%. It is apparent that the compensation capability of the pixel circuit according to an embodiment of the present disclosure is better.
  • a method for driving a pixel circuit includes, in an initialization phase, an initialization module 02 outputs an initialization signal Vref to a first node P1, and the driving module 04 passes a first power supply signal VDD pair The second node P2 performs initialization.
  • the method also includes, during the data writing phase, the charging module P1 outputs the data signal Vdata to the first node P1.
  • the method further includes, during the lighting phase, the maintaining module 03 maintains the potential of the second node P2 unchanged by the first power signal VDD, the driving module 04 outputs the driving current to the control module 05, and the control module 05 drives the current.
  • the light is output to the light emitting module OLED to drive the light emitting module OLED to emit light.
  • the initialization module 02 outputs the initialization signal Vref to the first node P1 under the control of the first control signal S1; and the driving module 04 passes the control of the first control signal S1.
  • a power signal VDD initializes the second node P2.
  • the charging module 01 outputs the data signal Vdata to the first node P1 under the control of the second control signal S2.
  • the maintenance module 03 maintains the potential of the second node P2 unchanged by the first power signal VDD under the control of the third control signal S3; the driving module 04 is under the control of the second node P2. And outputting the driving current to the control module 05; and the control module 05 outputs the driving current output from the driving module 04 to the light emitting module OLED under the control of the third control signal S3 to drive the light emitting module OLED to emit light.
  • the first control signal S1, the second control signal S2, and the third control signal S3 function as a low level.
  • the first control signal S1 in the initialization phase, is made a low level signal, and under the control of the first control signal S1 The three switching transistor T3 and the fourth switching transistor T4 are turned on.
  • the turned-on third switching transistor T3 outputs the initialization signal Vref to the first node P1; the turned-on fourth switching transistor T4 causes the fifth switching transistor T5 to function as a diode, thereby initializing the second node P2 by the first power signal VDD.
  • the second control signal S2 is made to be a low level signal, and under the control of the second control signal S2, the second switching transistor T2 is turned on.
  • the turned-on second switching transistor T2 outputs the data signal Vdata to the first node P1.
  • the third control signal S3 is made to be a low level signal, and under the control of the third control signal S3, the first switching transistor T1 and the sixth switching transistor T6 are turned on.
  • the turned-on first switching transistor T1 is maintained by the first power supply signal VDD
  • the potential of the two nodes P2 is unchanged.
  • the turned-on sixth switching transistor T5 outputs a driving current output from the fifth switching transistor T5 to the light emitting module OLED to drive the light emitting module OLED to emit light.
  • a method for driving a pixel circuit can implement a function of normally driving the light emitting module to emit light through a charging module, an initialization module, a maintenance module, a driving module, and a control module in respective working phases.
  • the maintenance module can maintain the potential of the second node unchanged during the illumination phase, thereby ensuring that the driving module can output a stable driving current to drive the illumination module to emit light under the control of the stable second node. This helps to improve the compensation characteristics of the pixel circuit.
  • a display panel including a pixel circuit as described above is provided in accordance with an embodiment of the present disclosure.

Abstract

一种像素电路、其驱动方法及显示面板。在该像素电路中，初始化模块(02)用于将初始化信号输出到第一节点(P1)；驱动模块(04)用于通过第一电源信号对第二节点(P2)进行初始化，以及输出驱动电流到控制模块(05)；充电模块(01)用于将数据信号输出到第一节点(P1)；维持模块用于通过第一电源信号(VDD)维持第二节点(P2)的电位不变；以及控制模块(05)用于从驱动模块(04)接收驱动电流并且将其输出到发光模块(OLED)以驱动发光模块(OLED)发光。特别地，维持模块(03)可以维持第二节点(P2)的电位不变，从而保证驱动模块(04)在稳定的第二节点(P2)的控制下，可以输出稳定的驱动电流以驱动发光模块(OLED)发光。这有助于提高像素电路的补偿特性。

Description

像素电路、其驱动方法及显示面板 技术领域
本公开涉及显示技术领域，尤其涉及一种像素电路、其驱动方法及显示面板。
背景技术
随着显示技术的发展，显示产品的高分辨率和低成本是当前显示产品的重要发展方向。然而，随着显示产品的分辨率增加，显示面板上每个像素所占的面积将会不断变小，从而会导致像素电路中的存储电容变小，进而导致像素电路的补偿特性变差。同样，为了降低显示产品的生产成本，一般会通过减少显示面板制作工艺中的掩模板数量，即简化制作工艺步骤的方式来实现。掩模板的减少即构图工艺步骤的简化，将使得像素电路中的存储电容由金属层(即栅极)和有源层(即源漏极)构成。在这种情况下，存储电容的介质厚度将由金属层和有源层确定，因而是较大的。这样也会导致像素电路中的存储电容变小，进而导致像素电路的补偿特性变差。
因此，存在一种改善像素电路的补偿特性的需求。
发明内容
本公开实施例提供了一种像素电路、其驱动方法及显示面板，用以解决现有技术中存在的像素电路的补偿特性较差，无法满足显示面板高分辨率和低成本的发展趋势的问题。
根据本公开的一方面，提供了一种像素电路。该像素电路包括：初始化模块，其用于在初始化阶段将初始化信号输出到第一节点；驱动模块，其用于在初始化阶段通过第一电源信号对第二节点进行初始化；以及在发光阶段输出驱动电流到控制模块；充电模块，其用于在数据写入阶段将数据信号输出到所述第一节点；控制模块，其用于在发光阶段从所述驱动模块接收驱动电流并且将其输出到发光模块；以及发光模块，其用于从控制模块接收驱动电流以发光。其中，所述像素电路还包括：维持模块，其用于在发光阶段通过所述第一电源信号维持所述第二节点的电位。
在一个实施例中，所述初始化模块包括用于接收第一控制信号的控制端，用于接收所述初始化信号的输入端和与所述第一节点相连的输出端，并且其中所述初始化模块在所述第一控制信号的控制下，将所述初始化信号输出到所述第一节点；所述充电模块包括用于接收第二控制信号的控制端，用于接收所述数据信号的输入端以及与所述第一节点相连的输出端；并且其中所述充电模块在所述第二控制信号的控制下，将所述数据信号输出到所述第一节点；所述维持模块包括用于接收第三控制信号的控制端，用于接收所述第一电源信号的输入端，以及与所述第二节点相连的输出端；并且其中所述维持模块在所述第三控制信号的控制下，通过所述第一电源信号维持所述第二节点的电位；所述驱动模块包括与所述第二节点相连的第一控制端，用于接收所述第一控制信号的第二控制端，用于接收所述第一电源信号的第一输入端，与所述第一节点相连的第二输入端，与所述控制模块相连的输出端；所述驱动模块在所述第一控制信号的控制下，通过所述第一电源信号对所述第二节点进行初始化，并且在所述第二节点的控制下，输出驱动电流到所述控制模块；所述控制模块包括用于接收所述第三控制信号的控制端，用于从所述驱动模块接收驱动电流的输入端，以及与所述发光模块相连的输出端；并且其中所述控制模块在所述第三控制信号的控制下，将所述驱动模块输出的驱动电流输出到所述发光模块以驱动所述发光模块发光；所述发光模块包括用于从所述控制模块接收驱动电流的第一输入端，以及用于接收第二电源信号的第二输入端；并且其中，所述发光模块在所述驱动电流的控制下发光。
在一个实施例中，所述维持模块包括第一开关晶体管和维持电容；所述第一开关晶体管的栅极用于接收所述第三控制信号，以及所述第一开关晶体管的源极用于接收所述第一电源信号；以及所述第一开关晶体管的漏极与所述维持电容的两个电极之一相连，并且所述维持电容的两个电极中的另一个电极与所述第二节点相连。
在一个实施例中，所述维持电容的两个电极之一设置在所述第一开关晶体管的电极层上，并且所述维持电容的两个电极中的另一个电极设置在所述第一开关晶体管的金属层上。
在一个实施例中，所述充电模块包括第二开关晶体管；并且其中，所述第二开关晶体管的栅极用于接收所述第二控制信号，所述第二开 关晶体管的源极用于接收所述数据信号，以及所述第二开关晶体管的漏极与所述第一节点相连。
在一个实施例中，所述初始化模块包括第三开关晶体管；并且其中所述第三开关晶体管的栅极用于接收所述第一控制信号，所述第三开关晶体管的源极用于接收所述初始化信号，以及所述第三开关晶体管的漏极与所述第一节点相连。
在一个实施例中，所述驱动模块包括第四开关晶体管、第五开关晶体管和存储电容；并且其中，所述第四开关晶体管的栅极用于接收所述第一控制信号，所述第四开关晶体管的源极与所述第五开关晶体管的漏极和所述控制模块的输入端相连，所述第四开关晶体管的漏极与所述第二节点、存储电容的两个电极之一和第五开关晶体管的栅极相连，所述第五开关晶体管的源极用于接收所述第一电源信号，以及所述存储电容的两个电极中的另一个电极与所述第一节点相连。
在一个实施例中，所述控制模块包括第六开关晶体管；并且其中所述第六开关晶体管的栅极用于接收所述第三控制信号，所述第六开关晶体管的源极与所述驱动模块的输出端相连，所述第六开关晶体管的漏极与所述发光模块的输入端相连。
在一个实施例中，维持模块包括第一开关晶体管和维持电容，充电模块包括第二开关晶体管，初始化模块包括第三开关晶体管，驱动模块包括第四开关晶体管、第五开关晶体管和存储电容，以及控制模块包括第六开关晶体管；并且其中，所述第一开关晶体管的栅极用于接收第三控制信号，所述第一开关晶体管的源极用于接收第一电源信号，以及所述第一开关晶体管的漏极与所述维持电容的两个电极之一相连；所述维持电容的两个电极中的另一个电极与第二节点相连；所述第二开关晶体管的栅极用于接收第二控制信号，所述第二开关晶体管的源极用于接收数据信号，以及所述第二开关晶体管的漏极与第一节点相连；所述第三开关晶体管的栅极用于接收第一控制信号，所述第三开关晶体管的源极用于接收初始化信号，所述第三开关晶体管的漏极与所述第一节点相连；所述第四开关晶体管的栅极用于接收所述第一控制信号，所述第四开关晶体管的源极与所述第五开关晶体管的漏极和所述第六开关晶体管的源极相连，所述第四开关晶体管的漏极与所述第二节点相连；所述第五开关晶体管的栅极与所述第二节点相 连，所述第五开关晶体管的源极用于接收所述第一电源信号；所述存储电容的两个电极分别与所述第一节点和所述第二节点相连；所述第六开关晶体管的栅极用于接收所述第三控制信号，所述第六开关晶体管的漏极与所述发光模块的输入端相连；所述发光模块的输出端用于接收第二电源信号。
根据本公开的另一个方面，提供了一种显示面板。该显示面板包括如前所述的像素电路。
根据本公开的另一个方面，提供了一种如前所述的像素电路的驱动方法。该驱动方法包括：在初始化阶段，初始化模块将初始化信号输出到第一节点，并且驱动模块通过第一电源信号对第二节点进行初始化；在数据写入阶段，充电模块将数据信号输出到所述第一节点；以及在发光阶段，维持模块通过所述第一电源信号维持所述第二节点的电位，所述驱动模块将驱动电流输出到控制模块，所述控制模块将驱动电流输出到发光模块以驱动所述发光模块发光。
在一个实施例中，在初始化阶段，所述初始化模块在所述第一控制信号的控制下，将所述初始化信号输出到所述第一节点；并且所述驱动模块在所述第一控制信号的控制下，通过所述第一电源信号对所述第二节点进行初始化；在数据写入阶段，所述充电模块在所述第二控制信号的控制下，将所述数据信号输出到所述第一节点；在发光阶段，所述维持模块在所述第三控制信号的控制下，通过所述第一电源信号维持所述第二节点的电位；所述驱动模块在所述第二节点的控制下，将驱动电流输出到所述控制模块；以及所述控制模块在所述第三控制信号的控制下，将驱动电流输出到所述发光模块，以驱动所述发光模块发光。
在一个实施例中，所述第一控制信号，所述第二控制信号以及所述第三控制信号均为低电平信号。
在一个实施例中，如前所述的像素电路驱动方法包括：(1)在初始化阶段，让所述第一控制信号为低电平信号；在所述第一控制信号的控制下，使第三开关晶体管和第四开关晶体管导通；导通的所述第三开关晶体管将所述初始化信号输出到所述第一节点；导通的所述第四开关晶体管使所述第五开关晶体管充当二极管，以便通过所述第一电源信号对所述第二节点初始化；(2)在数据写入阶段，让所述第二 控制信号为低电平信号；在所述第二控制信号的控制下，使所述第二开关晶体管导通，导通的所述第二开关晶体管将所述数据信号输出到所述第一节点并对所述存储电容充电；以及(3)在发光阶段，让所述第三控制信号为低电平信号；在所述第三控制信号的控制下，使所述第一开关晶体管和所述第六开关晶体管导通；导通的所述第一开关晶体管通过所述第一电源信号和所述维持电容维持所述第二节点的电位；导通的所述第六开关晶体管将所述第五开关晶体管输出的驱动电流输出到所述发光模块，以驱动所述发光模块发光。
附图说明
图1是根据本公开实施例提供的像素电路的结构示意图；
图2是描述了图1中的根据本公开实施例提供的像素电路的进一步细节的结构示意图；
图3是描述了根据本公开实施例提供的维持电容的电压-电容特性的曲线示意图；
图4是用于控制根据本公开实施例提供的像素电路的控制信号的工作时序的示意图；以及
图5是根据本公开实施例提供的像素电路与现有像素电路在补偿能力方面的对比示意图。
在附图中，相同的附图标记表示相似或等同的元件。
具体实施方式
本文提供了一种根据本公开实施例的像素电路，包括：初始化模块，其用于在初始化阶段将初始化信号输出到第一节点；驱动模块，其用于在初始化阶段通过第一电源信号对第二节点进行初始化；以及在发光阶段输出驱动电流到控制模块；充电模块，其用于在数据写入阶段将数据信号输出到所述第一节点；控制模块，其用于在发光阶段从所述驱动模块接收驱动电流并且将其输出到发光模块；以及发光模块，其用于从控制模块接收驱动电流以发光；其中，所述像素电路还包括：维持模块，其用于在发光阶段通过所述第一电源信号维持所述第二节点的电位。
根据本公开实施例提供的像素电路可以实现正常驱动发光模块发 光的功能。特别地，根据本公开，维持模块可以在发光阶段维持第二节点的电位，从而保证驱动模块在稳定的第二节点的控制下输出稳定的驱动电流，进而驱动发光模块发光。这有助于提高像素电路的补偿特性。
基于同一发明构思，本公开实施例提供了一种显示面板，其包括本公开实施例提供的上述像素电路。该显示面板可以例如应用于手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件中。
基于同一发明构思，本公开实施例提供了一种上述像素电路的驱动方法，其包括：在初始化阶段，初始化模块将初始化信号输出到第一节点，并且驱动模块通过第一电源信号对第二节点进行初始化；在数据写入阶段，充电模块将数据信号输出到所述第一节点；以及在发光阶段，维持模块通过所述第一电源信号维持所述第二节点的电位，所述驱动模块将驱动电流输出到控制模块，所述控制模块将驱动电流输出到发光模块，以驱动所述发光模块发光。
在根据本公开实施例提供的上述像素电路的驱动方法中，在初始化阶段实现对第一节点和第二节点的初始化和/或复位，在数据写入阶段实现数据的写入，以及在发光阶段实现对发光模块的驱动并且使其发光。特别地，通过在发光阶段由维持模块维持第二节点的电位，可以保证驱动模块在稳定的第二节点的控制下，输出稳定的驱动电流以驱动发光模块发光。这有助于提高像素电路的补偿特性。
下面结合附图，对根据本公开实施例的像素电路、其驱动方法及显示面板进行详细的说明。
图1图示出了根据本公开实施例提供的像素电路的结构示意图。如图1所示，像素电路可以包括：充电模块01、初始化模块02、维持模块03、驱动模块04、控制模块05和发光模块OLED。
如图1所示，充电模块01包括用于接收第二控制信号S2的控制端，用于接收数据信号Vdata的输入端以及与所述第一节点P1相连的输出端。根据本公开实施例，充电模块01在第二控制信号S2的控制下，将数据信号Vdata输出到第一节点P1。
如图1所示，初始化模块02包括与第一节点P1相连的输出端，用于接收第一控制信号S1的控制端和用于接收初始化信号Vref的输入 端。根据本公开实施例，初始化模块02在第一控制信号S1的控制下，将初始化信号Vref输出到第一节点P1。
如图1所示，维持模块03包括与第二节点P2相连的输出端，用于接收第三控制信号S3的控制端和用于接收第一电源信号VDD的输入端。根据本公开实施例，维持模块03在第三控制信号S3的控制下，通过第一电源信号VDD维持第二节点P2的电位。
如图1所示，驱动模块包括04包括与第一节点P1相连的第二输入端、与第二节点P2相连的第一控制端，与控制模块05相连的输出端，用于接收第一控制信号S1的第二控制端，以及用于接收第一电源信号VDD的第一输入端。根据本公开实施例，驱动模块04在第一控制信号S1的控制下，通过第一电源信号VDD对第二节点P2进行初始化；以及在第二节点P2的控制下，将驱动电流输出到控制模块05。
如图1所示，控制模块05包括用于从驱动模块04接收驱动电流的输入端，与发光模块OLED相连的输出端以及用于接收第三控制信号S3的控制端。根据本公开实施例，控制模块05在第三控制信号S3的控制下，将从驱动模块04输出的驱动电流输出到发光模块OLED，以驱动发光模块OLED发光。
发光模块OLED包括从控制模块04接收驱动电流的第一输入端以及用于接收第二电源信号VSS的第二输入端。特别地，发光模块OLED在驱动电流的控制下发光。发光模块OLED例如是有机发光二极管。
在根据本公开实施例提供的像素电路中，第一控制信号S1、第二控制信号S2、第三控制信号S3，第一电源信号VDD、第二电源信号VSS，初始化信号Vref和数据信号Vdata可以根据需要进行设置。
根据本公开实施例提供的如图1中所示的像素电路，通过充电模块、初始化模块、维持模块、驱动模块和控制模块可以实现正常的驱动发光模块发光的功能。特别地，通过维持模块维持第二节点的电位不变，可以保证驱动模块在稳定的第二节点的控制下输出稳定的驱动电流，以驱动发光模块发光。这有助于提高像素电路的补偿特性。根据本公开实施例提供的像素电路可适用于高分辨率的显示产品，从而适应显示面板高分辨率低成本化的发展趋势。
图2是描述了图1中的根据本公开实施例提供的像素电路的进一步细节的结构示意图，其中虚线框表示像素电路的各个模块。
如图2所示，维持模块03可以包括第一开关晶体管T1和维持电容Cmos。第一开关晶体管T1的栅极用于接收第三控制信号S3，第一开关晶体管T1的源极用于接收第一电源信号VDD，以及第一开关晶体管T1的漏极与维持电容Cmos的两个电极之一相连。维持电容Cmos的两个电极中的另一个电极与第二节点P2相连。特别地，第一开关晶体管T1可以在第三控制信号S3的控制下导通，导通后的第一开关晶体管T1可以将第一电源信号VDD输出到维持电容Cmos的两个电极之一。在这种情况下，维持电容Cmos可以根据电荷守恒原理，维持两个电极中的另一个电极(即第二节点)的电位不变。
在一个实施例中，维持电容Cmos的两个电极之一设置在第一开关晶体管T1的有源层(即源漏极)上，而维持电容Cmos的两个电极中的另一个电极设置在第一开关晶体管T1的金属层(即栅极)上。由于维持电容Cmos可以设置在像素电路中的开关晶体管的现有层上，所以无需额外制作工艺，从而节约了制作成本。此外，在这种情况下，由于维持电容的两个电极分别由开关晶体管的有源层和金属层构成，因而维持电容是金属氧化物半导体(Metal Oxide Semiconductor，MOS)电容。
图3是描述了根据本公开实施例的维持电容Cmos的电容-电压特性的曲线示意图。如图3所示，MOS电容的电容值在一个固定电压范围内(即，b和c之间)随着电压变化而变化。在这个固定电压范围之外(即，a和b之间以及c和d之间)，MOS电容的电容值是固定的，其不随着电压的变化而变化。因而，根据本公开实施例，可以将MOS电容的电容值设置在上述固定电压范围之外，即a和b之间以及c和d之间。在一个实施例中，可以将MOS电容的电容值设置在a和b之间。这样，MOS的电容值保持不变。为了使维持电容Cmos能够维持第二节点P2的电位不变，导通的第一开关晶体管T1将恒定的第一电源信号VDD输出到维持电容Cmos的两个电极之一。在这种情况下，由于维持电容Cmos的电容值维持不变，因而其两个电极中的另一个电极的电位也将恒定而维持不变，从而维持第二节点的电位不变。
在根据本公开实施例提供的像素电路中，如图2所示，初始化模块02可以包括第三开关晶体管T3。第三开关晶体管T3的栅极用于接收第一控制信号S1，第三开关晶体管T3的源极用于接收初始化信号 Vref，以及第三开关晶体管T3的漏极与第一节点P1相连。特别地，第三开关晶体管T3可以在第一控制信号S1的控制下导通。导通的第三开关晶体管T3可以将初始化信号Vref输出到第一节点P1，从而实现第一节点P1的初始化和/或复位。
在根据本公开实施例提供的像素电路中，如图2所示，充电模块01可以包括第二开关晶体管T2。第二开关晶体管T2的栅极用于接收第二控制信号S2，第二开关晶体管T2的源极用于接收数据信号Vdata，以及第二开关晶体管T2的漏极与第一节点P1相连。特别地，第二开关晶体管T2可以在第二控制信号S2的控制下导通。导通的第二开关晶体管T2可以将数据信号Vdata输出到第一节点P1，从而实现数据信号的写入。
在根据本公开实施例提供的像素电路中，如图2所示，驱动模块04可以包括：第四开关晶体管T4、第五开关晶体管T5和存储电容Cst。第四开关晶体管T4的栅极用于接收第一控制信号S1，第四开关晶体管T4的源极与第五开关晶体管T5的漏极和控制模块05的输入端相连，以及第四开关晶体管T4的漏极与第二节点P2相连。第五开关晶体管T5的栅极与第二节点P2相连，第五开关晶体管T5的源极用于接收第一电源信号VDD，以及第五开关晶体管T5的漏极与第四开关晶体管T4的源极和控制模块05的输入端相连。存储电容Cst位于第一节点P1和第二节点P2之间，存储电容Cst的两个电极之一与P1相连并且存储电容Cst的两个电极中的另一个电极与P2相连。特别地，第四开关晶体管T4可以在第一控制信号S1的控制下导通，导通的第四开关晶体管T4使得第五开关晶体管T5充当二极管，从而可以实现对第二节点P2的初始化和/或复位。此后，第五开关晶体管T5可以在第二节点P2的控制下导通。导通的第五开关晶体管T5可以将驱动电流输出到控制模块05的输入端。
在根据本公开实施例提供的像素电路中，如图2所示，控制模块05可以包括第六开关晶体管T6。在这种情况下，控制模块05的输入端可以是第六开关晶体管T6的源极。如图2所示，第六开关晶体管T6的栅极用于接收第三控制信号S3，第六开关晶体管T6的源极与驱动模块04的输出端(即第五开关晶体管T5的漏极和/或第四开关晶体管T4的源极)相连，以及第六开关晶体管T6的漏极与发光模块OLED 的第一输入端相连。特别地，第六开关晶体管T6可以在第三控制信号S3的控制下导通。导通的第六开关晶体管T6可以将从驱动模块04输出的驱动电流输出到发光模块OLED的第一输入端，以驱动发光模块OLED发光。
在根据本公开实施例提供的像素电路中，如图2所示，发光模块OLED是有机发光二极管OLED。发光模块OLED的第一输入端与第六开关晶体管T6相连并且发光模块OLED的第二输入端用于接收第二电源信号VSS。特别地，发光模块OLED在从驱动模块04输出的驱动电流的驱动下发光。
需要说明的是，根据本公开实施例的开关晶体管既可以是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Semiconductor)。此外，根据本公开实施例的晶体管的源极和漏极可以互换地使用。在本文中以薄膜晶体管为例描述根据本公开的实施例。
下面结合图2所示的像素电路以及图4所示的控制信号的工作时序图，对本公开实施例提供的像素电路的工作过程加以描述。在下文中，像素电路中的晶体管以P型晶体管为例进行说明。特别地，选取如图4所示的控制信号S1、S2和S3在t1～t3三个阶段中的值为例进行说明。以下描述中以1表示高电平信号，0表示低电平信号。
在t1阶段，也就是初始化阶段，让S1＝0，S2＝1，S3＝1。由于S1＝0，因此在图2所示的像素电路中，第三开关晶体管T3和第四开关晶体管T4导通。导通的第三开关晶体管T3将初始化信号Vref输出到第一节点P1，从而实现对第一节点P1的初始化和/或复位。此时，第一节点P1的电位被初始化为例如Vref。导通的第四开关晶体管T4使得第五开关晶体管T5充当二极管，因此可以通过第一电源信号VDD实现对第二节点P2的初始化和/或复位。此时，第二节点P2的电位被初始化为例如VDD+Vth，其中Vth为第五开关晶体管T5的阈值电压。由此，在t1阶段，存储电容Cst两个电极的电压被分别初始化成Vref和VDD+Vth，因而存储电容Cst两个电极之间的电压差为Vref-VDD-Vth。
在t2阶段，也就是数据写入阶段，让S1＝1，S2＝0，S3＝1。由于S2＝0，因此第二开关晶体管T2导通。导通的第二开关晶体管T2将数据信号Vdata输出到第一节点P1，从而实现数据写入。此时第一节点 P1的电位从Vref变为Vdata。根据电荷守恒原理，存储电容Cst的另一个电极(即第二节点P2)的电位变为Vdata+VDD+Vth-Vref。
在t3阶段，也就是发光阶段，让S1＝1，S2＝1，S3＝0。由于S3＝0，因此第一开关晶体管T1和第六开关晶体管T6导通。导通的第一开关晶体管T1通过第一电源信号VDD可以维持第二节点P2的电位不变，从而保证第五开关晶体管T5在稳定的电位P2的控制下，向第六开关晶体管T6的源极输出稳定驱动电流。导通的第六开关晶体管T6可以将从第五开关晶体管T5输出的驱动电流输出到发光模块OLED的输入端，以驱动发光模块OLED发光。特别地，在t3阶段，第五开关晶体管T5在第二节点P2的控制下，将驱动电流输出到第六开关晶体管T6的源极。如图2所示，第二节点P2的电压即为第五开关晶体管T5的栅极电压。因此，由第五开关晶体管T5生成的驱动电流I＝K(Vgs-Vth)2＝K(Vdata+VDD+Vth-Vref-VDD-Vth)2＝K(Vdata-Vref)2，其中，K是与第五开关晶体管T5的工艺参数和几何尺寸有关的常数，Vgs为第五开关晶体管T5的栅极和源极之间的电压差，以及Vth为第五开关晶体管T5的阈值电压。由上述分析可知，使发光模块OLED导通的驱动电流与驱动晶体管(即第五开关晶体管T5)的阈值电压Vth无关，从而消除了驱动晶体管的阈值电压的变化对发光模块OLED的发光亮度产生的影响。这极大地改善了发光模块OLED发光亮度的均一性。
将本公开实施例提供的像素电路与现有的像素电路在补偿特性上进行模拟对比时，可以得到如图5所示的对比结果。在图5中，x轴表示晶体管的阈值电压，y轴表示驱动电流归一化后的结果。一般地，现有的像素电路不包括维持模块(即根据本公开实施例的像素电路中的第一开关晶体管T1和维持电容Cmos)。由图5可以看出，随着阈值电压的变化，根据本公开实施例的像素电路的驱动电流变化最小，其变化范围为-5％到5％，而现有技术的像素电路和应用了现有技术的像素电路的高分辨率的显示产品的驱动电流变化较大，其中，现有技术的像素电路的驱动电流的变化范围为-10％到10％，应用了现有技术的像素电路的高分辨率的显示产品的驱动电流的变化范围为-15％到15％。显然，根据本公开实施例的像素电路的补偿能力较好。
基于以上描述，可以获得用于驱动根据本公开实施例的如图1和2所示的像素电路的方法。下面以举例的方式对用于驱动根据本公开实 施例的像素电路的方法进行说明。
在一个实施例中，用于驱动根据本公开实施例的像素电路的方法包括，在初始化阶段，初始化模块02将初始化信号Vref输出到第一节点P1，并且驱动模块04通过第一电源信号VDD对第二节点P2进行初始化。所述方法还包括，在数据写入阶段，充电模块P1将数据信号Vdata输出到第一节点P1。所述方法还包括，在发光阶段，维持模块03通过所述第一电源信号VDD维持第二节点P2的电位不变，驱动模块04将驱动电流输出到控制模块05，以及控制模块05将驱动电流输出到发光模块OLED以驱动发光模块OLED发光。
在一个实施例中，在初始化阶段，初始化模块02在第一控制信号S1的控制下，将初始化信号Vref输出到第一节点P1；以及驱动模块04在第一控制信号S1的控制下，通过第一电源信号VDD对第二节点P2进行初始化。在一个实施例中，在数据写入阶段，充电模块01在第二控制信号S2的控制下，将数据信号Vdata输出到第一节点P1。在一个实施例中，在发光阶段，维持模块03在第三控制信号S3的控制下，通过第一电源信号VDD维持第二节点P2的电位不变；驱动模块04在第二节点P2的控制下，输出驱动电流到控制模块05；以及控制模块05在第三控制信号S3的控制下，将从驱动模块04输出的驱动电流输出到发光模块OLED，以驱动发光模块OLED发光。
在一个实施例中，第一控制信号S1、第二控制信号S2和第三控制信号S3在为低电平时起控制作用。
在一个实施例中，在根据本公开实施的如图2所示的像素电路中，在初始化阶段，让第一控制信号S1为低电平信号，并且在第一控制信号S1的控制下使第三开关晶体管T3和第四开关晶体管T4导通。导通的第三开关晶体管T3将初始化信号Vref输出到第一节点P1；导通的第四开关晶体管T4使第五开关晶体管T5充当二极管，从而通过第一电源信号VDD对第二节点P2初始化。在数据写入阶段，让第二控制信号S2为低电平信号，并且在第二控制信号S2的控制下，使第二开关晶体管T2导通。导通的第二开关晶体管T2将数据信号Vdata输出到第一节点P1。在发光阶段，让第三控制信号S3为低电平信号，并且在第三控制信号S3的控制下，使第一开关晶体管T1和第六开关晶体管T6导通。导通的第一开关晶体管T1通过第一电源信号VDD维持第 二节点P2的电位不变。导通的第六开关晶体管T5将从第五开关晶体管T5输出的驱动电流输出到发光模块OLED，以驱动发光模块OLED发光。
用于驱动根据本公开实施例提供的像素电路的方法，在相应工作阶段通过充电模块、初始化模块、维持模块、驱动模块和控制模块可以实现正常驱动发光模块发光的功能。特别地，维持模块可以在发光阶段维持第二节点的电位不变，从而保证驱动模块在稳定的第二节点的控制下，可以输出稳定的驱动电流以驱动发光模块发光。这有助于改善像素电路的补偿特性。
根据本公开实施例提供了一种显示面板，其包括如前所述的像素电路。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (14)

  1. 一种像素电路，包括：
    初始化模块，其用于在初始化阶段将初始化信号输出到第一节点；
    驱动模块，其用于在初始化阶段通过第一电源信号对第二节点进行初始化；以及在发光阶段输出驱动电流到控制模块；
    充电模块，其用于在数据写入阶段将数据信号输出到所述第一节点；
    控制模块，其用于在发光阶段从所述驱动模块接收驱动电流并且将其输出到发光模块；以及
    发光模块，其用于从控制模块接收驱动电流以发光；
    其中，所述像素电路还包括：
    维持模块，其用于在发光阶段通过所述第一电源信号维持所述第二节点的电位。
  2. 如权利要求1所述的像素电路，其中，
    所述初始化模块包括用于接收第一控制信号的控制端，用于接收所述初始化信号的输入端和与所述第一节点相连的输出端，并且其中所述初始化模块在所述第一控制信号的控制下，将所述初始化信号输出到所述第一节点；
    所述充电模块包括用于接收第二控制信号的控制端，用于接收所述数据信号的输入端以及与所述第一节点相连的输出端；并且其中所述充电模块在所述第二控制信号的控制下，将所述数据信号输出到所述第一节点；
    所述维持模块包括用于接收第三控制信号的控制端，用于接收所述第一电源信号的输入端，以及与所述第二节点相连的输出端；并且其中所述维持模块在所述第三控制信号的控制下，通过所述第一电源信号维持所述第二节点的电位；
    所述驱动模块包括与所述第二节点相连的第一控制端，用于接收所述第一控制信号的第二控制端，用于接收所述第一电源信号的第一输入端，与所述第一节点相连的第二输入端，与所述控制模块相连的输出端；所述驱动模块在所述第一控制信号的控制下，通过所述第一电源信号对所述第二节点进行初始化，并且在所述第二节点的控制下， 输出驱动电流到所述控制模块；
    所述控制模块包括用于接收所述第三控制信号的控制端，用于从所述驱动模块接收驱动电流的输入端，以及与所述发光模块相连的输出端；并且其中所述控制模块在所述第三控制信号的控制下，将所述驱动模块输出的驱动电流输出到所述发光模块以驱动所述发光模块发光；
    所述发光模块包括用于从所述控制模块接收驱动电流的第一输入端，以及用于接收第二电源信号的第二输入端；并且其中，所述发光模块在所述驱动电流的控制下发光。
  3. 如权利要求2所述的像素电路，其中，所述维持模块包括第一开关晶体管和维持电容；所述第一开关晶体管的栅极用于接收所述第三控制信号，以及所述第一开关晶体管的源极用于接收所述第一电源信号；以及所述第一开关晶体管的漏极与所述维持电容的两个电极之一相连，并且所述维持电容的两个电极中的另一个电极与所述第二节点相连。
  4. 如权利要求3所述的像素电路，其中，所述维持电容的两个电极之一设置在所述第一开关晶体管的电极层上，并且所述维持电容的两个电极中的另一个电极设置在所述第一开关晶体管的金属层上。
  5. 如权利要求2-4中任一项所述的像素电路，其中，所述充电模块包括第二开关晶体管；并且其中，所述第二开关晶体管的栅极用于接收所述第二控制信号，所述第二开关晶体管的源极用于接收所述数据信号，以及所述第二开关晶体管的漏极与所述第一节点相连。
  6. 如权利要求2-4中任一项所述的像素电路，其中，所述初始化模块包括第三开关晶体管；并且其中所述第三开关晶体管的栅极用于接收所述第一控制信号，所述第三开关晶体管的源极用于接收所述初始化信号，以及所述第三开关晶体管的漏极与所述第一节点相连。
  7. 如权利要求2-4中任一项所述的像素电路，其中，所述驱动模块包括第四开关晶体管、第五开关晶体管和存储电容；并且其中，所述第四开关晶体管的栅极用于接收所述第一控制信号，所述第四开关晶体管的源极与所述第五开关晶体管的漏极和所述控制模块的输入端相连，所述第四开关晶体管的漏极与所述第二节点、存储电容的两个电极之一和第五开关晶体管的栅极相连，所述第五开关晶体管的源极 用于接收所述第一电源信号，以及所述存储电容的两个电极中的另一个电极与所述第一节点相连。
  8. 如权利要求2-4中任一项所述的像素电路，其中，所述控制模块包括第六开关晶体管；并且其中所述第六开关晶体管的栅极用于接收所述第三控制信号，所述第六开关晶体管的源极与所述驱动模块的输出端相连，所述第六开关晶体管的漏极与所述发光模块的输入端相连。
  9. 如权利要求1所述的像素电路，其中，维持模块包括第一开关晶体管和维持电容，充电模块包括第二开关晶体管，初始化模块包括第三开关晶体管，驱动模块包括第四开关晶体管、第五开关晶体管和存储电容，以及控制模块包括第六开关晶体管；并且其中，
    所述第一开关晶体管的栅极用于接收第三控制信号，所述第一开关晶体管的源极用于接收第一电源信号，以及所述第一开关晶体管的漏极与所述维持电容的两个电极之一相连；
    所述维持电容的两个电极中的另一个电极与第二节点相连；
    所述第二开关晶体管的栅极用于接收第二控制信号，所述第二开关晶体管的源极用于接收数据信号，以及所述第二开关晶体管的漏极与第一节点相连；
    所述第三开关晶体管的栅极用于接收第一控制信号，所述第三开关晶体管的源极用于接收初始化信号，所述第三开关晶体管的漏极与所述第一节点相连；
    所述第四开关晶体管的栅极用于接收所述第一控制信号，所述第四开关晶体管的源极与所述第五开关晶体管的漏极和所述第六开关晶体管的源极相连，所述第四开关晶体管的漏极与所述第二节点相连；
    所述第五开关晶体管的栅极与所述第二节点相连，所述第五开关晶体管的源极用于接收所述第一电源信号；所述存储电容的两个电极分别与所述第一节点和所述第二节点相连；
    所述第六开关晶体管的栅极用于接收所述第三控制信号，所述第六开关晶体管的漏极与所述发光模块的输入端相连；
    所述发光模块的输出端用于接收第二电源信号。
  10. 一种显示面板，其包括如权利要求1-9中任一项所述的像素电路。
  11. 一种如权利要求1-8中任一项所述的像素电路的驱动方法，包 括：
    在初始化阶段，初始化模块将初始化信号输出到第一节点，并且驱动模块通过第一电源信号对第二节点进行初始化；
    在数据写入阶段，充电模块将数据信号输出到所述第一节点；以及
    在发光阶段，维持模块通过所述第一电源信号维持所述第二节点的电位，所述驱动模块将驱动电流输出到控制模块，所述控制模块将驱动电流输出到发光模块以驱动所述发光模块发光。
  12. 如权利要求11所述的驱动方法，其中：
    在初始化阶段，所述初始化模块在所述第一控制信号的控制下，将所述初始化信号输出到所述第一节点；并且所述驱动模块在所述第一控制信号的控制下，通过所述第一电源信号对所述第二节点进行初始化；
    在数据写入阶段，所述充电模块在所述第二控制信号的控制下，将所述数据信号输出到所述第一节点；
    在发光阶段，所述维持模块在所述第三控制信号的控制下，通过所述第一电源信号维持所述第二节点的电位；所述驱动模块在所述第二节点的控制下，将驱动电流输出到所述控制模块；以及所述控制模块在所述第三控制信号的控制下，将驱动电流输出到所述发光模块，以驱动所述发光模块发光。
  13. 如权利要求12所述的驱动方法，其中，所述第一控制信号，所述第二控制信号以及所述第三控制信号均为低电平信号。
  14. 一种如权利要求9所述的像素电路的驱动方法，包括：
    在初始化阶段，
    让所述第一控制信号为低电平信号；
    在所述第一控制信号的控制下，使第三开关晶体管和第四开关晶体管导通；
    导通的所述第三开关晶体管将所述初始化信号输出到所述第一节点；
    导通的所述第四开关晶体管使所述第五开关晶体管充当二极管，以便通过所述第一电源信号对所述第二节点初始化；
    在数据写入阶段，
    让所述第二控制信号为低电平信号；
    在所述第二控制信号的控制下，使所述第二开关晶体管导通，导通的所述第二开关晶体管将所述数据信号输出到所述第一节点并对所述存储电容充电；
    在发光阶段，
    让所述第三控制信号为低电平信号；
    在所述第三控制信号的控制下，使所述第一开关晶体管和所述第六开关晶体管导通；
    导通的所述第一开关晶体管通过所述第一电源信号和所述维持电容维持所述第二节点的电位；
    导通的所述第六开关晶体管将所述第五开关晶体管输出的驱动电流输出到所述发光模块，以驱动所述发光模块发光。
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