CN105448244B - 像素补偿电路及amoled显示装置 - Google Patents
像素补偿电路及amoled显示装置 Download PDFInfo
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Abstract
本发明提供一种像素补偿电路及AMOLED显示装置。其包括数据信号写入模块、高电压信号写入模块、第一基准电压生成模块、第二基准电压写入模块;数据信号写入模块在发光器件发光前与电容的第一端连接;高电压信号写入模块在发光器件发光过程中与电容的第一端连接;第一基准电压生成模块在发光器件发光前与电容的第二端和驱动晶体管的漏极连接;驱动晶体管的栅极与电容的第二端连接,漏极与发光器件的阳极连接;源极在发光器件发光前与第二基准电压写入模块连接,在发光器件发光过程中与高电压信号写入模块连接;发光器件的阴极与公共接地电极连接。上述像素补偿电路可以避免发光器件在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。
Description
技术领域
本发明涉及显示技术领域,具体地,涉及一种像素补偿电路及AMOLED显示装置。
背景技术
平面显示装置具有机身薄、省电、无辐射等众多优点,因而得到了广泛的应用。现有的平面显示装置主要包括液晶显示装置(Liquid Crystal Display,以下称为LCD)及有机发光二极管(Organic Light Emitting Diode,以下称为OLED)显示装置。
OLED显示装置通过自发光实现显示,因而其不需背光源,具有对比度高、厚度小、视角广、反应速度快、可被制成柔性显示面板、使用温度范围广、构造及制程较简单等优异特性,被视为可以取代LCD的下一代显示装置。
OLED按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED,PMOLED)和有源矩阵型OLED(Active Matrix OLED,AMOLED)两大类,即直接寻址和薄膜晶体管(ThinFilm Transistor,TFT)矩阵寻址两类。其中,PMOLED的功耗较高,阻碍了其在大尺寸显示装置中的应用,所以PMOLED通常用作小尺寸的显示装置。而AMOLED因其高发光效能,通常用作高清晰度的大尺寸显示装置。
图1为现有的AMOLED像素电路的电路图。在AMOLED显示装置的显示区域内,像素被设置成包括多行、多列的矩阵状,每一像素通常采用由两个薄膜晶体管与一个电容(Capacitor)组成的像素电路进行驱动,即采用2T1C的驱动方式。具体地,第一晶体管T1的栅极电性连接栅线Scan,源极电性连接数据信号线DATA,漏极与第二晶体管T2的栅极及电容C的一端电性连接;第二晶体管T2的源极电性连接高电压信号端VDD,漏极电性连接有机发光二级管D的阳极;有机发光二级管D的阴极电性连接公共接地电极VSS;电容C的一端电性连接第一晶体管T1的漏极,另一端电性连接第二晶体管T2的源极。显示时,栅线Scan控制第一晶体管T1打开,数据信号线DATA的数据信号电压经过第一晶体管T1进入到第二晶体管T2的栅极及电容C,然后第一晶体管T1闭合,由于电容C作用,第二晶体管T2的栅极电压仍可继续保持数据信号电压,使得第二晶体管T2处于导通状态,高电压信号端VDD与数据信号电压对应的驱动电流通过第二晶体管T2进入有机发光二级管D,驱动有机发光二级管D发光。
上述AMOLED显示装置中,有机发光二极管D根据第二晶体管T2在饱和状态下产生的电流驱动;而由于TFT制程上的不均匀性,各像素中第二晶体管T2的临界电压不同,以及,由于第二晶体管T2的阈值电压Vth在有机发光二极管D发光过程中会发生不同程度的漂移,在采用上述2T1C驱动电路进行驱动时,各像素的亮度均一性很差,造成显示不均等不良。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一,提出了一种像素补偿电路及AMOLED显示装置,其可以避免发光器件在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。
为实现本发明的目的而提供一种像素补偿电路,其包括数据信号写入模块、高电压信号写入模块、第一基准电压生成模块、第二基准电压写入模块、驱动晶体管、电容和发光器件;所述数据信号写入模块在发光器件发光前与所述电容的第一端连接;所述高电压信号写入模块在发光器件发光过程中与所述电容的第一端连接;所述第一基准电压生成模块在发光器件发光前与所述电容的第二端和驱动晶体管的漏极连接;所述驱动晶体管的栅极与所述电容的第二端连接,漏极与发光器件的阳极连接;源极在发光器件发光前与第二基准电压写入模块连接,在发光器件发光过程中与所述高电压信号写入模块连接;所述发光器件的阴极与公共接地电极连接。
其中,所述第一基准电压生成模块在发光器件发光前还与所述发光器件的阳极连接。
其中,所述像素补偿电路还包括电压清除模块,所述电压清除模块连接在驱动晶体管的漏极和发光器件的阳极之间,其用于向发光器件的阳极输入第三基准电压。
其中,所述数据信号写入模块包括数据信号线和第一晶体管;所述第一晶体管的控制极与栅线连接,源极与数据信号线连接,漏极与所述电容的第一端连接。
其中,所述高电压信号写入模块包括高电压信号端和第二晶体管、第三晶体管;所述第二晶体管的控制极与发光信号端连接,源极与高电压信号端连接,漏极与所述第三晶体管的源极和驱动晶体管的源极连接;所述第三晶体管的控制极与发光信号端连接,漏极与所述电容的第一端连接。
其中,所述第二基准电压写入模块包括第二基准电压端和第四晶体管;所述第四晶体管的控制极与栅线连接,源极与第二基准电压端连接,漏极与驱动晶体管的源极连接。
其中,所述第一基准电压生成模块包括基准电流端和第五晶体管、第六晶体管;所述第五晶体管的控制极与栅线连接,源极与基准电流端连接,漏极与第六晶体管的源极、驱动晶体管的漏极连接;所述第六晶体管的控制极与栅线连接,漏极与所述电容的第二端连接。
其中,所述第一基准电压生成模块包括基准电流端和第五晶体管、第六晶体管;所述第五晶体管的控制极与栅线连接,源极与基准电流端连接,漏极与第六晶体管的源极、发光器件的阳极和驱动晶体管的漏极连接;所述第六晶体管的控制极与栅线连接,漏极与所述电容的第二端连接。
其中,所述电压清除模块包括第三基准电压信号端和第七晶体管、第八晶体管;所述第七晶体管的控制极与发光信号端连接,源极与驱动晶体管的漏极连接,漏极与发光器件的阳极连接;所述第八晶体管的控制极与栅线连接,源极与第三基准电压信号端连接,漏极与发光器件的阳极连接。
作为另一个技术方案,本发明还提供一种AMOLED显示装置,其包括上述像素补偿电路。
本发明具有以下有益效果:
本发明提供的像素补偿电路,其通过在发光器件发光前阶段,由第一基准电压生成模块向电容的第二端以及驱动晶体管的栅极写入电压,且该电压包含驱动晶体管的阈值电压;由高电压信号写入模块向驱动晶体管的源极写入电压;使发光器件的发光阶段,所生成的驱动电流与驱动晶体管的阈值电压和高电压信号端的电压无关,这样驱动晶体管的制程工艺的均匀性,以及其阈值电压在发光过程中的漂移,以及高电压信号端的压降不会对发光器件的发光亮度造成影响,从而可以避免发光器件在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。而且,在发光器件的发光阶段,所述电容保持悬置状态,使其两端的电压差,即驱动晶体管的栅极和源极之间的差值保持不变,从而使所述驱动电流不会因高电压信号端的变化而变动,从而进一步避免发光器件在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。
本发明提供的AMOLED显示装置,采用本发明提供的上述像素补偿电路,可以避免每个像素内的发光器件在一帧画面中的发光亮度发生变化,以及,避免各像素内的驱动晶体管的制程工艺造成各像素内发光器件发光亮度的不均匀,从而提高显示效果和显示均匀性。
附图说明
附图是用来提供对本发明的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本发明,但并不构成对本发明的限制。在附图中:
图1为现有的AMOLED像素电路的电路图;
图2为本发明第一实施方式中像素补偿电路的电路图;
图3为图2所示像素补偿电路中各信号的时序图;
图4为t1阶段的等效电路图;
图5为t2阶段的等效电路图;
图6为本发明第二实施方式中像素补偿电路的电路图。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是,此处所描述的具体实施方式仅用于说明和解释本发明,并不用于限制本发明。
本发明提供一种像素补偿电路的多个实施方式。图2为本发明第一实施方式中像素补偿电路的电路图。如图2所示,在本实施方式中,所述像素补偿电路包括数据信号写入模块1、高电压信号写入模块2、第一基准电压生成模块3、第二基准电压写入模块4、驱动晶体管DTFT、电容C和发光器件5。所述数据信号写入模块1在发光器件5发光前与所述电容C的第一端连接;所述高电压信号写入模块2在发光器件5发光过程中与所述电容C的第一端连接。所述第一基准电压生成模块3在发光器件5发光前与所述电容C的第二端和驱动晶体管DTFT的漏极连接。所述驱动晶体管DTFT的栅极与所述电容C的第二端连接,漏极与发光器件5的阳极连接;源极在发光器件5发光前与第二基准电压写入模块4连接,在发光器件5发光过程中与所述高电压信号写入模块2连接。所述发光器件5的阴极与公共接地电极VSS连接;所述发光器件5具体可以为OLED(有机发光二极管)。
具体地,如图2所示,所述数据信号写入模块1包括数据信号线DATA和第一晶体管T1;所述第一晶体管T1的控制极(即栅极)与栅线Scan连接,源极与数据信号线DATA连接,漏极与所述电容C的第一端连接。所述高电压信号写入模块2包括高电压信号端VDD和第二晶体管T2、第三晶体管T3;所述第二晶体管T2的控制极(即栅极)与发光信号端EM连接,源极与高电压信号端VDD连接,漏极与所述第三晶体管T3的源极和驱动晶体管DTFT的源极连接;所述第三晶体管T3的控制极(即栅极)与发光信号端EM连接,漏极与所述电容C的第一端连接。所述第二基准电压写入模块4包括第二基准电压端Vf和第四晶体管T4;所述第四晶体管T4的控制极(即栅极)与栅线Scan连接,源极与第二基准电压端Vf连接,漏极与驱动晶体管DTFT的源极连接。所述第一基准电压生成模块3包括基准电流端If和第五晶体管T5、第六晶体管T6;所述第五晶体管T5的控制极(即栅极)与栅线Scan连接,源极与基准电流端If连接,漏极与第六晶体管T6的源极、驱动晶体管DTFT的漏极连接;所述第六晶体管T6的控制极(即栅极)与栅线连接,漏极与所述电容C的第二端连接。
在本实施方式中,所述第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6以及驱动晶体管DTFT为P型晶体管;在此情况下,各信号的时序如图3所示。下面结合图3所示的时序对图2所示像素补偿电路驱动发光器件发光的过程进行详细描述。
在第一阶段t1,该阶段为发光器件5不发光阶段;具体地,栅线Scan所输出的扫描信号为低电平,发光信号端EM输出的发光信号为高电平,数据信号线DATA输出的数据信号为高电平。在此情况下,第一晶体管T1开启,第二晶体管T2、第三晶体管T3关闭,第四晶体管T4开启,第五晶体管T5和第六晶体管T6开启,此时等效的电路图如图4所示。参看图4,数据信号线DATA与电容C的第一端连通,其将数据信号输入至电容C的第一端,使电容C的第一端的电压为VDATA;同时,第二基准电压端Vf与驱动晶体管DTFT的源极连接,使驱动晶体管DTFT的源极的电压等于Vf。
而基准电流端If则与电容C的第二端连通,也即,与驱动晶体管DTFT的栅极连通。基准电流端If具有基准电流If,该基准电流If为设定值。在基准电流端If具有基准电流If的情况下,基准电流If满足以下公式(1):
If=k(Vgs-Vth)2·········(1)
其中,k为与驱动晶体管DTFT有关的常数;Vth为驱动晶体管DTFT的阈值电压;Vgs为驱动晶体管DTFT的栅极与源极之间的电压差,即Vgs=Vg-Vs,而Vg为驱动晶体管DTFT的栅极电压,Vs为驱动晶体管DTFT的源极电压。
而在t1阶段,驱动晶体管DTFT的源极电压为Vf,因此,上述公式(1)可以变换为下述公式(2):
If=k(Vg-Vf-Vth)2·········(2)
根据上述公式(2),可以计算得出驱动晶体管DTFT的栅极电压Vg:
该计算出的电压Vg即为t1阶段驱动晶体管DTFT的栅极的电压,即由基准电流端If写入到电容C的第二端上的电压。
在实际中,通过设定基准电流If的值,可以控制写入到电容C的第二端以及驱动晶体管DTFT的栅极的电压Vg的大小,使所述驱动晶体管DTFT的栅极在的t1阶段保持所需的电压。
根据上述内容,在t1阶段,电容C两端的电压差Δs为:
在第二阶段t2,该阶段为发光器件5的发光阶段;具体地,栅线Scan所输出的扫描信号为高电平,发光信号端EM所输出的发光信号为低电平,数据信号线DATA所输出的数据信号为低电平,在此情况下,第一晶体管T1关闭,第二晶体管T2、第三晶体管T3开启,第四晶体管T4、第五晶体管T5和第六晶体管T6关闭,此时等效的电路图如图5所示。参看图5,高电压信号端VDD与电容C的第一端连通,其向电容C的第一端写入电压,使电容C的第一端由VDATA变为VDD;此外,在本阶段,VDD还与驱动晶体管DTFT的源极连接,因此,驱动晶体管DTFT的源极的电压由Vf变为VDD。另一方面,在该t2阶段,电容C的第二端处于悬置(floating)状态,在电容C的第一端由VDATA变为VDD时,电容C第二端的电压会相应变化,以维持电容C两端的电压不变,即电容C两端的电压差Δs仍为:
而电容C第一端的电压与驱动晶体管DTFT的源极的电压相等,电容C第二端的电压与驱动晶体管DTFT的栅极的电压相等,因此,驱动晶体管DTFT的栅极和源极之间的电压差Vgs与上述Δs的值相等。
至此,可以得出,在该t2阶段,根据驱动晶体管DTFT而生成的用以驱动发光器件5发光的电流:
根据所述公式(5),驱动发光器件5发光的电流IOLED与驱动晶体管DTFT的阈值电压Vth无关,也与VDD无关,因此,驱动晶体管DTFT的制程工艺的均匀性,以及其阈值电压Vth在发光过程中的漂移,以及VDD的压降(IR Drop)不会对发光器件5的发光亮度造成影响,从而可以避免发光器件5在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。
另一方面,在t2阶段,由于电容C处于floating状态,当高电压信号端VDD的电压变化时,电容C的两端之间的电压差Δs不变,即驱动晶体管DTFT的栅极和源极之间的电压差Vgs会维持不变,从而所生成的驱动电流IOLED也不会因而VDD的电压变化而变动,从而可以进一步确保驱动电流IOLED保持稳定,避免发光器件5在发光过程中的亮度发生变化,提高发光过程中的均一性。
优选地,所述第一基准电压生成模块3在发光器件5发光前还与所述发光器件5的阳极连接。即如图4所示,在t1阶段,所述第五晶体管T5的漏极还与发光器件5的阳极,因此,所述电压Vg也会写入到发光器件5的阳极上,清除上一帧画面结束时发光器件5的阳极所保持的电压,从而使所述发光器件5在本帧画面中的发光亮度准确,而不会出现偏差。
图6为本发明第二实施方式中像素补偿电路的电路图。如图6所示,与上述第一实施方式不同的是,本实施方式中,所述像素补偿电路还包括电压清除模块6,所述电压清除模块6连接在驱动晶体管DTFT的漏极和发光器件5的阳极之间,其用于向发光器件5的阳极输入第三基准电压Vi。
具体地,所述电压清除模块6包括第三基准电压信号端Vi和第七晶体管T7、第八晶体管T8;所述第七晶体管T7的控制极与发光信号端EM连接,源极与驱动晶体管DTFT的漏极连接,漏极与发光器件5的阳极连接;所述第八晶体管T8的控制极与栅线Scan连接,源极与第三基准电压信号端Vi连接,漏极与发光器件5的阳极连接。
本实施方式中,各信号的时序与上述第一实施方式中各信号的时序相同。具体地,在t1阶段,第七晶体管T7关闭,第八晶体管T8开启,在此情况下,驱动晶体管DTFT和电容C的第二端,与发光器件5之间断开连接,第三基准电压信号端Vi与发光器件5的阳极连接,因此,在本实施方式中,t1阶段,输入至发光器件5的阳极,用以清除发光器件5的阳极在上一帧画面中的电压的为第三基准电压Vi,而不是上述第一实施方式中的电压Vg。
与上述第一实施方式相比,本实施方式中,采用单独的电压清除模块6在t1阶段清除发光器件5的阳极上的电压;使所述第一基准电压生成模块3只需向电容C的第二端写入电压,确保电容C两端的电压差Δs满足所述公式(4),而无需向发光器件5的阳极写入电压。首先,这样在确定基准电流If的值时,无需考虑清除发光器件5的阳极电压,从而可以更加容易地确定基准电流If的值;其次,这样就可以独立地控制电压清除模块6写入到发光器件5的阳极的电压,以及第一基准电压生成模块3写入到电容C的第二端的电压,控制方式更加简单,可靠性更高。
综上所述,本发明第一和第二实施方式提供的像素补偿电路,其通过第一基准电压生成模块3在发光器件5发光前阶段向电容C的第二端以及驱动晶体管DTFT的栅极写入电压,且该电压包含驱动晶体管DTFT的阈值电压Vth;使发光器件5的发光阶段,所生成的驱动电流与驱动晶体管DTFT的阈值电压以及高电压信号端VDD无关,这样驱动晶体管DTFT的制程工艺的均匀性,以及其阈值电压Vth在发光过程中的漂移,以及高电压信号端VDD的压降不会对发光器件5的发光亮度造成影响,从而可以避免发光器件5在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。而且,在发光器件5的发光阶段,所述电容C保持悬置状态,使其两端的电压差,即驱动晶体管DTFT的栅极和源极之间的差值保持不变,从而使所述驱动电流不会因高电压信号端VDD的变化而变动,从而进一步避免发光器件5在发光过程中的亮度发生变化,提高发光过程中的亮度均一性。
作为另一个技术方案,本发明还提供一种AMOLED显示装置的实施方式。在本实施方式中,所述AMOLED显示装置包括上述第一或第二实施方式中所述的像素补偿电路。
本发明实施方式提供的AMOLED显示装置,采用本发明上述实施方式提供的像素补偿电路,可以避免每个像素内的发光器件在一帧画面中的发光亮度发生变化,以及,避免各像素内的驱动晶体管的制程工艺造成各像素内发光器件发光亮度的不均匀,从而提高显示效果和显示均匀性。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (9)
1.一种像素补偿电路,其特征在于,包括数据信号写入模块、高电压信号写入模块、第一基准电压生成模块、第二基准电压写入模块、驱动晶体管、电容和发光器件;
所述数据信号写入模块在发光器件发光前与所述电容的第一端连接;所述高电压信号写入模块在发光器件发光过程中与所述电容的第一端连接;
所述第一基准电压生成模块在发光器件发光前与所述电容的第二端和驱动晶体管的漏极连接;
所述驱动晶体管的栅极与所述电容的第二端连接,漏极与发光器件的阳极连接;源极在发光器件发光前与第二基准电压写入模块连接,在发光器件发光过程中与所述高电压信号写入模块连接;
所述发光器件的阴极与公共接地电极连接
所述第一基准电压生成模块在发光器件发光前还与所述发光器件的阳极连接。
2.根据权利要求1所述的像素补偿电路,其特征在于,所述像素补偿电路还包括电压清除模块,所述电压清除模块连接在驱动晶体管的漏极和发光器件的阳极之间,其用于向发光器件的阳极输入第三基准电压。
3.根据权利要求1~2任意一项所述的像素补偿电路,其特征在于,所述数据信号写入模块包括数据信号线和第一晶体管;所述第一晶体管的控制极与栅线连接,源极与数据信号线连接,漏极与所述电容的第一端连接。
4.根据权利要求1~2任意一项所述的像素补偿电路,其特征在于,所述高电压信号写入模块包括高电压信号端和第二晶体管、第三晶体管;所述第二晶体管的控制极与发光信号端连接,源极与高电压信号端连接,漏极与所述第三晶体管的源极和驱动晶体管的源极连接;所述第三晶体管的控制极与发光信号端连接,漏极与所述电容的第一端连接。
5.根据权利要求4所述的像素补偿电路,其特征在于,所述第二基准电压写入模块包括第二基准电压端和第四晶体管;所述第四晶体管的控制极与栅线连接,源极与第二基准电压端连接,漏极与驱动晶体管的源极连接。
6.根据权利要求1或2所述的像素补偿电路,其特征在于,所述第一基准电压生成模块包括基准电流端和第五晶体管、第六晶体管;所述第五晶体管的控制极与栅线连接,源极与基准电流端连接,漏极与第六晶体管的源极、驱动晶体管的漏极连接;所述第六晶体管的控制极与栅线连接,漏极与所述电容的第二端连接。
7.根据权利要求1所述的像素补偿电路,其特征在于,所述第一基准电压生成模块包括基准电流端和第五晶体管、第六晶体管;所述第五晶体管的控制极与栅线连接,源极与基准电流端连接,漏极与第六晶体管的源极、发光器件的阳极和驱动晶体管的漏极连接;所述第六晶体管的控制极与栅线连接,漏极与所述电容的第二端连接。
8.根据权利要求2所述的像素补偿电路,其特征在于,所述电压清除模块包括第三基准电压信号端和第七晶体管、第八晶体管;所述第七晶体管的控制极与发光信号端连接,源极与驱动晶体管的漏极连接,漏极与发光器件的阳极连接;所述第八晶体管的控制极与栅线连接,源极与第三基准电压信号端连接,漏极与发光器件的阳极连接。
9.一种AMOLED显示装置,其特征在于,包括权利要求1~8任意一项所述的像素补偿电路。
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