WO2016011714A1 - 像素电路、像素电路的驱动方法和显示装置 - Google Patents

像素电路、像素电路的驱动方法和显示装置 Download PDF

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WO2016011714A1
WO2016011714A1 PCT/CN2014/088897 CN2014088897W WO2016011714A1 WO 2016011714 A1 WO2016011714 A1 WO 2016011714A1 CN 2014088897 W CN2014088897 W CN 2014088897W WO 2016011714 A1 WO2016011714 A1 WO 2016011714A1
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Prior art keywords
transistor
driving
row
pixel
line
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PCT/CN2014/088897
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English (en)
French (fr)
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吴博
祁小敬
谭文
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to US14/770,690 priority Critical patent/US9773451B2/en
Publication of WO2016011714A1 publication Critical patent/WO2016011714A1/zh

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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
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Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method of a pixel circuit, and a display device.
  • a pixel driving circuit of a basic active matrix/organic light emitting diode (AMOLED) in the prior art uses a 2T1C pixel driving circuit, and the 2T1C pixel driving circuit includes a control transistor T, The driving transistor DTFT and the capacitor C are used to drive the organic light emitting diode OLED.
  • the gate of the control transistor T is connected to the control signal SW.
  • the control transistor is also connected to the data line DATA.
  • the anode of the OLED is connected to the high level VDD, and the driving transistor DTFT is connected to the low level. Therefore, the 2T1C pixel driving circuit in the prior art has a simple structure.
  • LTPS low temperature poly-silicon
  • TFT driving film field effect transistor
  • the 5T2C pixel driving circuit includes a first control transistor T1, a second control transistor T2, a third control transistor T3, a fourth control transistor T4, a first capacitor C1, a second capacitor C2, and a driving transistor DTFT. Used to drive an organic light emitting diode OLED.
  • the gate of T1, the gate of T2, and the gate of T4 are connected to control signal CR1.
  • the gate of T3 is connected to the scan line SCAN, and T3 is also connected to the data voltage Vdata.
  • the first end of C1 is labeled A, and the second end of C1 is labeled B.
  • DTFT is connected to a high level VDD.
  • the cathode of the OLED is connected to a low level VSS.
  • a main object of the present disclosure is to provide a pixel circuit, a driving method of a pixel circuit, and a display device, which increase an aperture ratio of a pixel, thereby reducing a current density of the organic light-emitting layer while obtaining uniform display.
  • the present disclosure provides a pixel circuit comprising a plurality of rows of pixel units, each row of pixel units comprising a plurality of sub-pixel units; each row of pixel units further comprising a row sharing unit, the row sharing unit comprising a plurality of row driving illumination control modules.
  • Each of the plurality of sub-pixel units included in each row of pixel units is connected to a signal line.
  • Each of the plurality of row drive illumination control modules and each of the sub-pixel units included in a row of the pixel units of the plurality of rows of pixel units are connected by the signal line to have threshold compensation Features.
  • the sub-pixel unit is disposed in an effective display area, and the row sharing unit is disposed outside the effective display area.
  • each of the sub-pixel units included in the nth row of pixel units includes a sub-pixel driving circuit and a light-emitting element; wherein n is a positive integer and n is less than or equal to a total number of rows of pixel units included in the pixel circuit; When n is equal to 1, the n-1th scan line is the starting scan line.
  • the sub-pixel driving circuit includes a driving compensation module, a data writing module, and a driving transistor.
  • the driving transistor has a first pole connected to the first end of the light emitting element, a second pole connected to the first level, and a second end of the light emitting element connected to the signal line.
  • the driving compensation module is respectively connected to the n-1th scan line, the gate of the driving transistor, the first electrode of the driving transistor, and the second electrode of the driving transistor, and is also connected to the second level for In the first phase of a time period, when the scan signal outputted by the n-1th scan line is valid, the gate-source voltage of the drive transistor is controlled to compensate the threshold voltage of the drive transistor.
  • the data writing module is respectively connected to the nth scan line, a data line, and the driving compensation module
  • the connection is configured to, during the second phase of the time period, when the scan signal output by the nth scan line is valid, control the data voltage on the data line to be written to the gate of the drive transistor through the drive compensation module.
  • Each of the rows drives the illumination control module to respectively receive an illumination control signal and a second level, and are respectively connected to the second end of the illumination element through a signal line for use in the third period of the time period At the stage, the potential of the signal line is controlled to be the second level when the illumination control signal is active.
  • the driving compensation module is further configured to control to maintain the driving transistor when the scan signal output by the n-1th scan line and the scan signal output by the nth scan line are both invalid during the third phase of the time period The potential of the gate, thereby controlling the driving transistor to drive the light emitting element to emit light and controlling the threshold for compensating the driving transistor.
  • the driving compensation module includes a first compensation transistor, a second compensation transistor, a first capacitor, and a second capacitor.
  • the first compensation transistor has a gate connected to the n-1th scan line, a first pole connected to the first end of the first capacitor, and a second pole connected to the first level.
  • the driving transistor has a gate connected to the first end of the first capacitor, a first pole connected to the first end of the light emitting element, a second pole connected to the first level, and a second pole of the light emitting component
  • the terminal is connected to the signal line.
  • the second compensation transistor has a gate connected to the n-1th scan line, a first pole connected to the second end of the first capacitor, and a second pole connected to the first pole of the driving transistor.
  • the second capacitor has a first end connected to the second end of the first capacitor and a second end connected to the second level.
  • the data writing module includes: a data writing transistor, the gate is connected to the nth scan line, the first pole is connected to the data line, and the second pole is connected to the second end of the first capacitor.
  • each of the row driving illumination control modules includes: a row driving illumination control transistor, the gate is connected to an illumination control signal, the first pole is connected to the second level, and the second pole is connected to the signal line .
  • the drive transistor, the first compensation transistor, the second compensation transistor, the data write transistor, and the row drive illumination control transistor are all n-type TFTs.
  • the present disclosure also provides a driving method of a pixel circuit, which is applied to the above pixel circuit,
  • the driving method of the pixel circuit includes:
  • a compensation step in a threshold voltage compensation phase of a time period, the scan signal outputted by the scan line of the previous row is valid, and the drive compensation module controls the gate-source voltage of the drive transistor to compensate the threshold voltage of the drive transistor;
  • a data writing step in the data voltage compensation phase of the time period, the scan signal outputted by the scan line of the current line is valid, and the data voltage of the data write module control data line is written into the gate of the drive transistor through the drive compensation module;
  • the illuminating control signal is valid, and the scanning signal outputted by the scanning line of the previous row and the scanning signal output by the scanning line of the current line are invalid, and the row driving illuminating control module controls the potential of the signal line to be the first
  • the drive compensation module controls the potential of the gate of the drive transistor to be maintained, thereby controlling the drive transistor to drive the light emitting element to emit light and control the threshold for compensating the drive transistor.
  • the present disclosure also provides a display device including the above-described pixel circuit.
  • the pixel circuit described in the present disclosure adopts a row sharing unit such that the number of TFTs in the effective display region is reduced while being able to compensate the threshold of the driving transistor, so that the aperture ratio of the pixel is increased, thereby Uniform display reduces the current density of the organic light-emitting layer and prolongs the service life of the AMOLED panel.
  • 1A is a circuit diagram of a 2T1C pixel driving circuit in the prior art
  • 1B is a circuit diagram of a 5T2C pixel driving circuit in the prior art
  • FIG. 2 is a structural diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 3 is a structural block diagram of an interconnected sub-pixel unit and a row driving illumination control module included in a pixel circuit according to an embodiment of the present disclosure
  • FIG. 4 is a circuit diagram of an interconnected sub-pixel unit and a row driving illumination control module included in a pixel circuit according to an embodiment of the present disclosure
  • FIG. 5 is an operational timing diagram including interconnected sub-pixel units and row drive illumination control modules as shown in FIG. 4;
  • 6A, 6B, and 6C are equivalent circuit diagrams of the circuit shown in FIG. 4 in the first stage, the second stage, and the third stage, respectively;
  • FIG. 7 is a circuit diagram of a pixel circuit according to an embodiment of the present disclosure.
  • the transistors employed in all embodiments of the present disclosure may each be a thin film transistor or a field effect transistor or other device having the same characteristics.
  • the first pole may be a source or a drain
  • the second pole may be a drain or a source.
  • the transistor can be classified into an n-type transistor or a p-type transistor.
  • all of the transistors are described by taking an n-type transistor as an example. It is conceivable that those skilled in the art can make no creative work when implemented by using a p-type transistor. It is also conceivable, and is therefore within the scope of the embodiments of the present disclosure.
  • the pixel circuit described in the embodiments of the present disclosure includes a plurality of rows of pixel units, and each row of pixel units includes a plurality of sub-pixel units. Each row of pixel units further includes a row sharing unit including a plurality of row driving illumination control modules.
  • Each of the plurality of sub-pixel units included in each row of pixel units is connected to a signal line.
  • Each of the plurality of row drive illumination control modules and each of the sub-pixel units included in a row of the pixel units of the plurality of rows of pixel units are connected by the signal line to have threshold compensation Features.
  • each of the sub-pixel units includes a sub-pixel driving circuit and a light-emitting element
  • the light-emitting element may be, for example, an organic light emitting diode (OLED).
  • the pixel circuit described in this embodiment adopts a row common unit such that the number of TFTs in the effective display region is reduced while being able to compensate the threshold of the driving transistor, so that the aperture ratio of the pixel is increased, thereby being uniformly displayed.
  • the current density of the organic light-emitting layer is lowered, and the service life of the AMOLED panel is prolonged.
  • the pixel circuit described in this embodiment can compensate for the threshold voltage, improve the uniformity and reliability, and simplify the pixel driving circuit, and the control signal is small, which is advantageous for the pixel size to be reduced.
  • the sub-pixel unit is disposed in an effective display area, and the row sharing unit is disposed outside the effective display area.
  • the common circuit in each row of pixel units outside the effective display area the number of TFTs in the effective display area is further reduced, and the aperture ratio is increased.
  • each of the sub-pixel units included in the nth row of pixel units includes a sub-pixel driving circuit and a light emitting element.
  • n is a positive integer and n is less than or equal to the total number of rows of pixel cells included in the pixel circuit. For example, when n is equal to 1, the n-1th scan line is the starting scan line.
  • the sub-pixel driving circuit includes a driving compensation module, a data writing module, and a driving transistor.
  • the driving transistor the first pole is connected to the first end of the light emitting element, and the second pole is connected to the first pole a level; the second end of the light emitting element is coupled to the signal line.
  • the driving compensation module is respectively connected to the n-1th scan line, the gate of the driving transistor, the first electrode of the driving transistor, and the second electrode of the driving transistor, and is also connected to the second level for In the first phase of a time period, when the scan signal outputted by the n-1th scan line is valid, the gate-source voltage of the drive transistor is controlled to compensate the threshold voltage of the drive transistor.
  • the data writing module is respectively connected to the nth scan line, a data line and the driving compensation module, and is configured to control when the scan signal output by the nth scan line is valid in the second phase of the time period
  • the data voltage on the data line is written to the gate of the drive transistor through the drive compensation module.
  • Each of the rows drives the illumination control module to respectively receive an illumination control signal and a second level, and are respectively connected to the second end of the illumination element through a signal line for use in the third period of the time period At the stage, the potential of the signal line is controlled to be the second level when the illumination control signal is active.
  • the driving compensation module is further configured to control to maintain the driving transistor when the scan signal output by the n-1th scan line and the scan signal output by the nth scan line are both invalid during the third phase of the time period The potential of the gate, thereby controlling the driving transistor DTFT to drive the OLED to emit light and compensating for the threshold of the driving transistor DTFT.
  • the pixel circuit described in the embodiment of the present disclosure includes L rows of pixel units, and each row of pixel units includes M sub-pixel units.
  • the M sub-pixel units included in the pixel unit of the nth row are all connected to the nth scan line and the n-1th scan line (not shown in FIG. 2).
  • the kth sub-pixel unit included in each row of pixel units is connected to the kth data line.
  • L and M are integers greater than 1, n is a positive integer less than or equal to L, and k is a positive integer less than or equal to M.
  • Data_1 is the first data line
  • Data_k-1 is the k-1th data line
  • Data_k is the kth data line
  • Data_k+1 is the k+1th data line
  • Data_M is the Mth data line.
  • VL_1 is a signal line connected to a plurality of sub-pixel units included in a pixel unit of a first row
  • VL_n-1 is a signal line connected to a plurality of sub-pixel units included in a pixel unit of the n-1th row
  • VL_n is a signal line connected to the plurality of sub-pixel units included in the pixel unit of the nth row
  • VL_n+1 is a signal line connected to the plurality of sub-pixel units included in the pixel unit of the n+1th row
  • VL_L is included in the pixel unit of the Lth row Signal lines connected by sub-pixel units.
  • the row of the common unit includes a row driving the illumination control module and the nth row of pixel units
  • the connection of a sub-pixel unit included is as follows:
  • the sub-pixel unit includes a sub-pixel driving circuit and an organic light emitting diode OLED.
  • the sub-pixel driving circuit includes a driving transistor DTFT, a driving compensation module 31, and a data writing module 32.
  • the data line Data outputs a data voltage Vdata.
  • the driving transistor DTFT has a first pole connected to an anode of the OLED and a second pole connected to a high level VDD.
  • the cathode of the OLED is connected to the signal line VL.
  • the driving compensation module 31 is respectively connected to the n-1th scan line Scan_n-1, the gate of the driving transistor DTFT, the first pole of the driving transistor DTFT, and the second pole of the driving transistor DTFT, and is also connected to the low
  • the level VSS is used in the first stage of a time period.
  • the gate-source voltage of the drive transistor DTFT is controlled to compensate the threshold voltage of the drive transistor DTFT. Vth.
  • the data writing module 32 is respectively connected to the nth scan line Scan_n, a data line Data, and the driving compensation module 31 for scanning the output of the nth scan line Scan_n in the second phase of the time period.
  • the data voltage Vdata on the control data line Data is written to the gate of the driving transistor DTFT through the driving compensation module 31.
  • the row driving illumination control module 33 is respectively connected to an emission control signal EM_n and a low level VSS, and is respectively connected to a cathode of the OLED through a signal line VL for use in the third stage of the time period.
  • the potential of the signal line VL is controlled to be a low level VSS.
  • the driving compensation module 31 is further configured to control, when the scan signal output by the nth scan line Scan_n and the scan signal output by the n-1th scan line Scan_n-1 are invalid, in the third stage of the time period The potential of the gate of the driving transistor DTFT is maintained, thereby controlling the driving transistor DTFT to drive the OLED to emit light and compensating for the threshold of the driving transistor DTFT.
  • the DTFT is an n-type TFT.
  • the disclosure is not limited thereto.
  • the low level VSS may be a ground level GND.
  • the driving compensation module may include a first compensation transistor T1 and a second compensation transistor T2 The first capacitor C1 and the second capacitor C2.
  • the first compensation transistor T1 has a gate connected to the n-1th scan line Scan_n-1, a first pole connected to the first terminal A of the first capacitor C1, and a second pole connected to the high level VDD.
  • the driving transistor DTFT has a gate connected to the first end A of the first capacitor C1, a first pole connected to the anode of the OLED, and a second pole connected to the high level VDD.
  • the cathode of the OLED is connected to the signal line VL.
  • the second compensation transistor T2 has a gate connected to the n-1th scan line Scan_n-1, a first pole connected to the second end B of the first capacitor C1, and a second pole connected to the first terminal of the drive transistor DTFT Extremely connected.
  • the second capacitor C2 has a first end connected to the second end B of the first capacitor C1 and a second end connected to the ground level GND.
  • the data writing module may include: a data writing transistor T3, a gate connected to the nth scan line Scan_n, a first pole connected to the data line Data, and a second pole and a second end of the first capacitor C1 B connection.
  • Each of the row driving illumination control modules may include: a row driving illumination control transistor T4, the gate being connected to an illumination control signal EM_n, the first pole being connected to the ground level GND, and the second pole being connected to the signal line VL.
  • T1, T2, T3, and T4 are all n-type TFTs. Of course, the disclosure is not limited thereto.
  • All the TFTs in the pixel circuit described in this embodiment of the present disclosure are n-type TFTs, and a unified process flow helps to improve product yield.
  • the sub-pixel unit including DTFT, T1, T2, T3, C1, C2, and OLED is disposed in the effective display area, and the row driving illumination control module including T4 is disposed outside the effective display area. And a plurality of sub-pixel units of the same row of pixel units are connected to the row driving illumination control module to have a threshold compensation function.
  • the purpose of reducing the TFT in the effective display area can be achieved by using a row sharing unit including a plurality of row driving illumination control modules, and the pixel size can be reduced.
  • FIG. 5 The operation sequence of the embodiment shown in FIG. 4 is shown in FIG. 5, and is divided into three stages:
  • Scan_n-1 In the first phase of a time period (threshold voltage compensation phase), Scan_n-1 outputs a high level, Scan_n outputs a low level, EM_n outputs a low level, the shared line driving light-emitting control tube T4 is turned off, and the VL inside the pixel is suspended. , OLED has no conduction path. Scan_n-1 is high level, both T1 and T2 are turned on, and the equivalent circuit of the sub-pixel driving circuit is as shown in FIG. 6A.
  • the DTFT enters a saturation state for one diode, and VDD charges C2 through the DTFT until the gate-source voltage Vgs of the DTFT (ie, the potential VA of the first terminal A of C1 and the potential VB of the second terminal B of C1)
  • the difference VC1) is the threshold voltage Vth of the DTFT.
  • the potential VA of the first terminal A of C1 is VDD
  • the potential VB of the second terminal B of C1 is VDD-Vth, thereby controlling the gate-source voltage of the DTFT to compensate the threshold voltage Vth of the DTFT.
  • Scan_n-1 outputs a low level
  • Scan_n outputs a high level
  • EM_n outputs a low level
  • T4 is turned off
  • the signal line VL is left floating
  • Scan_n outputs a high level
  • T3 is turned on, and the equivalent circuit of the sub-pixel driving circuit is as shown in FIG. 6B.
  • Scan_n-1 outputs a low level
  • Scan_n outputs a low level
  • EM_n outputs a high level
  • T4 is turned on
  • signal line VL is grounded through T4 to form a guide from DTFT and OLED.
  • the pass path, the equivalent circuit of the sub-pixel drive circuit is as shown in FIG. 6C.
  • T1, T2 and T3 are off, and neither C1 nor C2 has a path for charging or discharging, so the voltage across C1 and the voltage across C2 are unchanged.
  • VC2 Vdata
  • VC1 Vth
  • VB Vdata
  • VA Vdata+Vth.
  • FIG. 7 is a circuit diagram of a pixel circuit to which the sub-pixel unit shown in FIG. 4 and the row driving light emission control module constituting the row sharing unit are applied. As can be seen from FIG. 7, each row of pixel units shares the row driving illumination control module on the left side, and the L row driving illumination control modules constitute a row sharing unit.
  • the light emission control signal of the row driving light emission control module of the first row of pixel units is EM_1, and the first row of pixel cells are connected with the initial scan line Scan_Start and the first scan line Scan_1.
  • the illumination control signal of the row driving illumination control module of the pixel unit of the n-1th row is EM_n-1, and
  • the n-1th row pixel unit is connected to the n-2th scan line Scan_n-2 and the n-1th scan line Scan_n-1.
  • the light emission control signal of the row driving illumination control module of the pixel unit of the nth row is EM_n, and the n-1th scan line Scan_n-1 and the nth scan line Scan_n are connected to the pixel unit of the nth row.
  • the light emission control signal of the row driving light emission control module of the pixel unit of the Lth row is EM_L, and the L-1 scan line Scan_L-1 and the Lth scan line Scan_L are connected to the pixel unit of the nth row.
  • Data1 is the first data line
  • Data_k-1 is the k-1th data line
  • Data_k is the kth data line
  • Data_k+1 is the k+1th data line
  • Data_M is the Mth data line.
  • L and M are integers greater than 1, n is a positive integer less than or equal to L, and k is a positive integer less than or equal to M.
  • the present disclosure also provides a driving method of a pixel circuit, which is applied to the above pixel circuit, and the driving method of the pixel circuit includes:
  • a compensation step in a threshold voltage compensation phase of a time period, the scan signal outputted by the scan line of the previous row is valid, and the drive compensation module controls the gate-source voltage of the drive transistor to compensate the threshold voltage of the drive transistor;
  • a data writing step in the data voltage compensation phase of the time period, the scan signal outputted by the scan line of the current line is valid, and the data voltage of the data write module control data line is written into the gate of the drive transistor through the drive compensation module;
  • the illuminating control signal is valid, and the scanning signal outputted by the scanning line of the previous row and the scanning signal output by the scanning line of the current line are invalid, and the row driving illuminating control module controls the potential of the signal line to be the first
  • the drive compensation module controls the potential of the gate of the drive transistor to be maintained, thereby controlling the drive transistor to drive the light emitting element to emit light and control the threshold for compensating the drive transistor.
  • the display device described in the embodiments of the present disclosure includes the pixel circuit described above.
  • the display device may include a liquid crystal display device such as a liquid crystal panel, a liquid crystal television, a mobile phone, or a liquid crystal display.
  • the display device may also include an organic light emitting display or other type of display device such as an electronic reader or the like.

Abstract

一种像素电路包括多行像素单元，每一行像素单元包括多个子像素单元。每一行像素单元还包括行共用单元，该行共用单元包括多个行驱动发光控制模块。每一行像素单元包括的多个子像素单元均与一信号线（VL_1，VL_n-1，VL_n，VL_L）连接。该多个行驱动发光控制模块中的每一个与一该多行像素单元中对应的一行像素单元所包括的每一子像素单元均通过该信号线（VL_1，VL_n-1，VL_n，VL_L）连接，以具有阈值补偿功能。

Description

像素电路、像素电路的驱动方法和显示装置
相关申请的交叉参考
本申请主张在2014年7月21日在中国提交的中国专利申请号No.201410347870.6的优先权，其全部内容通过引用包含于此。
技术领域
本公开文本涉及显示技术领域，尤其涉及像素电路、像素电路的驱动方法和显示装置。
背景技术
如图1A所示，现有技术中的基本的有源矩阵有机发光二极管(Active Matrix/Organic Light Emitting Diode，AMOLED)的像素驱动电路采用2T1C像素驱动电路，该2T1C像素驱动电路包括控制晶体管T、驱动晶体管DTFT和电容C，用于驱动有机发光二极管OLED。该控制晶体管T的栅极接入控制信号SW，该控制晶体管还与数据线DATA连接，OLED的阳极接入高电平VDD，驱动晶体管DTFT接入低电平。因此，现有技术中的2T1C像素驱动电路结构简单。
但是基于低温多晶硅技术(Low Temperature Poly-silicon，LTPS)的AMOLED像素驱动电路，由于LTPS存在阈值电压均一性差等问题，所以在AMOLED的像素设计中需要增加驱动薄膜场效应晶体管(Thin Film Transistor，TFT)阈值电压补偿的电路。
如图1B所示，具有阈值电压补偿的AMOLED像素驱动电路的常见设计需要5T2C像素驱动电路，或者需要更多的TFT和/电容。如图1B所示，该5T2C像素驱动电路包括第一控制晶体管T1、第二控制晶体管T2、第三控制晶体管T3、第四控制晶体管T4、第一电容C1、第二电容C2和驱动晶体管DTFT，用于驱动有机发光二极管OLED。T1的栅极、T2的栅极和T4的栅极接入控制信号CR1。T3的栅极与扫描线SCAN连接，T3还接入数据电压Vdata。C1的第一端标示为A，C1的第二端标示为B。DTFT接入高电平VDD。 OLED的阴极接入低电平VSS。随着TFT和/或电容数量的增加，将占用较大的布局空间，不利于AMOLED像素尺寸的缩小，即限制了高每英寸所拥有的像素数目(Pixel Per Inch，PPI)的AMOLED像素驱动电路的发展。
发明内容
(一)要解决的技术问题
本公开文本的主要目的在于提供一种像素电路、像素电路的驱动方法和显示装置，增加像素的开口率，从而在获得均匀显示的同时，降低有机发光层的电流密度。
(二)技术方案
本公开文本提供了一种像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元；每一行像素单元还包括行共用单元，该行共用单元包括多个行驱动发光控制模块。每一行像素单元包括的多个子像素单元均与一信号线连接。所述多个行驱动发光控制模块中的每一个行驱动发光控制模块与所述多行像素单元中对应的一行像素单元所包括的每一子像素单元均通过该信号线连接，以具有阈值补偿功能。
实施时，所述子像素单元设置于有效显示区内，所述行共用单元设置于有效显示区外。
实施时，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件；其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数；当n等于1时，第n-1扫描线为起始扫描线。
该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管。
该驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第一电平；所述发光元件的第二端与该信号线连接。
所述驱动补偿模块，分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，还接入第二电平，用于在一时间周期的第一阶段，当该第n-1扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压。
所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块 连接，用于在该时间周期的第二阶段，当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极。
每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于在该时间周期的第三阶段，当该发光控制信号有效时控制该信号线的电位为该第二电平。
所述驱动补偿模块，还用于在该时间周期的第三阶段，当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时，控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
实施时，所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管、第一电容和第二电容。
所述第一补偿晶体管，栅极与第n-1扫描线连接，第一极与所述第一电容的第一端连接，第二极接入第一电平。
所述驱动晶体管，栅极与所述第一电容的第一端连接，第一极与发光元件的第一端连接，第二极接入所述第一电平；所述发光元件的第二端与所述信号线连接。
所述第二补偿晶体管，栅极与第n-1扫描线连接，第一极与所述第一电容的第二端连接，第二极与所述驱动晶体管的第一极连接。
所述第二电容，第一端与所述第一电容的第二端连接，第二端接入第二电平。
实施时，所述数据写入模块包括：数据写入晶体管，栅极接入第n扫描线，第一极与所述数据线连接，第二极与所述第一电容的第二端连接。
实施时，每一所述行驱动发光控制模块包括：行驱动发光控制晶体管，栅极接入一发光控制信号，第一极接入所述第二电平，第二极与所述信号线连接。
实施时，所述驱动晶体管、所述第一补偿晶体管、所述第二补偿晶体管、所述数据写入晶体管和所述行驱动发光控制晶体管都为n型TFT。
本公开文本还提供了一种像素电路的驱动方法，应用于上述的像素电路， 所述像素电路的驱动方法包括：
补偿步骤，在一时间周期的阈值电压补偿阶段，上一行扫描线输出的扫描信号有效，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压；
数据写入步骤，在该时间周期的数据电压补偿阶段，本行扫描线输出的扫描信号有效，数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
发光步骤，在该时间周期的发光阶段，发光控制信号有效，上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效，行驱动发光控制模块控制该信号线的电位为该第二电平，所述驱动补偿模块控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
本公开文本还提供了一种显示装置，包括上述的像素电路。
(三)有益效果
本公开文本具体实施例所提供的上述技术方案中的至少一个具有以下有益效果：
与现有技术相比，本公开文本所述的像素电路采用行共用单元，以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少，使得像素的开口率增加，从而在均匀显示的同时，降低了有机发光层的电流密度，延长了AMOLED面板的使用寿命。
附图说明
为了更清楚地说明本公开文本实施例或现有技术中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开文本的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1A是现有技术中的2T1C像素驱动电路的电路图；
图1B是现有技术中的5T2C像素驱动电路的电路图；
图2是本公开文本实施例所述的像素电路的结构图；
图3是本公开文本实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的结构框图；
图4是本公开文本实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的电路图；
图5是包括如图4所示的相互连接的子像素单元和行驱动发光控制模块的工作时序图；
图6A、图6B、图6C分别是如图4所示的电路在第一阶段、第二阶段、第三阶段的等效电路图；以及
图7是本公开文本实施例所述的像素电路的电路图。
具体实施方式
下面结合附图和实施例，对本公开文本的具体实施方式做进一步描述。以下实施例仅用于说明本公开文本，但不用来限制本公开文本的范围。
为使本公开文本实施例的目的、技术方案和优点更加清楚，下面将结合本公开文本实施例的附图，对本公开文本实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开文本的一部分实施例，而不是全部的实施例。基于所描述的本公开文本的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开文本保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开文本所属领域内具有一般技能的人士所理解的通常意义。本公开文本的说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
本公开文本所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本公开文本实施例中，为区分晶体管除栅极之外的两极，其中第一极可以为源极或漏极，第二极可以为漏极或源极。此外， 按照晶体管的特性区分可以将晶体管分为n型晶体管或p型晶体管。在本公开文本实施例提供的驱动电路中，所有晶体管均是以n型晶体管为例进行的说明，可以想到的是在采用p型晶体管实现时是本领域技术人员可在没有做出创造性劳动前提下轻易想到的，因此也是在本公开文本的实施例保护范围内的。
本公开文本实施例所述的像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元。每一行像素单元还包括行共用单元，该行共用单元包括多个行驱动发光控制模块。
每一行像素单元包括的多个子像素单元均与一信号线连接。
所述多个行驱动发光控制模块中的每一个行驱动发光控制模块与所述多行像素单元中对应的一行像素单元所包括的每一子像素单元均通过该信号线连接，以具有阈值补偿功能。
在具体实施时，每一所述子像素单元包括子像素驱动电路和发光元件，该发光元件例如可以是有机发光二极管(OLED)。
本公开文本该实施例所述的像素电路采用行共用单元，以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少，使得像素的开口率增加，从而在均匀显示的同时，降低了有机发光层的电流密度，延长了AMOLED面板的使用寿命。
本公开文本该实施例所述的像素电路既可以补偿阈值电压，改善均匀性和可靠性，又简化像素驱动电路，控制信号少，有利于像素尺寸的缩小。
优选的，所述子像素单元设置于有效显示区内，所述行共用单元设置于有效显示区外。通过将每一行像素单元中的具有共性的电路设置于有效显示区外，以进一步减小有效显示区内的TFT数目，增加开口率。
具体的，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件。其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数。例如，当n等于1时，第n-1扫描线为起始扫描线。
具体的，该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管。
所述驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第 一电平；所述发光元件的第二端与该信号线连接。
所述驱动补偿模块，分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，还接入第二电平，用于在一时间周期的第一阶段，当该第n-1扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压。
所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块连接，用于在该时间周期的第二阶段，当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极。
每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于在该时间周期的第三阶段，当该发光控制信号有效时控制该信号线的电位为该第二电平。
所述驱动补偿模块，还用于在该时间周期的第三阶段，当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时，控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管DTFT驱动OLED发光并补偿该驱动晶体管DTFT的阈值。
具体的，本公开文本实施例所述的像素电路，包括L行像素单元，每一行像素单元包括M个子像素单元。第n行像素单元包括的M个子像素单元都与第n扫描线和第n-1扫描线连接(图2中未示)。每一行像素单元包括的第k子像素单元都与第k数据线连接。L和M为大于1的整数，n为小于或等于L的正整数，k为小于或等于M的正整数。
如图2所示，Data_1是第一数据线，Data_k-1是第k-1数据线，Data_k是第k数据线，Data_k+1是第k+1数据线，Data_M是第M数据线。
在图2中，VL_1是与第一行像素单元包括的多个子像素单元连接的信号线，VL_n-1是与第n-1行像素单元包括的多个子像素单元连接的信号线，VL_n是与第n行像素单元包括的多个子像素单元连接的信号线，VL_n+1是与第n+1行像素单元包括的多个子像素单元连接的信号线，VL_L是与第L行像素单元包括的多个子像素单元连接的信号线。
具体的，以行共用单元包括的一行驱动发光控制模块与第n行像素单元 包括的一子像素单元的连接为例说明如下：
如图3所示，所述子像素单元包括子像素驱动电路和有机发光二极管OLED。该子像素驱动电路包括与驱动晶体管DTFT、驱动补偿模块31和数据写入模块32。
数据线Data输出数据电压Vdata。
所述驱动晶体管DTFT，第一极与OLED的阳极连接，第二极接入高电平VDD。
所述OLED的阴极与信号线VL连接。
所述驱动补偿模块31，分别与第n-1扫描线Scan_n-1、该驱动晶体管DTFT的栅极、该驱动晶体管DTFT的第一极、该驱动晶体管DTFT的第二极连接，还接入低电平VSS，用于在一时间周期的第一阶段，当该第n-1扫描线Scan_n-1输出的扫描信号有效时，控制该驱动晶体管DTFT的栅源电压补偿该驱动晶体管DTFT的阈值电压Vth。
所述数据写入模块32，分别与第n扫描线Scan_n、一数据线Data和所述驱动补偿模块31连接，用于在该时间周期的第二阶段，当该第n扫描线Scan_n输出的扫描信号有效时，控制该数据线Data上的数据电压Vdata通过该驱动补偿模块31写入该驱动晶体管DTFT的栅极。
行驱动发光控制模块33，分别接入一发光控制信号EM_n和低电平VSS，并分别通过一所述信号线VL与一该OLED的阴极连接，用于在该时间周期的第三阶段，当该发光控制信号EM_n有效时控制该信号线VL的电位为低电平VSS。
所述驱动补偿模块31，还用于在该时间周期的第三阶段，当该第n扫描线Scan_n输出的扫描信号和该第n-1扫描线Scan_n-1输出的扫描信号都无效时，控制维持所述驱动晶体管DTFT的栅极的电位，从而控制驱动晶体管DTFT驱动OLED发光并补偿该驱动晶体管DTFT的阈值。
在如图3所示的具体实施例中，DTFT为n型TFT。当然，本公开文本并不以此为限。
具体的，如图4所示，所述低电平VSS可以为地电平GND。
所述驱动补偿模块可以包括第一补偿晶体管T1、第二补偿晶体管T2、 第一电容C1和第二电容C2。
该第一补偿晶体管T1，栅极与第n-1扫描线Scan_n-1连接，第一极与所述第一电容C1的第一端A连接，第二极接入高电平VDD。
所述驱动晶体管DTFT，栅极与所述第一电容C1的第一端A连接，第一极与OLED的阳极连接，第二极接入高电平VDD。
OLED的阴极与信号线VL连接。
该第二补偿晶体管T2，栅极与第n-1扫描线Scan_n-1连接，第一极与所述第一电容C1的第二端B连接，第二极与所述驱动晶体管DTFT的第一极连接。
所述第二电容C2，第一端与所述第一电容C1的第二端B连接，第二端接入地电平GND。
所述数据写入模块可以包括：数据写入晶体管T3，栅极接入第n扫描线Scan_n，第一极与所述数据线Data连接，第二极与所述第一电容C1的第二端B连接。
每一所述行驱动发光控制模块可以包括：行驱动发光控制晶体管T4，栅极接入一发光控制信号EM_n，第一极接入地电平GND，第二极与所述信号线VL连接。
DTFT、T1、T2、T3和T4都为n型TFT。当然，本公开文本并不以此为限。
在本公开文本该实施例所述的像素电路中所有TFT均为n型TFT，统一工艺流程，有助于提高产品良率。
在如图3所示的实施例中，包括DTFT、T1、T2、T3、C1、C2和OLED的子像素单元设置于有效显示区内，包括T4的行驱动发光控制模块设置于有效显示区外，并且同一行像素单元的多个子像素单元都与该行驱动发光控制模块连接，以具有阈值补偿功能。
在具体实施时，并不仅限于以上的实施例，只需采用包括多个行驱动发光控制模块的行共用单元即可达到减少有效显示区内的TFT的目的，可以使得像素尺寸缩小。
如图4所示的实施例的操作时序如图5所示，分成三个阶段：
在一时间周期的第一阶段(阈值电压补偿阶段)，Scan_n-1输出高电平，Scan_n输出低电平，EM_n输出低电平，共用的行驱动发光控制管T4关闭，像素内部的VL悬空，OLED无导通路径。Scan_n-1为高电平，T1和T2都开启，子像素驱动电路的等效电路如图6A所示。此时，DTFT为一个二极管进入饱和状态，VDD通过DTFT对C2进行充电，直到DTFT的栅源电压Vgs(即C1的第一端A的电位VA和C1的第二端B的电位VB之间的差值VC1)为DTFT的阈值电压Vth。C1的第一端A的电位VA＝VDD，C1的第二端B的电位VB＝VDD-Vth，从而控制DTFT的栅源电压补偿DTFT的阈值电压Vth。
在该时间周期的第二阶段(数据电压写入阶段)，Scan_n-1输出低电平，Scan_n输出高电平，EM_n输出低电平，T4关闭，信号线VL悬空。Scan_n输出高电平，T3开启，子像素驱动电路的等效电路如图6B所示。数据电压Vdata写入，VB＝Vdata，C2的第一端的电位和C2的第二端的电位的差值VC2＝VB＝Vdata。由于C1的两端的电压不能突变，所以VA＝VB+VC1＝Vdata+Vth。由于此时VL悬空，所以OLED无导通路径，不发光。
在该时间周期的第三阶段(OLED发光阶段)，Scan_n-1输出低电平，Scan_n输出低电平，EM_n输出高电平，T4开启，信号线VL通过T4接地，从DTFT和OLED形成导通路径，子像素驱动电路的等效电路如图6C所示。T1、T2和T3关闭，C1和C2均没有充电或放电的路径，因此C1两端的电压和C2两端的电压均不变。VC2＝Vdata，VC1＝Vth，VB＝Vdata，因此VA＝Vdata+Vth。C1的第一端A的电位不变，因此流过OLED的电流为I＝K(Vdata-Voled)2，K为与工艺和设计相关的常数，则最后驱动OLED的电流与DTFT的阈值电压无关，仅与Vdata有关。
图7是应用了图4所示的子像素单元和组成行共用单元的行驱动发光控制模块的像素电路的电路图。由图7可知，每一行像素单元共用左侧的行驱动发光控制模块，L个行驱动发光控制模块组成行共用单元。
第一行像素单元的行驱动发光控制模块的发光控制信号为EM_1，与第一行像素单元连接的是初始扫描线Scan_Start和第一扫描线Scan_1。
第n-1行像素单元的行驱动发光控制模块的发光控制信号为EM_n-1，与 第n-1行像素单元连接的是第n-2扫描线Scan_n-2和第n-1扫描线Scan_n-1。
第n行像素单元的行驱动发光控制模块的发光控制信号为EM_n，与第n行像素单元连接的是第n-1扫描线Scan_n-1和第n扫描线Scan_n。
第L行像素单元的行驱动发光控制模块的发光控制信号为EM_L，与第n行像素单元连接的是第L-1扫描线Scan_L-1和第L扫描线Scan_L。
在图7中，Data1是第一数据线，Data_k-1是第k-1数据线，Data_k是第k数据线，Data_k+1是第k+1数据线，Data_M是第M数据线。
L和M为大于1的整数，n为小于或等于L的正整数，k为小于或等于M的正整数。
本公开文本还提供了一种像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：
补偿步骤，在一时间周期的阈值电压补偿阶段，上一行扫描线输出的扫描信号有效，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压；
数据写入步骤，在该时间周期的数据电压补偿阶段，本行扫描线输出的扫描信号有效，数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
发光步骤，在该时间周期的发光阶段，发光控制信号有效，上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效，行驱动发光控制模块控制该信号线的电位为该第二电平，所述驱动补偿模块控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
本公开文本实施例所述的显示装置包括上述的像素电路。所述显示装置可以包括液晶显示装置，例如液晶面板、液晶电视、手机、液晶显示器。除了液晶显示装置外，所述显示装置还可以包括有机发光显示器或者其他类型的显示装置，比如电子阅读器等。
以上所述仅是本公开文本的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开文本原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本公开文本的保护范围。

Claims (13)

  1. 一种像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元；每一行像素单元还包括行共用单元，所述行共用单元包括多个行驱动发光控制模块；
    其中，每一行像素单元包括的多个子像素单元均与一信号线连接；并且
    所述多个行驱动发光控制模块中的每一个行驱动发光控制模块与所述多行像素单元中对应的一行像素单元所包括的每一子像素单元均通过该信号线连接，以具有阈值补偿功能。
  2. 如权利要求1所述的像素电路，其中，所述子像素单元设置于有效显示区内。
  3. 如权利要求1或2所述的像素电路，其中，所述行共用单元设置于有效显示区外。
  4. 如权利要求1至3中任一项所述的像素电路，其中，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件；其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数；当n等于1时，第n-1扫描线为起始扫描线。
  5. 如权利要求4所述的像素电路，其中，
    该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管；
    所述驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第一电平；所述发光元件的第二端与该信号线连接；
    所述驱动补偿模块，分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，还接入第二电平，用于在一时间周期的第一阶段，当该第n-1扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压；
    所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块连接，用于在该时间周期的第二阶段，当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
    每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于在该时间周期的第三阶段，当该发光控制信号有效时控制该信号线的电位为该第二电平；
    所述驱动补偿模块，还用于在该时间周期的第三阶段，当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时，控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
  6. 如权利要求5所述的像素电路，其中，所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管、第一电容和第二电容；
    所述第一补偿晶体管，栅极与第n-1扫描线连接，第一极与所述第一电容的第一端连接，第二极接入第一电平；
    所述驱动晶体管，栅极与所述第一电容的第一端连接，第一极与发光元件的第一端连接，第二极接入所述第一电平；所述发光元件的第二端与所述信号线连接；
    所述第二补偿晶体管，栅极与第n-1扫描线连接，第一极与所述第一电容的第二端连接，第二极与所述驱动晶体管的第一极连接；
    所述第二电容，第一端与所述第一电容的第二端连接，第二端接入第二电平。
  7. 如权利要求5或6所述的像素电路，其中，所述数据写入模块包括：数据写入晶体管，栅极接入第n扫描线，第一极与所述数据线连接，第二极与所述第一电容的第二端连接。
  8. 如权利要求5至7中任一项所述的像素电路，其中，每一所述行驱动发光控制模块包括：行驱动发光控制晶体管，栅极接入一发光控制信号，第一极接入所述第二电平，第二极与所述信号线连接。
  9. 如权利要求6至8中任一项所述的像素电路，其中，所述驱动晶体管、所述第一补偿晶体管、所述第二补偿晶体管都是n型TFT。
  10. 如权利要求7所述的像素电路，其中，所述数据写入晶体管是n型TFT。
  11. 如权利要求8所述的像素电路，其中，所述行驱动发光控制晶体管 是n型TFT。
  12. 一种显示装置，包括如权利要求1至11中任一项所述的像素电路。
  13. 一种像素电路的驱动方法，应用于如权利要求5至11中任一项所述的像素电路，其中，所述像素电路的驱动方法包括：
    补偿步骤，在一时间周期的阈值电压补偿阶段，上一行扫描线输出的扫描信号有效，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压；
    数据写入步骤，在该时间周期的数据电压补偿阶段，本行扫描线输出的扫描信号有效，数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
    发光步骤，在该时间周期的发光阶段，发光控制信号有效，上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效，行驱动发光控制模块控制该信号线的电位为该第二电平，所述驱动补偿模块控制维持该驱动晶体管的栅极的电位，从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
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