CN104157239A - 像素电路、像素电路的驱动方法和显示装置 - Google Patents

像素电路、像素电路的驱动方法和显示装置 Download PDF

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CN104157239A
CN104157239A CN201410347870.6A CN201410347870A CN104157239A CN 104157239 A CN104157239 A CN 104157239A CN 201410347870 A CN201410347870 A CN 201410347870A CN 104157239 A CN104157239 A CN 104157239A
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driving
driving transistors
utmost point
pixel
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吴博
祁小敬
谭文
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to CN201410347870.6A priority Critical patent/CN104157239A/zh
Priority to PCT/CN2014/088897 priority patent/WO2016011714A1/zh
Priority to US14/770,690 priority patent/US9773451B2/en
Publication of CN104157239A publication Critical patent/CN104157239A/zh
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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Abstract

本发明提供一种像素电路、像素电路的驱动方法和显示装置。所述像素电路包括多行像素单元,每一行像素单元包括多个子像素单元;每一行像素单元还包括行共用单元,该行共用单元包括多个行驱动发光控制模块;每一行像素单元包括的多个子像素单元均与一信号线连接;一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接,以具有阈值补偿功能。本发明可以增加像素的开口率,从而在获得均匀显示的同时,降低有机发光层的电流密度。

Description

像素电路、像素电路的驱动方法和显示装置
技术领域
本发明涉及显示技术领域,尤其涉及像素电路、像素电路的驱动方法和显示装置。
背景技术
如图1A所示,现有的基本的AMOLED(Active Matrix/Organic LightEmitting Diode,有源矩阵有机发光二极管)像素驱动电路为2T1C像素驱动电路,该2T1C像素驱动电路包括控制晶体管T、驱动晶体管DTFT和电容C,用于驱动有机发光二极管OLED,该控制晶体管T的栅极接入控制信号SW,该控制晶体管还与数据线DATA连接,OLED的阳极接入高电平VDD,驱动晶体管接入低电平,现有的2T1C像素驱动电路结构简单。
但是基于LTPS(Low Temperature Poly-silicon,低温多晶硅技术)的AMOLED像素驱动电路,由于LTPS存在阈值电压均一性差等问题,所以在AMOLED的像素设计中需要增加驱动TFT(Thin Film Transistor,薄膜场效应晶体管)阈值电压补偿的电路。
如图1B所示,具有阈值电压补偿的AMOLED像素驱动电路的常见设计需要5T2C像素驱动电路,或者需要更多的TFT和/电容。如图1B所示,该5T2C像素驱动电路包括第一控制晶体管T1、第二控制晶体管T2、第三控制晶体管T3、第四控制晶体管T4、第一电容C1、第二电容C2和驱动晶体管DTFT,用于驱动有机发光二极管OLED;T1的栅极、T2的栅极和T4的栅极接入控制信号CR1,T3的栅极与扫描线SCAN连接,T3还接入数据电压Vdata,C1的第一端标示为A,C1的第二端标示为B,DTFT接入高电平VDD,OLED的阴极接入低电平VSS。TFT和/或电容数量的增加,将占用较大的布局空间,不利于AMOLED像素尺寸的缩小,即限制了高PPI(Pixel Per Inch,每英寸所拥有的像素数目)的AMOLED像素驱动电路的发展。
发明内容
本发明的主要目的在于提供一种像素电路、像素电路的驱动方法和显示装置,增加像素的开口率,从而在获得均匀显示的同时,降低有机发光层的电流密度。
本发明提供了一种像素电路,包括多行像素单元,每一行像素单元包括多个子像素单元;每一行像素单元还包括行共用单元,该行共用单元包括多个行驱动发光控制模块;
每一行像素单元包括的多个子像素单元均与一信号线连接;
一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接,以具有阈值补偿功能。
实施时,所述子像素单元设置于有效显示区内,所述行共用单元设置于有效显示区外。
实施时,第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件;其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数;当n等于1时,第n-1扫描线为起始扫描线;
该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管;
该驱动晶体管,第一极与所述发光元件的第一端连接,第二极接入第一电平;所述发光元件的第二端与该信号线连接;
所述驱动补偿模块,分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接,还接入第二电平,用于在一时间周期的第一阶段,当该第n-1扫描线输出的扫描信号有效时,控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
所述数据写入模块,分别与第n扫描线、一数据线和所述驱动补偿模块连接,用于在该时间周期的第二阶段,当该第n扫描线输出的扫描信号有效时,控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
每一所述行驱动发光控制模块,分别接入一发光控制信号和第二电平,并分别通过一所述信号线与该发光元件的第二端连接,用于在该时间周期的第三阶段,当该发光控制信号有效时控制该信号线的电位为该第二电平;
所述驱动补偿模块,还用于在该时间周期的第三阶段,当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时,控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
实施时,所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管、第一电容和第二电容;
该第一补偿晶体管,栅极与第n-1扫描线连接,第一极与所述第一电容的第一端连接,第二极接入第一电平;
所述驱动晶体管,栅极与所述第一电容的第一端连接,第一极与发光元件的第一端连接,第二极接入所述第一电平;所述发光元件的第二端与所述信号线连接;
该第二补偿晶体管,栅极与第n-1扫描线连接,第一极与所述第一电容的第二端连接,第二极与所述驱动晶体管的第一极连接;
所述第二电容,第一端与所述第一电容的第二端连接,第二端接入第二电平。
实施时,所述数据写入模块包括:数据写入晶体管,栅极接入第n扫描线,第一极与所述数据线连接,第二极与所述第一电容的第二端连接。
实施时,每一所述行驱动发光控制模块包括:行驱动发光控制晶体管,栅极接入一发光控制信号,第一极接入所述第二电平,第二极与所述信号线连接。
实施时,所述驱动晶体管、所述第一补偿晶体管、所述第二补偿晶体管、所述数据写入晶体管和所述行驱动发光控制晶体管都为n型TFT。
本发明还提供了一种像素电路的驱动方法,应用于上述的像素电路,所述像素电路的驱动方法包括:
补偿步骤:在一时间周期的阈值电压补偿阶段,上一行扫描线输出的扫描信号有效,驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
数据写入步骤:在该时间周期的数据电压补偿阶段,本行扫描线输出的扫描信号有效,数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
发光步骤:在该时间周期的发光阶段,发光控制信号有效,上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效,行驱动发光控制模块控制该信号线的电位为该第二电平,所述驱动补偿模块控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
本发明还提供了一种显示装置,包括上述的像素电路。
与现有技术相比,本发明所述的像素电路采用行共用单元,以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少,使得像素的开口率增加,从而在均匀显示的同时,降低了有机发光层的电流密度,延长了AMOLED面板的使用寿命。
附图说明
图1A是现有的2T1C像素驱动电路的电路图;
图1B是现有的5T2C像素驱动电路的电路图;
图2是本发明实施例所述的像素电路的结构图;
图3是本发明实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的结构框图;
图4是本发明实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的电路图;
图5是包括如图4所示的相互连接的子像素单元和行驱动发光控制模块的工作时序图;
图6A、图6B、图6C分别是如图4所示的电路在第一阶段、第二阶段、第三阶段的等效电路图;
图7是本发明实施例所述的像素电路的电路图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本发明实施例中,为区分晶体管除栅极之外的两极,其中第一极可以为源极或漏极,第二极可以为漏极或源极。此外,按照晶体管的特性区分可以将晶体管分为n型晶体管或p型晶体管。在本发明实施例提供的驱动电路中,所有晶体管均是以n型晶体管为例进行的说明,可以想到的是在采用p型晶体管实现时是本领域技术人员可在没有做出创造性劳动前提下轻易想到的,因此也是在本发明的实施例保护范围内的。
本发明实施例所述的像素电路,包括多行像素单元,每一行像素单元包括多个子像素单元;每一行像素单元还包括行共用单元,该行共用单元包括多个行驱动发光控制模块;
每一行像素单元包括的多个子像素单元均与一信号线连接;
一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接,以具有阈值补偿功能。
在具体实施时,每一所述子像素单元包括子像素驱动电路和发光元件,该发光元件例如可以为OLED(有机发光二极管)。
本发明该实施例所述的像素电路采用行共用单元,以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少,使得像素的开口率增加,从而在均匀显示的同时,降低了有机发光层的电流密度,延长了AMOLED面板的使用寿命。
本发明该实施例所述的像素电路既可以补偿阈值电压,改善均匀性和可靠性,又简化像素驱动电路,控制信号少,有利于像素尺寸的缩小。
优选的,所述子像素单元设置于有效显示区内,所述行共用单元设置于有效显示区外,将每一行像素单元中的具有共性的电路设置于有效显示区外,以进一步减小有效显示区内的TFT数目,增加开口率。
具体的,第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件;其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数;当n等于1时,第n-1扫描线为起始扫描线;
具体的,该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管;
该驱动晶体管,第一极与所述发光元件的第一端连接,第二极接入第一电平;所述发光元件的第二端与该信号线连接;
所述驱动补偿模块,分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接,还接入第二电平,用于在一时间周期的第一阶段,当该第n-1扫描线输出的扫描信号有效时,控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
所述数据写入模块,分别与第n扫描线、一数据线和所述驱动补偿模块连接,用于在该时间周期的第二阶段,当该第n扫描线输出的扫描信号有效时,控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
每一所述行驱动发光控制模块,分别接入一发光控制信号和第二电平,并分别通过一所述信号线与该发光元件的第二端连接,用于在该时间周期的第三阶段,当该发光控制信号有效时控制该信号线的电位为该第二电平;
所述驱动补偿模块,还用于在该时间周期的第三阶段,当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时,控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管DTFT驱动OLED发光并补偿该驱动晶体管DTFT的阈值。
具体的,本发明实施例所述的像素电路,包括L行像素单元,每一行像素单元包括M个子像素单元;第n行像素单元包括的M个子像素单元都与第n扫描线和第n-1扫描线连接(图2中未示);每一行像素单元包括的第k子像素单元都与第k数据线连接;L和M为大于1的整数,n为小于或等于L的正整数,k为小于或等于M的正整数;
如图2所示,Data1是第一数据线,Data_k-1是第k-1数据线,Data_k是第k数据线,Data_k+1是第k+1数据线,Data_M是第M数据线;
在图2中,VL_1是与第一行像素单元包括的多个子像素单元连接的信号线;VL_n-1是与第n-1行像素单元包括的多个子像素单元连接的信号线,VL_n是与第n行像素单元包括的多个子像素单元连接的信号线,VL_n+1是与第n+1行像素单元包括的多个子像素单元连接的信号线,VL_L是与第L行像素单元包括的多个子像素单元连接的信号线。
具体的,以行共用单元包括的一行驱动发光控制模块与第n行像素单元包括的一子像素单元的连接为例说明如下:
如图3所示,所述子像素单元包括子像素驱动电路和有机发光二极管OLED,该子像素驱动电路包括与驱动晶体管DTFT、驱动补偿模块31和数据写入模块32;
数据线Data输出数据电压Vdata;
所述驱动晶体管DTFT,第一极与OLED的阳极连接,第二极接入高电平VDD;
所述OLED的阴极与信号线VL连接;
所述驱动补偿模块31,分别与第n-1扫描线Scan_n-1、该驱动晶体管DTFT的栅极、该驱动晶体管DTFT的第一极、该驱动晶体管DTFT的第二极连接,还接入低电平VSS,用于在一时间周期的第一阶段,当该第n-1扫描线Scan_n-1输出的扫描信号有效时,控制该驱动晶体管DTFT的栅源电压补偿该驱动晶体管DTFT的阈值电压Vth;
所述数据写入模块32,分别与第n扫描线Scan_n、一数据线Data和所述驱动补偿模块31连接,用于在该时间周期的第二阶段,当该第n扫描线Scan_n输出的扫描信号有效时,控制该数据线Data上的数据电压Vdata通过该驱动补偿模块31写入该驱动晶体管DTFT的栅极;
行驱动发光控制模块33,分别接入一发光控制信号EM_n和低电平VSS,并分别通过一所述信号线VL与一该OLED的阴极连接,用于在该时间周期的第三阶段,当该发光控制信号EM_n有效时控制该信号线VL的电位为低电平VSS;
所述驱动补偿模块31,还用于在该时间周期的第三阶段当该第n扫描线Scan_n输出的扫描信号和该第n-1扫描线Scan_n-1输出的扫描信号都无效时,控制维持所述驱动晶体管DTFT的栅极的电位,从而控制驱动晶体管DTFT驱动OLED发光并补偿该驱动晶体管DTFT的阈值;
在如图3所示的具体实施例中,DTFT为n型TFT。
具体的,如图4所示,所述低电平VSS可以为地电平GND;
所述驱动补偿模块可以包括第一补偿晶体管T1、第二补偿晶体管T2、第一电容C1和第二电容C2;
该第一补偿晶体管T1,栅极与第n-1扫描线Scan_n-1连接,第一极与所述第一电容C1的第一端A连接,第二极接入高电平VDD;
所述驱动晶体管DTFT,栅极与所述第一电容C1的第一端A连接,第一极与OLED的阳极连接,第二极接入高电平VDD;
OLED的阴极与信号线VL连接;
该第二补偿晶体管T2,栅极与第n-1扫描线Scan_n-1连接,第一极与所述第一电容C1的第二端B连接,第二极与所述驱动晶体管DTFT的第一极连接;
所述第二电容C2,第一端与所述第一电容C1的第二端B连接,第二端接入地电平GND;
所述数据写入模块可以包括:数据写入晶体管T3,栅极接入第n扫描线Scan_n,第一极与所述数据线Data连接,第二极与所述第一电容C1的第二端B连接;
每一所述行驱动发光控制模块可以包括:行驱动发光控制晶体管T4,栅极接入一发光控制信号EM_n,第一极接入地电平GND,第二极与所述信号线VL连接;
DTFT、T1、T2、T3和T4都为n型TFT。
在本发明该实施例所述的像素电路中所有TFT均为n型TFT,统一工艺流程,有助于提高产品良率。
在如图3所示的实施例中,包括DTFT、T1、T2、T3、C1、C2和OLED的子像素单元设置于有效显示区内,包括T4的行驱动发光控制模块设置于有效显示区外,并且同一行像素单元的多个子像素单元都与该行驱动发光控制模块连接,以具有阈值补偿功能。
在具体实施时,并不仅限于以上的实施例,只需采用包括多个行驱动发光控制模块的行共用单元即可达到减少有效显示区内的TFT的目的,可以使得像素尺寸缩小。
如图4所示的实施例的操作时序如图5所示,分成三个阶段:
在一时间周期的第一阶段(阈值电压补偿阶段):Scan_n-1输出高电平,Scan_n输出低电平,EM_n输出低电平,共用的行驱动发光控制管T4关闭,像素内部的VL悬空,OLED无导通路径;Scan_n-1为高电平,T1和T2都开启,子像素驱动电路的等效电路如图6A所示;此时,DTFT为一个二极管进入饱和状态,VDD通过DTFT对C2进行充电,直到DTFT的栅源电压Vgs(即C1的第一端A的电位VA和C1的第二端B的电位VB之间的差值VC1)为DTFT的阈值电压Vth;C1的第一端A的电位VA=VDD,C1的第二端B的电位VB=VDD-Vth,从而控制DTFT的栅源电压补偿DTFT的阈值电压Vth;
在该时间周期的第二阶段(数据电压写入阶段):Scan_n-1输出低电平,Scan_n输出高电平,EM_n输出低电平,T4关闭,信号线VL悬空;Scan_n输出高电平,T3开启,子像素驱动电路的等效电路如图6B所示;数据电压Vdata写入,VB=Vdata,C2的第一端的电位和C2的第二端的电位的差值VC2=VB=Vdata,由于C1的两端的电压不能突变,所以VA=VB+VC1=Vdata+Vth;由于此时VL悬空,所以OLED无导通路径,不发光;
在该时间周期的第三阶段(OLED发光阶段):Scan_n-1输出低电平,Scan_n输出低电平,EM_n输出高电平,T4开启,信号线VL通过T4接地,从DTFT和OLED形成导通路径,子像素驱动电路的等效电路如图6C所示;T1、T2和T3关闭,C1和C2均没有充电或放电的路径,因此C1两端的电压和C2两端的电压均不变;VC2=Vdata,VC1=Vth,VB=Vdata,因此VA=Vdata+Vth,C1的第一端A的电位不变,因此流过OLED的电流为I=K(Vdata-Voled)2,K为与工艺和设计相关的常数,则最后驱动OLED的电流与DTFT的阈值电压无关,仅与Vdata有关。
图7是应用了图4所示的子像素单元和组成行共用单元的行驱动发光控制模块的像素电路的电路图,由图7可知,每一行像素单元共用左侧的行驱动发光控制模块,L个行驱动发光控制模块组成行共用单元;
第一行像素单元的行驱动发光控制模块的发光控制信号为EM_1,与第一行像素单元连接的是初始扫描线Scan_Start和第一扫描线Scan_1;
第n-1行像素单元的行驱动发光控制模块的发光控制信号为EM_n-1,与第n-1行像素单元连接的是第n-2扫描线Scan_n-2和第n-1扫描线Scan_n-1;
第n行像素单元的行驱动发光控制模块的发光控制信号为EM_n,与第n行像素单元连接的是第n-1扫描线Scan_n-1和第n扫描线Scan_n;
第L行像素单元的行驱动发光控制模块的发光控制信号为EM_L,与第n行像素单元连接的是第L-1扫描线Scan_L-1和第L扫描线Scan_L;
在图7中,Data1是第一数据线,Data_k-1是第k-1数据线,Data_k是第k数据线,Data_k+1是第k+1数据线,Data_M是第M数据线;
L和M为大于1的整数,n为小于或等于L的正整数,k为小于或等于M的正整数。
本发明还提供了一种像素电路的驱动方法,应用于上述的像素电路,所述像素电路的驱动方法包括:
补偿步骤:在一时间周期的阈值电压补偿阶段,上一行扫描线输出的扫描信号有效,驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
数据写入步骤:在该时间周期的数据电压补偿阶段,本行扫描线输出的扫描信号有效,数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
发光步骤:在该时间周期的发光阶段,发光控制信号有效,上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效,行驱动发光控制模块控制该信号线的电位为该第二电平,所述驱动补偿模块控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
本发明实施例所述的显示装置包括上述的像素电路。所述显示装置可以包括液晶显示装置,例如液晶面板、液晶电视、手机、液晶显示器。除了液晶显示装置外,所述显示装置还可以包括有机发光显示器或者其他类型的显示装置,比如电子阅读器等。
以上说明对本发明而言只是说明性的,而非限制性的,本领域普通技术人员理解,在不脱离所附权利要求所限定的精神和范围的情况下,可做出许多修改、变化或等效,但都将落入本发明的保护范围内。

Claims (9)

1.一种像素电路,包括多行像素单元,每一行像素单元包括多个子像素单元;其特征在于,每一行像素单元还包括行共用单元,该行共用单元包括多个行驱动发光控制模块;
每一行像素单元包括的多个子像素单元均与一信号线连接;
一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接,以具有阈值补偿功能。
2.如权利要求1所述的像素电路,其特征在于,所述子像素单元设置于有效显示区内,所述行共用单元设置于有效显示区外。
3.如权利要求1或2所述的像素电路,其特征在于,第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件;其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数;当n等于1时,第n-1扫描线为起始扫描线;
该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管;
该驱动晶体管,第一极与所述发光元件的第一端连接,第二极接入第一电平;所述发光元件的第二端与该信号线连接;
所述驱动补偿模块,分别与第n-1扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接,还接入第二电平,用于在一时间周期的第一阶段,当该第n-1扫描线输出的扫描信号有效时,控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
所述数据写入模块,分别与第n扫描线、一数据线和所述驱动补偿模块连接,用于在该时间周期的第二阶段,当该第n扫描线输出的扫描信号有效时,控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
每一所述行驱动发光控制模块,分别接入一发光控制信号和第二电平,并分别通过一所述信号线与该发光元件的第二端连接,用于在该时间周期的第三阶段,当该发光控制信号有效时控制该信号线的电位为该第二电平;
所述驱动补偿模块,还用于在该时间周期的第三阶段,当该第n-1扫描线输出的扫描信号和该第n扫描线输出的扫描信号均无效时,控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
4.如权利要求3所述的像素电路,其特征在于,所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管、第一电容和第二电容;
该第一补偿晶体管,栅极与第n-1扫描线连接,第一极与所述第一电容的第一端连接,第二极接入第一电平;
所述驱动晶体管,栅极与所述第一电容的第一端连接,第一极与发光元件的第一端连接,第二极接入所述第一电平;所述发光元件的第二端与所述信号线连接;
该第二补偿晶体管,栅极与第n-1扫描线连接,第一极与所述第一电容的第二端连接,第二极与所述驱动晶体管的第一极连接;
所述第二电容,第一端与所述第一电容的第二端连接,第二端接入第二电平。
5.如权利要求4所述的像素电路,其特征在于,所述数据写入模块包括:数据写入晶体管,栅极接入第n扫描线,第一极与所述数据线连接,第二极与所述第一电容的第二端连接。
6.如权利要求5所述的像素电路,其特征在于,每一所述行驱动发光控制模块包括:行驱动发光控制晶体管,栅极接入一发光控制信号,第一极接入所述第二电平,第二极与所述信号线连接。
7.如权利要求6所述的像素电路,其特征在于,所述驱动晶体管、所述第一补偿晶体管、所述第二补偿晶体管、所述数据写入晶体管和所述行驱动发光控制晶体管都为n型TFT。
8.一种像素电路的驱动方法,应用于如权利要求3至7中任一权利要求所述的像素电路,其特征在于,所述像素电路的驱动方法包括:
补偿步骤:在一时间周期的阈值电压补偿阶段,上一行扫描线输出的扫描信号有效,驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压;
数据写入步骤:在该时间周期的数据电压补偿阶段,本行扫描线输出的扫描信号有效,数据写入模块控制数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极;
发光步骤:在该时间周期的发光阶段,发光控制信号有效,上一行扫描线输出的扫描信号和本行扫描线输出的扫描信号均无效,行驱动发光控制模块控制该信号线的电位为该第二电平,所述驱动补偿模块控制维持该驱动晶体管的栅极的电位,从而控制驱动晶体管驱动发光元件发光并控制补偿该驱动晶体管的阈值。
9.一种显示装置,其特征在于,包括如权利要求1至7中任一权利要求所述的像素电路。
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Application publication date: 20141119