WO2018012019A1 - Procédé d'évaluation et de fabrication de tranche de silicium - Google Patents

Procédé d'évaluation et de fabrication de tranche de silicium Download PDF

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WO2018012019A1
WO2018012019A1 PCT/JP2017/006727 JP2017006727W WO2018012019A1 WO 2018012019 A1 WO2018012019 A1 WO 2018012019A1 JP 2017006727 W JP2017006727 W JP 2017006727W WO 2018012019 A1 WO2018012019 A1 WO 2018012019A1
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silicon wafer
thermal donor
single crystal
defect
region
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PCT/JP2017/006727
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English (en)
Japanese (ja)
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和尚 鳥越
小野　敏昭
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株式会社Sumco
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Priority to CN201780043227.6A priority Critical patent/CN109477241B/zh
Priority to DE112017003486.8T priority patent/DE112017003486T5/de
Priority to KR1020187036819A priority patent/KR102180784B1/ko
Publication of WO2018012019A1 publication Critical patent/WO2018012019A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Definitions

  • the present invention relates to a silicon wafer evaluation method and manufacturing method, and more particularly to a crystal defect region evaluation method of a silicon wafer manufactured by the Czochralski method (hereinafter referred to as “CZ method”).
  • CZ method a crystal defect region evaluation method of a silicon wafer manufactured by the Czochralski method
  • the CZ method is a method of growing a single crystal by melting a polycrystalline raw material filled in a quartz crucible with a heater and then immersing a seed crystal in the melt and pulling it upward while rotating it.
  • the FZ method is a method in which a part of a polycrystalline raw material rod is heated and melted at a high frequency to form a melting zone, and a single crystal is grown while moving the melting zone. Since the CZ method makes it easy to form a crystal with a large diameter, a wafer cut from a silicon single crystal manufactured by the CZ method is used as a highly integrated semiconductor element substrate.
  • Silicon wafers manufactured by the CZ method are exposed to thermal oxidation treatment for 1 to 10 hours in an acidic atmosphere of 1000 to 1200 ° C., and appear to have an oxidation-induced stacking fault (hereinafter referred to as OSF (Oxidation-induced Stacking-Fault)) Ring)) may occur.
  • OSF Oxidation-induced Stacking-Fault
  • Ring oxidation-induced stacking fault
  • several types of minute defects hereinafter referred to as “Grown-in defects”.
  • the generation site of the OSF ring in the crystal includes a growth rate (pulling rate) V of the silicon single crystal and a temperature gradient G in the pulling axis direction in the temperature range from the melting point of the grown silicon single crystal to 1300 ° C.
  • the ratio V / G When the V / G is larger than the critical value at which the OSF ring disappears at the center of the crystal, the vacancies agglomerate to form an octahedral void defect of about 0.1 ⁇ m, and a MOS type LSI is manufactured. In this case, the breakdown voltage of the gate oxide film is deteriorated, or an isolation defect in the element isolation region is caused. In addition, when trench capacitor is used, characteristic defects such as punch-through between the capacitor are caused. On the other hand, when V / G is smaller than the critical value, interstitial silicon aggregates to form dislocation clusters, leading to characteristic defects such as PN junction leakage.
  • Patent Document 1 a ratio V / G between a pulling rate V and a temperature gradient G in a crystal is controlled in a single crystal growth so that no grown-in defect or OSF ring occurs (hereinafter referred to as a defect-free region). ) Has been proposed.
  • a method for evaluating a Grown-in defect or an OSF ring for example, a method of detecting a void defect by infrared scattering tomography or an OSF ring that is manifested by etching after the thermal oxidation treatment at 1000 to 1200 ° C. described above with a microscope is used. The observation method is known.
  • Patent Documents 2 and 3 describe a method for analyzing and evaluating crystal defects of a silicon wafer by a so-called copper decoration method.
  • the analysis method described in Patent Document 2 includes a step of forming a thermal oxide film having a predetermined thickness on the surface of a bare wafer, a step of etching a bag side of the bare wafer, and copper at a defective portion of the bare wafer. And a step of analyzing a defect portion of the wafer decorated with copper after the step of performing copper decorating.
  • the distribution and density of defect sites on the copper-decorated wafer are analyzed with the naked eye, and the morphology of the defect sites on the copper-decorated wafer is analyzed by transmission electron microscope (TEM) or scanning electron microscope (SEM). ) To analyze.
  • TEM transmission electron microscope
  • SEM scanning electron microscope
  • Patent Document 3 describes a method of evaluating crystal defects in a silicon single crystal manufactured by the CZ method by a copper decoration method in which a sample contaminated with copper is heat-treated and then rapidly cooled.
  • a copper decoration method is applied to a silicon single crystal having a low oxygen concentration with an interstitial oxygen concentration of 10 ⁇ 10 17 atoms / cm 3 (ASTM'79) or less in the crystal, and a nucleus that becomes OSF or OSF. The area where the is present is detected with high sensitivity.
  • the film thickness of an epitaxial layer or a DZ layer in an epitaxial wafer is measured by measuring the resistivity of the wafer by a thermal donor generated from interstitial oxygen when the silicon wafer is annealed at a low temperature of about 450 ° C.
  • a method for evaluating a wafer structure related to oxygen concentration distribution such as measurement is described.
  • JP-A-8-330316 Japanese Patent Laid-Open No. 10-227729 JP 2001-81000 A JP-A-9-82768
  • the conventional method for evaluating crystal defects of a general silicon wafer requires a plurality of heat treatments and etching processes according to the types of crystal defects, and there is a problem that the evaluation takes time and cost.
  • the silicon wafer crystal defect evaluation method using the copper decoration method can simultaneously evaluate the presence or absence of a grown-in defect region or an OSF ring region, but a heat treatment process of several tens of hours for copper decoration. Is necessary, and there is a problem of lack of simplicity.
  • an object of the present invention is to provide a silicon wafer evaluation method and manufacturing method capable of evaluating the presence and type of a crystal defect region of a silicon wafer by a simple method while saving time and cost.
  • a silicon wafer evaluation method is an evaluation method of a silicon wafer cut out from a silicon single crystal ingot grown by a CZ method, and a thermal donor generation heat treatment is performed on the silicon wafer. It is characterized in that the generation rate of a thermal donor that is sometimes generated is measured, and the presence or absence of a crystal defect region or the type of crystal defect is determined based on the generation rate of the thermal donor.
  • a thermal donor generation rate based on a change in specific resistance caused by heat treatment of a silicon wafer cut from a silicon single crystal ingot grown by the CZ method while controlling V / G is measured.
  • the presence / absence of a crystal defect region and the type of crystal defect can be easily evaluated.
  • the first silicon wafer cut out from the silicon single crystal ingot is subjected to the thermal donor generation heat treatment in a state where the first silicon wafer includes an oxygen cluster.
  • the first thermal donor generation rate which is the generation rate of the thermal donor generated at the measurement point, was obtained, and the donor killer process and the thermal donor generation heat treatment were sequentially performed on the second silicon wafer different from the first silicon wafer.
  • a second thermal donor generation rate that is a generation rate of a thermal donor generated at a second measurement point on the second silicon wafer is sometimes obtained, and a first thermal donor generation relative to the second thermal donor generation rate is obtained.
  • the state in which the silicon wafer includes oxygen clusters refers to a state before the donor killer process is performed on the silicon wafer in the as-grown state.
  • the defect-free region refers to a region that does not include a grown-in defect and does not generate an OSF ring after the evaluation heat treatment.
  • the present invention based on the first and second thermal donor generation rates obtained from the two types of wafers having the difference in the presence or absence of the donor killer process, the presence or absence of the crystal defect region and the crystal defect The type can be easily evaluated.
  • the silicon wafer evaluation method determines that the first measurement point on the first silicon wafer is a defect-free region when the thermal donor generation speed ratio is within the first speed range.
  • the thermal donor generation speed ratio is in a second speed range higher than the first speed range, it is determined that the first measurement point is a region including a void defect, and the thermal donor
  • the generation speed ratio is in a third speed range higher than the second speed range, it is preferable to determine that the first measurement point is a region including an OSF nucleus.
  • the thermal donor generation heat treatment is preferably a heat treatment at 430 ° C. to 480 ° C. for 2 hours to 4 hours, and more preferably at 450 ° C. for 4 hours. Under this heat treatment condition, it is possible to activate the oxygen cluster and evaluate the presence or absence of a crystal defect region and the type of crystal defect based on the thermal donor generation rate.
  • the first silicon when the thermal donor generation heat treatment is performed at 450 ° C. for 4 hours, the first silicon is used when the thermal donor generation rate ratio is 1.3 or more and less than 1.7.
  • the first measurement point on the wafer is determined to be a defect-free region, and the thermal donor generation rate ratio is 1.7 or more and less than 1.9, the first measurement point includes a void defect. It is preferable to determine that the first measurement point is a region containing OSF nuclei when the thermal donor generation rate ratio is 1.9 or more and less than 2.3. By such determination, it is possible to easily determine an OSF ring region, a region including a void defect, and a defect-free region.
  • the crystal defect map in the radial direction of the silicon wafer is measured by measuring the generation rate of the thermal donor at each of a plurality of measurement points provided along the radial direction of the silicon wafer. It is preferable to create
  • the specific resistance of the silicon wafer is measured, the carrier concentration is obtained from an Irbin curve based on the specific resistance, and the thermal donor is calculated based on the carrier concentration before and after the thermal donor generation heat treatment. It is preferable to determine the generation amount and determine the thermal donor generation rate from the relationship between the thermal donor generation heat treatment time and the thermal donor generation amount. In this case, it is preferable to measure the specific resistance of the silicon wafer by a four-probe method.
  • the silicon wafer manufacturing method includes a first silicon single crystal ingot grown by the Czochralski method and subjected to thermal donor generation heat treatment on the silicon wafer for evaluation cut out from the first silicon single crystal ingot. And measuring the generation rate of the thermal donor generated at the time, and determining the presence or absence of the crystal defect region or the type of crystal defect in the silicon wafer for evaluation based on the measurement result of the generation rate of the thermal donor.
  • the second silicon single crystal ingot growth condition is adjusted based on the growth condition of the silicon single crystal ingot and the determination result of the presence or absence of the crystal defect region in the silicon wafer for evaluation or the type of the crystal defect.
  • a silicon wafer for production is cut out from a silicon single crystal ingot.
  • the second silicon single crystal ingot having a defect-free region may be grown by adjusting a growth condition of the second silicon single crystal ingot.
  • the second silicon single crystal ingot having a region including it may be grown, or the second silicon single crystal ingot having a region including an OSF nucleus may be grown.
  • the product silicon wafer is preferably subjected to donor killer treatment. According to this, it is possible to provide a silicon wafer product that is not affected by the thermal donor.
  • the evaluation method and manufacturing method of a silicon wafer which can evaluate the presence or absence of the crystal defect area
  • FIG. 1 is a flowchart for explaining a method of manufacturing a silicon wafer according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing a general relationship between V / G and the type and distribution of crystal defects.
  • FIG. 3 is a flowchart showing a thermal donor generation rate measurement step.
  • FIG. 4 is a flowchart showing a process of discriminating the presence / absence of a crystal defect region in the wafer and the type of crystal defect.
  • FIG. 5 is a graph showing the relationship between the thermal donor generation rate and the thermal donor generation heat treatment time of the wafer samples A1 to A3 and B1 to B3.
  • FIG. 1 is a flowchart for explaining a method of manufacturing a silicon wafer according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing a general relationship between V / G and the type and distribution of crystal defects.
  • FIG. 3 is a flowchart showing a thermal donor generation rate measurement step.
  • FIG. 4 is a flowchart showing
  • FIG. 6 shows the result of determining the relationship between the thermal donor generation rate and the oxygen concentration in the OSF ring generation region, the region including void defects, and the defect-free region when the thermal donor generation heat treatment is performed at 450 ° C. for 4 hours. It is a graph which shows.
  • FIG. 7 is a graph in which the thermal donor generation rate at each measurement point of the wafer without donor killer treatment in FIG. 6 is normalized by the thermal donor generation rate at the same measurement point of the wafer with donor killer treatment.
  • FIG. 1 is a flowchart for explaining a method of manufacturing a silicon wafer according to an embodiment of the present invention.
  • the silicon single crystal manufacturing method includes a crystal growth step (S11) for growing a silicon single crystal ingot by the CZ method, and a slicing step (S12) for cutting a silicon wafer from the silicon single crystal ingot. ), Thermal donor generation rate measurement step (S13Y, S14) performed when the evaluation of the crystal defect region of the silicon wafer is necessary, and the presence / absence of the crystal defect region and the type of crystal defect from the measurement result of the thermal donor generation rate A discriminating step (S15), and an adjusting step (S16Y, S17) for adjusting the growth conditions of the subsequent silicon single crystal ingot based on the discriminating result of the presence / absence of a crystal defect region and the type of crystal defect. Yes.
  • the silicon single crystal manufacturing method includes a donor killer processing step (S18) performed when evaluation of a silicon wafer is unnecessary, and a product such as mirror polishing performed on the silicon wafer after the donor killer processing. And a processing step (S19).
  • the kind and distribution of crystal defects contained in a silicon single crystal grown by the CZ method depend on the ratio V / G between the pulling speed V of the silicon single crystal and the temperature gradient G in the crystal in the pulling axis direction. Therefore, in order to control the crystal quality in the silicon single crystal, it is necessary to precisely control V / G. However, whether or not a silicon single crystal ingot (first silicon single crystal ingot) grown under a certain condition has a desired crystal quality cannot be known without actually evaluating the crystal quality.
  • the presence / absence of a crystal defect region in the wafer cut out from the silicon single crystal ingot and the type of crystal defect are evaluated.
  • this evaluation result is fed back to the subsequent silicon single crystal ingot (second silicon single crystal ingot) growing process.
  • the crystal growth conditions such as the crystal pulling speed V are adjusted so that the desired crystal quality is obtained.
  • FIG. 2 is a diagram showing a general relationship between V / G and the type and distribution of crystal defects.
  • V / G when V / G is large, vacancies become excessive and void defects that are aggregates of vacancies are generated.
  • a void defect is a crystal defect generally referred to as COP (Crystal Originated Particle).
  • V / G when V / G is small, the number of interstitial silicon atoms becomes excessive, and dislocation clusters that are aggregates of interstitial silicon are generated. Therefore, in order to produce a single crystal containing neither COP nor dislocation clusters, V / G must be controlled in both the radial direction and the length direction (crystal growth direction) of the single crystal.
  • an appropriate high temperature region is set in the chamber in order to keep the temperature gradient G in the radial direction within a predetermined range. Need to build.
  • the intra-crystal temperature gradient G in the radial direction is controlled by a heat shield provided above the silicon melt, whereby an appropriate hot zone can be constructed near the solid-liquid interface.
  • the temperature gradient G in the crystal in the length direction depends not only on the hot zone structure but also on the crystal pulling speed V, it is necessary to adjust the single crystal pulling speed V. At present, by strictly controlling the crystal pulling speed V, silicon single crystals having a diameter of 300 mm that do not contain COPs or dislocation clusters are mass-produced.
  • a silicon wafer that does not contain COP and dislocation clusters pulled up by controlling V / G is never homogeneous, and includes a plurality of regions that behave differently when heat-treated. For example, there are three regions, an OSF region, a Pv region, and a Pi region, in descending order of V / G between a region where COP occurs and a region where dislocation clusters occur.
  • the OSF region contains plate-like oxygen precipitates (OSF nuclei) in the as-grown state (the state in which no heat treatment is performed after single crystal growth), and is thermally oxidized at a high temperature of 1000 to 1200 ° C. This is a region where OSF occurs.
  • the Pv region includes oxygen precipitation nuclei in an as-grown state, and is a region where oxygen precipitates are easily generated when two-stage heat treatment is performed at a low temperature and a high temperature (for example, 800 ° C. and 1000 ° C.).
  • the Pi region is a region that hardly contains oxygen precipitation nuclei in an as-grown state and hardly generates oxygen precipitates even after heat treatment.
  • the control of V / G is performed mainly by adjusting the pulling speed V.
  • V / G is too large. Decrease the crystal pulling speed V.
  • V / G is too small and the crystal pulling speed V is increased. .
  • the time change of the thermal donor in the silicon wafer cut out from the ingot is measured.
  • oxygen dissolved from the quartz crucible is usually 10 ⁇ 10 17 atoms / cm 3 (ASTM F-121, 1979). This oxygen causes crystal defects in the wafer and causes device characteristic defects.
  • the wafer strength is increased to suppress deformation and heavy metals that cause device malfunction. It acts in a complicated manner, for example, by forming an oxygen precipitate having a gettering action for trapping the inside of the wafer.
  • oxygen atoms in silicon are electrically neutral and do not affect their electrical resistance.
  • a silicon single crystal produced by the CZ method is grown using a quartz crucible, it contains supersaturated oxygen in the crystal.
  • heat-treated at a low temperature of around 450 ° C. several oxygen atoms gather to form an oxygen cluster. It is known to form and become a donor that emits electrons.
  • the thermal donor formed by heat treatment at around 450 ° C. is affected by point defects, and the thermal donor generation rate differs depending on the difference in point defect concentration between the vacancy dominant region (COP region and OSF ring region) and the defect-free region. Therefore, in this embodiment, the presence / absence of a crystal defect region in the silicon wafer and the type of crystal defect are determined based on the generation rate of thermal donors generated in the silicon wafer.
  • thermal donor generation rate measuring step (S14) two silicon wafers for evaluation that are continuously cut out from the ingot by the slicing step (S12) are prepared.
  • the two evaluation wafers are preferably wafers cut out from the ingot by a wire saw and subjected to rough polishing.
  • one of the wafers (first wafer) is subjected to a thermal donor generation heat treatment step without performing donor killer treatment in advance, and the other wafer (second wafer) is subjected to donor killer treatment in advance and then subjected to thermal treatment.
  • a donor generation heat treatment is performed, and a thermal donor generation speed is obtained from a change in specific resistance before and after the thermal donor generation heat treatment of each of the first and second wafers.
  • FIG. 3 is a flowchart showing a thermal donor generation rate measurement step.
  • the thermal donor generation rate measurement step (S14) includes a preparation step (S20) for preparing the first and second wafers in the as-grown state, and a ratio for measuring the specific resistance of the first wafer.
  • a resistance measurement step (S21), a thermal donor generation heat treatment step (S22) for performing thermal donor generation heat treatment on the first wafer after the specific resistance measurement, and a specific resistance of the first wafer after the thermal donor generation heat treatment are measured.
  • the thermal donor generation rate measuring step (S14) includes a step of performing donor killer processing on the second wafer (S25), a resistance measuring step of measuring the specific resistance of the second wafer after donor killer processing (S26), and A thermal donor generation heat treatment step (S27) for performing the same thermal donor generation heat treatment as that of the first wafer on the second wafer after the specific resistance measurement, and a specific resistance of the second wafer after the thermal donor generation heat treatment are measured.
  • the temperature of the thermal donor-generated heat treatment is preferably 430 to 480 ° C, particularly preferably 450 ° C.
  • the heat treatment time for generating the thermal donor is preferably 1 to 4 hours, more preferably 2 to 4 hours.
  • the donor killer treatment is a short-time heat treatment performed in an inert gas atmosphere at 600 to 700 ° C., for example, and the heat treatment time is about 15 minutes, for example.
  • the specific resistance in the silicon wafer surface can be measured by a so-called four-probe method. Based on the measured specific resistance, the carrier concentration is determined from the Irvine curve, the amount of thermal donor generation is determined based on the carrier concentration before and after the thermal donor generation heat treatment, and from the relationship between the thermal donor generation heat treatment time and the amount of thermal donor generation The thermal donor generation rate can be determined.
  • a defect map in the radial direction of the silicon wafer can be created.
  • FIG. 4 is a flowchart showing a process for discriminating the presence / absence of a crystal defect region in the wafer and the type of crystal defect.
  • the ratio of the first thermal donor generation rate to the second thermal donor generation rate is calculated (S30).
  • the value is 1.3 or more and less than 1.7
  • the value is 1.7 or more and less than 1.9, it is a region including a void defect. It discriminate
  • the silicon wafer evaluation method cuts out a silicon wafer from a silicon single crystal ingot grown by the CZ method and performs thermal donor generation heat treatment on the silicon wafer. Since the generation rate is measured and the presence or absence of the crystal defect region or the type of crystal defect is determined based on the generation rate of the thermal donor, the region including the OSF nucleus, the region including the void defect, or the non-defect region can be quickly determined. It can be easily determined.
  • unlike the conventional evaluation method for example, it is not necessary to decorate copper, and evaluation can be performed with a relatively short time of low-temperature heat treatment. Existence and types of crystal defects can be evaluated.
  • the silicon wafer manufacturing method measures the thermal donor generation rate of the evaluation silicon wafer cut out from the preceding silicon single crystal ingot, and based on the measurement result of the thermal donor generation rate, the evaluation silicon wafer Since the presence / absence of the crystal defect region or the type of the crystal defect is discriminated, and the growth condition of the subsequent silicon single crystal ingot is adjusted based on the discrimination result, the crystal growth condition can be easily optimized.
  • the first and second silicon wafers cut from the silicon single crystal ingot in the thermal donor generation rate measuring step (S14) are prepared, and the donor killer process (S25) is performed on the second wafer.
  • the thermal donor generation heat treatment (S27) is performed to calculate the second thermal donor generation rate.
  • such a step of calculating the second thermal donor generation rate can be omitted.
  • the other silicon wafer equivalent to the second silicon wafer is subjected to donor killer treatment and thermal donor generation heat treatment, and the second thermal donor generation rate calculated in advance is made into a database to generate the second thermal donor generation.
  • the speed read from the database may be used, and only the first thermal donor generation speed may be measured to evaluate the presence / absence of a crystal defect region and the type of crystal defect.
  • the effect of the type of crystal defects on the thermal donor generation rate was evaluated.
  • a P-type silicon single crystal ingot having a diameter of 300 mm and a plane orientation (100) was grown by the CZ method.
  • a silicon single crystal ingot was grown while controlling V / G so as to include the OSF ring generation region.
  • the oxygen concentration of this silicon single crystal ingot was 5 ⁇ 10 17 to 20 ⁇ 10 17 atoms / cm 3 (ASTM F-121, 1979).
  • samples A1 and B1 of two silicon wafers including the OSF ring generation region were obtained.
  • the OSF ring generation region refers to a region where an OSF ring is generated after the evaluation heat treatment, and refers to a region including OSF nuclei in an as-grown state.
  • a silicon single crystal ingot is grown under the same conditions as Samples A1 and B1 except that the V / G is controlled so that a void defect area is included, and the silicon single crystal ingot is sliced to obtain a void defect.
  • Samples A2 and B2 of two silicon wafers including the region where the sapphire exists were obtained.
  • a silicon single crystal ingot is produced under the same conditions as those of the samples A1 and B1 except that V / G is controlled so as to be a defect-free region, and this silicon single crystal ingot is sliced to form 2 Two silicon wafer samples A3 and B3 were obtained.
  • a donor killer treatment was performed in a nitrogen atmosphere at 700 ° C. for 15 minutes.
  • Samples A1 to A3 of silicon wafers prepared by processes without donor killer treatment (Examples 1 to 3) and samples B1 to B3 of silicon wafers prepared by processes with donor killer treatment (Comparative Examples 1 to 3), respectively.
  • Thermal donor generation heat treatment was performed in a nitrogen atmosphere at 450 ° C. to generate a thermal donor.
  • FIG. 5 is a graph showing the relationship between the thermal donor generation rate of the wafer samples A1 to A3 and B1 to B3 and the thermal donor generation heat treatment time.
  • the horizontal axis represents the heat treatment time (h), and the vertical axis represents the thermal donor generation rate. (Cm ⁇ 3 / h) is shown respectively.
  • this graph is summarized only for wafers that satisfy the condition of oxygen concentration of 11 ⁇ 10 17 atoms / cm 3 .
  • the donor killer treatment is performed on the OSF ring generation region, the region including the void defect, and the non-defect region as compared with the case where the donor killer treatment is performed (samples B1, B2, and B3). None (samples A1, A2, A3) had a higher thermal donor generation rate.
  • the thermal donor generation rate was the same in any region with the donor killer treatment, but without the donor killer treatment, the thermal donor generation rate increased in the order of the OSF ring generation region, the void-containing region, and the defect-free region. became.
  • the thermal donor generation rate once increased and then decreased without the donor killer treatment.
  • the thermal donor generation rate decreased, and after 16 hours, the thermal donor generation rate became the same under all conditions.
  • FIG. 6 shows the result of determining the relationship between the thermal donor generation rate and the oxygen concentration in the OSF ring generation region, the region including void defects, and the defect-free region when the thermal donor generation heat treatment is performed at 450 ° C. for 4 hours.
  • the horizontal axis represents the oxygen concentration ( ⁇ 10 17 atoms / cm 3 ), and the vertical axis represents the thermal donor generation rate (cm ⁇ 3 / h).
  • the wafer with no donor killer treatment is the thermal donor at any oxygen concentration rather than the donor killer treatment (samples B1, B2, B3).
  • the generation rate was great.
  • the thermal donor generation rate was the same in all regions in the wafer with the donor killer process, but in the wafer without the donor killer process, the thermal donor was in the order of the OSF ring generation region, the region including the void defect, and the non-defect region. The generation rate has increased.
  • FIG. 7 is a graph in which the thermal donor generation rate at each measurement point of the wafer without donor killer treatment is normalized with the thermal donor generation rate at the same measurement point of the wafer with donor killer treatment in the graph of FIG.
  • the horizontal axis represents the oxygen concentration ( ⁇ 10 17 atoms / cm 3 ), and the vertical axis represents the thermal donor generation rate (standard value).
  • the thermal donor generation rate in the defect-free region of the wafer without donor killer treatment was 1.3 times or more and less than 1.7 times the thermal donor generation rate of the wafer with donor killer treatment.
  • the thermal donor generation rate in the region including the void defect of the wafer without donor killer treatment was 1.7 times or more and less than 1.9 times the thermal donor generation rate of the wafer with donor killer treatment.
  • the thermal donor generation rate in the OSF ring generation region of the wafer without donor killer treatment was 1.9 times or more and less than 2.3 times the thermal donor generation rate of the wafer with donor killer treatment.

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Abstract

La présente invention concerne un procédé simple d'évaluation de la présence et des types de régions défectueuses dans une tranche de silicium, qui permet en outre de faire des économies de temps et de coûts. Ledit procédé d'évaluation d'une tranche de silicium, qui est découpée à partir d'un lingot de silicium monocristallin formé à l'aide de la méthode de Czochralski, comprend : (S14) la mesure du taux de génération de donneurs thermiques générés lorsqu'un traitement thermique de génération de donneurs thermiques est effectué sur la tranche de silicium ; et (S15) la détermination de la présence de régions cristallines défectueuses et des types de défauts cristallins sur la base du taux de génération de donneurs thermiques.
PCT/JP2017/006727 2016-07-11 2017-02-23 Procédé d'évaluation et de fabrication de tranche de silicium WO2018012019A1 (fr)

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JP6669133B2 (ja) * 2017-06-23 2020-03-18 株式会社Sumco シリコンウェーハのサーマルドナー生成挙動予測方法、シリコンウェーハの評価方法およびシリコンウェーハの製造方法
JP6711327B2 (ja) * 2017-07-18 2020-06-17 株式会社Sumco シリコンウェーハ製造工程の評価方法およびシリコンウェーハの製造方法
JP7336961B2 (ja) * 2019-10-31 2023-09-01 信越化学工業株式会社 単結晶インゴットの製造方法及び単結晶ウエハの製造方法
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