WO2017219431A1 - 阵列基板以及液晶显示器 - Google Patents

阵列基板以及液晶显示器 Download PDF

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Publication number
WO2017219431A1
WO2017219431A1 PCT/CN2016/090787 CN2016090787W WO2017219431A1 WO 2017219431 A1 WO2017219431 A1 WO 2017219431A1 CN 2016090787 W CN2016090787 W CN 2016090787W WO 2017219431 A1 WO2017219431 A1 WO 2017219431A1
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WO
WIPO (PCT)
Prior art keywords
substrate
gate driver
output
scan
traces
Prior art date
Application number
PCT/CN2016/090787
Other languages
English (en)
French (fr)
Inventor
邢振周
郭星灵
李曼
Original Assignee
武汉华星光电技术有限公司
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Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US15/123,675 priority Critical patent/US20180196295A1/en
Publication of WO2017219431A1 publication Critical patent/WO2017219431A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate and a liquid crystal display.
  • TFT-LCD thin film transistor-liquid crystal Display
  • thin film transistor liquid crystal display technology is a technology that combines microelectronic technology with liquid crystal display technology. People use the technology of microelectronics fine processing on Si (silicon) to transplant TFT arrays on large-area glass, and then use the array substrate and another substrate with color filter film.
  • the LCD technology forms a liquid crystal cell and combines it with a post-process such as a polarizer to form a liquid crystal display.
  • the technical problem to be solved by the present invention is to provide an array substrate and a liquid crystal display, which can avoid the phenomenon that the display screen is uneven in color or brightness due to different RC delays of the scanning signal, thereby improving the quality of the display screen.
  • the present invention adopts a technical solution to provide an array substrate, wherein the array substrate includes: a substrate, including a display area and a non-display area; and a plurality of scan lines disposed on the display area;
  • the substrate substrate is disposed on the non-display area, and the plurality of substrate traces are respectively connected to the plurality of scan lines, and the one gate driver respectively supplies the scan signals to the corresponding plurality of scan lines through the plurality of substrate traces;
  • the substrate traces are distributed along the direction of the gate driver to the scan line, and the number of amplifiers corresponding to at least part of the output channels of the gate driver is different, so that at least part of the output channels of the gate driver provide different output thrusts, and the gate The greater the output thrust of the scan signal provided by the driver to the substrate traces closer to the edge, so that the RC delay of the scan signal through the plurality of substrate traces is equal.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the impedance of the substrate trace.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the distance between the gate driver and the scan line corresponding to the substrate trace.
  • the output thrust is the output buffer drive capability of the current output by the gate driver, and the output buffer drive capability is negatively correlated with the time of the rising or falling edge of the output waveform.
  • the plurality of scan lines are laterally disposed on the display area;
  • the array substrate further includes a plurality of data lines disposed longitudinally on the display area, the plurality of scan lines and the plurality of data lines defining a plurality of pixel areas in the display area;
  • the array substrate further includes A plurality of switching elements are respectively disposed in the plurality of pixel regions, and the switching elements are connected to the scan lines and the data lines.
  • the switching element is a thin film transistor.
  • an array substrate the array substrate includes: a substrate, including a display area and a non-display area; a plurality of scan lines disposed on the display area; The substrate trace is disposed on the non-display area, and the plurality of substrate traces are respectively connected to the plurality of scan lines, and the gate driver supplies the scan signal to the scan line through the substrate trace; wherein the gate driver provides the plurality of substrate traces
  • the scanning signal of the thrust is necessarily output, and at least a part of the substrate traces are different in output thrust of the scanning signal, so that the RC delay of the scanning signal through the plurality of substrate traces is equal.
  • a gate driver provides scan signals to a plurality of corresponding scan lines through a plurality of substrate traces; wherein, the plurality of substrate traces are distributed along the direction of the gate driver to the scan line, and the plurality of substrate traces are The output thrust of the scan signal provided by the gate driver to the substrate traces closer to the edge is greater.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the impedance of the substrate trace.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the distance between the gate driver and the scan line corresponding to the substrate trace.
  • the output thrust is the output buffer drive capability of the current output by the gate driver, and the output buffer drive capability is negatively correlated with the time of the rising or falling edge of the output waveform.
  • At least a portion of the output channels of the gate driver correspond to different numbers of amplifiers such that at least a portion of the output channels of the gate driver provide different output thrusts.
  • the plurality of scan lines are laterally disposed on the display area;
  • the array substrate further includes a plurality of data lines disposed longitudinally on the display area, the plurality of scan lines and the plurality of data lines defining a plurality of pixel areas in the display area;
  • the array substrate further includes A plurality of switching elements are respectively disposed in the plurality of pixel regions, and the switching elements are connected to the scan lines and the data lines.
  • the switching element is a thin film transistor.
  • a liquid crystal display including a display panel and a backlight module.
  • the display panel includes an array substrate, a color filter substrate, and an array substrate and a color filter substrate.
  • a gate driver provides scan signals to a plurality of corresponding scan lines through a plurality of substrate traces; wherein, the plurality of substrate traces are distributed along the direction of the gate driver to the scan line, and the plurality of substrate traces are The output thrust of the scan signal provided by the gate driver to the substrate traces closer to the edge is greater.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the impedance of the substrate trace.
  • the output thrust of the scan signal provided by the gate driver to the substrate trace is positively correlated with the distance between the gate driver and the scan line corresponding to the substrate trace.
  • the output thrust is the output buffer drive capability of the current output by the gate driver, and the output buffer drive capability is negatively correlated with the time of the rising or falling edge of the output waveform.
  • At least a portion of the output channels of the gate driver correspond to different numbers of amplifiers such that at least a portion of the output channels of the gate driver provide different output thrusts.
  • the plurality of scan lines are laterally disposed on the display area;
  • the array substrate further includes a plurality of data lines disposed longitudinally on the display area, the plurality of scan lines and the plurality of data lines defining a plurality of pixel areas in the display area;
  • the array substrate further includes A plurality of switching elements are respectively disposed in the plurality of pixel regions, and the switching elements are connected to the scan lines and the data lines.
  • the switching element is a thin film transistor.
  • the array substrate of the present invention comprises: a substrate, including a display area and a non-display area; a plurality of scan lines disposed on the display area; a plurality of substrate traces, and a setting is different from the prior art.
  • a substrate including a display area and a non-display area; a plurality of scan lines disposed on the display area; a plurality of substrate traces, and a setting is different from the prior art.
  • a plurality of substrate traces are respectively connected to the plurality of scan lines, and the gate driver provides a scan signal to the scan lines through the substrate traces; wherein the gate driver provides a certain output thrust scan to the plurality of substrate traces.
  • the signal, and at least a portion of the substrate traces are provided with different output thrusts of the scan signal such that the RC delay of the scan signal through the plurality of substrate traces is equal.
  • the RC delay of the substrate trace with a large impedance can be reduced, so that the scan line corresponding to each substrate trace can be simultaneously charged to avoid display.
  • the picture produces a color or uneven brightness due to the RC delay of the scan signal, which improves the quality of the display.
  • FIG. 1 is a schematic structural view of an embodiment of an array substrate of the present invention
  • FIG. 2 is a schematic diagram of a pixel region in an embodiment of an array substrate of the present invention.
  • FIG. 3 is a partial schematic view showing a substrate trace in an embodiment of the array substrate of the present invention.
  • FIG. 4 is a schematic view showing the comparison of output thrust in an embodiment of the array substrate of the present invention.
  • Fig. 5 is a schematic structural view of an embodiment of a liquid crystal display of the present invention.
  • FIG. 1 is a schematic structural diagram of an embodiment of an array substrate according to the present invention.
  • the array substrate includes:
  • the substrate 11 includes a display area 111 and a non-display area 112.
  • the material of the substrate 11 may be transparent glass or transparent plastic.
  • a plurality of scanning lines 12 are disposed on the display area 111.
  • a plurality of scan lines 12 are laterally disposed on the display area 111.
  • a plurality of substrate traces 13 are disposed on the non-display area 112, and a plurality of substrate traces 13 are respectively connected to the plurality of scan lines 12, and the gate driver 14 supplies scan signals to the scan lines 12 through the substrate traces 13.
  • the array substrate further includes a plurality of data lines 15 longitudinally disposed on the display area 111, and the plurality of scan lines 12 and the plurality of data lines 15 define a plurality of pixel areas in the display area 111.
  • the scan line 12, the substrate trace 13 and the data line 15 are generally disposed between the film layers on the substrate 11.
  • the film layers may be an insulating layer, a passivation layer, a flat layer, an organic layer, and an inorganic layer. Layer, semiconductor layer, metal layer, and the like.
  • the number of the scanning lines 12, the substrate traces 13, the gate driver 14, and the data lines 15 in FIG. 1 is merely illustrative, and does not limit the number of the present embodiment.
  • the array substrate further includes a plurality of switching elements 15 respectively disposed in a plurality of pixel regions, and the switching elements 15 are connected to the scan lines 12 and the data lines 15.
  • the switching element 15 is a thin film transistor having a gate connected to the scan line 12, a source connected to the data line 15, and a drain connected to the pixel electrode (not shown).
  • the frame requirements of the liquid crystal panel are also strict. Now, the frame of the display panel is generally required to be a narrow bezel. Therefore, the number and size of the gate drivers 14 need to be reduced. Therefore, a gate driver 14 is required to be correspondingly provided. More scan lines 12 provide scan signals.
  • the substrate traces 13 connecting the gate driver 14 and the scan lines 12 are fanned out (fan The out structure, that is, the input ends of the substrate traces 13 are closely arranged, and the output ends are diverged.
  • the horizontal distance of the gate driver 14 from the scan line 12 is constant. Therefore, the length of the portion of the substrate traces 13, that is, the length of the substrate traces 13 near the edges is greater than the length of the substrate traces 13 near the center. .
  • the hollow arrow indicates the output thrust of the current, and the larger the arrow, the larger the output thrust.
  • the gate driver 14 supplies a scan signal of a certain output thrust to the plurality of substrate traces 13, and at least a portion of the substrate traces 13 are supplied with different output thrusts of the scan signals, so that the scan signals pass through the plurality of substrate traces 13
  • the RC delay is equal.
  • the output thrust is the output buffer of the current output by the gate driver (output) Buffer) drive capability
  • the output buffer drive capability is inversely related to the time of the rising or falling edge of the output waveform.
  • a and b are clock scanning signals, wherein the time from a low level to a high level (ie, a rising edge) of a signal is t1, and the time from a low level to a high level of the b signal is t2. It can be seen that the time of t1 is less than t2, and the output buffer drive capability of the a signal is greater than the b signal.
  • the lengths of the substrate traces 13 are different, that is, the impedance of the substrate traces 13 is different, the output thrust of the input signal of the substrate trace 13 having a large impedance is increased, and the impedance is large.
  • the substrate trace 13 is reversely compensated, so that the scan line corresponding to the substrate trace 13 having a large impedance can also rise to a high level when charging, thereby reducing the RC delay.
  • a gate driver 14 respectively supplies scan signals to the corresponding plurality of scan lines 12 through the plurality of substrate traces 13; wherein the plurality of substrate traces 13 are dispersed along the direction of the gate driver 14 to the scan line 12.
  • the output thrust of the scan signal supplied from the gate driver 14 to the substrate trace 13 closer to the edge is larger.
  • the output thrust of the scan signal supplied from the gate driver 14 to the longer substrate trace 13 is large, and the output thrust of the scan signal supplied to the shorter substrate trace 13 is small.
  • the output thrust of the scan signal provided by the gate driver 14 to the substrate trace 13 is positively correlated with the impedance of the substrate trace 13.
  • the output thrust of the scan signal supplied from the gate driver 14 to the substrate trace 13 is positively correlated with the distance between the gate driver 14 and the scan line 12 corresponding to the substrate trace 13.
  • the output thrust of the different channels of the gate driver 14 can be adjusted by adjusting the number of amplifiers of different channels of the gate driver 14 or the amplification factor of the amplifier, for example, the number of amplifiers corresponding to at least part of the output channels of the gate driver 14. The difference is such that at least a portion of the output channels of the gate driver provide different output thrusts.
  • the array substrate of the embodiment includes: a substrate, including a display area and a non-display area; a plurality of scan lines disposed on the display area; a plurality of substrate traces disposed on the non-display area, and a plurality of The substrate traces are respectively connected to the plurality of scan lines, and the gate driver supplies the scan signals to the scan lines through the substrate traces; wherein the gate driver provides a scan signal with a certain output thrust to the plurality of substrate traces, and at least part of the substrate traces The output thrust of the supplied scan signal is different so that the RC delay of the scan signal through the plurality of substrate traces is equal.
  • the RC delay of the substrate trace with a large impedance can be reduced, so that the scan line corresponding to each substrate trace can be simultaneously charged to avoid display.
  • the picture produces a color or uneven brightness due to the RC delay of the scan signal, which improves the quality of the display.
  • FIG. 5 is a schematic structural diagram of an embodiment of a liquid crystal display according to the present invention.
  • the liquid crystal display includes a display panel 51 and a backlight module 52.
  • the display panel 51 includes an array substrate 511, a color filter substrate 512, and an array substrate 511 and a color film.
  • the array substrate 511 includes:
  • the substrate includes a display area and a non-display area; a plurality of scan lines are disposed on the display area; a plurality of substrate traces are disposed on the non-display area, and the plurality of substrate traces are respectively connected to the plurality of scan lines, and the gate driver Providing a scan signal to the scan line through the substrate trace; wherein the gate driver provides a scan signal with a certain output thrust to the plurality of substrate traces, and at least part of the substrate trace is provided with a different output thrust of the scan signal to enable the scan signal
  • the RC delays across multiple substrate traces are equal.
  • the array substrate 511 is an array substrate as described in the above embodiments.
  • the structure and the working principle are similar to those of the foregoing embodiments. For reference, the description of the embodiments and the drawings are omitted.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种阵列基板以及液晶显示器，该阵列基板包括：基板（11），包括显示区域（111）和非显示区域（112）；多条扫描线（12），设置于显示区域（111）上；多条基板走线（13），设置于非显示区域（112）上，多条基板走线（13）分别与多条扫描线（12）连接，栅极驱动器（14）通过基板走线（13）向扫描线（12）提供扫描信号；其中，栅极驱动器（14）向多条基板走线（13）提供一定输出推力的扫描信号，且至少部分基板走线（13）被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线（13）的RC延迟相等。通过上述方式，所述阵列基板以及液晶显示器能够避免显示画面因扫描信号的RC延迟不同造成的颜色或亮度不均匀的现象，提高了显示画面的质量。

Description

阵列基板以及液晶显示器
【技术领域】
本发明涉及显示技术领域，特别是涉及阵列基板以及液晶显示器。
【背景技术】
TFT-LCD（thin film transistor-liquid crystal display，薄膜晶体管液晶显示器）技术是微电子技术与液晶显示器技术巧妙结合的一种技术。人们利用在Si（硅）上进行微电子精细加工的技术，移植到在大面积玻璃上进行TFT阵列的加工，再将该阵列基板与另一片带彩色滤色膜的基板，利用与业已成熟的LCD技术，形成一个液晶盒相结合，再经过后工序如偏光片贴覆等过程，最后形成液晶显示器。
随着显示技术的迅速发展，TFT-LCD液晶面板边框要求愈来愈窄，分辨率愈来愈高，在规格愈来愈高的情况下，却希望成本愈来愈低。在栅极驱动器数量减少，面板边框又窄的情况下，增加了扇出(Fan out) 时的难度。当制程参数（例如膜厚）变动或基板走线（Wire ON Array，WOA）阻抗匹配不佳的情况下会造成显示器的亮度或颜色显示不均匀，俗称 Mura。
【发明内容】
本发明主要解决的技术问题是提供阵列基板以及液晶显示器，能够避免显示画面因扫描信号的RC延迟不同造成的颜色或亮度不均匀的现象，提高了显示画面的质量。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种阵列基板，其中，该阵列基板包括：基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，一个栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；其中，多条基板走线沿栅极驱动器到扫描线的方向发散分布，栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使栅极驱动器的至少部分那输出通道提供的输出推力不同，栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大，以使扫描信号经过多条基板走线的RC延迟相等。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线的阻抗呈正相关。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
其中，输出推力是栅极驱动器输出的电流的输出缓冲驱动能力，输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
其中，多条扫描线横向设置于显示区域上；阵列基板还包括多条纵向设置于显示区域的数据线，多条扫描线和多条数据线在显示区域定义多个像素区域；阵列基板还包括多个开关元件，分别设置于多个像素区域，开关元件与扫描线和数据线连接。
其中，开关元件为薄膜晶体管。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种阵列基板，该阵列基板包括：基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，栅极驱动器通过基板走线向扫描线提供扫描信号；其中，栅极驱动器向多条基板走线提供一定输出推力的扫描信号，且至少部分基板走线被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线的RC延迟相等。
其中，一个栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；其中，多条基板走线沿栅极驱动器到扫描线的方向发散分布，多条基板走线中，栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线的阻抗呈正相关。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
其中，输出推力是栅极驱动器输出的电流的输出缓冲驱动能力，输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
其中，栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使栅极驱动器的至少部分那输出通道提供的输出推力不同。
其中，多条扫描线横向设置于显示区域上；阵列基板还包括多条纵向设置于显示区域的数据线，多条扫描线和多条数据线在显示区域定义多个像素区域；阵列基板还包括多个开关元件，分别设置于多个像素区域，开关元件与扫描线和数据线连接。
其中，开关元件为薄膜晶体管。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示器，该液晶显示器包括显示面板和背光模组，显示面板包括阵列基板、彩膜基板以及阵列基板和彩膜基板之间的液晶层；其中，阵列基板包括：基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，栅极驱动器通过基板走线向扫描线提供扫描信号；其中，栅极驱动器向多条基板走线提供一定输出推力的扫描信号，且至少部分基板走线被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线的RC延迟相等。
其中，一个栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；其中，多条基板走线沿栅极驱动器到扫描线的方向发散分布，多条基板走线中，栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线的阻抗呈正相关。
其中，栅极驱动器向基板走线提供的扫描信号的输出推力，与基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
其中，输出推力是栅极驱动器输出的电流的输出缓冲驱动能力，输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
其中，栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使栅极驱动器的至少部分那输出通道提供的输出推力不同。
其中，多条扫描线横向设置于显示区域上；阵列基板还包括多条纵向设置于显示区域的数据线，多条扫描线和多条数据线在显示区域定义多个像素区域；阵列基板还包括多个开关元件，分别设置于多个像素区域，开关元件与扫描线和数据线连接。
其中，开关元件为薄膜晶体管。
本发明的有益效果是：区别于现有技术的情况，本发明的阵列基板包括：基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，栅极驱动器通过基板走线向扫描线提供扫描信号；其中，栅极驱动器向多条基板走线提供一定输出推力的扫描信号，且至少部分基板走线被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线的RC延迟相等。通过上述方式，能够通过调整提供给基板走线的扫描信号的输出推力，减小阻抗较大的基板走线的RC延迟，使每个基板走线所对应的扫描线能够同时进行充电，避免显示画面因扫描信号的RC延迟不同产生颜色或亮度不均匀的现象，提高了显示画面的质量。
【附图说明】
图1是本发明阵列基板一实施方式的结构示意图；
图2是本发明阵列基板一实施方式中一个像素区域的示意图；
图3是本发明阵列基板一实施方式中基板走线的局部示意图；
图4是本发明阵列基板一实施方式中输出推力的对比示意图；
图5是本发明液晶显示器一实施方式的结构示意图。
【具体实施方式】
参阅图1，图1是本发明阵列基板一实施方式的结构示意图，该阵列基板包括：
基板11，包括显示区域111和非显示区域112。
可选的，该基板11的材料可以是透明玻璃或者透明塑料。
多条扫描线12，设置于显示区域111上。可选的，多条扫描线12横向设置于显示区域111上。
多条基板走线13，设置于非显示区域112上，多条基板走线13分别与多条扫描线12连接，栅极驱动器14通过基板走线13向扫描线12提供扫描信号。
可选的，阵列基板还包括多条纵向设置于显示区域111的数据线15，多条扫描线12和多条数据线15在显示区域111定义多个像素区域。
可以理解的，上述的扫描线12、基板走线13以及数据线15一般设置于基板11上的各膜层之间，这些膜层可以是绝缘层、钝化层、平坦层、有机层、无机层、半导体层、金属层等等。
另外，图1中的扫描线12、基板走线13、栅极驱动器14、数据线15的数量仅为示意，并不限制本实施方式的数量。
具体参阅图2，阵列基板还包括多个开关元件15，分别设置于多个像素区域，开关元件15与扫描线12和数据线15连接。具体地，开关元件15为薄膜晶体管，其栅极连接扫描线12，其源极连接数据线15，其漏极连接像素电极（图未示）。
由于显示技术的发展，对液晶面板的边框要求也严格，现在一般要求显示面板的边框为窄边框，因此需要减少栅极驱动器14的数量和大小，这样，就要求一个栅极驱动器14需要对应给更多的扫描线12提供扫描信号。
基于上述原因，在现有技术中，连接栅极驱动器14和扫描线12的基板走线13呈扇出（fan out）结构，即基板走线13的输入端紧密排列，而输出端则发散开来。但是栅极驱动器14距离扫描线12的水平距离是不变的，因此，部分基板走线13的长度的不同的，即靠近边缘的基板走线13的长度大于靠近中央的基板走线13的长度。
这样，就会导致不同的基板走线13的阻抗不同，从而导致不同基板走线13对扫描信号带来的RC延迟（电阻-电容延迟）不同，使显示器的亮度或颜色显示不均匀，造成 Mura现象。
在本实施方式中，参阅图3，其中，空心箭头表示电流的输出推力，且箭头越大，输出推力越大。
具体地，栅极驱动器14向多条基板走线13提供一定输出推力的扫描信号，且至少部分基板走线13被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线13的RC延迟相等。
其中，输出（output）推力是栅极驱动器输出的电流的输出缓冲（output buffer）驱动能力，输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
具体参阅图4，a和b均为时钟扫描信号，其中，a信号由低电平到高电平（即上升沿）的时间为t1，b信号由低电平到高电平的时间为t2，可以看出，t1的时间小于t2，则a信号的输出缓冲驱动能力大于b信号。
结合图3和图4，虽然基板走线13的长度各不相同，即基板走线13的阻抗不同，通过加大阻抗较大的基板走线13的输入信号的输出推力，对阻抗较大的基板走线13进行反向补偿，使得阻抗较大的基板走线13所对应的扫描线在充电时也能快速上升到高电平，从而减小了RC延迟。
可选的，一个栅极驱动器14通过多条基板走线13分别向对应的多条扫描线12提供扫描信号；其中，多条基板走线13沿栅极驱动器14到扫描线12的方向发散分布，多条基板走线13中，栅极驱动器14向越靠近边缘的基板走线13提供的扫描信号的输出推力越大。
如图3所示，栅极驱动器14向较长的基板走线13提供的扫描信号的输出推力较大，向较短的基板走线13提供的扫描信号的输出推力较小。
可选的，栅极驱动器14向基板走线13提供的扫描信号的输出推力，与基板走线13的阻抗呈正相关。或者
栅极驱动器14向基板走线13提供的扫描信号的输出推力，与基板走线13对应的栅极驱动器14与扫描线12之间的距离呈正相关。
具体地，可以通过调整栅极驱动器14不同通道的放大器的数量或放大器的放大倍数以对栅极驱动器14不同通道的输出推力进行调节，例如栅极驱动器14的至少部分输出通道对应的放大器的数量不同，以使栅极驱动器的至少部分那输出通道提供的输出推力不同。
区别于现有技术，本实施方式的阵列基板包括：基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，栅极驱动器通过基板走线向扫描线提供扫描信号；其中，栅极驱动器向多条基板走线提供一定输出推力的扫描信号，且至少部分基板走线被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线的RC延迟相等。通过上述方式，能够通过调整提供给基板走线的扫描信号的输出推力，减小阻抗较大的基板走线的RC延迟，使每个基板走线所对应的扫描线能够同时进行充电，避免显示画面因扫描信号的RC延迟不同产生颜色或亮度不均匀的现象，提高了显示画面的质量。
参阅图5，图5是本发明液晶显示器一实施方式的结构示意图，该液晶显示器包括显示面板51和背光模组52，显示面板51包括阵列基板511、彩膜基板512以及阵列基板511和彩膜基板512之间的液晶层513。
其中，阵列基板511包括：
基板，包括显示区域和非显示区域；多条扫描线，设置于显示区域上；多条基板走线，设置于非显示区域上，多条基板走线分别与多条扫描线连接，栅极驱动器通过基板走线向扫描线提供扫描信号；其中，栅极驱动器向多条基板走线提供一定输出推力的扫描信号，且至少部分基板走线被提供的扫描信号的输出推力不同，以使扫描信号经过多条基板走线的RC延迟相等。
具体地，该阵列基板511是如以上各种实施方式所述的阵列基板，其结构以及工作原理均与上述实施方式类似，可以参考上述实施方式的说明以及附图，这里不再赘述。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种阵列基板，其中，包括：
    基板，包括显示区域和非显示区域；
    多条扫描线，设置于所述显示区域上；
    多条基板走线，设置于所述非显示区域上，所述多条基板走线分别与所述多条扫描线连接，一个栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；
    其中，所述多条基板走线沿所述栅极驱动器到所述扫描线的方向发散分布，所述栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使所述栅极驱动器的至少部分那输出通道提供的输出推力不同，所述栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大，以使所述扫描信号经过所述多条基板走线的RC延迟相等。
  2. 根据权利要求1所述的阵列基板，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线的阻抗呈正相关。
  3. 根据权利要求1所述的阵列基板，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
  4. 根据权利要求1所述的阵列基板，其中，
    所述输出推力是所述栅极驱动器输出的电流的输出缓冲驱动能力，所述输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
  5. 根据权利要求1所述的阵列基板，其中，
    多条所述扫描线横向设置于所述显示区域上；
    所述阵列基板还包括多条纵向设置于所述显示区域的数据线，多条扫描线和多条数据线在所述显示区域定义多个像素区域；
    所述阵列基板还包括多个开关元件，分别设置于所述多个像素区域，所述开关元件与所述扫描线和所述数据线连接。
  6. 根据权利要求5所述的阵列基板，其中，
    所述开关元件为薄膜晶体管。
  7. 一种阵列基板，其中，包括：
    基板，包括显示区域和非显示区域；
    多条扫描线，设置于所述显示区域上；
    多条基板走线，设置于所述非显示区域上，所述多条基板走线分别与所述多条扫描线连接，栅极驱动器通过所述基板走线向所述扫描线提供扫描信号；
    其中，所述栅极驱动器向所述多条基板走线提供一定输出推力的扫描信号，且至少部分所述基板走线被提供的扫描信号的输出推力不同，以使所述扫描信号经过所述多条基板走线的RC延迟相等。
  8. 根据权利要求7所述的阵列基板，其中，
    一个所述栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；
    其中，所述多条基板走线沿所述栅极驱动器到所述扫描线的方向发散分布，所述多条基板走线中，所述栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大。
  9. 根据权利要求8所述的阵列基板，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线的阻抗呈正相关。
  10. 根据权利要求8所述的阵列基板，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
  11. 根据权利要求7所述的阵列基板，其中，
    所述输出推力是所述栅极驱动器输出的电流的输出缓冲驱动能力，所述输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
  12. 根据权利要求7所述的阵列基板，其中，
    所述栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使所述栅极驱动器的至少部分那输出通道提供的输出推力不同。
  13. 根据权利要求7所述的阵列基板，其中，
    多条所述扫描线横向设置于所述显示区域上；
    所述阵列基板还包括多条纵向设置于所述显示区域的数据线，多条扫描线和多条数据线在所述显示区域定义多个像素区域；
    所述阵列基板还包括多个开关元件，分别设置于所述多个像素区域，所述开关元件与所述扫描线和所述数据线连接。
  14. 根据权利要求13所述的阵列基板，其中，
    所述开关元件为薄膜晶体管。
  15. 一种液晶显示器，其中，包括显示面板和背光模组，所述显示面板包括阵列基板、彩膜基板以及所述阵列基板和所述彩膜基板之间的液晶层；
    其中，所述阵列基板包括：
    基板，包括显示区域和非显示区域；
    多条扫描线，设置于所述显示区域上；
    多条基板走线，设置于所述非显示区域上，所述多条基板走线分别与所述多条扫描线连接，栅极驱动器通过所述基板走线向所述扫描线提供扫描信号；
    其中，所述栅极驱动器向所述多条基板走线提供一定输出推力的扫描信号，且至少部分所述基板走线被提供的扫描信号的输出推力不同，以使所述扫描信号经过所述多条基板走线的RC延迟相等。
  16. 根据权利要求15所述的液晶显示器，其中，
    一个所述栅极驱动器通过多条基板走线分别向对应的多条扫描线提供扫描信号；
    其中，所述多条基板走线沿所述栅极驱动器到所述扫描线的方向发散分布，所述多条基板走线中，所述栅极驱动器向越靠近边缘的基板走线提供的扫描信号的输出推力越大。
  17. 根据权利要求16所述的液晶显示器，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线的阻抗呈正相关。
  18. 根据权利要求16所述的液晶显示器，其中，
    所述栅极驱动器向基板走线提供的扫描信号的输出推力，与所述基板走线对应的栅极驱动器与扫描线之间的距离呈正相关。
  19. 根据权利要求15所述的液晶显示器，其中，
    所述输出推力是所述栅极驱动器输出的电流的输出缓冲驱动能力，所述输出缓冲驱动能力与输出波形上升沿或下降沿的时间呈负相关。
  20. 根据权利要求15所述的液晶显示器，其中，
    所述栅极驱动器的至少部分输出通道对应的放大器的数量不同，以使所述栅极驱动器的至少部分那输出通道提供的输出推力不同。
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CN108877544A (zh) * 2018-06-29 2018-11-23 上海天马有机发光显示技术有限公司 一种显示面板及电子设备
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