WO2019090919A1 - 一种像素单元、阵列基板及显示面板 - Google Patents

一种像素单元、阵列基板及显示面板 Download PDF

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Publication number
WO2019090919A1
WO2019090919A1 PCT/CN2017/117680 CN2017117680W WO2019090919A1 WO 2019090919 A1 WO2019090919 A1 WO 2019090919A1 CN 2017117680 W CN2017117680 W CN 2017117680W WO 2019090919 A1 WO2019090919 A1 WO 2019090919A1
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Prior art keywords
stem portion
pixel region
horizontal
extension line
sub
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PCT/CN2017/117680
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English (en)
French (fr)
Inventor
甘启明
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深圳市华星光电半导体显示技术有限公司
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Priority to US15/749,403 priority Critical patent/US20190139987A1/en
Publication of WO2019090919A1 publication Critical patent/WO2019090919A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement

Definitions

  • the present application relates to the field of liquid crystal display technologies, and in particular, to a pixel unit, an array substrate, and a display panel.
  • liquid crystal displays have become the market because of their high space utilization efficiency, low power consumption, no radiation and low electromagnetic interference. Mainstream.
  • the market's performance requirements for liquid crystal displays are toward high contrast, fast response and wide viewing angle.
  • the existing technologies that can achieve wide viewing angle requirements include, for example, multi-domain vertical alignment (MVA, Multi-domain Vertica1 Alignment), multi-domain horizontal alignment (MHA, Multi-domain Horizontal) Alignment), twisted nematic plus viewing angle expansion film (TN+film) and transverse electric field form (IPS, In-Plane Switching).
  • MVA multi-domain vertical alignment
  • MHA multi-domain horizontal alignment
  • TN+film twisted nematic plus viewing angle expansion film
  • IPS transverse electric field form
  • the liquid crystal display adopting the above technology can achieve the purpose of wide viewing angle, its existing chromatic aberration or color shift (color The phenomenon of washout is also a problem, especially for large-sized liquid crystal display panels, which are particularly noticeable in terms of visual chromatic aberration or visual color shift.
  • the technical problem to be solved by the present application is to provide a pixel unit, an array substrate, and a display panel, which can improve visual chromatic aberration or color shift of the display panel and improve the side view display effect of the display panel.
  • the array substrate includes a plurality of scan lines and a plurality of data lines vertically intersecting each other, and is divided into a plurality of pixel units by a plurality of scan lines and a plurality of data lines, the pixel unit including the first main pixel area and the first main a second sub-pixel region electrically connected to the pixel region;
  • the first main pixel region includes a first horizontal stem portion, a first vertical stem portion, and a first branch portion; wherein the first horizontal stem portion and the first vertical stem portion Vertically intersecting, the first branch portion extends outward from the first horizontal stem portion, the first vertical stem portion, and is located in a pixel region defined by the first horizontal stem portion and the first vertical stem portion;
  • the second sub-pixel region includes a second horizontal trunk portion, a second vertical trunk portion, and a second branch portion; wherein the second horizontal trunk portion and the second vertical trunk portion intersect perpendicularly, and the second branch portion is from
  • a technical solution adopted by the present application is to provide a pixel unit, where the pixel unit includes a first main pixel area and a second sub-pixel area electrically connected to the first main pixel area;
  • the pixel area includes a first horizontal stem portion, a first vertical stem portion, and a first branch portion; wherein the first horizontal stem portion and the first vertical stem portion intersect perpendicularly, and the first branch portion is from the first horizontal stem portion,
  • a vertical stem extends outwardly and is located within a pixel area defined by the first horizontal stem and the first vertical stem.
  • the second sub-pixel region includes a second horizontal stem portion, a second vertical stem portion, and a second branch portion; wherein the second horizontal stem portion and the second vertical stem portion vertically intersect, and the second branch portion is from the second horizontal master
  • the second vertical trunk extends outwardly and is located in a pixel area defined by the second horizontal trunk portion and the second vertical trunk portion; wherein the extension line of the first branch portion and the extension line of the first horizontal trunk portion are formed
  • the acute angle is different from the acute angle formed by the extension line of the second branch portion and the extension line of the second horizontal trunk portion.
  • the display panel includes the array substrate, an opposite substrate disposed opposite to the array substrate, and a liquid crystal layer sandwiched therebetween.
  • the array substrate includes a plurality of scan lines and a plurality of data lines vertically intersecting each other, and is composed of a plurality of The scan line and the plurality of data lines are divided into a plurality of pixel units, and the pixel unit includes a first main pixel area and a second sub-pixel area electrically connected to the first main pixel area;
  • the first main pixel area includes a first horizontal trunk a first vertical trunk portion and a first branch portion; wherein the first horizontal trunk portion and the first vertical trunk portion vertically intersect, the first branch portion is from the first horizontal trunk portion and the first vertical trunk portion Externally extending and located in a pixel area defined by the first horizontal stem portion and the first vertical stem portion;
  • the second sub-pixel region includes a second horizontal stem portion, a second vertical stem portion, and a second
  • the utility model has the beneficial effects that the pixel unit, the array substrate and the display panel of the present application each comprise a first main pixel region and a second sub-pixel region electrically connected to the first main pixel region.
  • the first main pixel region includes a first horizontal stem portion, a first vertical stem portion, and a first branch portion; wherein the first horizontal stem portion and the first vertical stem portion intersect perpendicularly, and the first branch portion is from the first horizontal main portion
  • the first vertical trunk extends outwardly and is located within a pixel area defined by the first horizontal trunk and the first vertical trunk.
  • the second sub-pixel region includes a second horizontal stem portion, a second vertical stem portion, and a second branch portion; wherein the second horizontal stem portion and the second vertical stem portion vertically intersect, and the second branch portion is from the second horizontal master
  • the second vertical trunk extends outwardly and is located within a pixel area defined by the second horizontal stem and the second vertical stem.
  • the acute angle formed by the extension line of the first branch portion and the extension line of the first horizontal trunk portion is different from the acute angle formed by the extension line of the second branch portion and the extension line of the second horizontal trunk portion.
  • the present application can make liquid crystal molecules have different tilting angles in one pixel unit, improve the isotropic property of the liquid crystal layer, compensate the liquid crystal viewing angle, and effectively improve the color difference or color shift phenomenon, thereby improving the display panel. Side view display effect.
  • FIG. 1 is a schematic structural diagram of an embodiment of a pixel unit provided by the present application.
  • FIG. 2 is an enlarged view of a first main pixel area and a second sub-pixel area in the pixel unit shown in FIG. 1;
  • FIG. 3 is a cross-sectional view showing the connection of a pixel electrode and a thin film transistor in the embodiment of FIG. 1;
  • FIG. 4 is another cross-sectional view showing the connection of a pixel electrode and a thin film transistor in the embodiment of FIG. 1;
  • FIG. 5 is a schematic structural diagram of an embodiment of an array substrate provided by the present application.
  • FIG. 6 is a schematic structural diagram of an embodiment of a display panel provided by the present application.
  • first and second in this application are used for descriptive purposes only, and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, features defining “first” or “second” may include at least one of the features, either explicitly or implicitly. In the description of the present application, the meaning of “a plurality” is at least two, such as two, three, etc., unless specifically defined otherwise. Furthermore, the terms “comprises” and “comprising” and “comprising” are intended to cover a non-exclusive inclusion.
  • a process, method, system, product, or device that comprises a series of steps or components is not limited to the listed steps or components, but optionally includes steps or components not listed, or alternatively Other steps or components inherent to these processes, methods, products or devices are included.
  • the present application relates to a pixel unit, an array substrate, and a display panel.
  • each pixel region adopts a "meter"-shaped structure design, and the side of the pixel is raised by setting the acute angle formed by the branch portion of the two-pixel electrode and the horizontal trunk portion to be different. See the display effect.
  • FIG. 1 is a schematic structural diagram of an embodiment of a pixel structure provided by the present application
  • FIG. 2 is an enlarged view of a first main pixel region and a second sub-pixel region in the pixel unit shown in FIG. .
  • the pixel unit A10 includes a first main pixel area A and a second sub-pixel area B electrically connected to the first main pixel area A.
  • the first main pixel region A and the second sub-pixel region B are electrically connected through an indium tin oxide (ITO) layer 17 in the array substrate.
  • ITO indium tin oxide
  • the first main pixel area A includes a first horizontal stem portion 11, a first vertical stem portion 12, and a first branch portion 13; wherein the first horizontal stem portion 11 and the first vertical stem portion 12 intersect perpendicularly, the first portion
  • the branch portion 13 extends outward from the first horizontal stem portion 11 and the first vertical stem portion 12 and is located in a pixel region defined by the first horizontal stem portion 11 and the first vertical stem portion 12.
  • first horizontal trunk portion 11 and the first vertical trunk portion 12 intersect perpendicularly to divide the first main pixel region A into four equal-area partitions
  • first branch portion 13 is related to the first horizontal trunk portion 11 and the first The intersections at which the vertical trunk portions 12 intersect are symmetrically distributed, and the first branch portions 13 in the partitions are spaced apart from each other and are equal to the acute angle formed by the first horizontal stem portion 11.
  • the second sub-pixel region B includes a second horizontal stem portion 14, a second vertical stem portion 15, and a second branch portion 16.
  • the second horizontal trunk portion 14 and the second vertical trunk portion 15 vertically intersect, and the second branch portion 16 extends outward from the second horizontal trunk portion 14 and the second vertical trunk portion 15 and is located at the second horizontal trunk portion 14 And within the pixel area defined by the second vertical stem portion 15.
  • the second horizontal trunk portion 14 and the second vertical trunk portion 15 intersect perpendicularly to divide the second main pixel region into four equal-area partitions, and the second branch portion 16 is related to the second horizontal trunk portion 14 and the second portion.
  • the intersections where the vertical trunk portions 15 intersect are symmetrically distributed, and the second branch portions 16 within the partitions are spaced apart from each other and are equal to the acute angle formed by the second horizontal stem portion 14.
  • first horizontal trunk portion 11 and the second horizontal trunk portion 14 are both strip-shaped and the same size
  • first vertical trunk portion 12 and the second vertical trunk portion 15 are strip-shaped and the same size
  • first branch portion 13 and the second branch portion 16 are also strip-shaped.
  • the acute angle formed by the extension line of the first branch portion 13 and the extension line of the first horizontal trunk portion 11 is different from the acute angle formed by the extension line of the second branch portion 16 and the extension line of the second horizontal trunk portion 14.
  • the acute angle of the extension line of the first branch portion 13 and the extension line of the first horizontal trunk portion 11 is 45 degrees
  • the acute angle of the extension line 14 of the second branch portion and the extension line of the second horizontal trunk portion 15 is at Between 15 degrees and 40 degrees or between 50 degrees and 75 degrees, including the endpoint angle, that is, including 15 degrees, 40 degrees, 50 degrees, 75 degrees, preferably 30 degrees or 60 degrees, 60 degrees in this embodiment.
  • the first main pixel area A and the second sub-pixel area B are arranged in a rectangle, and the length and width of the first main pixel area A are between 2 micrometers and 5 micrometers, and the length of the second sub-pixel region B is The width is between 2 microns and 5 microns.
  • the lengths of the first main pixel area A and the second sub-pixel area B are both set to 3.5 ⁇ m, and the widths of the first main pixel area A and the second sub-pixel area B are both set to 2.5 ⁇ m.
  • the area ratio of the first main pixel area A to the second sub-pixel area B ranges from 3/7 to 7/3, the area ratio range includes 3/7 and 7/3, and the area ratio is preferably 4/6.
  • the area ratio of the first main pixel area A to the second sub-pixel area B is 5/5.
  • the first main pixel area A and the second sub-pixel area B of the pixel unit may be set to pixels of different colors or the same color, such as red pixels and green pixels, green pixels and blue pixels, blue pixels and red pixels, Or set a single pixel such as red pixel, green pixel, blue pixel.
  • the pixel unit A10 further includes a thin film transistor 20, the gate 21 of the thin film transistor 20 is connected to the scan line 40, the source 22 of the thin film transistor 20 is connected to the data line 30, and the drain 23 of the thin film transistor 20 is connected to the pixel electrode 10.
  • the first main pixel area A and the second sub-pixel area B are defined as the pixel electrode 10.
  • the material of the pixel electrode 10 of the pixel unit A10 is indium tin oxide.
  • a via 231 is disposed above the drain 23 of the thin film transistor 20, and the pixel electrode 10 is electrically connected to the drain 23 of the thin film transistor 20 through the via 231.
  • the pixel electrode 10 is controlled by only one thin film transistor 20.
  • the specific working process is: after the power is turned on, the gate 21 of the thin film transistor 20 is turned on, the current is transmitted to the source 22 through the data line 30, then passes through the channel layer to the drain 23, and then the pixel electrode 10 is charged through the via 231. .
  • the reverse direction of the liquid crystal molecules is gradually tilted toward the inside of the pixel electrode 10 from the outside of the pixel electrode 10, and the angle of the tilt is in the direction of the branch portion. Since the direction of the branch portion of the first main pixel region A and the second sub-pixel region B of the pixel electrode 10 is different, the tilt angle of the liquid crystal molecules of the first main pixel region A and the tilt angle of the liquid crystal molecules of the second sub-pixel region B are caused. Differently, the isotropic property of the liquid crystal layer is improved, the liquid crystal viewing angle is compensated, the chromatic aberration or color shift phenomenon can be effectively improved, and the side view display effect of the liquid crystal is improved.
  • the pixel electrode is controlled by three thin film transistors with respect to a general 8-dome.
  • the pixel electrode of the 8-zone is controlled by only one thin film transistor, and the aperture ratio of the pixel itself is relatively improved, and the pixel is avoided.
  • the three main thin film transistors control the difficulty of balancing the voltage difference between the first main pixel area A and the second sub-pixel area B.
  • FIG. 3 is a cross-sectional view showing the connection of a pixel electrode and a thin film transistor in the embodiment of FIG. 1.
  • the pixel unit A10 includes a substrate 26, a thin film transistor 20 provided on the substrate 26, a passivation layer 25a provided on the thin film transistor 20 and the substrate 26, and a pixel electrode 10a provided on the passivation layer 25a.
  • the thin film transistor 20 only shows the drain 23 .
  • the substrate material can be set as a transparent glass substrate or a plastic substrate.
  • the passivation layer material is silicon nitride or silicon oxide, and the pixel electrode material is transparent indium tin oxide.
  • the substrate material is a glass substrate, the passivation layer material is silicon nitride, and the pixel electrode material is transparent indium tin oxide.
  • the passivation layer 25a is a planar passivation layer
  • the pixel electrode 10a is a pixel electrode having a uniform thickness
  • the pixel electrode 10a is uniformly covered on the planar passivation layer 25a.
  • a via 231a is disposed above the drain 23 corresponding to the passivation layer 25a, and the pixel electrode 10a is electrically connected to the drain 23 of the thin film transistor through the via 231a.
  • an indium tin oxide layer is formed on the passivation layer, and a pattern of the pixel electrode 10 as shown in FIG. 2 is formed through a photomask.
  • FIG. 4 is another cross-sectional view showing a pixel electrode and a thin film transistor connected in the embodiment of FIG. 1.
  • the pixel unit A10 includes a substrate 26, a thin film transistor 20 provided on the substrate 26, a passivation layer 25b provided on the thin film transistor 20 and the substrate 26, and a pixel electrode 10b provided on the passivation layer 25b.
  • the thin film transistor 20 only shows the drain 23 .
  • the passivation layer 25b is a patterned passivation layer, and the passivation layer 25b is formed with the same pattern corresponding to the plurality of pixel electrodes 10, that is, the pixel electrode pattern in FIG.
  • the pixel electrode 10b is a uniform-surface electrode having a uniform thickness and continuous uninterrupted, and the entire surface of the pixel electrode 10b covers the patterned passivation layer 25b, and the passivation layer 25b has a corresponding pattern.
  • the patterned passivation layer 25b is divided into 8 partitions.
  • the region of the patterned passivation layer 25b corresponding to each pixel unit includes a first main pixel region and a second sub-pixel region.
  • the first main pixel area and the second sub-pixel area each include a horizontal trunk portion, and further include a vertical trunk portion intersecting the two horizontal trunks, and a branch portion symmetric with respect to a portion where the horizontal trunk portion and the vertical trunk portion intersect, the same partition
  • the branches are spaced apart from each other and at the same angle as the horizontal trunk.
  • the acute angle formed by the branch portion of the main region and the horizontal trunk portion is different from the acute angle formed by the branch portion of the sub-region and the horizontal trunk portion.
  • the passivation layer 25b is provided with a via hole 231b corresponding to the drain electrode 23 of the thin film transistor 20, and the pixel electrode 10b is electrically connected to the drain electrode 23 of the thin film transistor 20 through the via hole 231a.
  • the via 231b and the trench 13b (16b) can pass through a gray scale mask (Gray Tone) Mask, GTM) is produced simultaneously through the yellow light process.
  • GTM gray scale mask
  • FIG. 5 a schematic structural diagram of an embodiment of an array substrate provided by the present application is provided.
  • the array substrate 100 includes a plurality of pixel units A10 arranged in an array, a plurality of scanning lines (G21, G22, G23, G24, ...) and strip data lines (D21, D22, D23, D24, D25, ).
  • the first main pixel area A and the second sub-pixel area B of the pixel unit A10 in this embodiment may also be arranged in the lateral direction.
  • the thin film transistor 20 in the pixel unit A10 includes a gate, a source, and a drain, and is electrically connected to the scan line, the data line, and the pixel electrode 10, respectively.
  • a via hole is disposed above the drain of the thin film transistor 20, and the pixel electrode 10 is electrically connected to the drain of the thin film transistor 20 through the via hole.
  • one pixel unit 10 controls the switch by only one thin film transistor 20.
  • the scanning lines (G21, G22, G23, G24, ...) are vertically arranged with the data lines (D21, D22, D23, D24, D25, ).
  • the scan lines are arranged in a column direction to output a scan signal to the pixel unit, and one scan line drives only one row of pixel units.
  • the data lines are arranged in a row direction, and one data line drives only one column of pixel units.
  • the specific working principle is: after the power is turned on, the gate of the thin film transistor 20 is turned on, the current is transmitted to the source through the data line, then passes through the channel layer to the drain, and then the pixel electrode is charged through the via hole.
  • the reverse direction of the liquid crystal molecules is gradually tilted toward the inside of the pixel electrode 10 from the outside of the pixel electrode 10, and the angle of the tilt is in the direction of the branch portion. Since the direction of the branch portion of the first main pixel region and the second sub-pixel region of the pixel unit A10 is different, the tilt angle of the liquid crystal molecules of the first main pixel region is different from the tilt angle of the liquid crystal molecules of the second sub-pixel region.
  • FIG. 6 a schematic diagram of an embodiment of a display panel provided by the present application is provided.
  • the display panel includes an array substrate 100, an opposite substrate 200 disposed opposite the array substrate 100, and a liquid crystal layer 300 sandwiched therebetween.
  • the array substrate 100 has a matrix pixel unit (not shown), and the counter substrate 200 includes a planar common electrode (not shown).
  • the display panel is a PSVA type display panel.
  • the array substrate 100 and the opposite substrate 200 are paired and filled with the liquid crystal layer 300, and then a voltage is applied to the common electrode and the matrix pixel unit, so that the liquid crystal molecules are processed in the direction of the design, that is, the pixel unit processed into the pattern shown in FIG.
  • the direction of the slits is inverted, that is, the liquid crystal molecules have different tilt angles in one pixel unit.
  • Use ultraviolet light again (Ultraviolet Rays, UV light) illuminates the polymerizable monomers in the liquid crystal layer 300 to form polymer bumps attached to the surface of the matrix pixel unit and the common electrode, providing liquid crystal molecules in two different directions in one pixel unit. inclination.
  • the display panel can also be a VA type or MVA type display panel.
  • the array substrate 100 and the opposite substrate 200 are paired and filled with the liquid crystal layer 300, and then a voltage is applied to the common electrode and the matrix pixel unit, so that the liquid crystal molecules are processed in the direction of the design, that is, the pixel unit processed into the pattern as shown in FIG.
  • the direction of the slits is inverted, that is, the liquid crystal molecules have different tilt angles in one pixel unit.
  • the utility model has the beneficial effects that the pixel unit, the array substrate and the display panel of the present application each comprise a first main pixel region and a second sub-pixel region electrically connected to the first main pixel region.
  • the first main pixel region includes a first horizontal stem portion, a first vertical stem portion, and a first branch portion; wherein the first horizontal stem portion and the first vertical stem portion intersect perpendicularly, and the first branch portion is from the first horizontal main portion
  • the first vertical trunk extends outwardly and is located within a pixel area defined by the first horizontal trunk and the first vertical trunk.
  • the second sub-pixel region includes a second horizontal stem portion, a second vertical stem portion, and a second branch portion; wherein the second horizontal stem portion and the second vertical stem portion vertically intersect, and the second branch portion is from the second horizontal master
  • the second vertical trunk extends outwardly and is located within a pixel area defined by the second horizontal stem and the second vertical stem.
  • the acute angle formed by the extension line of the first branch portion and the extension line of the first horizontal trunk portion is different from the acute angle formed by the extension line of the second branch portion and the extension line of the second horizontal trunk portion.
  • the present application can make liquid crystal molecules have different tilting angles in one pixel unit, improve the isotropic property of the liquid crystal layer, compensate the liquid crystal viewing angle, and effectively improve the color difference or color shift phenomenon, thereby improving the display panel. Side view display effect.

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Abstract

一种像素单元（A10）、阵列基板及显示面板。像素单元（A10）包括第一主像素区域（A）和与第一主像素区域（A）电性连接的第二子像素区域（B）；第一主像素区域（A）包括第一水平主干部（11）、第一竖直主干部（12）及第一分支部（13）；第二子像素区域（B）包括第二水平主干部（14）、第二竖直主干部（15）及第二分支部（15）；其中，两像素区域内的分支部与水平主干部形成的锐角角度不同。在一个像素单元（A10）内使液晶分子具有不同的倾倒角，从而提升显示面板的侧视显示效果。

Description

一种像素单元、阵列基板及显示面板
【技术领域】
本申请涉及一种液晶显示技术领域，尤其涉及一种像素单元、阵列基板及显示面板。
【背景技术】
随着光电与半导体技术的发展，带动了平面显示器的蓬勃发展，而诸多平面显示器中，液晶显示器由于具有高空间利用效率、低消耗功率、无辐射以及低电磁干扰等优越特性，因而成为市场的主流。目前，市场对于液晶显示器的性能要求是朝向高对比度、快速响应与广视角等特性发展，现有能够达成广视角要求的技术例如包括有多域垂直配向(MVA, Multi-domain Vertica1 Alignment)、多域水平配向(MHA，Multi-domain Horizontal Alignment)、扭转向列加视角扩大膜(TN+film)及横向电场形式(IPS，In-Plane Switching)。
另一方面，尽管采用上述技术的液晶显示器可以达到广视角的目的，但是其存在的色差或色偏(color washout)现象也是为人所垢病，特别是大尺寸的液晶显示面板，这种视觉色差或视觉色偏表现的尤其明显。
【发明内容】
本申请主要解决的技术问题是提供一种像素单元、阵列基板及显示面板，能够改善显示面板的视觉色差或色偏，提升显示面板的侧视显示效果。
为解决上述技术问题，本申请采用的另一个技术方案是：提供一种阵列基板。该阵列基板包括互相垂直交叉的多条扫描线和多条数据线，并由多条扫描线及多条数据线分为多个像素单元，该像素单元包括第一主像素区域和与第一主像素区域电性连接的第二子像素区域；第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，第一水平主干部和第一竖直主干部垂直相交，第一分支部从第一水平主干部、第一竖直主干部向外延伸且位于第一水平主干部和第一竖直主干部所限定的像素区域内；第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，第二水平主干部和第二竖直主干部垂直相交，第二分支部从第二水平主干部、第二竖直主干部向外延伸且位于第二水平主干部和第二竖直主干部所限定的像素区域内；其中，第一分支部的延长线和第一水平主干部延长线形成的锐角角度，与第二分支部的延长线和第二水平主干部延长线形成的锐角角度不同；像素单元进一步包括一薄膜晶体管，薄膜晶体管的栅极连接扫描线，薄膜晶体管的源极连接数据线，薄膜晶体管的漏极连接第一主像素区域和第二子像素区域；第一主像素区域的面积和第二子像素区域的面积之比在3/7至7/3之间。
为解决上述技术问题，本申请采用的一个技术方案是：提供一种像素单元，该像素单元包括第一主像素区域和与第一主像素区域电性连接的第二子像素区域；第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，第一水平主干部和第一竖直主干部垂直相交，第一分支部从第一水平主干部、第一竖直主干部向外延伸且位于第一水平主干部和第一竖直主干部所限定的像素区域内。第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，第二水平主干部和第二竖直主干部垂直相交，第二分支部从第二水平主干部、第二竖直主干部向外延伸且位于第二水平主干部和第二竖直主干部所限定的像素区域内；其中，第一分支部的延长线和第一水平主干部延长线形成的锐角角度，与第二分支部的延长线和第二水平主干部延长线形成的锐角角度不同。
为解决上述技术问题，本申请采用的再一个技术方案是：提供一种显示面板。该显示面板包括上述阵列基板、与阵列基板相对设置的对向基板以及夹持于二者之间的液晶层，阵列基板包括互相垂直交叉的多条扫描线和多条数据线，并由多条扫描线及多条数据线分为多个像素单元，像素单元包括第一主像素区域和与第一主像素区域电性连接的第二子像素区域；第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，第一水平主干部和第一竖直主干部垂直相交，第一分支部从所述第一水平主干部、第一竖直主干部向外延伸且位于第一水平主干部和所述第一竖直主干部所限定的像素区域内；第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，第二水平主干部和第二竖直主干部垂直相交，第二分支部从第二水平主干部、第二竖直主干部向外延伸且位于第二水平主干部和第二竖直主干部所限定的像素区域内；其中，第一分支部的延长线和第一水平主干部延长线形成的锐角角度，与第二分支部的延长线和第二水平主干部延长线形成的锐角角度不同；第一主像素区域和第二子像素区域通过阵列基板中的铟锡氧化物层电性连接。
本申请的有益效果是：区别于现有技术的情况，本申请的像素单元、阵列基板及显示面板均包括第一主像素区域和与第一主像素区域电性连接的第二子像素区域。第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，第一水平主干部和第一竖直主干部垂直相交，第一分支部从第一水平主干部、第一竖直主干部向外延伸且位于第一水平主干部和第一竖直主干部所限定的像素区域内。第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，第二水平主干部和第二竖直主干部垂直相交，第二分支部从第二水平主干部、第二竖直主干部向外延伸且位于第二水平主干部和第二竖直主干部所限定的像素区域内。其中，第一分支部的延长线和第一水平主干部延长线形成的锐角角度，与第二分支部的延长线和第二水平主干部延长线形成的锐角角度不同。通过上述方式，本申请能够在一个像素单元内使液晶分子具有不同的倾倒角，改良了液晶层的各向同性性质，液晶视角得到补偿，可以有效改善色差或色偏现象，从而提升显示面板的侧视显示效果。
【附图说明】
图1是本申请提供的像素单元一实施例的结构示意图；
图2是图1所示像素单元中第一主像素区域和第二子像素区域的放大图；
图3是图1实施例中像素电极与薄膜晶体管连接的一种截面图；
图4是图1实施例中像素电极与薄膜晶体管连接的另一种截面图；
图5是本申请提供的阵列基板一实施例的结构示意图；
图6是本申请提供的显示面板一实施例的结构示意图。
【具体实施方式】
本申请中的术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。此外，术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或部件的过程、方法、系统、产品或设备，没有限定于已列出的步骤或部件，而是可选地还包括没有列出的步骤或部件，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或部件。
在下文中，将参照附图来描述本申请的示例性实施例。为了清楚和简要的目的，不详细描述公知的功能和构造，这是因为所述公知的功能和构造会使本申请在不必要的细节上变模糊。考虑到本申请中的功能而限定的下面描述的术语可以根据用户和操作者的意图或实施而不同。因此，应该在整个说明书的公开的基础上来限定所述术语。
简要的说，本申请涉及一种像素单元、阵列基板及显示面板。将像素单元分成两个相连的像素区，每个像素区采用一个"米"字型结构设计，通过将两像素电极的分支部与水平主干部形成的锐角夹角设置为不同，提升像素的侧视显示效果。
请一并参阅图1和图2，图1是本申请提供的像素结构一实施例的结构示意图，图2是图1所示像素单元中第一主像素区域和第二子像素区域的放大图。
如图1和图2所示，像素单元A10包括第一主像素区域A和与第一主像素区域A电性连接的第二子像素区域B。其中，第一主像素区域A和第二子像素区域B通过阵列基板中的铟锡氧化物（ITO）层17电性连接。
第一主像素区域A包括第一水平主干部11、第一竖直主干部12及第一分支部13；其中，第一水平主干部11和第一竖直主干部12垂直相交，第一分支部13从第一水平主干部11、第一竖直主干部12向外延伸且位于第一水平主干部11和第一竖直主干部12所限定的像素区域内。
可理解的，第一水平主干部11与第一竖直主干部12垂直相交将第一主像素区域A分为四个面积相等的分区，第一分支部13关于第一水平主干部11与第一竖直主干部12相交的交点对称分布，且分区内的第一分支部13相互间隔并与第一水平主干部11形成的锐角角度相等。
第二子像素区域B包括第二水平主干部14、第二竖直主干部15及第二分支部16。其中，第二水平主干部14和第二竖直主干部15垂直相交，第二分支部16从第二水平主干部14、第二竖直主干部15向外延伸且位于第二水平主干部14和第二竖直主干部15所限定的像素区域内。
可理解的，第二水平主干部14与第二竖直主干部15垂直相交将第二主像素区域分为四个面积相等的分区，第二分支部16关于第二水平主干部14与第二竖直主干部15相交的交点对称分布，且分区内的第二分支部16相互间隔并与第二水平主干部14形成的锐角角度相等。
可理解的，第一水平主干部11与第二水平主干部14都呈条状且尺寸大小相同，第一竖直主干部12与第二竖直主干部15都呈条状且尺寸大小可相同或不相同，第一分支部13与第二分支部16也呈条状。
其中，第一分支部13的延长线和第一水平主干部11延长线形成的锐角角度，与第二分支部16的延长线和第二水平主干部14延长线形成的锐角角度不同。
具体的，第一分支部13的延长线与第一水平主干部11的延长线的锐角角度为45度，第二分支部的延长线14与第二水平主干部15的延长线的锐角角度在15度至40度之间或50度至75度之间，包括端点角度也即包括15度、40度、50度、75度，优选30度或60度，此实施例中选60度。
可选地，第一主像素区域A和第二子像素区域B呈矩形设置，且第一主像素区域A的长度、宽度均在2微米至5微米之间，第二子像素区域B的长度、宽度均在2微米至5微米之间。此实施例中，第一主像素区域A和第二子像素区域B的长度均设置为3.5微米，第一主像素区域A和第二子像素区域B的宽度均设置为2.5微米。
可选的，第一主像素区域A与第二子像素区域B的面积比范围为3/7至7/3，面积比范围包括3/7和7/3，面积比优选为4/6。此实施例中，第一主像素区域A与第二子像素区域B的面积比5/5。
可选的，像素单元的第一主像素区域A与第二子像素区域B可以设置成不同色彩或相同色彩的像素，如红像素与绿像素、绿像素与蓝像素、蓝像素与红像素，或者设置单一像素如红像素、绿像素、蓝像素。
像素单元A10进一步包括一薄膜晶体管20，薄膜晶体管20的栅极21连接扫描线40，薄膜晶体管20的源极22连接数据线30，薄膜晶体管20的漏极23连接像素电极10。在本申请中，将第一主像素区域A和第二子像素区域B定义为像素电极10。
其中，像素单元A10的像素电极10材料为铟锡氧化物。
其中，栅极21、源极22及漏极23共同定义出一薄膜晶体管20。
具体的，薄膜晶体管20的漏极23上方设有过孔231，像素电极10通过过孔231与薄膜晶体管20的漏极23电性连接。
需要强调的是，像素电极10仅由一个薄膜晶体管20控制开关。
具体工作过程为：通电后，薄膜晶体管20的栅极21导通电压，电流通过数据线30传至源极22，然后通过沟道层至漏极23，再通过过孔231给像素电极10充电。
当向像素单元A10施加电压时，液晶分子的倒向由像素电极10外侧开始逐渐向像素电极10内侧倾倒，倾倒的角度是沿分支部方向。由于像素电极10的第一主像素区域A与第二子像素区域B的分支部方向不同，使得第一主像素区域A的液晶分子的倾倒角与第二子像素区域B的液晶分子的倾倒角不同，改良了液晶层的各向同性性质，液晶视角得到补偿，可以有效改善色差或色偏现象，提高了液晶的侧视显示效果。同时，相对于一般8分区（domian）的像素电极由3个薄膜晶体管控制，本申请中8分区的像素电极仅由1个薄膜晶体管控制开关，像素本身的开口率相对得到提升，也避开了3个薄膜晶体管控制下第一主像素区域A与第二子像素区域B需平衡电压差异的难点。
参阅图3，图3是图1实施例中像素电极与薄膜晶体管连接的一种截面图。
该像素单元A10包括基板26、设于基板26上的薄膜晶体管20、设于薄膜晶体管20与基板26上的钝化层25a，以及设于钝化层25a上的像素电极10a。其中，薄膜晶体管20仅图示出漏极23。
可选的，基板材料可以设置为透明的玻璃基板或塑料基板, 钝化层材料为氮化硅或氧化硅，像素电极材料为透明的铟锡氧化物。在本实施例中，基板材料选用玻璃基板，钝化层材料选用氮化硅，像素电极材料为透明的铟锡氧化物。
其中，钝化层25a为平面型的钝化层，像素电极10a为厚度均匀的像素电极，像素电极10a均匀覆盖于平面型的钝化层25a上。
具体的，钝化层25a对应的漏极23的上方设有过孔231a，像素电极10a穿过该过孔231a与薄膜晶体管的漏极23电性连接。
具体的，钝化层25a经一道光罩制成过孔231a后，在钝化层上形成一铟锡氧化物层，再经一道光罩制成如图2所示像素电极10图案。
参阅图4，图4是图1实施例中一种像素电极与薄膜晶体管连接的另一种截面图。
该像素单元A10包括基板26、设于基板26上的薄膜晶体管20、设于薄膜晶体管20与基板26上的钝化层25b，以及设于钝化层25b上的像素电极10b。其中，薄膜晶体管20仅图示出漏极23。
其中，钝化层25b为图案化的钝化层，钝化层25b对应多个像素电极10的区域形成有相同的图案，即图2中的像素电极图案。像素电极10b为厚度均匀、连续不间断的整面电极，该整面的像素电极10b覆盖于图案化的钝化层25b上，随着钝化层25b具有相应的图案。
具体的，如图2所示，对于每一个像素单元A10，该图案化的钝化层25b被划分为8个分区。图案化的钝化层25b对应每个像素单元的区域均包括第一主像素区域、第二子像素区域。第一主像素区域和第二子像素区域均包含一水平主干部，还包括与两水平主干相交的竖直主干部，以及关于水平主干部与竖直主干部相交部分对称的分支部，同一分区的分支部相互间隔且与水平主干部呈同一夹角。其中，主区域的分支部和水平主干部形成的锐角夹角，与副区域的分支部和水平主干部形成的锐角夹角不同。
具体的，钝化层25b对应薄膜晶体管20的漏极23的上方设有过孔231b，像素电极10b穿过该过孔231a与薄膜晶体管20的漏极23电性连接。
具体的，过孔231b与沟槽13b（16b）可通过一道灰阶光罩（Gray Tone Mask，GTM）经由黄光制程同时制得。
参阅图5，本申请提供的阵列基板一实施例的结构示意图。
该阵列基板100包括呈阵列排布的多个像素单元A10、多条扫描线（G21、G22、G23、G24...）和条数据线（D21、D22、D23、D24、D25…）。
此实施例中像素单元A10的第一主像素区域A与第二子像素区域B还可以沿横向排列。
其中，像素单元A10中的薄膜晶体管20含有一栅极、一源极、一漏极，分别与扫描线、数据线、像素电极10电性连接。具体的，薄膜晶体管20的漏极上方设有过孔，像素电极10通过过孔与薄膜晶体管20的漏极电性连接。
需要强调的是，一个像素单元10仅由一个薄膜晶体管20控制开关。
扫描线（G21、G22、G23、G24...）与数据线（D21、D22、D23、D24、D25…）垂直交叉设置。扫描线沿列向排列，向像素单元输出扫描信号，一条扫描线只驱动一行像素单元。数据线沿行向排列，一条数据线只驱动一列像素单元。
具体工作原理为：通电后，薄膜晶体管20的栅极导通电压，电流通过数据线传至源极，然后通过沟道层至漏极，再通过过孔给像素电极充电。
当向像素单元A10施加电压时，液晶分子的倒向由像素电极10外侧开始逐渐向像素电极10内侧倾倒，倾倒的角度是沿分支部方向。由于像素单元A10的第一主像素区与第二子像素区的分支部方向不同，使得第一主像素区的液晶分子的倾倒角与第二子像素区的液晶分子的倾倒角不同。
参阅图6，本申请提供的显示面板的一实施例示意图。
该显示面板包括阵列基板100、与阵列基板100相对设置的对向基板200以及夹持于二者之间的液晶层300。其中，阵列基板100上有矩阵式像素单元（未图示），对向基板200上包括有平面型公共电极（未图示）。
例如，该显示面板是一种PSVA型显示面板。
将阵列基板100、对向基板200对组并填充液晶层300，然后对公共电极和矩阵式像素单元施加电压，使液晶分子按照设计的方向，即被处理成如图2所示图案的像素单元狭缝的方向倒伏，即在一个像素单元内使液晶分子具有不同的倾倒角。再使用紫外光（Ultraviolet Rays，UV光）照射，使液晶层300中的可聚合单体反应形成附着于矩阵式像素单元与公共电极表面的聚合物凸起，为液晶分子在一个像素单元内提供两种不同方向的预倾角。
该显示面板还可以是一种VA型或MVA型显示面板。
将阵列基板100、对向基板200对组并填充液晶层300，然后对公共电极和矩阵式像素单元施加电压，使液晶分子按照设计的方向，即被处理成如图1所示图案的像素单元狭缝的方向倒伏，即在一个像素单元内使液晶分子具有不同的倾倒角。
本申请的有益效果是：区别于现有技术的情况，本申请的像素单元、阵列基板及显示面板均包括第一主像素区域和与第一主像素区域电性连接的第二子像素区域。第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，第一水平主干部和第一竖直主干部垂直相交，第一分支部从第一水平主干部、第一竖直主干部向外延伸且位于第一水平主干部和第一竖直主干部所限定的像素区域内。第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，第二水平主干部和第二竖直主干部垂直相交，第二分支部从第二水平主干部、第二竖直主干部向外延伸且位于第二水平主干部和第二竖直主干部所限定的像素区域内。其中，第一分支部的延长线和第一水平主干部延长线形成的锐角角度，与第二分支部的延长线和第二水平主干部延长线形成的锐角角度不同。通过上述方式，本申请能够在一个像素单元内使液晶分子具有不同的倾倒角，改良了液晶层的各向同性性质，液晶视角得到补偿，可以有效改善色差或色偏现象，从而提升显示面板的侧视显示效果。
以上所述仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (20)

  1. 一种阵列基板，其中，所述阵列基板包括互相垂直交叉的多条扫描线和多条数据线，并由多条扫描线及多条数据线分为多个像素单元，所述像素单元包括第一主像素区域和与所述第一主像素区域电性连接的第二子像素区域；
    所述第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，所述第一水平主干部和所述第一竖直主干部垂直相交，所述第一分支部从所述第一水平主干部、所述第一竖直主干部向外延伸且位于所述第一水平主干部和所述第一竖直主干部所限定的像素区域内；
    所述第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，所述第二水平主干部和所述第二竖直主干部垂直相交，所述第二分支部从所述第二水平主干部、所述第二竖直主干部向外延伸且位于所述第二水平主干部和所述第二竖直主干部所限定的像素区域内；
    其中，所述第一分支部的延长线和所述第一水平主干部延长线形成的锐角角度，与所述第二分支部的延长线和所述第二水平主干部延长线形成的锐角角度不同；
    所述像素单元进一步包括一薄膜晶体管，所述薄膜晶体管的栅极连接扫描线，所述薄膜晶体管的源极连接数据线，所述薄膜晶体管的漏极连接所述第一主像素区域和所述第二子像素区域；
    所述第一主像素区域的面积和所述第二子像素区域的面积之比在3/7至7/3之间。
  2. 根据权利要求1所述的阵列基板，其中，所述第一分支部的延长线与所述第一水平主干部的延长线的锐角角度为45度。
  3. 根据权利要求2所述的阵列基板，其中，所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度在15度至40度之间或50度至75度之间，且包括该角度范围的两端。
  4. 根据权利要求3所述的阵列基板，其中，所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度为30度或60度。
  5. 根据权利要求1所述的阵列基板，其中，所述第一主像素区域和所述第二子像素区域呈矩形设置，所述第一主像素区域的长度、宽度均在2微米至5微米之间，所述第二子像素区域的长度、宽度均在2微米至5微米之间。
  6. 根据权利要求1所述的阵列基板，其中，所述第一主像素区域和所述第二子像素区域通过阵列基板中的铟锡氧化物层电性连接。
  7. 一种像素单元，其中，所述像素单元包括第一主像素区域和与所述第一主像素区域电性连接的第二子像素区域；
    所述第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，所述第一水平主干部和所述第一竖直主干部垂直相交，所述第一分支部从所述第一水平主干部、所述第一竖直主干部向外延伸且位于所述第一水平主干部和所述第一竖直主干部所限定的像素区域内；
    所述第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，所述第二水平主干部和所述第二竖直主干部垂直相交，所述第二分支部从所述第二水平主干部、所述第二竖直主干部向外延伸且位于所述第二水平主干部和所述第二竖直主干部所限定的像素区域内；
    其中，所述第一分支部的延长线和所述第一水平主干部延长线形成的锐角角度，与所述第二分支部的延长线和所述第二水平主干部延长线形成的锐角角度不同。
  8. 根据权利要求7所述的像素单元，其中，所述像素单元进一步包括一薄膜晶体管，所述薄膜晶体管的栅极连接扫描线，所述薄膜晶体管的源极连接数据线，所述薄膜晶体管的漏极连接所述第一主像素区域和所述第二子像素区域。
  9. 根据权利要求7所述的像素单元，其中，所述第一主像素区域的面积和所述第二子像素区域的面积之比在3/7至7/3之间。
  10. 根据权利要求7所述的像素单元，其中，所述第一分支部的延长线与所述第一水平主干部的延长线的锐角角度为45度。
  11. 根据权利要求10所述的像素单元，其中，所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度在15度至40度之间或50度至75度之间，且包括该角度范围的两端。
  12. 根据权利要求11所述的像素单元，其中，所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度为30度或60度。
  13. 根据权利要求7所述的像素单元，其中，所述第一主像素区域和所述第二子像素区域呈矩形设置，所述第一主像素区域的长度、宽度均在2微米至5微米之间，所述第二子像素区域的长度、宽度均在2微米至5微米之间。
  14. 根据权利要求7所述的像素单元，其中，所述第一主像素区域和所述第二子像素区域通过阵列基板中的铟锡氧化物层电性连接。
  15. 一种显示面板，其中，所述显示面板包括阵列基板、与所述阵列基板相对设置的对向基板以及夹持于二者之间的液晶层；
    所述阵列基板包括互相垂直交叉的多条扫描线和多条数据线，并由多条扫描线及多条数据线分为多个像素单元,所述像素单元包括第一主像素区域和与所述第一主像素区域电性连接的第二子像素区域；
    所述第一主像素区域包括第一水平主干部、第一竖直主干部及第一分支部；其中，所述第一水平主干部和所述第一竖直主干部垂直相交，所述第一分支部从所述第一水平主干部、所述第一竖直主干部向外延伸且位于所述第一水平主干部和所述第一竖直主干部所限定的像素区域内；
    所述第二子像素区域包括第二水平主干部、第二竖直主干部及第二分支部；其中，所述第二水平主干部和所述第二竖直主干部垂直相交，所述第二分支部从所述第二水平主干部、所述第二竖直主干部向外延伸且位于所述第二水平主干部和所述第二竖直主干部所限定的像素区域内；
    其中，所述第一分支部的延长线和所述第一水平主干部延长线形成的锐角角度，与所述第二分支部的延长线和所述第二水平主干部延长线形成的锐角角度不同；
    所述第一主像素区域和所述第二子像素区域通过阵列基板中的铟锡氧化物层电性连接。
  16. 根据权利要求15所述的显示面板，其中，所述像素单元进一步包括一薄膜晶体管，所述薄膜晶体管的栅极连接扫描线，所述薄膜晶体管的源极连接数据线，所述薄膜晶体管的漏极连接所述第一主像素区域和所述第二子像素区域。
  17. 根据权利要求15所述的显示面板，其中，所述第一主像素区域的面积和所述第二子像素区域的面积之比在3/7至7/3之间。
  18. 根据权利要求15所述的显示面板，其中，所述第一分支部的延长线与所述第一水平主干部的延长线的锐角角度为45度。
    所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度在15度至40度之间或50度至75度之间，且包括该角度范围的两端。
  19. 根据权利要求18所述的显示面板，其中，所述第二分支部的延长线与所述第二水平主干部的延长线的锐角角度为30度或60度。
  20. 根据权利要求15所述的显示面板，其中，所述第一主像素区域和所述第二子像素区域呈矩形设置，所述第一主像素区域的长度、宽度均在2微米至5微米之间，所述第二子像素区域的长度、宽度均在2微米至5微米之间。
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