WO2017173714A1 - 触控显示基板及其制作方法 - Google Patents

触控显示基板及其制作方法 Download PDF

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Publication number
WO2017173714A1
WO2017173714A1 PCT/CN2016/082961 CN2016082961W WO2017173714A1 WO 2017173714 A1 WO2017173714 A1 WO 2017173714A1 CN 2016082961 W CN2016082961 W CN 2016082961W WO 2017173714 A1 WO2017173714 A1 WO 2017173714A1
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Prior art keywords
layer
photoresist layer
insulating layer
thickness
region
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English (en)
French (fr)
Inventor
史大为
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to US15/513,967 priority Critical patent/US10192906B2/en
Publication of WO2017173714A1 publication Critical patent/WO2017173714A1/zh
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0231Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present invention relates to the field of touch display technologies, and in particular, to a touch display substrate and a method for fabricating the same.
  • the Touch Screen Panel With the rapid development of display technology, the Touch Screen Panel has gradually spread throughout people's lives.
  • the touch screen can be divided into an add on mode touch panel, an on cell touch panel, and an in cell touch panel according to the composition structure.
  • the in-cell touch panel embeds the touch electrode of the touch screen in the interior of the liquid crystal display, which can reduce the thickness of the module as a whole, and can greatly reduce the manufacturing cost of the touch screen, and is favored by the major panel manufacturers.
  • In-Cell touch solutions usually include self-contained and mutual-capacity methods.
  • the self-capacitance mode is specifically: dividing a metal layer serving as a common electrode on the liquid crystal display panel into a plurality of squares (ie, electrode blocks) as a touch sensor unit.
  • the touch sensor is connected to the driver IC through a specific touch signal lead.
  • the touch sensor capacitance value at the corresponding position or the voltage value of the divided common electrode fluctuates.
  • the driving IC can determine the position of the touch point by testing the fluctuation of the capacitance value, thereby implementing the touch function.
  • touch signal leads in self-contained touch products.
  • a third insulating layer 03 is formed, and the touch signal leads 04 are formed by a patterning process.
  • An insulating layer 12 is then deposited.
  • the touch signal lead 04 and the common electrode 02 are bridged by the tapping 14 by punching, so that the touch signal lead 04 functions as an electrode block lead.
  • via a is deeper than via b and requires a longer etch time. Therefore, if the etching of the two via holes is completed at one time, the shallow vias b on the touch signal leads 04 are easily over-etched, resulting in damage of the touch signal metal wiring layer.
  • a thinner insulating layer needs to be formed between the pixel electrode and the common electrode, while a certain thickness of the insulating layer remains on the touch signal metal lead. In this way, on the one hand, it can be ensured that the insulating layer better covers the touch signal metal leads, thereby reducing the risk of over-engraving. On the other hand, the storage capacitor is increased to ensure a good display effect.
  • the dry etching of a large-area insulating layer outside the metal lead region of the touch signal to reduce the thickness thereof is difficult to implement, and it is difficult to etch clean and the uniformity is poor. Therefore, it is impossible to form a small-sized insulating layer residue by normal deposition, exposure, or dry etching.
  • an embodiment of the present invention provides a method for fabricating a touch display substrate, including the following steps:
  • first insulating layer over the photoresist layer, the first insulating layer including a first region and a second region, wherein the first region is above the first thickness photoresist layer, and the second region is located at a second thickness of the photoresist layer and the photoresist layer upper region, the first region of the first insulating layer is disconnected from the second region;
  • a second insulating layer is deposited.
  • the thickness of the first thickness photoresist layer is greater than the thickness of the second thickness photoresist layer.
  • the photoresist layer includes a positive photoresist, and forming a first thickness photoresist layer, a second thickness photoresist layer, and a photoresist layer opening region by a patterning process includes: including a mask layer of the light-shielding region, the completely light-transmitting region and a portion of the light-transmitting region is exposed and developed to the deposited photoresist layer; and a first thickness photoresist layer, a second thickness photoresist layer and light are formed by etching In the open area of the adhesive layer, the first thickness photoresist layer corresponds to the light shielding area of the mask, the second thickness photoresist layer corresponds to the partial light transmission area of the mask, and the photoresist layer opening area corresponds to the mask The completely transparent area of the board.
  • the mask is a halftone mask.
  • the thickness of the first insulating layer is greater than the thickness of the second insulating layer, And the second insulating layer is equal in thickness to the touch signal lead.
  • the touch signal leads are made of a metal material, and the materials of the first insulating layer and the second insulating layer are both silicon nitride.
  • the above method further includes the following steps before the step of forming a touch signal lead over the substrate substrate by a patterning process:
  • the thin film transistor device layer including a gate metal layer and a source and drain metal layer, the gate metal layer including a gate electrode and a plurality of gate lines, the source
  • the drain metal layer includes a source, a drain, and a plurality of source lines;
  • a third insulating layer is formed on the common electrode and the thin film transistor device layer.
  • the above method further includes the following steps after the step of depositing the second insulating layer:
  • first via hole Forming a first via hole over the common electrode by etching, the first via hole penetrating the second insulating layer and the third insulating layer and exposing at least a portion of the common electrode, and etching the touch signal Forming a second via hole over the lead, the second via hole penetrating through the first insulating layer and the second insulating layer and exposing at least a portion of the touch signal lead;
  • a patch cord is formed by a patterning process, the patch cord being electrically connected to the common electrode through the first via and electrically connected to the touch signal lead through the second via.
  • an embodiment of the present invention further provides a touch display substrate, which is fabricated by the foregoing method.
  • the touch display substrate may be an array substrate of a touch display device.
  • FIG. 1 is a cross-sectional view of an array substrate of a touch display device fabricated in the prior art
  • FIGS. 2a-2g are schematic cross-sectional views showing respective steps of a method of fabricating a touch display substrate according to an embodiment of the present invention
  • FIG. 3 is a cross-sectional view of a touch display substrate according to an embodiment of the invention.
  • a base substrate is provided.
  • a thin film transistor device layer is formed on the base substrate, the thin film transistor device layer including a gate metal layer and a source and drain metal layer.
  • the gate metal layer includes a gate electrode and a plurality of gate lines.
  • the source and drain metal layers include a source, a drain, and a plurality of source lines.
  • the base substrate on which the aforementioned thin film transistor element layer is formed is generally indicated by reference numeral 01.
  • a common electrode layer is formed on the thin film transistor device layer.
  • the common electrode layer is patterned to form a plurality of mutually independent common electrodes 02.
  • a third insulating layer 03 is formed on the common electrode and the thin film transistor device layer. The upper surface of the third insulating layer 03 is flat. The appearance after completing this step is shown in Figure 2a.
  • a touch signal lead is formed over the base substrate by a patterning process.
  • a layer of touch signal lead metal can be prepared on a substrate using a magnetron sputtering method.
  • the material of the touch signal lead metal layer is usually a metal such as molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, and a combination of the above materials may also be used.
  • the touch signal leads 04 are formed on a predetermined area by a process such as exposure development. The finished shape is shown in Figure 2b.
  • a photoresist layer is deposited, and a first thickness photoresist layer, a second thickness photoresist layer and a photoresist layer opening region are formed by a patterning process, and the touch signal leads are located in the opening region of the photoresist layer. More specifically, as shown in FIG. 2c, a photoresist layer 05 is deposited.
  • the photoresist layer 05 includes, for example, a positive photoresist.
  • the photoresist layer is subjected to exposure development using, for example, a halftone mask.
  • the halftone mask includes a light shielding region 07, a completely light transmitting region 08, and a partial light transmitting region 09 formed on the mask substrate 06.
  • a first thickness photoresist layer 051, a second thickness photoresist layer 052, and a photoresist layer opening region are then formed by etching.
  • the first thickness photoresist layer 051 corresponds to the light shielding region 07 of the mask
  • the second thickness photoresist layer 052 Corresponding to the partially transparent region 09 of the mask, the photoresist layer opening region corresponds to the completely transparent region 08 of the mask.
  • the touch signal lead 04 is located in the opening region of the photoresist layer.
  • a first insulating layer 10 is deposited over the photoresist layer by, for example, chemical vapor deposition.
  • the material of the first insulating layer is usually silicon nitride, and silicon oxide, silicon oxynitride or the like can also be used. Since the height difference between the first thickness photoresist layer 051 and the second thickness photoresist layer 052 formed after the previous step process is greater than the thickness of the first insulating layer 10, the insulating layer is naturally after the first insulating layer 10 is deposited. Divided into two regions due to the step. The first region is located above the first thickness photoresist layer 051, and the second region is located above the second thickness photoresist layer 052 and the photoresist layer opening region. The first region of the first insulating layer 10 is disconnected from the second region, thereby exposing a portion of the photoresist layer to facilitate subsequent entry of the stripping liquid in the stripping process.
  • the finished shape is shown in Figure 2e.
  • the photoresist layer is removed by, for example, a lift-off process.
  • the first insulating layer 10 deposited thereon is also removed, thereby retaining only the first insulating layer 10 over the touch signal leads 04 and forming a vertical topography on its sidewalls, as shown in Figure 2f.
  • the stripping solution used in the ground stripping process may be acetone, isopropanol, alcohol or a mixture thereof.
  • a second insulating layer 11 is deposited.
  • the thickness of the second insulating layer 11 is, for example, smaller than the thickness of the first insulating layer.
  • the thickness of the second insulating layer 11 and the touch signal lead 04 may be equal.
  • the total thickness of the insulating layer above the touch signal lead 04 is the sum of the thicknesses of the first insulating layer 10 and the second insulating layer 11, and the thickness of the remaining insulating layer is only the thickness of the second insulating layer 11.
  • the status after completing this step is shown in Figure 2g.
  • the foregoing process flow may further include the following steps.
  • a first via a is formed over the common electrode 02 by etching, the first via a penetrating the second insulating layer 11 and the third insulating layer 03 and exposing at least a portion of the common electrode 02.
  • a second via b is formed over the touch signal leads 04 by etching, the second vias penetrating through the first insulating layer 10 and the second insulating layer 11 and exposing at least a portion of the touch signal leads 04.
  • a pixel electrode 13 is formed on the second insulating layer 11, and the orthographic projection of the pixel electrode 13 on the substrate substrate at least partially overlaps with the orthographic projection of the common electrode 02 on the substrate.
  • the patch cord 14 is formed by a patterning process, and the patch cord 14 is electrically connected to the common electrode 02 through the first via hole a and electrically connected to the touch signal lead 04 through the second via hole b.
  • the structure after the completion of the manufacturing process of the entire touch display substrate is as shown in FIG. It can be seen that the manufacturing method of the embodiment of the present invention is between the pixel electrode 13 and the common electrode 02.
  • a thinner insulating layer is formed than in the prior art.
  • the capacitance is inversely proportional to the thickness of the dielectric layer.
  • a thinner insulating layer means that a larger storage capacitor can be realized, which is enough to maintain the voltage during the display phase to ensure the normal display of the picture.
  • a thicker insulating layer remains above the touch signal leads 04, thereby well covering the touch signal leads 04.
  • the vias a and the vias b have similar depths, equalizing the etching time, reducing the risk of over-cutting, and avoiding the damage of the touch signal leads 04.
  • the embodiment of the present invention further provides a touch display substrate, which is fabricated by the method described in the foregoing embodiment.
  • a touch display substrate which is fabricated by the method described in the foregoing embodiment.
  • the touch display substrate can be, for example, an array substrate of a touch display device.
  • the touch display substrate provided by the embodiment of the invention and the manufacturing method thereof can thin the insulation layer of the remaining position while ensuring a certain thickness of the insulating layer of the small size on the touch signal lead. Therefore, on the one hand, the time of the via etching is equalized, and the risk of over-cutting is reduced, thereby avoiding the damage of the touch signal leads. On the other hand, the storage capacitor is increased to ensure a good display effect.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Position Input By Displaying (AREA)

Abstract

一种触控显示基板及其制作方法。触控显示基板的制作方法包括以下步骤:通过构图工艺在衬底基板(01)的上方形成触摸信号引线(04);沉积光刻胶层(05),并通过构图工艺形成第一厚度光刻胶层(051)、第二厚度光刻胶层(052)及光刻胶层开口区域,触摸信号引线(04)位于光刻胶层开口区域中;在光刻胶层(05)上方沉积第一绝缘层(10),第一绝缘层(10)包括第一区域与第二区域,第一区域位于第一厚度光刻胶层(051)上方,第二区域位于第二厚度光刻胶层(052)及光刻胶层开口区域上方,第一绝缘层(10)的第一区域与第二区域断开;去除光刻胶层(05)以及位于光刻胶层(05)之上的第一绝缘层(10);沉积第二绝缘层(11)。通过该方法,避免了触摸信号引线的损伤并增大了存储电容以实现良好的显示效果。

Description

触控显示基板及其制作方法 技术领域
本发明涉及触控显示技术领域,尤其涉及一种触控显示基板及其制作方法。
背景技术
随着显示技术的飞速发展,触摸屏(Touch Screen Panel)已经逐渐遍及人们的生活中。目前,触摸屏按照组成结构可以分为外挂式触摸屏(Add on Mode Touch Panel)、覆盖表面式触摸屏(On Cell Touch Panel)、以及内嵌式触摸屏(In Cell Touch Panel)。其中内嵌式触摸屏将触摸屏的触控电极内嵌在液晶显示屏内部,即可以减薄模组整体的厚度,又可以大大降低触摸屏的制作成本,受到各大面板厂家青睐。In-Cell触控方案通常包括自容方式和互容方式。
对于高级超维场转换模式的液晶显示面板,自容方式具体为:将液晶显示面板上用作公共电极的金属层分割成若干方块(即电极块)作为触控传感器单元。触控传感器通过特定的触摸信号引线与驱动IC连接。当手指触碰液晶显示面板时即会引起相应位置处触控传感器电容值或者分割的公共电极的电压值的波动。驱动IC通过测试电容值的波动能够确定触碰点的位置,从而实现触控功能。
目前自容方式触控产品中触摸信号引线的设计方案有很多。如图1所示,将公共电极02分割成块后,形成第三绝缘层03,再通过构图工艺形成触摸信号引线04。之后再沉积一层绝缘层12。最后通过打孔利用转接线14桥连触摸信号引线04和公共电极02,使得触摸信号引线04发挥电极块引线作用。通常情况下,过孔a相比于过孔b深度更深,需要的刻蚀时间更长。因此,若要一次性完成两个过孔的刻蚀,则触摸信号引线04上的较浅过孔b很容易发生过刻,导致触摸信号金属引线层的损伤。
为了达到更好的刻蚀效果,需要在像素电极和公共电极之间形成较薄绝缘层,同时触摸信号金属引线上保留一定厚度的绝缘层。这样,一方面可以保证绝缘层较好覆盖触摸信号金属引线,减少过刻风险。另一方面,增大了存储电容,保证了良好的显示效果。然而,若采用 干法刻蚀位于触摸信号金属引线区域以外的大面积的绝缘层以减少其厚度,工艺实现难度较大,很难刻蚀干净且均一性差。因此,无法经过正常沉积、曝光、干法刻蚀形成小尺寸的绝缘层残留。
发明内容
因此,所期望的是提供一种触控显示基板及其制作方法,使得在触摸信号金属引线上保证一定绝缘层厚度的同时,对于其余位置的绝缘层进行薄化处理。由此,能够有效增大存储电容,并均衡过孔刻蚀的时间。
根据一个方面,本发明实施例提供了一种触控显示基板的制作方法,包括下列步骤:
通过构图工艺在衬底基板的上方形成触摸信号引线;
沉积光刻胶层,并通过构图工艺形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域,所述触摸信号引线位于所述光刻胶层开口区域中;
在所述光刻胶层上方沉积第一绝缘层,所述第一绝缘层包括第一区域与第二区域,其中第一区域位于所述第一厚度光刻胶层上方,第二区域位于第二厚度光刻胶层及光刻胶层开口区域上方,所述第一绝缘层的第一区域与第二区域断开;
去除光刻胶层以及位于光刻胶层之上的第一绝缘层;以及
沉积第二绝缘层。
在一些示例中,所述第一厚度光刻胶层的厚度大于第二厚度光刻胶层的厚度。
在一些示例中,所述光刻胶层包括正性光刻胶,并且,通过构图工艺形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域包括:采用包括遮光区、完全透光区和部分透光区的掩膜板对沉积的光刻胶层进行曝光显影;以及,通过刻蚀形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域,第一厚度光刻胶层对应于掩膜板的遮光区,第二厚度光刻胶层对应于掩膜板的部分透光区,光刻胶层开口区域对应于掩膜板的完全透光区。
在一些示例中,所述掩膜板为半色调掩膜板。
在一些示例中,所述第一绝缘层的厚度大于第二绝缘层的厚度, 且所述第二绝缘层与触摸信号引线厚度相等。
在一些示例中,所述触摸信号引线为金属材质,所述第一绝缘层与第二绝缘层的材料均为氮化硅。
在一些示例中,上述方法在通过构图工艺在衬底基板的上方形成触摸信号引线的步骤之前还包括如下步骤:
提供衬底基板;
在所述衬底基板上形成薄膜晶体管元件层,所述薄膜晶体管元件层包括栅极金属层和源漏极金属层,所述栅极金属层包括栅电极和多条栅极线,所述源漏极金属层包括源极、漏极和多条源极线;
在所述薄膜晶体管元件层上形成公共电极层,图案化所述公共电极层以形成多个相互独立的公共电极;以及
在所述公共电极和所述薄膜晶体管元件层上形成第三绝缘层。
在一些示例中,上述方法在沉积第二绝缘层的步骤之后还包括如下步骤:
通过刻蚀在所述公共电极上方形成第一过孔,所述第一过孔贯穿第二绝缘层和第三绝缘层且暴露至少部分所述公共电极,并且,通过刻蚀在所述触摸信号引线上方形成第二过孔,所述第二过孔贯穿第一绝缘层和第二绝缘层且暴露至少部分所述触摸信号引线;
在所述第二绝缘层上形成像素电极,所述像素电极在所述衬底基板上的正投影与所述公共电极在所述衬底基板上的正投影至少部分重叠;以及
通过构图工艺形成转接线,所述转接线通过第一过孔与公共电极电连接,并且通过第二过孔与触摸信号引线电连接。
根据另一个方面,本发明实施例还提供了一种触控显示基板,所述触摸显示基板采用前述方法制成。
在一些示例中,上述触控显示基板可以是触摸显示装置的阵列基板。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例的附图作简单介绍。显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例,而非对本发明的限制。
图1为先前工艺制作的触控显示装置的阵列基板的截面图;
图2a-2g为本发明实施例提供的触控显示基板的制作方法的各步骤的示意性截面图;
图3为本发明实施例提供的触控显示基板的截面图。
具体实施方式
下面结合附图,对本发明实施例提供的触控显示基板及其制作方法的具体实施方式进行详细地说明。附图中各层薄膜厚度和形状不反映真实比例,目的只是示意说明本发明内容。
首先,提供衬底基板。在衬底基板上形成薄膜晶体管元件层,该薄膜晶体管元件层包括栅极金属层和源漏极金属层。栅极金属层包括栅电极和多条栅极线。源漏极金属层包括源极、漏极和多条源极线。在附图中,仅用附图标记01来概括表示其上形成有前述薄膜晶体管元件层的衬底基板。
在薄膜晶体管元件层上形成公共电极层。图案化公共电极层以形成多个相互独立的公共电极02。在公共电极和薄膜晶体管元件层上形成第三绝缘层03。第三绝缘层03的上表面平坦。完成这一步骤后的形貌如图2a所示。
然后,通过构图工艺在衬底基板的上方形成触摸信号引线。例如,可以使用磁控溅射方法,在衬底基板上制备一层触摸信号引线金属层。该触摸信号引线金属层的材料通常采用钼、铝、铝镍合金、钼钨合金、铬、或铜等金属,也可以使用上述几种材料的组合。之后,通过例如曝光显影等工艺在预定区域上形成触摸信号引线04。完成后的形貌如图2b所示。
然后,沉积光刻胶层,并通过构图工艺形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域,触摸信号引线位于光刻胶层开口区域中。更具体而言,如图2c所示,沉积光刻胶层05。光刻胶层05例如包括正性光刻胶。之后,如图2d所示,采用例如半色调掩膜板对光刻胶层进行曝光显影。该半色调掩膜板包括形成在掩膜基板06上的遮光区07、完全透光区08和部分透光区09。然后通过刻蚀形成第一厚度光刻胶层051、第二厚度光刻胶层052及光刻胶层开口区域。第一厚度光刻胶层051对应于掩膜板的遮光区07,第二厚度光刻胶层052 对应于掩膜板的部分透光区09,光刻胶层开口区域对应于掩膜板的完全透光区08。触摸信号引线04位于光刻胶层开口区域中。
之后,利用例如化学汽相沉积的方法在光刻胶层上方沉积第一绝缘层10。第一绝缘层的材料通常是氮化硅,也可以使用氧化硅和氮氧化硅等。由于经过上一步工艺后形成的第一厚度光刻胶层051与第二厚度光刻胶层052的高度差大于第一绝缘层10的厚度,所以沉积第一绝缘层10后该绝缘层自然地因段差而分为两个区域。第一区域位于第一厚度光刻胶层051上方,第二区域位于第二厚度光刻胶层052及光刻胶层开口区域上方。第一绝缘层10的第一区域与第二区域断开,从而暴露出部分光刻胶层以方便后续在剥离工艺中剥离液的进入。完成后的形貌如图2e所示。
接下来,通过例如离地剥离工艺去除光刻胶层。沉积在其上的第一绝缘层10也随之被去除,从而只保留触摸信号引线04上方的第一绝缘层10,并在其侧壁形成垂直形貌,如图2f所示。离地剥离工艺中采用的剥离液可为丙酮、异丙醇、酒精或者它们的混合液。
然后,沉积第二绝缘层11。第二绝缘层11的厚度例如小于第一绝缘层的厚度。第二绝缘层11与触摸信号引线04厚度可以相等。此时触摸信号引线04上方的绝缘层总厚度为第一绝缘层10与第二绝缘层11的厚度之和,其余部分的绝缘层厚度仅为第二绝缘层11的厚度。完成此步骤后的状态如图2g所示。
如图3所示,在实际应用中,上述工艺流程之后还可以包括如下步骤。
通过刻蚀在公共电极02上方形成第一过孔a,第一过孔a贯穿第二绝缘层11和第三绝缘层03且暴露至少部分公共电极02。并且,通过刻蚀在触摸信号引线04上方形成第二过孔b,第二过孔b贯穿第一绝缘层10和第二绝缘层11且暴露至少部分触摸信号引线04。
在第二绝缘层11上形成像素电极13,像素电极13在衬底基板上的正投影与公共电极02在衬底基板上的正投影至少部分重叠。
通过构图工艺形成转接线14,转接线14通过第一过孔a与公共电极02电连接并且通过第二过孔b与触摸信号引线04电连接。
整个触摸显示基板的制作工艺完成后的结构例如如图3所示。可见,通过本发明实施例的制作方法在像素电极13和公共电极02之间 形成了较现有工艺更薄的绝缘层。根据电容的基本公式,电容与介电层的厚度成反比。更薄的绝缘层意味着可以实现更大的存储电容,从而足够维持显示阶段的电压,以保证画面的正常显示。与此同时,触摸信号引线04上方保留了较厚的绝缘层,从而很好地覆盖了触摸信号引线04。过孔a和过孔b深度相近,均衡了刻蚀时间,减少了过刻风险,避免了触摸信号引线04的损伤。
基于同一发明构思,本发明实施例还提供了一种触控显示基板,该触控显示基板采用前述实施例所述方法制成。该触控显示基板的具体结构可以参见上述制作方法的实施例,重复之处不再赘述。触控显示基板例如可以为触控显示装置的阵列基板。
本发明实施例提供的触控显示基板及其制作方法,能够在使触摸信号引线上小尺寸的绝缘层保证一定厚度的同时,对其余位置的绝缘层进行薄化处理。因此,一方面均衡了过孔刻蚀的时间,减少了过刻风险,从而避免了触摸信号引线的损伤。另一方面增大了存储电容,保证了良好的显示效果。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。

Claims (13)

  1. 一种触控显示基板的制作方法,包括以下步骤:
    通过构图工艺在衬底基板的上方形成触摸信号引线;
    沉积光刻胶层,并通过构图工艺形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域,所述触摸信号引线位于所述光刻胶层开口区域中;
    在所述光刻胶层上方沉积第一绝缘层,所述第一绝缘层包括第一区域与第二区域,其中第一区域位于所述第一厚度光刻胶层上方,第二区域位于第二厚度光刻胶层及光刻胶层开口区域上方,所述第一绝缘层的第一区域与第二区域断开;
    去除光刻胶层以及位于光刻胶层之上的第一绝缘层;以及
    沉积第二绝缘层。
  2. 如权利要求1所述的触控显示基板的制作方法,其中,所述第一厚度光刻胶层的厚度大于所述第二厚度光刻胶层的厚度。
  3. 如权利要求2所述的触控显示基板的制作方法,其中,所述光刻胶层包括正性光刻胶,并且,通过构图工艺形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域包括:
    采用包括遮光区、完全透光区和部分透光区的掩膜板对沉积的光刻胶层进行曝光显影;以及
    通过刻蚀形成第一厚度光刻胶层、第二厚度光刻胶层及光刻胶层开口区域,所述第一厚度光刻胶层对应于所述掩膜板的遮光区,所述第二厚度光刻胶层对应于所述掩膜板的部分透光区,所述光刻胶层开口区域对应于所述掩膜板的完全透光区。
  4. 如权利要求3所述的触控显示基板的制作方法,其中,所述掩膜板为半色调掩膜板。
  5. 如权利要求1至4中任一项所述的触控显示基板的制作方法,其中,所述第一绝缘层的厚度大于所述第二绝缘层的厚度。
  6. 如权利要求1至4中任一项所述的触控显示基板的制作方法,其中,所述第二绝缘层与所述触摸信号引线厚度相等。
  7. 如权利要求1至4中任一项所述的触控显示基板的制作方法,其中所述触摸信号引线为金属材质。
  8. 如权利要求1至4中任一项所述的触控显示基板的制作方法,其中,所述第一绝缘层与所述第二绝缘层的材料均为氮化硅。
  9. 如权利要求1所述的触控显示基板的制作方法,其中,所述方法在通过构图工艺在衬底基板的上方形成触摸信号引线的步骤之前还包括如下步骤:
    提供衬底基板;
    在所述衬底基板上形成薄膜晶体管元件层,所述薄膜晶体管元件层包括栅极金属层和源漏极金属层,所述栅极金属层包括栅电极和多条栅极线,所述源漏极金属层包括源极、漏极和多条源极线;
    在所述薄膜晶体管元件层上形成公共电极层,图案化所述公共电极层以形成多个相互独立的公共电极;以及
    在所述公共电极和所述薄膜晶体管元件层上形成第三绝缘层。
  10. 如权利要求9所述的触控显示基板的制作方法,其中,所述方法在沉积第二绝缘层的步骤之后还包括如下步骤:
    通过刻蚀在所述公共电极上方形成第一过孔,所述第一过孔贯穿第二绝缘层和第三绝缘层且暴露至少部分所述公共电极,并且,通过刻蚀在所述触摸信号引线上方形成第二过孔,所述第二过孔贯穿第一绝缘层和第二绝缘层且暴露至少部分所述触摸信号引线;
    在所述第二绝缘层上形成像素电极,所述像素电极在所述衬底基板上的正投影与所述公共电极在所述衬底基板上的正投影至少部分重叠;以及
    通过构图工艺形成转接线,所述转接线通过第一过孔与所述公共电极电连接并且通过第二过孔与所述触摸信号引线电连接。
  11. 如权利要求1所述的触控显示基板的制作方法,其中,通过离地剥离工艺去除光刻胶层以及位于光刻胶层之上的第一绝缘层。
  12. 一种触控显示基板,所述触控显示基板采用根据权利要求1至11中任一项所述的方法制成。
  13. 如权利要求12所述的触控显示基板,其中,所述触控显示基板为触控显示装置的阵列基板。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106292040B (zh) 2016-10-26 2020-01-03 武汉华星光电技术有限公司 阵列基板及其制造方法、液晶面板及液晶显示屏
CN106855669A (zh) * 2017-02-28 2017-06-16 厦门天马微电子有限公司 阵列基板及其制造方法、显示面板以及显示装置
CN108062183B (zh) * 2018-01-03 2021-11-05 京东方科技集团股份有限公司 触控基板及其制备方法、触控面板
CN108321088B (zh) * 2018-02-05 2020-06-16 京东方科技集团股份有限公司 触控基板的制造方法、触控基板及显示装置
CN110471551B (zh) * 2018-05-09 2023-05-12 瀚宇彩晶股份有限公司 触控显示器以及触控显示器的制作方法
CN109932847A (zh) * 2019-02-20 2019-06-25 南京中电熊猫平板显示科技有限公司 一种内嵌式触控阵列基板及其制造方法
CN110167280B (zh) * 2019-04-26 2020-06-05 信利光电股份有限公司 一种在电路衬底上制作保护膜层的方法
CN110783321B (zh) * 2019-10-15 2021-03-19 福建省福联集成电路有限公司 一种制作smim电容结构的方法及电容结构
CN113066802B (zh) * 2021-03-19 2023-04-18 合肥京东方显示技术有限公司 一种显示基板的制备方法、显示基板和显示装置
CN117063221B (zh) 2021-05-25 2026-02-24 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置及拼接显示装置
WO2023142003A1 (zh) * 2022-01-28 2023-08-03 京东方科技集团股份有限公司 显示面板及其制备方法、显示装置、拼接显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130011794A (ko) * 2011-07-22 2013-01-30 엘지디스플레이 주식회사 액정 표시장치와 이의 제조방법
KR20130021871A (ko) * 2011-08-24 2013-03-06 엘지디스플레이 주식회사 정전용량 방식 터치 스크린 패널 및 그 제조방법
KR20130033827A (ko) * 2011-09-27 2013-04-04 엘지디스플레이 주식회사 액정 표시장치와 이의 제조방법
CN103558712A (zh) * 2013-11-21 2014-02-05 京东方科技集团股份有限公司 一种彩膜基板、其制作方法、内嵌式触摸屏及显示装置
CN104536611A (zh) * 2014-12-31 2015-04-22 深圳市华星光电技术有限公司 一种阵列基板的制备方法
CN104750347A (zh) * 2015-04-17 2015-07-01 合肥京东方光电科技有限公司 电容式触摸屏及其制备工艺及触摸显示面板

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5591834B2 (ja) * 2009-03-04 2014-09-17 ナム、ドンシク タッチパネルセンサー
KR20130033627A (ko) 2011-09-27 2013-04-04 삼성전기주식회사 온 스크린 디스플레이 장치
JP6288915B2 (ja) * 2012-04-26 2018-03-07 三菱電機株式会社 表示装置
KR20140143645A (ko) * 2013-06-07 2014-12-17 삼성디스플레이 주식회사 터치 센서 패널 및 그 제조 방법
US9433102B2 (en) * 2013-08-30 2016-08-30 Boe Technology Group Co., Ltd. Touch screen panel and method for manufacturing the same, and display device
JP6558990B2 (ja) * 2015-07-17 2019-08-14 三菱電機株式会社 電子装置およびその製造方法とリペア方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130011794A (ko) * 2011-07-22 2013-01-30 엘지디스플레이 주식회사 액정 표시장치와 이의 제조방법
KR20130021871A (ko) * 2011-08-24 2013-03-06 엘지디스플레이 주식회사 정전용량 방식 터치 스크린 패널 및 그 제조방법
KR20130033827A (ko) * 2011-09-27 2013-04-04 엘지디스플레이 주식회사 액정 표시장치와 이의 제조방법
CN103558712A (zh) * 2013-11-21 2014-02-05 京东方科技集团股份有限公司 一种彩膜基板、其制作方法、内嵌式触摸屏及显示装置
CN104536611A (zh) * 2014-12-31 2015-04-22 深圳市华星光电技术有限公司 一种阵列基板的制备方法
CN104750347A (zh) * 2015-04-17 2015-07-01 合肥京东方光电科技有限公司 电容式触摸屏及其制备工艺及触摸显示面板

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