WO2017130654A1 - Élément photovoltaïque - Google Patents

Élément photovoltaïque Download PDF

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Publication number
WO2017130654A1
WO2017130654A1 PCT/JP2017/000224 JP2017000224W WO2017130654A1 WO 2017130654 A1 WO2017130654 A1 WO 2017130654A1 JP 2017000224 W JP2017000224 W JP 2017000224W WO 2017130654 A1 WO2017130654 A1 WO 2017130654A1
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amorphous semiconductor
type amorphous
semiconductor layer
type
layer
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PCT/JP2017/000224
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Japanese (ja)
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公一 橋本
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長州産業株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a photovoltaic device.
  • solar cells have attracted particular attention as clean power generation means that does not generate CO 2 or other greenhouse gases, or as power generation means with high operational safety that can replace nuclear power generation.
  • One type of solar cell is a heterojunction solar cell with high power generation efficiency.
  • a heterojunction solar cell for example, a first intrinsic amorphous semiconductor layer and a p-type amorphous semiconductor layer are stacked in this order on one surface side of an n-type crystal semiconductor substrate, A second intrinsic amorphous semiconductor layer and an n-type amorphous semiconductor layer are stacked in this order on the other surface side of the n-type crystal semiconductor substrate.
  • a photovoltaic device having an n-type amorphous semiconductor layer side as a light incident surface has been proposed (Japanese Patent Application Laid-Open No. 2014-216334). And Japanese Unexamined Patent Application Publication No. 2014-216335).
  • the present invention has been made based on the above circumstances, and an object of the present invention is to provide a photovoltaic device that has low temperature dependence of output characteristics and can maintain good characteristics even at high temperatures. is there.
  • the present invention which has been made to solve the above problems, includes an n-type crystal semiconductor substrate, an n-type amorphous semiconductor layer stacked on the light incident surface side of the n-type crystal semiconductor substrate, and the n-type crystal semiconductor substrate.
  • a photovoltaic device comprising a p-type amorphous semiconductor layer laminated on the side opposite to the light incident surface side, wherein the semiconductor material forming the n-type amorphous semiconductor layer is an n-type It is characterized by being amorphous silicon oxide.
  • the temperature dependence of the output characteristics can be reduced because the n-type amorphous semiconductor layer is formed of amorphous silicon oxide.
  • the amorphous silicon oxide is preferably represented by Si 1-x O x (0.01 ⁇ x ⁇ 0.12). Since the n-type amorphous semiconductor layer is formed of amorphous silicon oxide having such an oxygen content, output characteristics such as conversion efficiency can be improved.
  • the semiconductor material forming the p-type amorphous semiconductor layer is preferably p-type amorphous silicon oxide.
  • the p-type amorphous semiconductor layer on the back side is also formed of amorphous silicon oxide, thereby making the temperature dependence of the output characteristics of the photovoltaic device more It can be reduced.
  • a second intermediate layer interposed between the n-type crystal semiconductor substrate and the p-type amorphous semiconductor layer is further provided, and the second intermediate layer is formed of an intrinsic amorphous semiconductor. Providing such a second intermediate layer also suppresses carrier recombination and can further enhance output characteristics.
  • amorphous in an amorphous semiconductor means not only a completely amorphous body but also one having microcrystals in the amorphous body.
  • an amorphous semiconductor including a microcrystal may be simply referred to as “amorphous semiconductor” or the like.
  • “Intrinsic” in an intrinsic amorphous semiconductor layer means that impurities are not intentionally doped, and includes impurities that are originally contained in raw materials or impurities that are unintentionally mixed in the manufacturing process. Meaning.
  • Amorphous silicon oxide as a semiconductor material refers to an amorphous compound having semiconductor characteristics formed by oxygen atoms and silicon atoms, and the ratio of oxygen atoms to silicon atoms is specified. It is not meant to be limited to those of the ratio.
  • the photovoltaic device of the present invention it is possible to provide a photovoltaic device that has low temperature dependence of output characteristics and can maintain good characteristics even at high temperatures.
  • FIG. 1 is a schematic cross-sectional view of a photovoltaic device according to an embodiment of the present invention. It is a graph which shows the conversion efficiency of the photovoltaic device in an Example. It is a graph which shows the external quantum efficiency, internal quantum efficiency, and reflectance of the power generation element which shines in an Example.
  • the photovoltaic element 10 in FIG. 1 includes an n-type crystal semiconductor substrate 11, a first intermediate layer 12 stacked in the following order on one surface side (upper side in FIG. 1) of the n-type crystal semiconductor substrate 11, and an n-type crystal.
  • a second intermediate layer 15 laminated on the amorphous semiconductor layer 13 and the first transparent conductive film 14 on the other surface side (lower side in FIG. 1) of the n-type crystal semiconductor substrate 11 in the following order, p-type An amorphous semiconductor layer 16 and a second transparent conductive film 17 are provided.
  • the photovoltaic device 10 includes a plurality of linear collector electrodes 18 disposed on the outer surface of the first transparent conductive film 14 and the outer surface of the second transparent conductive film 17.
  • the “outer surface” refers to the surface opposite to the n-type crystal semiconductor substrate 11 with the n-type crystal semiconductor substrate 11 as the center.
  • the “inner surface” refers to a surface on the n-type crystal semiconductor substrate 11 side.
  • the upper side in FIG. 1, that is, the first transparent conductive film 14 side is the light incident surface.
  • the photovoltaic element 10 has at least the first transparent conductive film 14 side as a light incident surface, and may be designed so that light can be incident also from the second transparent conductive film 17 side. That is, the photovoltaic device 10 can be configured such that light is incident from both sides.
  • the n-type crystal semiconductor substrate 11 is formed from an n-type crystal semiconductor.
  • An n-type crystal semiconductor is usually a crystal formed by adding a trace amount of a pentavalent element to a semiconductor such as silicon.
  • Examples of the crystal semiconductor constituting the n-type crystal semiconductor substrate 11 include SiC and SiGe in addition to silicon (Si), but silicon is preferable from the viewpoint of productivity.
  • the n-type crystal semiconductor substrate 11 may be a single crystal or a polycrystal.
  • a pyramidal fine concavo-convex structure is formed on both surfaces of the n-type crystal semiconductor substrate 11.
  • the height and size of the uneven structure may be uneven, and adjacent uneven parts may overlap.
  • a vertex and a trough part may be roundish.
  • the height of the unevenness is about several ⁇ m to several tens of ⁇ m.
  • Such a concavo-convex structure can be obtained, for example, by immersing the substrate material in an etching solution containing about 1 to 5% by mass of sodium hydroxide and anisotropically etching the (100) plane of the substrate material.
  • the average thickness of the n-type crystal semiconductor substrate 11 is not particularly limited.
  • the upper limit of the average thickness is, for example, 300 ⁇ m, and preferably 200 ⁇ m. Moreover, as this minimum, it can be set as 50 micrometers, for example.
  • the first intermediate layer 12 is a layer interposed between the n-type crystal semiconductor substrate 11 and the n-type amorphous semiconductor layer 13 and functions as a passivation layer that suppresses carrier recombination.
  • the first intermediate layer 12 is formed from an intrinsic amorphous semiconductor or an n-type amorphous semiconductor.
  • the first intermediate layer 12 is preferably a lightly doped n-type amorphous semiconductor layer having a smaller doping amount than the n-type amorphous semiconductor layer 13.
  • the first intermediate layer 12 is formed of an intrinsic amorphous semiconductor
  • silicon is usually preferable as the intrinsic amorphous semiconductor.
  • the first intermediate layer 12 is preferably an amorphous layer obtained by adding a trace amount of a pentavalent element to silicon.
  • the first intermediate layer 12 (low-doped n-type amorphous semiconductor layer) formed of a low-doped n-type amorphous semiconductor layer is added with a pentavalent element from the n-type amorphous semiconductor layer 13. The amount (dope amount) is small.
  • the first intermediate layer 12 is a lightly doped n-type amorphous semiconductor layer can be confirmed by the density and concentration of the dopant (pentavalent element), the electrical resistance value, and the like.
  • the electron density and the like of the dopant can be measured by a known method. Further, as will be described in detail later, the doping amount depends on the flow rate of the doping gas. Therefore, a lightly doped n-type amorphous semiconductor can be formed by relatively reducing the flow rate of the doping gas. .
  • a first intermediate layer 12 intrinsic amorphous semiconductor layer or n-type amorphous semiconductor layer
  • carrier recombination can be suppressed and output characteristics can be improved.
  • middle layer 12 it can be set as 1 nm or more and 10 nm or less, for example.
  • the n-type amorphous semiconductor layer 13 is disposed on the light incident surface side of the n-type crystal semiconductor substrate 11 via the first intermediate layer 12.
  • the semiconductor material forming the n-type amorphous semiconductor layer 13 is n-type amorphous silicon oxide.
  • the amorphous silicon oxide as a semiconductor material for forming the n-type amorphous semiconductor layer 13 is amorphous silicon doped with oxygen atoms.
  • the n-type amorphous semiconductor layer 13 is an amorphous layer obtained by adding a trace amount of a pentavalent element to such amorphous silicon oxide. That is, the n-type amorphous semiconductor layer 13 is formed of silicon doped with oxygen atoms and pentavalent elements.
  • the n-type amorphous semiconductor layer 13 disposed on the light incident surface side is formed of n-type amorphous silicon oxide, and thus has excellent output characteristics. However, the temperature dependence can be reduced.
  • the amorphous silicon oxide forming the n-type amorphous semiconductor layer 13 is preferably represented by Si 1-x O x (0.01 ⁇ x ⁇ 0.12).
  • the band gap of the amorphous silicon oxide becomes an appropriate value and the transparency becomes high.
  • output characteristics such as the conversion efficiency of the said photovoltaic device 10, and a maximum output, can be improved more.
  • the lower limit of the oxygen content (x) is more preferably 0.02, further preferably 0.03, still more preferably 0.04, and particularly preferably 0.05.
  • the upper limit of the oxygen content (x) is more preferably 0.1 and even more preferably 0.08.
  • this oxygen content rate (x) can be adjusted with the composition ratio of the raw material gas at the time of forming into a film by plasma CVD method so that it may mention later.
  • the average thickness of the n-type amorphous semiconductor layer 13 is not particularly limited, but can be, for example, 1 nm or more and 20 nm or less.
  • the second intermediate layer 15 is a layer interposed between the n-type crystal semiconductor substrate 11 and the p-type amorphous semiconductor layer 16 and functions as a passivation layer that suppresses carrier recombination.
  • the second intermediate layer 15 is formed from an intrinsic amorphous semiconductor such as silicon. Such a second intermediate layer 15 (intrinsic amorphous semiconductor layer) can suppress carrier recombination and improve output characteristics.
  • middle layer 15 it is 1 nm or more and 10 nm or less, for example.
  • the p-type amorphous semiconductor layer 16 is disposed on the side opposite to the light incident surface side of the n-type crystal semiconductor substrate 11 via the second intermediate layer 15.
  • the p-type amorphous semiconductor layer 16 is an amorphous layer formed by adding a trace amount of a trivalent element to a semiconductor.
  • the semiconductor material for forming the p-type amorphous semiconductor layer 16 may be p-type amorphous silicon, but is preferably p-type amorphous silicon oxide.
  • the amorphous silicon oxide as a semiconductor material for forming the p-type amorphous semiconductor layer 16 is amorphous silicon doped with oxygen atoms.
  • the preferable p-type amorphous semiconductor layer 16 is an amorphous layer obtained by adding a trace amount of a trivalent element to such amorphous silicon oxide. That is, the p-type amorphous semiconductor layer 16 can be formed of silicon doped with oxygen atoms and trivalent elements. In addition to the n-type amorphous semiconductor layer 13, the p-type amorphous semiconductor layer 16 on the back side is also formed of amorphous silicon oxide, so that the output characteristics of the photovoltaic device 10 depend on temperature. The property can be further reduced.
  • the amorphous silicon oxide forming the p-type amorphous semiconductor layer 16 is preferably represented by Si 1-y O y (0.01 ⁇ y ⁇ 0.12).
  • the lower limit of the oxygen content (y) is more preferably 0.02, more preferably 0.03, still more preferably 0.04, and particularly preferably 0.05.
  • the upper limit of the oxygen content (y) is more preferably 0.1 and even more preferably 0.08.
  • this oxygen content rate (y) can be adjusted with the composition ratio of the raw material gas at the time of forming into a film by plasma CVD method, for example.
  • the lower limit of the content of the trivalent element in the p-type amorphous semiconductor layer 16 is preferably 1 ⁇ 10 20 atm / cm 3 and more preferably 2.5 ⁇ 10 20 atm / cm 3 .
  • the upper limit of this content is preferably 10 ⁇ 10 20 atm / cm 3 , more preferably 5 ⁇ 10 20 atm / cm 3 .
  • boron is preferable as the trivalent element doped into the p-type amorphous semiconductor layer 16.
  • the average thickness of the p-type amorphous semiconductor layer 16 can be, for example, 1 nm or more and 20 nm or less.
  • the first transparent conductive film 14 is laminated on the outer surface side of the n-type amorphous semiconductor layer 13.
  • the second transparent conductive film 17 is laminated on the outer surface side of the p-type amorphous semiconductor layer 16.
  • the transparent conductive material constituting the first transparent conductive film 14 and the second transparent conductive film 17 include indium tin oxide (ITO), indium tungsten oxide (IWO), and indium cerium oxide (ICO). be able to. Although it does not restrict
  • Each collector electrode 18 has a plurality of bus bar electrodes formed in parallel to each other, and a plurality of finger electrodes formed orthogonal to these bus bar electrodes and in parallel with each other.
  • the bus bar electrode and the finger electrode are each linear or strip-like, and are made of a conductive material.
  • a conductive adhesive such as a silver paste or a metal wire such as a copper wire can be used.
  • These collector electrodes 18 may have a layer structure.
  • the width of each bus bar electrode is, for example, about 0.5 mm to 2 mm. Further, the width of each finger electrode is, for example, about 10 ⁇ m or more and 300 ⁇ m or less. The interval between the finger electrodes is, for example, about 0.5 mm to 4 mm.
  • the photovoltaic elements 10 are usually used by connecting a plurality of them in series. By using a plurality of photovoltaic elements 10 connected in series, the generated voltage can be increased.
  • the method for manufacturing the photovoltaic device 10 is not particularly limited.
  • the step of laminating the first intermediate layer 12 on one surface side of the n-type crystal semiconductor substrate 11 and the n-type amorphous semiconductor layer 13 are further laminated.
  • a step of further laminating the second transparent conductive film 17 and a step of laminating the collector electrode 18 on each outer surface of the first transparent conductive film and the second transparent conductive film will not be specifically limited as long as it is the order which can obtain the layer structure of the photovoltaic device 10.
  • each amorphous semiconductor layer can be performed by a known method such as chemical vapor deposition.
  • chemical vapor deposition include plasma CVD and catalytic CVD (also called hot wire CVD).
  • a mixed gas of, for example, SiH 4 and H 2 can be used as a source gas.
  • a mixed gas of SiH 4 , H 2, and PH 3 can be used as the source gas.
  • the first intermediate layer 12 formed of an n-type amorphous semiconductor with a small amount of doping is formed by reducing the flow rate (flow rate ratio) of the dopant gas as compared with the n-type amorphous semiconductor layer 13. be able to.
  • the first intermediate layer is formed by forming PH 3 as a dopant based on SiH 4 at 1000 ppm or less.
  • Layer 12 can be obtained.
  • the amount (concentration) of PH 3 introduced when forming the first intermediate layer 12 is 1 / of the amount introduced (concentration) when forming the n-type amorphous semiconductor layer 13 described later. It can be set to 100 or more and 1/5 or less.
  • the n-type amorphous semiconductor layer 13 formed from amorphous silicon oxide having a high oxygen content can be obtained by increasing the mixing ratio of CO 2 .
  • the lower limit of the ratio of the flow rate of CO 2 of SiH 4 to the flow rate (sccm) (sccm) (CO 2 / SiH 4) preferably 0.1, 0.4 is more preferable.
  • the upper limit of this ratio is preferably 2, and more preferably 1.
  • N 2 O or the like can be used instead of CO 2 for doping oxygen atoms.
  • the source gas for example, a mixed gas of SiH 4 , H 2 , B 2 H 6 and CO 2 is used as the source gas.
  • the upper limit of this ratio is preferably 2, and more preferably 1.
  • N 2 O or the like can be used instead of CO 2 for doping oxygen atoms.
  • a mixed gas of SiH 4 , H 2 and B 2 H 6 can be used as the source gas.
  • Examples of the method of laminating the first transparent conductive film 14 and the second transparent conductive film 17 include a sputtering method, a vacuum vapor deposition method, an ion plating method (reactive plasma vapor deposition method), and the like. It is preferable to use an ion plating method.
  • the sputtering method is excellent in film thickness controllability and the like, and can be performed at a lower cost than the ion plating method.
  • the ion plating method film formation in which generation of defects is suppressed can be performed.
  • the arrangement of the collecting electrode 18 can be performed by a known method.
  • a conductive adhesive is used as the material of the collector electrode 18, it can be formed by a printing method such as screen printing or gravure offset printing.
  • a metal lead is used for the collector electrode 18, it can be fixed on the first transparent conductive film 14 or the second transparent conductive film 17 with a conductive adhesive or a low melting point metal (solder or the like).
  • the collector electrode on the back side of the collector electrodes on both sides may be formed of a metal or the like laminated on the entire surface.
  • the first intermediate layer and the second intermediate layer may not be provided.
  • a transparent conductive film may be formed at least on the incident surface side, and the transparent conductive film may not be formed on the back surface side, and may be a metal film, for example.
  • a transparent conductive film by stacking a transparent conductive film on the outer surface of the p-type amorphous semiconductor layer on the back side, generation of defect levels can be suppressed and conversion efficiency can be increased.
  • Example 1 Layer structure comprising first transparent conductive film / n-type amorphous semiconductor layer / first intermediate layer / n-type crystal semiconductor substrate / second intermediate layer / p-type amorphous semiconductor layer / second transparent conductive film was made.
  • n-type crystal semiconductor substrate a single crystal silicon substrate having a fine concavo-convex structure (texture structure) having innumerable pyramid shapes on both surfaces was used. This concavo-convex structure was formed by immersing the substrate material in an etching solution containing about 3% by mass of sodium hydroxide and anisotropically etching the (100) plane of the substrate material.
  • n-type amorphous semiconductor layer SiH 4 , H 2 , PH 3 , and CO 2
  • First intermediate layer low-doped n-type amorphous semiconductor layer
  • Second intermediate layer intrinsic amorphous semiconductor layer
  • SiH 4 and H 2 p-type amorphous semiconductor layer SiH 4 , H 2 , B 2 H 6 , and CO 2
  • the flow rate of SiH 4 was 5 sccm, and the flow rate of CO 2 was 0.9 sccm.
  • the flow rate of SiH 4 was 5 sccm, and the flow rate of CO 2 was 4.1 sccm.
  • the atomic density of boron was 3.5 ⁇ 10 20 atm / cm 3 .
  • the first intermediate layer was formed as a low-doped n-type amorphous semiconductor layer by forming the PH 3 flow rate as 1/10 of the n-type amorphous semiconductor layer based on SiH 4 .
  • Each transparent conductive film was laminated by sputtering using indium oxide containing 3% by mass of tin oxide.
  • Examples 2 to 4 Comparative Example 1>
  • the photovoltaic elements of Examples 2 to 4 and Comparative Example 1 were prepared in the same manner as in Example 1 except that the flow rate of CO 2 was as shown in Table 1. Obtained.
  • Example 5 Example 3 except that a mixed gas of SiH 4 , H 2 and B 2 H 6 was used as the source gas for the p-type amorphous semiconductor layer, and the p-type amorphous semiconductor layer was formed of p-type silicon.
  • the photovoltaic device of Example 5 was obtained.
  • the atomic density of boron was 3.5 ⁇ 10 20 atm / cm 3 .
  • Example 3 in which the n-type amorphous semiconductor layer was formed of amorphous silicon oxide, the decrease in output characteristics was small even at a high temperature of 45 ° C.
  • Example 3 in which both the n-type amorphous semiconductor layer and the p-type amorphous semiconductor layer are formed of amorphous silicon oxide, the output characteristics are very low even under an environment of 70 ° C.
  • the photovoltaic device of this invention it turns out that the fall of an output characteristic can be suppressed also under high temperature.
  • the conversion efficiency and the like can be increased by forming the n-type amorphous semiconductor layer with amorphous silicon oxide having a predetermined range of oxygen content.
  • FIG. 3 shows the external quantum efficiency (EQE), the internal quantum efficiency (IQE), and the reflectance (Reflectance) of the photovoltaic devices of Comparative Example 1, Example 2, and Example 3 obtained.
  • Examples 2 and 3 in which the n-type amorphous semiconductor layer is formed of amorphous silicon oxide are different from Comparative Example 1 in which the n-type amorphous semiconductor layer is formed of silicon.
  • the external quantum efficiency and the internal quantum efficiency at 300 to 600 nm are high. This shows that n-type amorphous silicon oxide has higher transparency than n-type amorphous silicon.
  • the photovoltaic device of the present invention has good output characteristics, has low temperature dependency, can maintain good characteristics even at high temperatures, and can be suitably used for photovoltaic power generation.

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Abstract

L'invention concerne un élément photovoltaïque dont les caractéristiques de sortie sont moins dépendantes de la température et qui est susceptible de maintenir de bonnes caractéristiques, même à température élevée. Un élément photovoltaïque (10) selon la présente invention comprend : un substrat semi-conducteur cristallin du type n (11); une couche semi-conductrice amorphe du type n (13) empilée sur la surface côté incidence de lumière du substrat semi-conducteur cristallin du type n; et une couche semi-conductrice amorphe du type p (16) empilée sur la surface du côté opposé à la surface côté incidence de lumière du substrat semi-conducteur cristallin du type n, et caractérisée en ce qu'un matériau semi-conducteur formant la couche semi-conductrice amorphe du type n (13) est un oxyde de silicium amorphe du type n. L'oxyde de silicium amorphe est de préférence représenté par Si1-xOx (0,01 ≤ x ≤ 0,12). Un matériau semi-conducteur formant la couche semi-conductrice amorphe du type p (16) est de préférence un oxyde de silicium amorphe du type p.
PCT/JP2017/000224 2016-01-25 2017-01-06 Élément photovoltaïque WO2017130654A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112736151A (zh) * 2021-01-08 2021-04-30 上海交通大学 基于宽带隙窗口层的背结硅异质结太阳电池

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JPH0595126A (ja) * 1991-10-01 1993-04-16 Fuji Electric Co Ltd 薄膜太陽電池およびその製造方法
JPH05152592A (ja) * 1991-09-30 1993-06-18 Fuji Electric Co Ltd 薄膜太陽電池およびその製造方法
JPH07130661A (ja) * 1993-11-04 1995-05-19 Fuji Electric Co Ltd 非晶質酸化シリコン薄膜の生成方法
JP2013077685A (ja) * 2011-09-30 2013-04-25 Semiconductor Energy Lab Co Ltd 光電変換装置
WO2015118935A1 (fr) * 2014-02-10 2015-08-13 シャープ株式会社 Élément de conversion photoélectrique et module de cellule solaire pourvu de celui-ci
WO2015122257A1 (fr) * 2014-02-13 2015-08-20 シャープ株式会社 Élément de conversion photoélectrique

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05152592A (ja) * 1991-09-30 1993-06-18 Fuji Electric Co Ltd 薄膜太陽電池およびその製造方法
JPH0595126A (ja) * 1991-10-01 1993-04-16 Fuji Electric Co Ltd 薄膜太陽電池およびその製造方法
JPH07130661A (ja) * 1993-11-04 1995-05-19 Fuji Electric Co Ltd 非晶質酸化シリコン薄膜の生成方法
JP2013077685A (ja) * 2011-09-30 2013-04-25 Semiconductor Energy Lab Co Ltd 光電変換装置
WO2015118935A1 (fr) * 2014-02-10 2015-08-13 シャープ株式会社 Élément de conversion photoélectrique et module de cellule solaire pourvu de celui-ci
WO2015122257A1 (fr) * 2014-02-13 2015-08-20 シャープ株式会社 Élément de conversion photoélectrique

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112736151A (zh) * 2021-01-08 2021-04-30 上海交通大学 基于宽带隙窗口层的背结硅异质结太阳电池
CN112736151B (zh) * 2021-01-08 2022-11-15 上海交通大学 基于宽带隙窗口层的背结硅异质结太阳电池

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