WO2017128476A1 - 柔性阵列基板结构及其制造方法 - Google Patents

柔性阵列基板结构及其制造方法 Download PDF

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Publication number
WO2017128476A1
WO2017128476A1 PCT/CN2016/074687 CN2016074687W WO2017128476A1 WO 2017128476 A1 WO2017128476 A1 WO 2017128476A1 CN 2016074687 W CN2016074687 W CN 2016074687W WO 2017128476 A1 WO2017128476 A1 WO 2017128476A1
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layer
electrode layer
region
transparent conductive
disposed
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PCT/CN2016/074687
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English (en)
French (fr)
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徐洪远
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深圳市华星光电技术有限公司
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Priority to US15/033,650 priority Critical patent/US9842883B2/en
Publication of WO2017128476A1 publication Critical patent/WO2017128476A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/464—Lateral top-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/125—Active-matrix OLED [AMOLED] displays including organic TFTs [OTFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a flexible array substrate structure and a method of fabricating the same.
  • a flexible display refers to a display that can be bent, folded, and curled without damage by using a substrate that is as thin and flexible as paper.
  • liquid crystal displays Liquid Crystal display, LCD
  • organic light-emitting diode Organic light-emitting diode
  • E-paper electronic paper
  • a flexible display uses a plastic material, a film, or the like as a substrate, and therefore has the advantages of light weight, thin thickness, and impact without being broken. It is now considered to use a flexible display as a display for a mobile device, and also to form a display having a curved shape, and therefore, the use of the flexible display has been expanded to the field of daily necessities or automobiles, and the future will be a booming demand. Promising industries.
  • the edge layer or the active layer of the array substrate is usually made of an inorganic material such as amorphous silicon, polycrystalline silicon, metal oxide or the like, so that flexible display cannot be realized.
  • the color filter substrate and the array substrate in the LCD are misaligned when bent, and the liquid crystal is caused to leak light or display abnormality.
  • the main object of the present invention is to provide a flexible array substrate structure and a method of fabricating the same.
  • the organic semiconductor layer is patterned by the action of the inner sidewall of the opening of the color filter layer as a bank, so that a mask is saved; and, through the improved device structure, the entire device process is obtained. Simplified, so that the flexible array substrate structure of the present invention can be completed by only four masks.
  • the present invention provides a flexible array substrate structure comprising:
  • a substrate comprising a source electrode region, a drain electrode region, a common electrode region, and a channel region between the source electrode region and the drain electrode region;
  • a source electrode layer disposed on the source electrode region of the substrate
  • drain electrode layer disposed on the drain electrode region of the substrate
  • a color film layer covering the source electrode layer, the drain electrode layer and the common electrode layer, the color film layer having a via and an opening exposing a channel region of the substrate;
  • a first transparent conductive layer is disposed on the color film layer, and the first transparent conductive layer is electrically connected to the drain electrode layer through the via hole.
  • the opening has an organic semiconductor layer, an organic insulating layer, a second transparent conductive layer and a gate electrode layer
  • the organic semiconductor layer is disposed on the channel region of the substrate and contacts the source electrode a layer and the drain electrode layer
  • the organic insulating layer is disposed on the organic semiconductor layer
  • the second transparent conductive layer is disposed on the organic insulating layer
  • the gate electrode layer is disposed on the On the second transparent conductive layer.
  • a protective layer is further disposed on the gate electrode layer.
  • the first transparent conductive layer and the common electrode layer form a storage capacitor.
  • the surface of the color film layer and the organic semiconductor layer are hydrophobic.
  • the material of the source electrode layer, the drain electrode layer and the common electrode layer comprises gold, silver and copper.
  • the material of the gate electrode layer comprises copper or an alloy thereof, aluminum or an alloy thereof, and molybdenum or an alloy thereof.
  • the present invention further provides a method of fabricating a flexible array substrate structure, comprising the steps of:
  • a gate electrode layer is formed on the second transparent conductive layer.
  • the method further includes the step of forming a protective layer on the gate electrode layer.
  • the first transparent conductive layer and the common electrode layer form a storage capacitor.
  • the method further comprises the step of surface treating the surface of the color film layer to make the surface of the color film layer hydrophobic.
  • the method further includes the step of surface-treating the surface of the organic semiconductor layer to make the surface of the organic semiconductor layer hydrophobic.
  • the organic semiconductor layer is by spin coating (spin Coating), slot-die coating or ink-jet printing.
  • the material of the electrode layer comprises gold, silver and copper.
  • the material of the gate electrode layer comprises copper or an alloy thereof, aluminum or an alloy thereof, and molybdenum or an alloy thereof.
  • the present invention has significant advantages and beneficial effects over the prior art.
  • the flexible array substrate structure of the present invention and the manufacturing method thereof have at least the following advantages and advantageous effects: the organic semiconductor layer is patterned by acting as a bank in the inner sidewall of the opening. Therefore, a mask is saved; and, through the improved device structure, the entire device process is simplified, so that the flexible array substrate structure of the present invention requires only four masks to be completed.
  • FIG. 1 is a flow chart showing the steps of a method of fabricating a flexible array substrate structure in accordance with an embodiment of the present invention.
  • FIGS. 2a-2e are schematic views of a method of fabricating a flexible array substrate structure in accordance with an embodiment of the present invention.
  • FIG. 1 is a flow chart showing the steps of a method for fabricating a flexible array substrate structure 1 according to an embodiment of the present invention.
  • the manufacturing method includes the following steps S11 to S20; A schematic diagram of a method of fabricating the flexible array substrate structure 1 in an embodiment of the invention.
  • a substrate 10 is provided, and a source electrode region 10a, a drain electrode region 10b, a common electrode region 10c, and a source electrode region 10a and the drain electrode region 10b are defined on the substrate 10.
  • the channel region 10d is between.
  • the substrate 10 is a flexible substrate.
  • step S12 an electrode layer is deposited on the substrate 10, and the electrode layer is patterned, and correspondingly in the source electrode region 10a, the drain electrode region 10b, and the common electrode region 10c.
  • a source electrode layer 201, a drain electrode layer 202, and a common electrode layer 203 are formed thereon.
  • the material of the electrode layer may contain gold, silver, and copper, but the invention is not limited thereto.
  • physical vapor deposition Physical
  • PVD Physical Vapor Deposition
  • first mask yellow light process
  • a color film layer 204 is formed on the substrate 10 to cover the source electrode layer 201, the drain electrode layer 202, and the common electrode layer 203.
  • the color film layer 204 is composed of a red color resist material, a green color resist material or a blue color resist material.
  • step S14 a via hole 2041 and an opening 2042 exposing the channel region 10d of the substrate 10 are disposed on the color film layer 204.
  • the patterning is completed by a second mask and development.
  • the surface of the color film layer 204 may be subjected to surface treatment (such as CF4 plasma treatment), so that the surface of the color film layer 204 is hydrophobic, so that it is easier to
  • the organic semiconductor layer 206 of the step S15 is confined in the opening 2042.
  • an organic semiconductor layer 206 is formed on the channel region 10d of the substrate 10 in the opening 2042, and the organic semiconductor layer 206 contacts the source electrode layer 201 and the drain electrode layer 202.
  • the organic semiconductor layer 206 can be formed by a spin coating method, a slit die coating method, or an inkjet printing method, but the present invention is not limited thereto.
  • patterning can be achieved after the organic semiconductor material forming the organic semiconductor layer 206 is filled into the opening 2042. So that you can save a mask.
  • the surface of the organic semiconductor layer 206 may be subjected to surface treatment (such as CF4 plasma treatment) to make the surface of the organic semiconductor layer 206 hydrophobic, so that it is easier
  • surface treatment such as CF4 plasma treatment
  • step S16 an organic insulating layer 207 is formed on the organic semiconductor layer 206.
  • a first transparent conductive layer 205 (as a pixel electrode) is formed on the color film layer 204, and the first transparent conductive layer 205 is electrically connected to the drain electrode layer 202 through the via hole 2041. connection.
  • the first transparent conductive layer 205 may be composed of indium tin oxide, but the invention is not limited thereto.
  • the first transparent conductive layer 205 and the common electrode layer 203 form a storage capacitor.
  • a second transparent conductive layer 208 is formed on the organic insulating layer 207.
  • the second transparent conductive layer 208 may be composed of indium tin oxide, but the invention is not limited thereto.
  • a gate electrode layer 209 is formed on the second transparent conductive layer 208.
  • the material of the gate electrode layer 209 may include copper or an alloy thereof, aluminum or an alloy thereof, and molybdenum or an alloy thereof, but the invention is not limited thereto.
  • a half-tone mask (third mask) is used to make the second transparent conductive layer 208 and the gate electrode layer above the organic insulating layer 207. 209, and simultaneously forming the first transparent conductive layer 205.
  • step S20 a protective layer 210 is formed on the gate electrode layer 209 to insulate moisture and solution contamination.
  • the patterning is completed by a fourth mask and development.
  • each film layer is completed by an existing process such as exposure, development, etching, or the like.
  • the flexible array substrate structure 1 of the present invention can be fabricated by performing the above steps S11 to S20.
  • the flexible array substrate structure of the present invention and the method of fabricating the same are characterized in that the organic semiconductor layer 206 is patterned by the action of the inner sidewall of the opening 2042 as a bank, thereby saving a light.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
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Abstract

一种柔性阵列基板结构及其制造方法，以彩膜层（204）的开口内侧壁作为岸堤(Bank)，使有机半导体层（206）完成图案化，以节省一道掩模；并通过改进后的器件结构，使整个器件制程得到简化，以使得柔性阵列基板结构只需要四次光罩即可完成制作。

Description

柔性阵列基板结构及其制造方法 技术领域
本发明涉及一种显示技术领域，特别是涉及一种柔性阵列基板结构及其制造方法。
 背景技术
柔性显示器是指利用如纸张一样薄且柔软的基板，可对其无损伤地实现折弯、折叠及卷曲的显示器。与平板显示器相同地，为形成柔性显示器的现有技术通过细分成液晶显示器(Liquid crystal display, LCD)、有机发光二极管(Organic light-emitting diode, OLED)及电子纸(Electronic paper, E-paper)显示器等进行研究开发。
当前，柔性显示器使用塑胶原料、薄膜等作为基板，因此，具有重量轻、厚度薄、以及受到冲击也不会碎的优点。现考虑将柔性显示器作为移动设备用显示器来使用，并且还可变形成弯曲形状的显示器，因此，所述柔性显示器的用途已扩大至生活用品或汽车领域等，并且将会成为需求暴增的未来有前景的产业。
关于LCD，其中的阵列基板的有缘层或主动层通常是以无机材料为主，如非晶硅、多晶硅、金属氧化物等，因此无法实现柔性显示。除此以外，LCD中的彩色滤光片基板与阵列基板在弯曲时会发生错位而使液晶发生漏光或显示异常等问题。这些问题都限制了柔性LCD显示器的发展。
因此，有必要提供一种新的柔性阵列基板结构及其制造方法，来解决现有技术所存在的问题。
 技术问题
本发明的主要目的在于提供一种柔性阵列基板结构及其制造方法。通过以其中的彩膜层的开口中的内侧壁充当岸堤（Bank）的作用，使有机半导体层完成图案化，以致节省一道光罩；并且，通过改进后的器件结构，使整个器件制程得到简化，以致本发明的柔性阵列基板结构只需要四次光罩即可完成制作。
 技术解决方案
为实现本发明的前述目的，本发明提供一种柔性阵列基板结构，其包含：
一基板，包括一源电极区、一漏电极区、一共电极区和一位于所述源电极区与所述漏电极区之间的沟道区；
一源电极层，设置在所述基板的源电极区上；
一漏电极层，设置在所述基板的漏电极区上；
一共电极层，设置在所述基板的共电极区上；
一彩膜层，覆盖所述源电极层、所述漏电极层和所述共电极层，所述彩膜层具有一过孔和一暴露所述基板的沟道区的开口；以及
一第一透明导电层，设置在所述彩膜层上，所述第一透明导电层通过所述过孔与所述漏电极层电性连接，
其中所述开口中具有一有机半导体层、一有机绝缘层、一第二透明导电层和一栅电极层，所述有机半导体层是设置在所述基板的沟道区上且接触所述源电极层和所述漏电极层，所述有机绝缘层是设置在所述有机半导体层上，所述第二透明导电层是设置在所述有机绝缘层上，所述栅电极层是设置在所述第二透明导电层上。
在本发明的一实施例中，所述栅电极层上还设置有一保护层。
在本发明的一实施例中，所述第一透明导电层和所述共电极层形成一存储电容。
在本发明的一实施例中，所述彩膜层和所述有机半导体层的表面具有疏水性。
在本发明的一实施例中，所述源电极层、所述漏电极层和所述共电极层的材料包含金、银和铜。
在本发明的一实施例中，所述栅电极层的材料包含铜或其合金、铝或其合金和钼或其合金。
再者，本发明另提供一种柔性阵列基板结构的制造方法，其包括以下步骤：
提供一基板，且在所述基板上定义一源电极区、一漏电极区、一共电极区和一位于所述源电极区与所述漏电极区之间的沟道区；
在所述基板上沉积一电极层，再对所述电极层进行图案化，而相应地在所述源电极区、所述漏电极区和所述共电极区上形成一源电极层、一漏电极层和一共电极层；
在所述基板上形成一彩膜层从而覆盖所述源电极层、所述漏电极层和所述共电极层；
在所述彩膜层上设置一过孔和一暴露所述基板的沟道区的开口；
在所述开口中的所述基板的沟道区上形成一有机半导体层，所述有机半导体层接触所述源电极层和所述漏电极层；
在所述有机半导体层上形成一有机绝缘层；
在所述彩膜层上形成一第一透明导电层，所述第一透明导电层通过所述过孔与所述漏电极层电性连接；
在所述有机绝缘层上形成一第二透明导电层；以及
在所述第二透明导电层上形成一栅电极层。
在本发明的一实施例中，所述方法还包括以下步骤：在所述栅电极层上形成一保护层。
在本发明的一实施例中，所述第一透明导电层和所述共电极层形成一存储电容。
在本发明的一实施例中，所述方法还包括以下步骤：对所述彩膜层的表面进行表面处理，使所述彩膜层的表面具有疏水性。
在本发明的一实施例中，所述方法还包括以下步骤：对所述有机半导体层的表面进行表面处理，使所述有机半导体层的表面具有疏水性。
在本发明的一实施例中，所述有机半导体层是通过旋转涂布法（spin coating）、狭缝式模压涂布法（slot-die coating）或喷墨印刷法（ink-jet printing）而形成的。
在本发明的一实施例中，所述电极层的材料包含金、银和铜。
在本发明的一实施例中，所述栅电极层的材料包含铜或其合金、铝或其合金和钼或其合金。
 有益效果
本发明与现有技术相比具有明显的优点和有益的效果。通过上述技术方案，本发明柔性阵列基板结构及其制造方法至少具有下列优点及有益效果：通过以所述开口中的内侧壁充当岸堤（Bank）的作用，使所述有机半导体层完成图案化，以致节省一道光罩；并且，通过改进后的器件结构，使整个器件制程得到简化，以致本发明的柔性阵列基板结构只需要四次光罩即可完成制作。
 附图说明
图1是本发明一实施例中柔性阵列基板结构的制造方法的步骤流程图。
图2a-2e是本发明一实施例中柔性阵列基板结构的制造方法的示意图。
 本发明的最佳实施方式
为更进一步阐述本发明为达成预订发明目的所采取的技术手段及功效，以下结合附图及较佳实施例，对依据本发明提出的柔性阵列基板结构及其制造方法其具体实施方式、结构、特征及其功效，详细说明如后。
请参照图1和图2a-2e，图1为本发明一实施例中柔性阵列基板结构1的制造方法的步骤流程图，所述制造方法包括下述步骤S11至S20；图2a-2e为本发明一实施例中柔性阵列基板结构1的制造方法的示意图。
在步骤S11中，提供一基板10，且在所述基板10上定义一源电极区10a、一漏电极区10b、一共电极区10c和一位于所述源电极区10a与所述漏电极区10b之间的沟道区10d。所述基板10是一柔性基板。
在步骤S12中，在所述基板10上沉积一电极层，再对所述电极层进行图案化，而相应地在所述源电极区10a、所述漏电极区10b和所述共电极区10c上形成一源电极层201、一漏电极层202和一共电极层203。所述电极层的材料可以包含金、银和铜，但本发明不限于此。在此，例如可通过物理气相沉积（Physical Vapor Deposition, PVD）和黄光制程（第一道光罩）来完成本步骤。
在步骤S13中，在所述基板10上形成一彩膜层204从而覆盖所述源电极层201、所述漏电极层202和所述共电极层203。所述彩膜层204是由红色色阻材料、绿色色阻材料或蓝色色阻材料所构成。
在步骤S14中，在所述彩膜层204上设置一过孔2041和一暴露所述基板10的沟道区10d的开口2042。在本步骤中，是通过第二道光罩和显影来完成图案化的。在此，在设置所述开口2042后，可以对所述彩膜层204的表面进行表面处理（如CF4等离子处理），使所述彩膜层204的表面具有疏水性，以致于更容易将下述步骤S15的有机半导体层206限制于所述开口2042中。
在步骤S15中，在所述开口2042中的所述基板10的沟道区10d上形成一有机半导体层206，所述有机半导体层206接触所述源电极层201和所述漏电极层202。所述有机半导体层206可以通过旋转涂布法、狭缝式模压涂布法或喷墨印刷法而形成的，但本发明不限于此。在本步骤中，由于所述开口2042中的内侧壁可作为岸堤（Bank）的用途，因此将形成所述有机半导体层206的有机半导体材料填充至所述开口2042中后，可以实现图案化，以致能够节省一道光罩。在此，在形成所述有机半导体层206后，可以对所述有机半导体层206的表面进行表面处理（如CF4等离子处理），使所述有机半导体层206的表面具有疏水性，以致于更容易将下述步骤S16的有机绝缘层207限制于所述开口2042中。
在步骤S16中，在所述有机半导体层206上形成一有机绝缘层207。
在步骤S17中，在所述彩膜层204上形成一第一透明导电层205（作为像素电极），所述第一透明导电层205通过所述过孔2041与所述漏电极层202电性连接。所述第一透明导电层205可以是由氧化铟锡所构成，但本发明不限于此。所述第一透明导电层205和所述共电极层203形成了一存储电容。
在步骤S18中，在所述有机绝缘层207上形成一第二透明导电层208。所述第二透明导电层208可以是由氧化铟锡所构成，但本发明不限于此。
在步骤S19中，在所述第二透明导电层208上形成一栅电极层209。所述栅电极层209的材料可以包含铜或其合金、铝或其合金和钼或其合金，但本发明不限于此。在步骤S17至步骤S19后，使用一道半色调（Half-Tone）光罩（第三道光罩）使得所述有机绝缘层207上方既有所述第二透明导电层208又有所述栅电极层209，并同时形成所述第一透明导电层205。
在步骤S20中，在所述栅电极层209上形成一保护层210，以隔绝水气及溶液污染。在本步骤中，是通过第四道光罩和显影来完成图案化的。
以上，对于各膜层的图案化是通过如曝光、显影、刻蚀等的现有工序而完成的。
通过执行上述步骤S11至S20，即可制作出本发明的柔性阵列基板结构1。
如上所述，本发明的柔性阵列基板结构及其制造方法是通过以所述开口2042中的内侧壁充当岸堤（Bank）的作用，使所述有机半导体层206完成图案化，以致节省一道光罩；并且，通过改进后的器件结构，使整个器件制程得到简化，以致本发明的柔性阵列基板结构1只需要四次光罩即可完成制作。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (13)

  1. 一种柔性阵列基板结构，包括：
    一基板，包括一源电极区、一漏电极区、一共电极区和一位于所述源电极区与所述漏电极区之间的沟道区；
    一源电极层，设置在所述基板的源电极区上；
    一漏电极层，设置在所述基板的漏电极区上；
    一共电极层，设置在所述基板的共电极区上；
    一彩膜层，覆盖所述源电极层、所述漏电极层和所述共电极层，所述彩膜层具有一过孔和一暴露所述基板的沟道区的开口；以及
    一第一透明导电层，设置在所述彩膜层上，所述第一透明导电层通过所述过孔与所述漏电极层电性连接，
    其中所述开口中具有一有机半导体层、一有机绝缘层、一第二透明导电层和一栅电极层，所述有机半导体层是设置在所述基板的沟道区上且接触所述源电极层和所述漏电极层，所述有机绝缘层是设置在所述有机半导体层上，所述第二透明导电层是设置在所述有机绝缘层上，所述栅电极层是设置在所述第二透明导电层上，所述彩膜层和所述有机半导体层的表面具有疏水性。
  2. 根据权利要求1所述的柔性阵列基板结构，其中所述栅电极层上还设置有一保护层。
  3. 根据权利要求1所述的柔性阵列基板结构，其中所述第一透明导电层和所述共电极层形成一存储电容。
  4. 一种柔性阵列基板结构，包括：
    一基板，包括一源电极区、一漏电极区、一共电极区和一位于所述源电极区与所述漏电极区之间的沟道区；
    一源电极层，设置在所述基板的源电极区上；
    一漏电极层，设置在所述基板的漏电极区上；
    一共电极层，设置在所述基板的共电极区上；
    一彩膜层，覆盖所述源电极层、所述漏电极层和所述共电极层，所述彩膜层具有一过孔和一暴露所述基板的沟道区的开口；以及
    一第一透明导电层，设置在所述彩膜层上，所述第一透明导电层通过所述过孔与所述漏电极层电性连接，
    其中所述开口中具有一有机半导体层、一有机绝缘层、一第二透明导电层和一栅电极层，所述有机半导体层是设置在所述基板的沟道区上且接触所述源电极层和所述漏电极层，所述有机绝缘层是设置在所述有机半导体层上，所述第二透明导电层是设置在所述有机绝缘层上，所述栅电极层是设置在所述第二透明导电层上。
  5. 根据权利要求4所述的柔性阵列基板结构，其中所述栅电极层上还设置有一保护层。
  6. 根据权利要求4所述的柔性阵列基板结构，其中所述第一透明导电层和所述共电极层形成一存储电容。
  7. 根据权利要求4所述的柔性阵列基板结构，其中所述彩膜层和所述有机半导体层的表面具有疏水性。
  8. 一种柔性阵列基板结构的制造方法，包括以下步骤：
    提供一基板，且在所述基板上定义一源电极区、一漏电极区、一共电极区和一位于所述源电极区与所述漏电极区之间的沟道区；
    在所述基板上沉积一电极层，再对所述电极层进行图案化，而相应地在所述源电极区、所述漏电极区和所述共电极区上形成一源电极层、一漏电极层和一共电极层；
    在所述基板上形成一彩膜层从而覆盖所述源电极层、所述漏电极层和所述共电极层；
    在所述彩膜层上设置一过孔和一暴露所述基板的沟道区的开口；
    在所述开口中的所述基板的沟道区上形成一有机半导体层，所述有机半导体层接触所述源电极层和所述漏电极层；
    在所述有机半导体层上形成一有机绝缘层；
    在所述彩膜层上形成一第一透明导电层，所述第一透明导电层通过所述过孔与所述漏电极层电性连接；
    在所述有机绝缘层上形成一第二透明导电层；以及
    在所述第二透明导电层上形成一栅电极层。
  9. 根据权利要求8所述的柔性阵列基板结构的制造方法，其中所述方法还包括以下步骤：在所述栅电极层上形成一保护层。
  10. 根据权利要求8所述的柔性阵列基板结构的制造方法，其中所述第一透明导电层和所述共电极层形成一存储电容。
  11. 根据权利要求8所述的柔性阵列基板结构的制造方法，其中所述方法还包括以下步骤：对所述彩膜层的表面进行表面处理，使所述彩膜层的表面具有疏水性。
  12. 根据权利要求8所述的柔性阵列基板结构的制造方法，其中所述方法还包括以下步骤：对所述有机半导体层的表面进行表面处理，使所述有机半导体层的表面具有疏水性。
  13. 根据权利要求8所述的柔性阵列基板结构的制造方法，其中所述有机半导体层是通过旋转涂布法、狭缝式模压涂布法或喷墨印刷法而形成的。
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