WO2017081796A1 - Dispositif semi-conducteur - Google Patents

Dispositif semi-conducteur Download PDF

Info

Publication number
WO2017081796A1
WO2017081796A1 PCT/JP2015/081882 JP2015081882W WO2017081796A1 WO 2017081796 A1 WO2017081796 A1 WO 2017081796A1 JP 2015081882 W JP2015081882 W JP 2015081882W WO 2017081796 A1 WO2017081796 A1 WO 2017081796A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
layer
semiconductor device
core layer
optical waveguide
Prior art date
Application number
PCT/JP2015/081882
Other languages
English (en)
Japanese (ja)
Inventor
忠嗣 奥村
克矢 小田
淳一 葛西
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to PCT/JP2015/081882 priority Critical patent/WO2017081796A1/fr
Publication of WO2017081796A1 publication Critical patent/WO2017081796A1/fr

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures

Definitions

  • the present invention relates to a semiconductor device, for example, a technique effective when applied to a semiconductor device including an optical waveguide.
  • Patent Document 1 describes a technique for reducing stress applied to a waveguide by a plurality of stress films having different thermal expansion coefficients.
  • Non-Patent Document 1 describes a technique for improving luminous efficiency by applying local local stress to a germanium light-emitting layer by internal stress of a silicon nitride film.
  • Non-Patent Document 2 describes a technique in which an indirect transition semiconductor is changed to a direct transition semiconductor by applying a tensile strain to the thin film layer by causing a stress film to warp the thin film layer.
  • optical communication is used in broadband networks that support the Internet industry.
  • a laser diode using a compound semiconductor such as a III-V group or a II-VI group is used for transmission / reception of light in this optical communication.
  • LSI Large Scale Integration
  • silicon and compounds that are different materials from each other are used. It is necessary to consider the connection with the semiconductor.
  • Silicon Photonics This “silicon photonics” is a technique for making an optical element typified by an optical waveguide using a sophisticated silicon line widely spread worldwide.
  • CMOS Complementary Metal Oxide Semiconductor
  • silicon photonics the most challenging issue in “Silicon Photonics” is the light source. This is because silicon and germanium in a bulk state are indirect transition semiconductors and thus have extremely low luminous efficiency. That is, in “silicon photonics”, it is desired to improve the performance of indirect transition semiconductors made of silicon, germanium, etc., and particularly when an indirect transition semiconductor made of silicon, germanium, etc. is used as a light emitting element. It is important to improve luminous efficiency.
  • An object of the present invention is to provide a technique capable of improving performance in a semiconductor device including an optical waveguide.
  • a semiconductor device in one embodiment, includes an optical waveguide layer formed of a semiconductor layer having a first surface and a second surface opposite to the first surface, and a first strain applied to the first surface side of the optical waveguide layer.
  • membrane which gives a tensile strain to the 2nd surface side of an optical waveguide layer are provided.
  • a semiconductor device in one embodiment, includes an optical waveguide layer formed of a semiconductor layer having a first surface and a second surface opposite to the first surface, and a first surface provided on the first surface side of the optical waveguide layer.
  • membrane provided in the 1st surface side of the optical waveguide layer so that the 1st film
  • the first film includes a silicon oxide film or a first silicon nitride film
  • the second film includes an aluminum nitride film or a second silicon nitride film.
  • the bond density between nitrogen and hydrogen in the second silicon nitride film is larger than the bond density between nitrogen and hydrogen in the first silicon nitride film.
  • a semiconductor device includes a thin-walled portion, an optical waveguide layer including a semiconductor layer formed in the thin-walled portion and having a first surface and a second surface opposite to the first surface, and an optical waveguide
  • the first film formed on the first surface of the layer and the back surface provided on the second surface side of the optical waveguide layer among the surfaces of the thin portion, and larger in size than the first film A second film.
  • the first film includes a silicon nitride film that is a silicon oxide film or a compressive stress film
  • the second film includes a silicon nitride film that is a silicon oxide film or a compressive stress film.
  • the performance of a semiconductor device including an optical waveguide can be improved.
  • (A) is a figure which shows typically the band structure of germanium which is an indirect transition semiconductor
  • (b) is a schematic diagram which shows the band structure at the time of giving an extension strain to the crystal
  • (A) is a figure which shows typically the structural example which gives a local stress to the core layer which is an optical waveguide layer
  • (b) is the figure which visualized the extension distortion added to a core layer.
  • (A) is a figure which shows typically the structural example which gives global stress to the core layer which is an optical waveguide layer
  • (b) is the figure which visualized the extension distortion added to a core layer.
  • FIG. 2 is a diagram for explaining a basic idea in Embodiment 1.
  • FIG. (A) is a figure which shows typically the structural example which gives both global stress and local stress to the core layer which is a light emitting layer
  • (b) is the figure which visualized the extensional strain added to a core layer.
  • FIG. 2 is a diagram illustrating a planar configuration of the semiconductor device according to the first embodiment
  • FIG. 3B is a cross-sectional view taken along line AA in FIG.
  • FIG. 7 is a cross-sectional view showing a manufacturing step of the semiconductor device in the first embodiment.
  • FIG. FIG. 12 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 11;
  • FIG. 13 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 12;
  • FIG. 14 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 13;
  • FIG. 15 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 14;
  • FIG. 16 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 15;
  • FIG. 17 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 16;
  • FIG. 12 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 11;
  • FIG. 13 is a cross-sectional view showing a manufacturing step of the semiconductor device following that
  • FIG. 18 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 17;
  • FIG. 19 is a cross-sectional view showing the manufacturing process of the semiconductor device, following FIG. 18;
  • FIG. 20 is a cross-sectional view showing the manufacturing process of the semiconductor device, following FIG. 19;
  • FIG. 6 is a cross-sectional view illustrating a configuration of a semiconductor device in a second embodiment.
  • FIG. 11 is a cross-sectional view showing a manufacturing step of the semiconductor device in the second embodiment.
  • FIG. 23 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 22;
  • FIG. 24 is a cross-sectional view showing the manufacturing process of the semiconductor device, following FIG. 23;
  • FIG. 23 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 22;
  • FIG. 25 is a cross-sectional view showing the manufacturing process of the semiconductor device, following FIG. 24;
  • (A) is a figure which shows the planar structure of the semiconductor device in Embodiment 3,
  • (b) is sectional drawing cut
  • the constituent elements are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.
  • FIG. 1 is a diagram showing a schematic band structure of a direct transition semiconductor.
  • the horizontal axis indicates the wave number (k) corresponding to the momentum
  • the vertical axis indicates energy (E).
  • E energy
  • the valence band and the conduction band constituting the band structure are shown, and the upper end of the valence band is shown as Ev, and the lower end of the conduction band is shown as Ec.
  • the upper end (Ev) of the valence band and the lower end (Ec) of the conduction band have the same wave number.
  • the direct transition semiconductor in the direct transition semiconductor, the upper end (Ev) of the valence band and the lower end (Ec) of the conduction band have the same wavenumber, so that the valence band from the lower end (Ec) of the conduction band. An electron transition to the upper end (Ev) occurs. For this reason, when a direct transition semiconductor is used as a light emitting element, the luminous efficiency is increased. That is, in the direct transition semiconductor, a light emitting element with high light emission efficiency can be manufactured due to the band structure.
  • the direct transition semiconductor there are compound semiconductors represented by GaAs and GaN.
  • FIG. 2 is a diagram showing a schematic band structure of an indirect transition semiconductor.
  • the horizontal axis represents the wave number (k) corresponding to the momentum
  • the vertical axis represents energy (E).
  • E energy
  • the valence band and the conduction band constituting the band structure are shown, the upper end of the valence band is shown as Ev, and the lower end of the conduction band is shown as Ec.
  • the upper end (Ev) of the valence band and the lower end (Ec) of the conduction band have different wave numbers.
  • indirect transition semiconductors require this phonon intervention, so that when the indirect transition semiconductor is used as a light emitting element, the light emission efficiency is lowered. That is, in the indirect transition semiconductor, the light emission efficiency is lowered due to the band structure.
  • Such indirect transition semiconductors include Si (silicon) and Ge (germanium).
  • silicon and germanium used in “silicon photonics” are indirect transition semiconductors, and light emitting elements with high luminous efficiency in “silicon photonics” It can be seen that ingenuity is required to realize Therefore, in the first embodiment, first, a light-emitting element having high light emission efficiency in “silicon photonics” is realized by using the knowledge described below.
  • FIG. 3A is a diagram schematically showing a band structure of germanium which is an indirect transition semiconductor.
  • the energy of the conduction band at the ⁇ point is higher than the energy of the conduction band at the L point. Therefore, it can be seen that germanium is an indirect transition semiconductor.
  • germanium is subjected to an extension strain, the band gap is reduced, and as the band gap is reduced, the energy of the conduction band at the ⁇ point becomes lower than the energy of the conduction band at the L point.
  • FIG. 3B is a schematic diagram showing a band structure in the case where a tensile strain is applied to a germanium crystal.
  • FIG. 3B it can be seen that when the germanium crystal is stretched, the energy of the conduction band at the ⁇ point is lower than the energy of the conduction band at the L point.
  • germanium which is an indirect transition semiconductor in a normal crystal state, functions as a direct transition semiconductor when it is given an extensional strain. Therefore, even if germanium, which is an indirect transition semiconductor, is used as a light-emitting element in “silicon photonics”, germanium can be made to function as a direct transition semiconductor if a structure that imparts tensile strain to germanium crystals can be realized.
  • a light emitting element with high luminous efficiency can be realized.
  • light emission in “silicon photonics” is based on the knowledge that an indirect transition semiconductor such as germanium or silicon can be made to function as a direct transition semiconductor by applying an extension strain. A highly efficient light-emitting element is realized.
  • the energy of the conduction band at the ⁇ point is higher than the energy of the conduction band at the L point in a normal state where no tensile strain is applied, but the difference is slight, and it is easy to apply the tensile strain.
  • the energy of the conduction band at the ⁇ point is lower than the energy of the conduction band at the L point. That is, germanium easily changes from an indirect transition semiconductor to a direct transition semiconductor by applying an extension strain. Therefore, in consideration of this point, the present specification pays particular attention to germanium.
  • the technical idea in the first embodiment is not limited to germanium, and can be widely applied to, for example, other indirect transition semiconductors represented by silicon.
  • the present inventor newly found that there is a matter to be solved as shown below when applying the above-described knowledge that the indirect transition semiconductor can function as a direct transition semiconductor when tensile strain is applied to the indirect transition semiconductor, Since the improvement of the matter to be solved has been examined, the following will describe the improvement.
  • FIG. 4 is a diagram for explaining matters to be improved with respect to local stress.
  • FIG. 4A is a diagram schematically illustrating a configuration example in which local stress is applied to the core layer, which is an optical waveguide layer
  • FIG. 4B is a diagram visualizing tensile strain applied to the core layer. It is.
  • a clad layer CLD made of silicon is formed on the insulating film IF, and a core layer CRL made of germanium is formed so as to be sandwiched between the clad layers CLD.
  • the refractive index of germanium constituting the core layer CRL is larger than the refractive index of silicon constituting the cladding layer CLD, the light propagating through the core layer CRL is confined in the core layer CRL. In this way, the core layer CRL that is an optical waveguide layer is configured.
  • a compressive stress film 10 is formed on the surface of the core layer CRL sandwiched between the clad layers CLD.
  • the compressive stress film 10 is a film that tends to stretch as a result of applying compressive stress to the film itself. Therefore, a tensile strain is applied to the core layer CRL in contact with the compressive stress film 10.
  • FIG. 4B it can be seen that an extension strain is applied to the surface side of the core layer CRL.
  • the tensile strain applied by the compressive stress film 10 is maximum at the interface between the compressive stress film 10 and the core layer CRL, and decreases as the distance from the compressive stress film 10 increases. Therefore, the tensile strain in the core layer CRL is reduced.
  • the distribution of is non-uniform.
  • the effect of effective stretching strain by the compressive stress film 10 is limited to a region from the surface of the core layer CRL to a depth of several tens of nm. Accordingly, the tensile strain due to the compressive stress film 10 is effectively applied to a portion formed near the surface (depth of about several tens to 100 nm), for example, like a channel region of a MOSFET.
  • the thickness of the core layer made of germanium targeted in the first embodiment is about several hundred nm, the local stress caused by the compressive stress film 10 gives tensile strain to the entire core layer CRL made of germanium. It becomes difficult.
  • the local stress due to the compressive stress film 10 has a thickness of about several hundred nm. It is difficult to give an extension strain to the entire core layer CRL having a thickness.
  • the core layer CRL serving as the optical waveguide layer needs to have a thickness of about (wavelength / refractive index) as the core layer CRL in order to confine propagating light in the core layer CRL. Furthermore, it is necessary to increase the thickness of the core layer CRL from the viewpoint of maintaining the physical properties and quality of germanium. This is because, when germanium is formed on silicon, germanium formed on silicon due to a mismatch in lattice constant between germanium and silicon, in principle, has a large defect density and dislocation density. This is because the core layer CRL (germanium layer) needs to be thickened in order to reduce the dislocation density.
  • the electric field peak of the propagation light propagating through the core layer CRL of about (wavelength / refractive index) is located near the center of the core layer CRL. For this reason, the ratio that the material gain near the center of the core layer CRL contributes to the amplification of the propagation light becomes high. In other words, the influence of the material properties near the front surface and near the back surface of the core layer CRL on the light emission properties is small.
  • the surface of the core layer CRL can be locally stretched, but the entire core layer CRL cannot be stretched.
  • the contribution to the parameter called mode gain indicating the luminous efficiency is also small. Therefore, it is difficult to sufficiently improve the light emission efficiency with the local stress by the compressive stress film 10 shown in FIG.
  • another technique for applying stress is global stress that deforms the entire structure (for example, the entire semiconductor substrate).
  • the global stress there is a method of warping the entire semiconductor substrate (wafer).
  • This global stress has an advantage that a strong and uniform stress can be applied to the entire semiconductor substrate compared to the local stress.
  • the method of applying global stress there is a concern that the semiconductor substrate may be warped or the semiconductor substrate may be damaged due to excessive stress. Furthermore, as shown below, it is difficult to sufficiently improve the light emission efficiency even in the method of applying global stress.
  • FIG. 5 is a diagram for explaining matters to be improved regarding global stress.
  • FIG. 5A is a diagram schematically showing a configuration example in which global stress is applied to the core layer which is an optical waveguide layer
  • FIG. 5B is a diagram visualizing the extension strain applied to the core layer. It is.
  • a clad layer CLD made of silicon is formed on the insulating film IF, and a core layer CRL made of germanium is formed so as to be sandwiched between the clad layers CLD.
  • the refractive index of germanium constituting the core layer CRL is larger than the refractive index of silicon constituting the cladding layer CLD, the light propagating through the core layer CRL is confined in the core layer CRL. In this way, the core layer CRL that is an optical waveguide layer is configured.
  • an extension stress film 11 is formed so as to cover the surface of the core layer CRL from the surface of the cladding layer CLD.
  • the extension stress film 11 is a film to be compressed as a result of extension stress being applied to the film itself. Therefore, compressive strain is applied to the core layer CRL in contact with the tensile stress film 11.
  • FIG. 5B it can be seen that compressive strain is applied to the surface side of the core layer CRL.
  • FIG. 6 is a diagram for explaining the basic idea in the first embodiment.
  • a clad layer CLD and a core layer CRL are formed on the insulating film IF, and the core layer CRL is arranged so as to be sandwiched between the clad layers CLD.
  • a compressive stress film 10 is formed on the surface of the core layer CRL, and an extension stress film 11 is formed over the compressive stress film 10 and over the cladding layer CLD.
  • the basic idea in the first embodiment is a technical idea of using the compressive stress film 10 and the tensile stress film 11 in combination, in particular, forming the compressive stress film 10 on the surface of the core layer CRL, and This is a technical idea of covering the compressive stress film 10 and forming the tensile stress film 11 over the clad layer CLD.
  • the tensile stress film 11 formed from the core layer CRL to the clad layer CLD applies global stress to the entire structure including the core layer CRL and the clad layer CLD to give a downward convex distortion.
  • the tensile stress film 11 applies a compressive stress to the surface side of the cladding layer CLD with which the tensile stress film 11 is in contact.
  • the front surface side of the cladding layer CLD and the core layer CRL contracts relative to the back surface side of the cladding layer CLD and the core layer CRL. Therefore, as shown in FIG.
  • stretch distortion occurs in the area AR ⁇ b> 2 on the back surface side of the cladding layer CLD and the core layer CRL.
  • the tensile stress can be applied to the core layer CRL from the back side of the core layer CRL by the global stress resulting from the tensile stress film 11.
  • the compressive stress film 10 is interposed between the core layer CRL and the extension stress film 11 on the core layer CRL.
  • the region AR1 on the surface side of the core layer CRL can be given tensile strain by the compressive stress film 10 in contact with the core layer CRL. That is, in the first embodiment, the compressive stress film 10 is interposed between the core layer CRL and the extension stress film 11, so that an extension strain can be applied to the surface side of the core layer CRL.
  • the tensile stress film 11 formed over the entire structure including the core layer CRL and the cladding layer CLD warps the entire structure. It is possible to generate an extension strain on the back side (region AR2) of the core layer CRL. Furthermore, according to the first embodiment, the compressive stress film 10 locally formed on the core layer CRL can give a tensile strain to the surface side (region AR1) of the core layer CRL. As a result, according to the first embodiment, since the extension strain can be applied from both the front surface side and the back surface side of the core layer CRL, the extension strain can be applied to the entire thick core layer CRL. . Therefore, according to the first embodiment, the entire germanium forming the core layer CRL is stretched and strained. As a result, the entire germanium can be directly functioned as a transition semiconductor. Luminous efficiency when using as a light emitting layer can be improved.
  • the feature point of the basic idea in the first embodiment is that the global stress and the local stress are used together, and in particular, the tensile stress is applied to the core layer CRL from the back side of the core layer CRL by the global stress.
  • the basic idea in the first embodiment that combines the global stress and the local stress, It can be said that the basic idea in the first embodiment is an excellent technical idea in that an extension strain can be applied to the entire core layer CRL.
  • FIG. 7A is a diagram schematically illustrating a configuration example in which both the global stress and the local stress are applied to the core layer which is the light emitting layer
  • FIG. 7B visualizes the extension strain applied to the core layer.
  • FIG. 7A for example, a clad layer CLD and a core layer CRL made of silicon are formed on the insulating film IF, and a core layer CRL made of germanium is formed so as to be sandwiched between the clad layers CLD. ing.
  • the refractive index of germanium constituting the core layer CRL is larger than the refractive index of silicon constituting the cladding layer CLD, the light propagating through the core layer CRL is confined in the core layer CRL.
  • the core layer CRL that is an optical waveguide layer is configured.
  • an extensional stress film 11 is formed so as to cover the surface of the core layer CRL from the surface of the cladding layer CLD, and the local compressive stress film 10 is directly above the core layer CRL. Is formed.
  • the compressive stress film 10 is a film that tends to stretch as a result of applying compressive stress to the film itself.
  • the extension stress film 11 is a film to be compressed as a result of extension stress being applied to the film itself.
  • the surface side of the core layer CRL that is in contact with the compressive stress film 10 is subjected to tensile strain due to local stress caused by the compressive stress film 10 and is formed from the cladding layer CLD to the surface side of the core layer CRL. Due to the global stress resulting from the stretch stress film 11, stretch strain is applied to the back side of the core layer CRL. That is, according to the configuration example shown in FIG. 7A, it is possible to apply an extension strain to the entire core layer CRL. Specifically, as shown in FIG. 7B, it can be seen that tensile strain is applied to the entire core layer CRL by applying tensile strain from both the front and back sides of the core layer CRL.
  • FIG. 8 is a diagram illustrating a mode gain in a configuration example in which the compressive stress film 10 is locally formed immediately above the core layer CRL.
  • the mode gain (G mod (x, z)) is an index indicating the light emission efficiency, and means that the light emission efficiency increases as the mode gain increases.
  • the mode gain is the product of the light intensity distribution ( ⁇ (x, z)) and the material gain (g mat ( ⁇ (x, z))) in the core layer CRL. It can be obtained by integrating with.
  • the material gain is a function of the extension strain (function of ⁇ ) applied to the core layer CRL.
  • the greater the extension strain the greater the material gain. Therefore, in order to increase the mode gain, it is necessary to increase the material gain.
  • the material gain of germanium to which normal stretch strain is not applied is smaller than that of the compound semiconductor.
  • the core layer CRL made of germanium it is effective to increase the tensile strain applied to the core layer CRL.
  • stretch distortion is applied only to a partial area (area with dots) on the surface side of the core layer CRL. Therefore, in the configuration example shown in FIG. 8, a portion with a small light intensity (region with dots) in the light intensity distribution, and a portion with a large expansion strain (dots) in the material gain corresponding to this portion. Only the product of the region marked with) contributes to the mode gain. That is, in the configuration example shown in FIG. 8, the mode gain does not increase due to the fact that only a part of the surface side of the core layer CRL is subjected to an extensional strain. In other words, it is difficult to improve the light emission efficiency in the configuration example shown in FIG. That is, in the configuration example shown in FIG. 8, the product of the light intensity and the material gain cannot be increased because it is not possible to give an extension strain to the central portion of the core layer CRL where the light intensity is high.
  • FIG. 9 is a diagram for explaining the mode gain in the configuration example for realizing the basic idea in the first embodiment.
  • the compressive stress film 10 is locally provided immediately above the core layer CRL, and the compressive stress film 10 is provided on the surface side of the core layer CRL extending from the core layer CRL to the cladding layer.
  • An extending stress film 11 is provided.
  • the tensile strain caused by the compressive stress film 10 is applied to the core layer CRYL from the surface side of the core layer CRL, and the tensile stress film is applied to the core layer CRL from the back surface side of the core layer CRL. 11 is added to the stretching strain.
  • a tensile strain can be applied to the entire core layer CRL, so that the product of the light intensity contributing to the mode gain and the material gain is increased. It can be done.
  • the mode gain can be significantly increased.
  • the light emission efficiency in the core layer CRL that functions as the light emitting layer can be improved.
  • germanium it is possible to obtain an excellent effect that light emission efficiency at the level of a direct transition semiconductor can be realized.
  • FIG. 10A is a diagram showing a planar configuration of the semiconductor device according to the first embodiment.
  • the semiconductor device according to the first embodiment includes, for example, an n-type germanium layer 20a, a p-type germanium layer 20b, an n-type silicon layer 30a, and a p-type silicon layer 30b.
  • the n-type germanium layer 20a and the p-type germanium layer 20b are formed so as to be sandwiched between the n-type silicon layer 30a and the p-type silicon layer 30b.
  • the core layer CRL is formed by the n-type germanium layer 20a and the p-type germanium layer 20b, and each of the n-type silicon layer 30a and the p-type silicon layer 30b forms a cladding layer CLD. That is, the core layer CLD is formed so as to be sandwiched between the clad layers CLD.
  • the compressive stress film 10 is formed on the core layer CRL including the n-type germanium layer 20a and the p-type germanium layer 20b, and further includes the compressive stress film 10 in a plan view.
  • An extensional stress film 11 is formed so as to cover 10.
  • a plurality of holes HL are formed in each of the n-type silicon layer 30a and the p-type silicon layer 30b functioning as the cladding layer CLD.
  • FIG. 10B is a cross-sectional view taken along the line AA in FIG.
  • the microbridge structure MBS is formed above the SOI substrate composed of the substrate layer 1a, the insulating layer 1b, and the silicon layer 1c via the gap SP.
  • an insulating film IF is formed on the silicon layer 1c of the SOI substrate, and a hole HL is formed so as to penetrate the insulating film IF and the silicon layer 1c. ing.
  • a protective film PF is formed on the inner wall of the hole HL.
  • a gap SP connected to the hole HL is formed in the insulating layer 1b, and the microbridge structure MBS is formed above the gap SP.
  • the insulating layer 1b and the silicon layer 1c of the SOI substrate remain so as to surround the gap SP in a plan view, and the microbridge structure MBS is formed on the SOI substrate by this remaining portion. It is supported by.
  • the core layer CRL is, for example, an indirect transition semiconductor when no extension strain is applied, and is composed of a semiconductor layer that functions as a direct transition semiconductor when the extension strain is applied.
  • the core layer CRL includes an n-type germanium layer 20a and a p-type germanium layer 20b.
  • the cladding layer CLD disposed on the left side of the core layer CRL is composed of an n-type silicon layer 30a
  • the cladding layer CLD disposed on the right side of the core layer CRL is a p-type. It is composed of a silicon layer 30b.
  • an insulating film IF1 is formed on the surface of the p-type silicon layer 30b.
  • the compressive stress film 10 is formed on the surface side (first surface side) of the core layer CRL, and the core is formed so as to cover the compressive stress film in plan view.
  • An extension stress film 11 is formed over the entire surface side of the layer CRL and the cladding layer CLD.
  • the microbridge structure MBS in the first embodiment includes the core layer CRL that is an optical waveguide functioning as a light emitting layer, the compressive stress film 10 formed on the surface of the core layer CRL, and a plan view.
  • the tensile stress film 11 is formed on the surface side of the core layer CRL so as to include the compressive stress film 10 and to cover the compressive stress film 10.
  • the core layer CRL which is a semiconductor layer having a front surface and a back surface opposite to the front surface, and a compressive stress that gives a tensile strain to the front surface side of the core layer CRL.
  • a configuration including the film 10 and the extension stress film 11 that applies extension strain to the back surface side of the core layer CRL is realized. This point will be described below.
  • the compressive stress film 10 is formed so as to be in direct contact with the surface of the core layer CRL.
  • the compressive stress film 10 is a film in which a compressive stress is applied to the film itself.
  • the compressive stress film 10 tends to expand.
  • an extension strain is applied to the surface side of the core layer CRL that is in contact with the compressive stress film 10. That is, according to the microbridge structure MBS in the present first embodiment, the surface layer of the core layer CRL is stretched by the local stress caused by the compressive stress film 10 formed on the surface of the core layer CRL. be able to.
  • the width in the x direction of the core layer CRL is, for example, about 3 ⁇ m, and the width in the x direction of the compressive stress film 10 formed on the surface of the core layer CRL is also about 3 ⁇ m.
  • the compressive stress film 10 is formed so as to be in direct contact with the surface of the core layer CRL.
  • the idea is not limited to this configuration, and an intermediate layer may be interposed between the core layer CRL and the compressive stress film 10.
  • an intermediate layer may be interposed between the core layer CRL and the compressive stress film 10.
  • a protective film made of a GeO film or a GeO 2 film can be used as an intermediate layer and interposed between the core layer CRL and the compressive stress film 10.
  • the thickness of the protective film can be, for example, 100 nm or less.
  • the core layer CRL is composed of an n-type germanium layer 20a and a p-type germanium layer 20b, and both the n-type germanium layer 20a and the p-type germanium layer 20b are compressed. Covered with a membrane 10. Therefore, in the first embodiment, the pn junction portion between the n-type germanium layer 20a and the p-type germanium layer 20b is necessarily covered with the compressive stress film 10. Thereby, the light emission efficiency of the core layer CRL which is a light emitting layer can be improved.
  • the fact that the n-type germanium layer 20a is covered with the compressive stress film 10 together with the pn junction portion between the n-type germanium layer 20a and the p-type germanium layer 20b also contributes to improving the light emission efficiency. That is, for example, in a germanium laser using the core layer CRL as a light emitting layer, the n-type germanium layer 20a is used as an optical gain medium.
  • the core layer includes the compressive stress film 10 and covers the compressive stress film 10 in plan view.
  • An extensional stress film 11 is formed over the surface side of the CRL and the surface side of the cladding layer CLD.
  • the extension stress film 11 is a film in which extension stress is applied to the film itself.
  • the extension stress film 11 attempts to compress. Therefore, compressive strain is applied to the surface side of the core layer CRL and the surface side of the cladding layer CLD that are in contact with the tensile stress film 11.
  • the front surface side of the core layer CRL shrinks relatively than the back surface side of the core layer CRL, whereby the microbridge structure MBS warps in a downwardly convex shape.
  • an extension strain is applied to the back side of the core layer CRL. That is, according to the microbridge structure MBS in the first embodiment, the microbridge structure is caused by the global stress caused by the tensile stress film 11 formed from the surface side of the core layer CRL to the surface side of the cladding layer CLD. A downwardly convex warp occurs in the MBS, and as a result, an extension strain can be applied to the back surface side of the core layer CRL.
  • the total thickness of the silicon layer 1c, the insulating film IF, and the core layer CRL of the microbridge structure MBS is about 5 ⁇ m or less and is formed in the microbridge structure MBS.
  • the thickness of the tensile stress film 11 is about 3 ⁇ m or less.
  • the thickness of the microbridge structure MBS is reduced, and It is desirable to increase the thickness of the tensile stress film 11.
  • the gap SP can be filled with an insulating material.
  • the microbridge structure MBS it is possible to give a convex warp only to the microbridge structure MBS without giving a convex warp downward to the entire SOI substrate.
  • the microbridge structure MBS according to the first embodiment is arranged above the SOI substrate via the gap SP.
  • the microbridge structure MBS can be warped downward to generate a tensile warp on the back side of the core layer CRL, while the entire SOI substrate is flat. Therefore, the SOI substrate can be damaged and the yield in the assembly process can be improved.
  • the core layer CRL which is a semiconductor layer having a front surface and a back surface opposite to the front surface, and the compressive stress film 10 that applies tensile strain to the front surface side of the core layer CRL.
  • a microbridge structure MBS including the tensile stress film 11 that applies tensile strain to the back surface side of the core layer CRL.
  • the surface side of the core layer CRL that is in contact with the compressive stress film 10 is subjected to tensile strain due to local stress caused by the compressive stress film 10, and A tensile stress is applied to the back side of the core layer CRL by the global stress caused by the tensile stress film 11 formed from the cladding layer CLD to the surface side of the core layer CRL.
  • the tensile strain is applied to the entire core layer CRL by applying the tensile strain from both the front side and the back side of the core layer CRL.
  • FIG. 10B attention is paid to the x direction.
  • the core layer CRL is sandwiched between the cladding layers CLD.
  • the core layer CRL is composed of an n-type germanium layer 20a and a p-type germanium layer 20b
  • the cladding layer CLD is composed of an n-type silicon layer 30a and a p-type silicon layer 30b. Therefore, considering that the refractive index of germanium is higher than the refractive index of silicon, the light generated in the core layer CRL is confined by the cladding layer CLD.
  • the core layer CRL is sandwiched between the compressive stress film 10 and the insulating film IF.
  • the compressive stress film 10 is formed of, for example, a silicon oxide film or a silicon nitride film
  • the insulating film IF is also formed of a silicon oxide film or the like
  • the refractive index of the compressive stress film 10 or the insulating film The refractive index of IF is smaller than the refractive index of the core layer CRL. Therefore, the light generated in the core layer CRL is confined also in the z direction.
  • the light generated in the core layer CRL is confined in both the x direction and the z direction.
  • the light generated in the core layer CRL extends in the y direction. It propagates in the existing core layer CRL. That is, the core layer CRL functions as an optical waveguide.
  • the compressive stress film 10 is made of, for example, a silicon oxide film or a silicon nitride film.
  • the tensile stress film 11 is made of, for example, an aluminum nitride film or a silicon nitride film.
  • the silicon nitride film is used as the compressive stress film 10 and also as the extension stress film 11, but the silicon nitride film depends on the composition. 10 or the tensile stress film 11.
  • the silicon nitride film becomes the compressive stress film 10 or the tensile stress film 11 depending on the bond density between nitrogen and hydrogen in the silicon nitride film.
  • the silicon nitride film is composed only of silicon and nitrogen.
  • hydrogen is mixed, hydrogen is mixed in the silicon nitride film.
  • the bond density of nitrogen and hydrogen in the silicon nitride film is low, the silicon nitride film becomes a compressive stress film.
  • the bond density of nitrogen and hydrogen in the silicon nitride film increases, the silicon nitride film becomes an extensional stress film.
  • a silicon nitride film having a low bond density of nitrogen and hydrogen can be used as the compressive stress film 10, and nitrogen and hydrogen can be used as the extension stress film 11.
  • a silicon nitride film having a high hydrogen bond density can be used. That is, when a silicon nitride film is used for both the compressive stress film 10 and the tensile stress film 11, the composition of the silicon nitride film used for the compressive stress film 10 and the tensile stress film 11 are used. This is different from the composition of the silicon nitride film. Specifically, the bond density of nitrogen and hydrogen of the silicon nitride film used for the tensile stress film 11 is larger than the bond density of nitrogen and hydrogen of the silicon nitride film used for the compressive stress film 10. it can.
  • the semiconductor device according to the first embodiment is configured as described above, and the manufacturing method thereof will be described below with reference to the drawings.
  • an SOI (Silicon On On Insulator) substrate including a substrate layer 1a, an insulating layer (buried insulating layer) 1b, and a silicon layer (SOI layer) 1c is prepared.
  • the thickness of the insulating layer 1b is about 1 ⁇ m
  • the thickness of the silicon layer 1c made of single crystal silicon is about 50 nm.
  • an insulating film IF made of a silicon oxide film is formed by using, for example, a thermal oxidation method.
  • the insulating film IF is not limited to this.
  • a silicon oxide film or a silicon nitride film formed by using a CVD (Chemical Vapor Deposition) method can also be used.
  • the opening OP1 is formed in the insulating film IF by using a photolithography technique and an etching technique.
  • the opening OP1 is formed to expose a part of the silicon layer 1c. This is because in order to grow the germanium layer, the silicon layer 1c serving as the nucleus of growth is necessary.
  • the opening OP1 can be formed by the following process. That is, after a resist film is applied to the surface of the insulating film IF, the resist film is patterned by a photolithography technique (exposure and development). Thereby, the silicon layer 1c can be partially exposed from the opening OP1.
  • a seed film (not shown) made of germanium is selectively formed on the silicon layer 1c exposed from the opening OP1, and then this seed film is used as a nucleus of crystal growth.
  • the n-type germanium layer 20a is formed over the insulating film IF from the inside of the opening OP1.
  • the seed film has many defects due to lattice mismatch between silicon and germanium, but the defect density of defects is reduced because the interface between silicon and germanium does not exist on the insulating film IF.
  • an n-type impurity serving as a light emitting medium is introduced into the n-type germanium layer 20a. Furthermore, as shown in FIG.
  • a junction structure (n-Ge / p-Ge / p-Si) that becomes a part of the pn diode is formed.
  • the thickness in the z direction of the silicon layer 1c and the junction structure is about 5 ⁇ m.
  • CMP method ChemicalCMechanical Polishing
  • the thickness in the z direction of the connection structure formed on the insulating film IF is, for example, about 500 nm.
  • the subsequent manufacturing process will be described focusing on the area AR surrounded by the dotted line in FIG.
  • a part of the p-type silicon layer 30b is etched by using a photolithography technique and an etching technique. Thereafter, as shown in FIG. 14, an insulating film IF1 is formed on a part of the etched p-type silicon layer 30b, and the insulating film IF2 extending over the insulating film IF1 and on the p-type germanium layer 20b and the n-type germanium layer 20a. Form.
  • the width in the x direction of a part of the p-type germanium layer 20b and the n-type germanium layer 20a covered with the insulating film IF2 is, for example, about 2 ⁇ m to satisfy the single mode condition of the optical waveguide.
  • the n-type germanium layer 20a exposed from the insulating film IF2 is removed by an etching technique using the insulating film IF2 as a mask.
  • an n-type silicon layer 30a is formed in the removed n-type germanium layer 20a.
  • an n-Si / n-Ge junction structure is formed.
  • an n-Si / n-Ge / p-Ge / p-Si junction structure can be formed on the insulating film IF in the x direction.
  • germanium has a higher refractive index than silicon
  • a germanium region (n-type germanium layer 20a + p-type germanium) sandwiched between silicon regions (n-type silicon layer 30a and p-type silicon layer 30b) with respect to the x direction.
  • a structure in which light is confined in the layer 20b) is realized. That is, the n-type germanium layer 20a and the p-type germanium layer 20b function as a core layer, and the n-type silicon layer 30a and the p-type silicon layer 30b function as a cladding layer.
  • the compressive stress film 10 having an internal stress of about 1 GPa and a film thickness of about 200 nm is formed by using, for example, a CVD method.
  • the compressive stress film 10 having a width in the x direction of about 3 ⁇ m, for example, is left on the n-type germanium layer 20a and the p-type germanium layer 20b.
  • tensile strain is applied to the n-type germanium layer 20a and the p-type germanium layer 20b formed immediately below the compressive stress film 10.
  • the tensile stress film 11 having an internal stress of about 0.5 GPa and a film thickness of about 1 ⁇ m is larger than the compressive stress film 10 so as to include the compressive stress film 10.
  • a metal electrode is connected to each of the n-type silicon layer 30a and the p-type silicon layer 30b to form a structure for injecting a current into the pn diode.
  • the compressive stress film 10 can be formed by leaving portions of the insulating film IF2 shown in FIG. 16 formed on the n-type germanium layer 20a and the p-type germanium layer 20b. In this case, since the process of newly forming the compressive stress film 10 can be omitted, the manufacturing process can be simplified.
  • the silicon oxide film is formed through the hole HL.
  • the insulating layer 1b is removed.
  • the microbridge structure MBS can be formed above the SOI substrate via the gap SP.
  • the tensile stress film 11 causes the microbridge structure MBS to warp downward.
  • tensile strain is applied to the back side of the core layer CRL shown in FIG.
  • an extension strain is also applied to the surface side of the core layer CRL.
  • the tensile strain is applied from both the front surface side and the back surface side of the core layer CRL, and the entire core layer CRL is subjected to the tensile strain.
  • the semiconductor device according to the first embodiment can be manufactured.
  • the gap SP for floating the microbridge structure MBS from the SOI substrate may be filled with an insulating material (inorganic insulating film or organic resin film), for example.
  • an insulating material inorganic insulating film or organic resin film
  • the mechanical strength can be improved.
  • the material has a low coefficient of thermal expansion and low viscosity so that no upward warping occurs in the microbridge structure MBS.
  • FIG. 21 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment.
  • the semiconductor device according to the second embodiment has an SOI substrate including a substrate layer 1a, an insulating layer 1b, and a silicon layer 1c.
  • An insulating film IF is formed on the silicon layer 1c of the SOI substrate, and a core layer CRL and a cladding layer CLD sandwiching the core layer CRL are formed on the insulating film IF.
  • the core layer CRL is composed of an n-type germanium layer 20a and a p-type germanium layer 20b.
  • the cladding layer CLD provided on the left side of the core layer CRL is composed of the n-type silicon layer 30a, while the cladding layer CLD provided on the right side of the core layer CRL is composed of the p-type silicon layer 30b. It is configured.
  • An insulating film IF1 is formed on a portion of the surface of the cladding layer CLD made of the p-type silicon layer 30b.
  • the compressive stress film 10 is formed so as to be in direct contact with the surface of the core layer CRL.
  • the compressive stress film 10 is made of, for example, a silicon oxide film or a silicon nitride film.
  • the compressive stress film 10 is a film in which a compressive stress is applied to the film itself.
  • the compressive stress film 10 tends to expand. Accordingly, an extension strain is applied to the surface side of the core layer CRL that is in contact with the compressive stress film 10. That is, also in the semiconductor device according to the second embodiment, it is possible to give a tensile strain to the surface side of the core layer CRL by local stress caused by the compressive stress film 10 formed on the surface side of the core layer CRL.
  • an insulating film IF3 is partially formed on the back surface of the SOI substrate.
  • the back surface of the SOI substrate exposed from the insulating film IF3 penetrates the SOI substrate to pass through the insulating film.
  • a groove DIT reaching IF is formed.
  • a thin portion is formed above the groove DIT, and the core layer CRL is formed in the thin portion.
  • a compressive stress film 12 is formed so as to be in contact with the insulating film IF exposed from the trench DIT.
  • the compressive stress film 12 is also composed of, for example, a silicon oxide film or a silicon nitride film.
  • the size of the compressive stress film 12 is larger than the size of the compressive stress film 10 as shown in FIG. Therefore, the tensile strain applied to the back side of the thin portion by the compressive stress film 12 is larger than the tensile strain applied to the front surface side of the thin portion by the compressive stress film 10.
  • the back surface side of the thin portion extends more than the front surface side, so that a downwardly convex warp occurs in the thin portion.
  • a tensile stress is applied to the back surface side of the core layer CRL due to the global stress caused by the downwardly convex warp generated in the thin portion.
  • the tensile strain is applied to the entire core layer CRL by applying the tensile strain from both the front side and the back side of the core layer CRL. It can be seen that the idea is embodied.
  • the thin portion, the core layer CRL formed on the thin portion, the compressive stress film 10 formed on the surface of the core layer CRL, and the surface of the thin portion a structure having a compressive stress film 12 formed on the back surface provided on the back surface side of the core layer CRL and a size of the compressive stress film 12 larger than the size of the compressive stress film 10 is realized.
  • the surface side of the core layer CRL that is in contact with the small-sized compressive stress film 10 is subjected to tensile strain due to local stress caused by the compressive stress film 10, and A tensile stress is applied to the back surface side of the core layer CRL by the global stress caused by the convex warpage below the thin portion formed by the large compressive stress film 12 formed on the bottom surface of the groove DIT.
  • the tensile strain is applied from both the front surface side and the back surface side of the core layer CRL, and the entire core layer CRL is subjected to the tensile strain.
  • the light emission efficiency in the core layer CRL functioning as the light emitting layer can be improved.
  • the semiconductor device according to the second embodiment is configured as described above, and the manufacturing method thereof will be described below with reference to the drawings.
  • an insulating film IF3 is formed on the back surface of the substrate layer 1a.
  • the insulating film IF3 is formed of, for example, a silicon oxide film, and can be formed by using, for example, a CVD method.
  • the insulating film IF3 is patterned to form an opening OP2 in the insulating film IF3.
  • the substrate layer 1a exposed from the opening OP2 is etched using the patterned insulating film IF3 as a mask.
  • This etching can be, for example, wet etching using TMAH (Tetra Methyl Ammonium Hydroxide).
  • TMAH Tetra Methyl Ammonium Hydroxide
  • This TMAH is an anisotropic etching solution in which the (111) plane of silicon appears. For this reason, the size of the bottom surface of the trench DIT is smaller than the size of the opening OP2 formed in the insulating film IF3.
  • the size of the opening OP2 is necessary to make the size of the opening OP2 larger than the size of the thin portion, for example, about 70 ⁇ m larger than the size of the thin portion to be formed.
  • the exposed insulating layer 1b is etched, and further, the exposed silicon layer 1c is etched by etching the insulating layer 1b.
  • a trench DIT that penetrates the SOI substrate and reaches the insulating layer IF can be formed.
  • a thin portion can be formed above the trench DIT.
  • the compressive stress film 12 is formed of, for example, a silicon oxide film or a silicon nitride film, and can be formed by using, for example, a CVD method.
  • the compressive stress film 12 is formed so that the size of the compressive stress film 12 is larger than the size of the compressive stress film 10 as shown in FIG.
  • the tensile strain applied to the back side of the thin portion by the compressive stress film 12 is larger than the tensile strain applied to the front surface side of the thin portion by the compressive stress film 10. Therefore, since the back surface side of the thin wall portion extends more than the front surface side, the thin wall portion is warped downward.
  • a tensile stress is applied to the back surface side of the core layer CRL due to the global stress caused by the downwardly convex warp generated in the thin portion.
  • the tensile strain can be applied from both the front surface side and the back surface side of the core layer CRL, and the entire core layer CRL can be applied with the tensile strain.
  • the silicon nitride film functioning as a compressive stress film is formed by adjusting the film formation temperature and the supply amount of the material gas. For example, when the bond density of nitrogen and hydrogen (NH bond) in the silicon nitride film is low, the silicon nitride film becomes a compressive stress film, while the bond between nitrogen and hydrogen (NH bond) in the silicon nitride film When the density is high, the silicon nitride film becomes a tensile stress film.
  • the silicon nitride film used in Embodiment 2 needs to be a compressive stress film, by adjusting the film forming conditions, nitrogen and hydrogen (N—H) A silicon nitride film having a low bond density is formed as the compressive stress film 10 or the compressive stress film 12.
  • the semiconductor device according to the second embodiment can be manufactured.
  • FIG. 26A shows a planar configuration of the semiconductor device according to the third embodiment.
  • the core layer CRL that functions as a light absorption layer (light receiving layer) is composed of a germanium layer 20 that is an intrinsic semiconductor layer, and the core layer CRL is composed of, for example, an amorphous silicon layer 21.
  • the core layer CRL functioning as a light receiving portion of the light receiving element (semiconductor device) in the third embodiment is optically connected to another optical circuit. can do.
  • FIG. 26 (b) is a cross-sectional view taken along line AA in FIG. 26 (a).
  • the core layer CRL made of the germanium layer 20 is surrounded by the clad layer CLD made of the n-type silicon layer 30a and the clad layer CLD made of the p-type silicon layer 30b.
  • the core layer CRL which is an intrinsic semiconductor layer having a front surface and a back surface opposite to the front surface, and a tensile strain on the front surface side of the core layer CRL.
  • a micro-bridge structure MBS is realized that includes a compressive stress film 10 that imparts a tensile stress and a tensile stress film 11 that imparts a tensile strain to the back side of the core layer CRL. That is, also in the third embodiment, the surface side of the core layer CRL in contact with the compressive stress film 10 is subjected to tensile strain due to local stress caused by the compressive stress film 10, and from the clad layer CLD to the core layer CRL. Due to the global stress caused by the tensile stress film 11 formed over the front surface side, the tensile strain is applied to the back surface side of the core layer CRL. As a result, also in the third embodiment, the tensile strain is applied from both the front surface side and the back surface side of the core layer CRL so that the entire core layer CRL is stretched. Is embodied.
  • the core layer CRL functions as a light absorption layer.
  • the core layer CRL is formed from the germanium layer 20 that is an intrinsic semiconductor layer, and the entire core layer CRL is stretched to improve the light absorption efficiency in the core layer CRL. Can do. This point will be described below.
  • the core layer CRL is composed of the germanium layer 20 which is an intrinsic semiconductor layer
  • the core layer CRL is formed in the core layer CRL sandwiched between the clad layer CLD made of the n-type silicon layer 30a and the clad layer made of the p-type silicon layer 30b.
  • the depletion layer becomes larger.
  • the fact that light is absorbed in the core layer CRL means that light is absorbed in the depletion layer.
  • electrons are excited from the valence band to the conduction band. This means that holes are generated in the valence band and electrons transition to the conduction band.
  • the light absorption efficiency in the core layer CRL can be improved by configuring the core layer CRL functioning as the light absorption layer from the germanium layer 20 which is an intrinsic semiconductor layer.
  • the surface side of the core layer CRL is subjected to tensile strain due to local stress caused by the compressive stress film 10, and from the cladding layer CLD to the core layer.
  • a tensile stress is applied to the back surface side of the core layer CRL by the global stress caused by the tensile stress film 11 formed over the surface side of the CRL.
  • the tensile strain is applied from both the front surface side and the back surface side of the core layer CRL, and the entire core layer CRL is subjected to the tensile strain. This means that the band gap of the germanium layer 20 constituting the core layer CRL is reduced over the entire core layer CRL.
  • the energy for exciting electrons from the valence band to the conduction band decreases as the band gap decreases, even the light having a longer wavelength is absorbed by the core layer CRL. This means that according to the third embodiment, the light absorption efficiency in the core layer CRL is improved.
  • the core layer CRL is formed from the germanium layer 20 which is an intrinsic semiconductor layer, and the entire core layer CRL is subjected to tensile strain.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

La présente invention vise à améliorer la performance d'un dispositif semi-conducteur comprenant un guide d'onde optique. À cet effet, l'invention concerne un dispositif semi-conducteur qui comprend : une couche de guide d'onde optique formée d'une couche semi-conductrice ayant une surface avant et une surface arrière ; un premier film de contrainte qui applique une contrainte de traction sur le côté de surface avant de la couche de guide d'onde optique ; et un second film de contrainte qui applique une contrainte de traction sur le côté de surface arrière de la couche de guide d'onde optique.
PCT/JP2015/081882 2015-11-12 2015-11-12 Dispositif semi-conducteur WO2017081796A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2015/081882 WO2017081796A1 (fr) 2015-11-12 2015-11-12 Dispositif semi-conducteur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2015/081882 WO2017081796A1 (fr) 2015-11-12 2015-11-12 Dispositif semi-conducteur

Publications (1)

Publication Number Publication Date
WO2017081796A1 true WO2017081796A1 (fr) 2017-05-18

Family

ID=58694783

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/081882 WO2017081796A1 (fr) 2015-11-12 2015-11-12 Dispositif semi-conducteur

Country Status (1)

Country Link
WO (1) WO2017081796A1 (fr)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534525A (ja) * 1991-07-26 1993-02-12 Nippon Telegr & Teleph Corp <Ntt> 光回路
JPH10256158A (ja) * 1997-03-13 1998-09-25 Hitachi Ltd 半導体装置及びその製造方法
JP2003207660A (ja) * 2002-01-11 2003-07-25 Nippon Telegr & Teleph Corp <Ntt> 光導波路
JP2003248130A (ja) * 2002-02-26 2003-09-05 Mitsubishi Electric Corp 石英系光導波路部品
JP2007173590A (ja) * 2005-12-22 2007-07-05 Toshiba Corp 半導体発光材料およびそれを用いた発光素子
WO2007094057A1 (fr) * 2006-02-15 2007-08-23 Fujitsu Limited Dispositif optique
JP2007294628A (ja) * 2006-04-25 2007-11-08 Hitachi Ltd シリコン発光ダイオード、シリコン光トランジスタ、シリコンレーザー及びそれらの製造方法。
US7391801B1 (en) * 2005-11-25 2008-06-24 The United States Of America As Represented By The Secretary Of The Air Force Electrically pumped Group IV semiconductor micro-ring laser
WO2010055750A1 (fr) * 2008-11-12 2010-05-20 株式会社日立製作所 Élément émetteur de lumière, élément récepteur de lumière et procédé de fabrication de l'élément récepteur de lumière
JP2014175526A (ja) * 2013-03-11 2014-09-22 Hitachi Ltd 半導体光素子およびその製造方法

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534525A (ja) * 1991-07-26 1993-02-12 Nippon Telegr & Teleph Corp <Ntt> 光回路
JPH10256158A (ja) * 1997-03-13 1998-09-25 Hitachi Ltd 半導体装置及びその製造方法
JP2003207660A (ja) * 2002-01-11 2003-07-25 Nippon Telegr & Teleph Corp <Ntt> 光導波路
JP2003248130A (ja) * 2002-02-26 2003-09-05 Mitsubishi Electric Corp 石英系光導波路部品
US7391801B1 (en) * 2005-11-25 2008-06-24 The United States Of America As Represented By The Secretary Of The Air Force Electrically pumped Group IV semiconductor micro-ring laser
JP2007173590A (ja) * 2005-12-22 2007-07-05 Toshiba Corp 半導体発光材料およびそれを用いた発光素子
WO2007094057A1 (fr) * 2006-02-15 2007-08-23 Fujitsu Limited Dispositif optique
JP2007294628A (ja) * 2006-04-25 2007-11-08 Hitachi Ltd シリコン発光ダイオード、シリコン光トランジスタ、シリコンレーザー及びそれらの製造方法。
WO2010055750A1 (fr) * 2008-11-12 2010-05-20 株式会社日立製作所 Élément émetteur de lumière, élément récepteur de lumière et procédé de fabrication de l'élément récepteur de lumière
JP2014175526A (ja) * 2013-03-11 2014-09-22 Hitachi Ltd 半導体光素子およびその製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NAM ET AL.: "Strained german ium thin film membrane on silicon substrate for optoelectronics", OPTICS EXPRESS, vol. 19, no. 27, December 2011 (2011-12-01), pages 25866 - 25872, XP055380970 *

Similar Documents

Publication Publication Date Title
JP5167384B2 (ja) 基板の分割方法
US8154009B1 (en) Light emitting structure including high-al content MQWH
US9653639B2 (en) Laser using locally strained germanium on silicon for opto-electronic applications
US8759203B2 (en) Growing III-V compound semiconductors from trenches filled with intermediate layers
US7442999B2 (en) Semiconductor substrate, substrate for semiconductor crystal growth, semiconductor device, optical semiconductor device, and manufacturing method thereof
JP5923121B2 (ja) 半導体光素子
US20140299885A1 (en) Substrate structures and semiconductor devices employing the same
TW201943072A (zh) 稀土基整合光子及電子分層結構
KR101878742B1 (ko) 그래핀층 상에 ＧａＮ 층을 성장시키는 방법 및 상기 그래핀층 상의 ＧａＮ을 이용한 발광소자
KR102104062B1 (ko) 기판 구조체, 이를 포함한 ｃｍｏｓ 소자 및 ｃｍｏｓ 소자 제조 방법
KR102210325B1 (ko) Ｃｍｏｓ 소자 및 그 제조 방법
JP2016188956A (ja) モード変換素子及び光機能素子
JP6210415B2 (ja) 紫外線発光素子の製造方法
TWI523264B (zh) 用於製造光電半導體晶片之方法及此類之半導體晶片
JP2014183194A (ja) 半導体装置の製造方法
WO2017081796A1 (fr) Dispositif semi-conducteur
JP6783569B2 (ja) 光半導体素子
JP6127103B2 (ja) 半導体受光素子及びその製造方法
JP3879604B2 (ja) 半導体多層基板および半導体多層膜の製造方法
JP2014183055A (ja) 発光素子及びその製造方法
JP6228873B2 (ja) 半導体光素子の製造方法
TW202234479A (zh) 半導體基板、半導體基板之製造方法、半導體基板之製造裝置、電子零件及電子機器
JP2005072575A (ja) 半導体装置及び基板の分割方法
JP4910492B2 (ja) 窒化物半導体ウエハの分割方法
CN111354832A (zh) 一种Si基改性Ge单片同层结构的制备工艺

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15908316

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15908316

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP