WO2016194738A1 - 導電性条材およびその製造方法 - Google Patents
導電性条材およびその製造方法 Download PDFInfo
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- WO2016194738A1 WO2016194738A1 PCT/JP2016/065479 JP2016065479W WO2016194738A1 WO 2016194738 A1 WO2016194738 A1 WO 2016194738A1 JP 2016065479 W JP2016065479 W JP 2016065479W WO 2016194738 A1 WO2016194738 A1 WO 2016194738A1
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- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/34—Pretreatment of metallic surfaces to be electroplated
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/50—After-treatment of electroplated surfaces by heat-treatment
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/50—After-treatment of electroplated surfaces by heat-treatment
- C25D5/505—After-treatment of electroplated surfaces by heat-treatment of electroplated tin coatings, e.g. by melting
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/615—Microstructure of the layers, e.g. mixed structure
- C25D5/617—Crystalline layers
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/625—Discontinuous layers, e.g. microcracked layers
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/06—Wires; Strips; Foils
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/06—Wires; Strips; Foils
- C25D7/0614—Strips or foils
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
- C25F1/00—Electrolytic cleaning, degreasing, pickling or descaling
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
- C25F3/00—Electrolytic etching or polishing
- C25F3/16—Polishing
- C25F3/22—Polishing of heavy metals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/02—Contact members
- H01R13/03—Contact members characterised by the material, e.g. plating, or coating materials
Definitions
- the present invention relates to a conductive strip and a method for manufacturing the same.
- electrical contact materials In materials used for electrical contacts (hereinafter referred to as electrical contact materials), conductive materials are used in the shape of strip materials (hereinafter referred to as conductive strip materials) because of the requirements for performance, shape and processing method as electrical contacts.
- copper (Cu) or a copper alloy having excellent electrical conductivity has been used in this application.
- contact characteristics have been improved, and the number of cases where copper or a copper alloy is used as it is is decreasing.
- various surface-treated materials on copper or copper alloys are manufactured and used.
- an electrical contact material a member in which tin (Sn) or Sn alloy is plated on copper or a copper alloy on an electrical contact portion is widely used.
- This plating material is known as a high-performance conductor with excellent conductivity and strength of conductive substrates and excellent electrical connectivity, corrosion resistance and solderability of plating layers. Widely used for various terminals and connectors used.
- This plating material is usually made of nickel (Ni) or cobalt (Co) having a barrier function on the base material to prevent the alloy component of the conductive base material such as copper from diffusing into the plating layer. Plated.
- this plating material When this plating material is used as a terminal, for example, in a high temperature environment such as in an automobile engine room, Sn of the Sn plating layer on the surface of the terminal is easily oxidizable, so that an oxide film is formed on the surface of the Sn plating layer. . Since this oxide film is fragile, it is broken at the time of terminal connection, and the underlying unoxidized Sn plating layer is exposed to provide good electrical connectivity.
- the electrical contact material is used in a high temperature environment.
- contact materials for sensors in the engine room of automobiles are likely to be used in a high temperature environment such as 100 ° C. to 200 ° C.
- reliability such as contact characteristics at a temperature higher than the operating temperature assumed in conventional consumer devices is required.
- the contact resistance in the outermost layer is increased due to diffusion and surface oxidation of the conductive base material component at high temperatures. Therefore, various studies have been made on diffusion suppression and oxidation prevention of the conductive base material component.
- Sn or Sn alloy in order from the outermost surface of the base material, Sn or Sn alloy (the Sn alloy referred to here is an Sn alloy excluding Cu—Sn alloys such as Cu 6 Sn 5 and Cu 3 Sn).
- a surface layer (outermost layer), a Cu—Sn alloy layer, and an intermediate layer made of Ni or Cu layer, in which the Ni layer has an average crystal grain size of 1 ⁇ m or more and the thickness of the Ni layer By setting the thickness to 0.1 to 1.0 ⁇ m or the like, a stable contact resistance can be maintained even in a high temperature environment.
- Patent Document 2 discloses a first Ni plating layer formed by epitaxial growth on a surface of a copper or copper alloy plate on a conductive base material made of copper or a copper alloy, and the first Ni plating layer.
- a second Ni plating layer formed by nucleation and growth, wherein the first Ni plating layer has a thickness of 0.05 to 0.5 ⁇ m, and the second Ni plating layer is formed on the surface thereof.
- a copper or copper alloy with a Ni plating having a crystal orientation degree index of ⁇ 111 ⁇ plane measured by X-ray diffraction of 0.5 to 3.0 and a crystallite size of 10 to 50 nm is proposed as a copper alloy plate. . This provides a copper or copper alloy plate with Ni plating in which a decrease in gloss is suppressed by controlling the Ni plating structure.
- Patent Document 3 an intermediate layer such as Ni or Ni alloy is formed between the reflective layer made of the outermost layer silver or silver alloy and the surface of the conductive substrate, and the conductive material for Sn-plated connection parts having excellent heat resistance. Materials have been proposed.
- Patent Document 4 has a configuration in which an Sn layer, a Cu—Sn alloy layer, and a Ni or Cu layer are formed in order from the outermost surface on a conductive substrate, and among these, the average crystal grain size of the Cu—Sn layer It has been proposed to improve the wear resistance of Sn plating.
- Patent Document 5 a Cu—Sn alloy layer and a Ni layer are formed in order from the outermost layer between the outermost layer Sn plating and the surface of the conductive substrate, and have high reflectivity, particularly long-term reliability (heat resistance A lead frame for optical semiconductor devices has been proposed. In Patent Document 5, it is proposed to improve the reflectance and long-term reliability (heat resistance) by controlling the particle size of the intermediate layer of the noble metal coating material.
- JP 2014-122403 A JP 2014-141725 A JP2004-068026 JP2009-097040 JP2014-204046
- the present invention provides a conductive strip that can suppress diffusion of the base component into Sn even after being kept at a high temperature for a long time, and as a result, can suppress an increase in contact resistance, and a method for manufacturing the same. It is an issue to provide.
- a conductive strip composed of a conductive base material made of copper or a copper alloy and a plurality of plating layers, Number of intersections between the interface between the conductive substrate and the first intermediate layer (one of the plurality of plating layers) provided on the conductive substrate and the grain boundary of the first intermediate layer However, the number of the interfaces per 10 ⁇ m is 15 or more and 120 or less.
- the number of intersections between the interface between the conductive substrate and the first intermediate layer and the crystal grain boundary of the first intermediate layer is 25 or more and 60 or less as the number per interface length of 10 ⁇ m.
- the plurality of plating layers are A first intermediate layer made of Ni or Ni alloy provided on the conductive substrate; A second intermediate layer made of Cu or Cu-Sn alloy provided on the first intermediate layer; The conductive strip material according to (1) or (2), comprising an outermost layer made of Sn or an Sn alloy provided on the second intermediate layer.
- the number of intersections (hereinafter referred to as the number of entrances) between the interface between the conductive base material and the first intermediate layer and the crystal grain boundary of the first intermediate layer is the first intermediate layer and the first intermediate layer.
- the ratio (number of inlets) / (number of outlets) is 1. with respect to the number of intersections between the interface with the second intermediate layer and the grain boundary of the first intermediate layer (hereinafter referred to as the number of outlets).
- the manufacturing method of the electrically conductive strip characterized.
- the plating thickness of the first half 30 to 70% is 10 to 20 A / dm 2
- the plating thickness of the second half 70 to 30% is 3 to 8 A / dm 2 (5 )
- the method for producing a conductive strip according to (6) is 10 to 20 A / dm 2
- the plating thickness of the second half 70 to 30% is 3 to 8 A / dm 2 (5 )
- the conductive strip of the present invention can improve the heat resistance by suppressing the diffusion of the base component. For example, even after holding at 185 ° C. ⁇ 500 hours for a long time, diffusion of the base component into Sn can be suppressed, and as a result, an increase in contact resistance can be suppressed.
- FIG. 1 is a sectional view of a conductive strip according to an embodiment of the present invention, and schematically shows a state of a crystal grain boundary of a first intermediate layer.
- FIG. 2 is a cross-sectional view of a conductive strip according to another embodiment of the present invention, and schematically shows the state of crystal grain boundaries in the first intermediate layer.
- the conductive strip material according to an embodiment of the present invention has a plurality of plating layers on a conductive base material made of copper or a copper alloy.
- the plurality of plating layers include a first intermediate layer made of Ni or Ni alloy, a second intermediate layer made of Cu or Cu—Sn alloy, and an outermost layer made of Sn or Sn alloy.
- the number of intersections between the interface between the conductive base material and the first intermediate layer and the crystal grain boundary of the first intermediate layer is 15 or more and 120 or less as the number per interface length of 10 ⁇ m. It is configured to be. Thereby, the spreading
- the “number of intersections between the interface between the conductive base material and the first intermediate layer and the crystal grain boundary of the first intermediate layer” (“the crystal grain boundary of the first intermediate layer and the conductive layer”
- the “number of intersections with the base material” is referred to as “number of entrances A”.
- the “number of intersections between the interface between the first intermediate layer and the second intermediate layer and the crystal grain boundary of the first intermediate layer” (“the crystal boundary of the first intermediate layer and the second intermediate layer Hereinafter, the “number of intersections”) is referred to as “the number of exits B”.
- FIG. 1 shows a conductive strip 10 in a state in which a conductive base material 1, a first intermediate layer 2, a second intermediate layer 3, and an outermost layer 4 are laminated almost in parallel.
- FIG. 2 shows a curved surface. The conductive strip 10 in a state where the first intermediate layer 2, the second intermediate layer 3, and the outermost layer 4 are laminated on the conductive substrate 1 is shown. In FIG. 1 and FIG. 2, the inlet A and the outlet B are shown.
- a conductive strip 10 is formed on a conductive base material 1 made of copper or a copper alloy, a first intermediate layer 2 made of Ni or Ni alloy, and a second intermediate layer 3 made of Cu or Cu—Sn alloy.
- the outermost layer 4 made of Sn or Sn alloy is provided in this order.
- the number of entrances “A” is configured to be 15 or more and 120 or less as the number of interfaces per 10 ⁇ m length.
- the state of the crystal grain boundary in the figure is a conceptual diagram, the crystal grain boundary is illustrated in a straight line. The crystal grain boundary is not necessarily a straight line from the conductive substrate 1 side to the second intermediate layer 3 side.
- the number of inlets A to 120 or less by suppressing the number of inlets A to 120 or less, the amount of grain boundary diffusion under high temperature is suppressed, and the amount of diffusion of copper as the base material component to the outermost layer 4 is reduced. It is possible to suppress the increase in contact resistance based on the oxidation of copper in the outermost layer 4. Further, by setting the number of inlets A to 15 or more, the dislocation density in the crystal grains for filling the lattice mismatch between the conductive base material 1 (copper alloy) and the plating (Ni) of the first intermediate layer 2 is reduced. By suppressing the intragranular diffusion and suppressing the exposure of copper to the outermost layer 4, an increase in contact resistance due to copper oxidation of the outermost layer 4 can be suppressed.
- the conductive substrate 1 is made of copper or a copper alloy.
- a copper alloy CDA (Copper Development Association) listed alloys “C14410 (Cu-0.15Sn, manufactured by Furukawa Electric Co., Ltd., trade name: EFTEC-3)”, “C19400 (Cu—Fe series) Alloy material, Cu-2.3Fe-0.03P-0.15Zn "", “C18045 (Cu-0.3Cr-0.25Sn-0.5Zn, manufactured by Furukawa Electric Co., Ltd., trade name: EFTEC-64T ) ”,“ C64770 (Cu—Ni—Si alloy material, manufactured by Furukawa Electric Co., Ltd., trade name: FAS-680) ”,“ C64775 (Cu—Ni—Si alloy material, Furukawa Electric Co., Ltd.) Manufactured, trade name: FAS-820) "and the like.
- CDA Copper Development Association
- the unit of the number before each element of the copper alloy indicates mass% in the copper alloy.
- TPC tough pitch copper
- OFC oxygen-free copper
- phosphor bronze brass (for example, 70 mass) % Cu-30 mass% Zn, abbreviated as 7/3 brass), etc.
- these conductive substrates 1 have different electrical conductivity and strength, they are appropriately selected according to required characteristics and used. From the viewpoint of improving conductivity and heat dissipation, it is preferable to use a copper alloy strip having a conductivity of 5% IACS or more.
- the “base material component” when the copper alloy is handled as the conductive base material 1 indicates copper as a main component.
- the thickness of the conductive substrate 1 is not particularly limited, but is usually 0.05 to 2.00 mm, preferably 0.1 to 1.2 mm.
- middle layer 2 will not have a restriction
- the thickness of the first intermediate layer 2 is preferably 0.05 to 2 ⁇ m, more preferably 0.2 to 1 ⁇ m.
- the first intermediate layer 2 is Ni, 0.2 to 0.5 ⁇ m is preferable. This is because if the Ni layer is too thin, even if the number of inlets A or outlets B is controlled, the diffusion suppressing effect of the base material component becomes insufficient, and if it is too thick, it reacts with Sn or Sn alloy of the outermost layer 4 and Sn and Ni This is because the contact resistance increases due to the formation of this compound.
- the number of intersections between the interface between the conductive base material 1 and the first intermediate layer 2 and the crystal grain boundary of the first intermediate layer 2 is the number per interface length 10 ⁇ m ( The intersection between the crystal grain boundary of the first intermediate layer 2 and the conductive substrate 1, that is, the number of entrances A) is 15 or more and 120 or less.
- the number of inlets A is preferably 25 or more and 60 or less.
- the number of the inlets A is larger than the number of the outlets B.
- the ratio of the number of inlets A to the number of outlets B (number of inlets A) / (number of outlets B) is preferably 1.1 or more.
- the first intermediate layer 2 can also be formed by a conventional method such as sputtering, vapor deposition, or wet plating. In consideration of ease of control of grain boundaries and thickness and productivity, it is particularly preferable to use a wet plating method, and it is more preferable to use an electroplating method. Details of the plating conditions will be described later.
- the second intermediate layer 3 in the present invention is made of Cu or a Cu—Sn alloy.
- the thickness of the second intermediate layer 3 is preferably 0.05 to 2 ⁇ m, more preferably 0.1 to 1 ⁇ m.
- the second intermediate layer 3 can be formed by a usual method such as sputtering, vapor deposition, or wet plating. In view of ease of control of the coating thickness and productivity, it is particularly preferable to use a wet plating method, and more preferably an electroplating method.
- the outermost layer 4 of the conductive strip 10 is made of Sn or Sn alloy.
- the Sn alloy include Sn—Cu, Sn—Bi, Sn—Pb, Sn—Ag, Sn—Sb, Sn—In, and Sn—Zn alloy. Since the outermost layer 4 has a low contact resistance, the connection reliability is good and the productivity is good.
- the thickness of the outermost layer 4 is preferably 0.05 to 5 ⁇ m, more preferably 0.2 to 3 ⁇ m.
- the outermost layer 4 can be formed by a normal method such as sputtering, vapor deposition, or wet plating. In view of ease of control of the coating thickness and productivity, it is particularly preferable to use a wet plating method, and more preferably an electroplating method.
- Method for producing conductive strip 10 In the conductive strip 10 as described above, a plate material that has been appropriately rolled is used as the conductive substrate 1, and vacuum heat treatment, electrolytic polishing, pretreatment (cathode electrolytic degreasing, pickling), and first intermediate layer 2 are used. It can manufacture by performing the plating of this, the plating of the 2nd intermediate
- the rolling may be performed until a desired plate thickness (strip thickness) is obtained.
- the conductive strip 10 is subjected to vacuum heat treatment before electropolishing and pretreatment (cathode electrolytic degreasing and pickling) on the conductive base material 1 made of a plate material that has been appropriately rolled, so that it does not oxidize.
- the crystal grain size of the material surface layer can be increased and the dislocation density can be lowered.
- the vacuum heat treatment is preferably performed at 450 ° C. to 600 ° C.
- the holding time varies depending on the dislocation density of the strip, but is preferably 5 to 60 seconds in consideration of preventing the oxidation from proceeding.
- the ultimate vacuum during this heat treatment is preferably adjusted to 10 ⁇ 6 to 10 ⁇ 3 Pa.
- Oxygen in the natural oxide film of copper on the strip surface is removed in the vacuum range where the reducing atmosphere is used.
- the portion becomes a void, which causes problems such as increased surface roughness and decreased plating adhesion. Therefore, it is not desirable to use a reducing atmosphere.
- the dislocation density on the surface can be controlled, and the copper oxide film can be reduced.
- the electropolishing time is preferably 5 seconds to 2 minutes. If the electropolishing time is too short, the dislocation density is too high, or the copper oxide film cannot be completely removed, so that the number of inlets A of the first intermediate layer 2 becomes too large. On the other hand, if the electropolishing time is too long, the dislocation density decreases too much and the entrance A of the first intermediate layer 2 becomes too small.
- Pretreatment cathode electrolytic degreasing, pickling is performed according to a conventional method.
- the inventors of the present invention can achieve the control that the number of the entrances A is set to a desired number by changing the current density of the crystal grain boundary of the first intermediate layer 2 to be small during the plating of the first intermediate layer 2. I found. Specifically, when the current density during electroplating of the first intermediate layer 2 is plated with a large current of 10 to 20 A / dm 2 in the first half and a small current of 3 to 8 A / dm 2 in the second half, A desired grain boundary of the first intermediate layer 2 is obtained.
- the current density in the first half is 10 to 20 A / dm 2 in the first half 30 to 70% of the total plating thickness of the first intermediate layer 2 and 3 to 8 A in the second half 70 to 30%.
- / dm 2 more preferably the first half of the first half 40-60% of the plating thickness of 10 ⁇ 15A / dm 2 of the total plating thickness of the first intermediate layer 2, late 60s to 40 percent of the plating thickness of 4 ⁇ 6 A / dm 2 .
- a reflow process is performed under predetermined conditions after the formation of the first intermediate layer 2, the second intermediate layer 3, and the outermost layer 4. It is. For example, a reflow process of 1 minute to 5 seconds is performed at a heater set temperature of 400 to 800 ° C. If the temperature of the reflow process is too high or the time is too long, the thermal history becomes excessive, and diffusion of the conductive base material 1 component may progress, resulting in a decrease in connection reliability.
- the number of intersections (exit B) of the grain boundaries of the first intermediate layer 2 with the second intermediate layer 3 can be controlled.
- the number of these inlets A and outlets B can be controlled, and the conductive base material 1 component can be prevented from diffusing into the outermost layer 4, so that it has excellent heat resistance and connection reliability over a long period of time.
- a highly conductive strip 10 can be provided.
- FIG. 2 shows an example in which a portion having a non-flat surface is generated on the conductive base material 1 due to rolling flaws or the like.
- L represents the length of the interface between the base material and the first intermediate layer 2 (or the interface between the first intermediate layer 2 and the second intermediate layer 3).
- 10 shows a conductive strip. In this case as well, it may be considered that the configuration and operational effects of the present invention can be obtained as in the case of FIG.
- Conductive base material 1 (plate material) (trade name: FAS-680) having a thickness of 0.25 mm, a width of 40 mm or more, and a length of 100 mm or more is subjected to finish rolling and molded to a thickness of 0.20 mm. The portion of 5 mm or more was removed and cut into a size of 30 mm width and 50 mm length.
- the conductive substrate 1 is subjected to the following treatments (vacuum heat treatment, electrolytic polishing, pretreatment (cathode electrolytic degreasing, pickling), plating treatment for forming the first intermediate layer 2, and the second intermediate layer 3. , Plating treatment for forming the outermost layer 4, and reflow treatment) were performed in this order.
- Table 1 shows the production procedure (manufacturing process) of Examples and Comparative Examples.
- Ni plating for forming the first intermediate layer 2 Cu plating for forming the second intermediate layer 3, Sn plating for forming the outermost layer 4 and reflow treatment were performed. . Since the treatment after the plating for forming the first intermediate layer 2 (indicated only as “Ni plating” in Table 1) was the same in all the test examples, the description was omitted in Table 1.
- An Inconel plate (thickness 1 mm to 2 mm, width 100 mm, length 200 mm) was placed horizontally 50 mm below the heater provided in the vacuum apparatus. At this time, the center of the Inconel plate was set within ⁇ 10 mm just below the center position of the heater.
- the conductive strip 10 (plate material) is placed at the center of the Inconel plate, and the measuring portion of the R thermocouple is installed at a position 10 mm ⁇ 3 mm away from the end of the conductive plate.
- the R thermocouple was fixed to an Inconel plate with a screw and fixing jig.
- each layer was measured using a fluorescent X-ray film thickness measuring device (SFT-9400, trade name, manufactured by SII), measured at 10 points using a collimator diameter of 0.5 mm, and the average value thereof. was calculated as the coating thickness.
- SFT-9400 fluorescent X-ray film thickness measuring device
- nine cross-sectional samples were prepared by the FIB method (Focused Ion Beam, focused ion beam method) in approximately 10 ° increments from the vertical direction to the rolling direction.
- a cross-sectional material at a position within ⁇ 1 mm from the center in the width direction of the conductive substrate 1 was prepared.
- the SIM image (Scanning Ion Microscope Image) is observed in a field of view that allows the grain boundary to be sufficiently discriminated, and the first intermediate layer 2 / conductive substrate 1 interface has a length of 10 ⁇ m.
- the number of intersections (entrance A) with the grain boundary of one intermediate layer 2 was measured at one location per field of view, and an average value of a total of 9 locations was calculated based on this. This is indicated in the table as “number of inlets A”.
- the number of intersections (exit B) with the crystal grain boundary of the first intermediate layer 2 in the length of 10 ⁇ m of the interface between the second intermediate layer 3 and the first intermediate layer 2 is 1 per field of view.
- the location was measured and indicated in the table as “number of outlets B”.
- the “length of the interface of the first intermediate layer 2 / conductive substrate 1” and the “length of the interface of the second intermediate layer 3 / first intermediate layer 2” here mean the shortest distance, and FIG. , Corresponding to L shown in FIG. Further, the inlet A and the outlet B correspond to A and B shown in FIG. 1 and FIG. In the present invention, the number of inlets A and outlets B in L 10 ⁇ m was measured.
- This value is indicated as “1” for those with less than 10 m ⁇ , “2” for those with 10 m ⁇ or more but less than 20 m ⁇ , “3” for those with 20 m ⁇ or more but less than 30 m ⁇ , and “NG” indicating that those with 30 m ⁇ or more are inferior in heat resistance. .
- a numerical value of 1 to 2 is excellent in heat resistance, and a numerical value of 3 is good in heat resistance. 1 is the best.
- the plating configuration described in Patent Document 1 corresponds to Comparative Examples 1.1, 1.2, 2.1, and 2.2. From these, it is clear that the embodiment of the present invention is superior in heat resistance (contact resistance) in any configuration.
- the dislocation density in the crystal grains increases to fill the lattice mismatch between the conductive base material 1 (copper alloy) and the plating of the first intermediate layer 2 (Ni), It is considered that intragranular diffusion increased, copper was easily exposed on the outermost layer 4, and copper in the outermost layer 4 was oxidized to increase the contact resistance.
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Abstract
Description
(1)銅または銅合金からなる導電性基材と複数のめっき層からなる導電性条材であって、
前記導電性基材と前記導電性基材上に設けられた第一中間層(前記複数のめっき層の内の1層)との界面と前記第一中間層の結晶粒界との交点の数が、界面の長さ10μm当たりの個数として、15個以上120個以下であることを特徴とする導電性条材。
(2)前記導電性基材と前記第一中間層との界面と前記第一中間層の結晶粒界との交点の数が、界面の長さ10μm当たりの個数として、25個以上60個以下である(1)項に記載の導電性条材。
(3)前記複数のめっき層が、
前記導電性基材上に設けられたNi又はNi合金からなる第一中間層と、
前記第一中間層上に設けられたCu又はCu-Sn合金からなる第二中間層と、
前記第二中間層上に設けられたSn又はSn合金からなる最表層とを有する(1)又は(2)に記載の導電性条材。
(4)前記導電性基材と前記第一中間層との界面と前記第一中間層の結晶粒界との交点の数(以下、入口の数という。)が、前記第一中間層と前記第二中間層との界面と前記第一中間層の結晶粒界との交点の数(以下、出口の数という。)に対して、比(入口の数)/(出口の数)が1.1以上である(1)~(3)のいずれか1項に記載の導電性条材。
(5)(1)~(4)項のいずれか1項に記載の導電性条材の製造方法であって、
圧延した板材に、真空熱処理、カソード電解脱脂、酸洗、第一中間層めっき、第二中間層めっき、最表層めっき、及びリフロー処理をこの順で行うことで導電性条材を製造することを特徴とする導電性条材の製造方法。
(6)真空熱処理の後、カソード電解脱脂の前に、電解研磨を行う(5)項に記載の導電性条材の製造方法。
(7)第一中間層めっきの全めっき厚さのうち前半30~70%のめっき厚を10~20A/dm2、後半70~30%のめっき厚を3~8A/dm2で行う(5)又は(6)項に記載の導電性条材の製造方法。
本発明の上記及び他の特徴及び利点は、適宜添付の図面を参照して、下記の記載からより明らかになるであろう。
図中、導電性条材10は、銅または銅合金からなる導電性基材1の上に、Ni又はNi合金からなる第一中間層2、Cu又はCu-Sn合金からなる第二中間層3、SnまたはSn合金からなる最表層4がこの順で設けられて構成されている。
入口「A」の数が、界面の長さ10μm当たりの個数として、15個以上120個以下であるように構成されている。なお、図中の結晶粒界の様子は概念図であるため、結晶粒界を直線状に図示している。結晶粒界は導電性基材1側から第二中間層3側にかけて必ずしも直線であるとは限らない。
このような構成によれば、入口Aの数を120個以下に抑制することで、高温下の粒界拡散の量を抑制し、基材成分である銅が最表層4へと拡散する量を抑制し、最表層4の銅の酸化に基づく接触抵抗の上昇を抑制することができる。
また入口Aの数を15個以上とすることにより、導電性基材1(銅合金)と第一中間層2のめっき(Ni)の格子不整合を埋めるための結晶粒内の転位密度を減少させることができ、粒内拡散を抑制し、最表層4への銅の露出を抑制することで、最表層4の銅の酸化による接触抵抗上昇を抑制することができる。
導電性基材1は、銅または銅合金からなる。例えば銅合金の一例として、CDA(Copper Development Association)掲載合金である「C14410(Cu-0.15Sn、古河電気工業(株)製、商品名:EFTEC-3)」、「C19400(Cu-Fe系合金材料、Cu-2.3Fe-0.03P-0.15Zn)」、「C18045(Cu-0.3Cr-0.25Sn-0.5Zn、古河電気工業(株)製、商品名:EFTEC-64T)」、「C64770(Cu-Ni-Si系合金材料、古河電気工業(株)製、商品名:FAS-680)」、「C64775(Cu-Ni-Si系合金材料、古河電気工業(株)製、商品名:FAS-820)」等を用いることができる。(なお、前記銅合金の各元素の前の数字の単位は銅合金中の質量%を示す。)また、TPC(タフピッチ銅)やOFC(無酸素銅)、りん青銅、黄銅(例えば、70質量%Cu-30質量%Zn。7/3黄銅と略記する。)等も用いることができる。これら導電性基材1はそれぞれ導電率や強度が異なるため、適宜要求特性により選定されて使用される。導電性や放熱性を向上させるという観点からは、導電率が5%IACS以上の銅合金の条材とすることが好ましい。なお、銅合金を導電性基材1として取り扱う時での「基材成分」とは、主成分である銅のことを示すものとする。導電性基材1の厚さには特に制限はないが、通常、0.05~2.00mmであり、好ましくは、0.1~1.2mmである。
第一中間層2を構成する金属は、所定の厚さで導電性基材1成分の拡散を防止でき、耐熱性を付与するものであれば特に制限はない。安価で被覆の容易なNiまたはNi合金からなる。Ni合金としては、Ni-Cu合金、Ni-Sn合金、Ni-亜鉛(Zn)合金、Ni-シリコン(Si)合金、Ni-鉄(Fe)合金を挙げることができる。
本発明における第二中間層3は、Cu又はCu-Sn合金からなる。第二中間層3の厚さは、好ましくは0.05~2μmであり、さらに好ましくは0.1~1μmである。第二中間層3は、スパッタ法や蒸着法、湿式めっき法など通常の方法で形成できる。被覆厚の制御容易性や生産性を考慮すれば、特に湿式めっき法を利用するのが好ましく、さらに電気めっき法であることがより好ましい。
また、導電性条材10の最表層4は、SnまたはSn合金からなる。Sn合金としては、Sn-Cu、Sn-Bi、Sn-Pb、Sn-Ag、Sn-Sb、Sn-In、Sn-Zn合金などを挙げることができる。
この最表層4は、低接触抵抗のため接続信頼性が良好であり、かつ生産性が良い。最表層4の厚さは、好ましくは0.05~5μmであり、さらに好ましくは0.2~3μmである。最表層4は、スパッタ法や蒸着法、湿式めっき法など通常の方法で形成できる。被覆厚の制御容易性や生産性を考慮すれば、特に湿式めっき法を利用するのが好ましく、さらに電気めっき法であることがより好ましい。
上記のような導電性条材10は、適宜圧延を終了した板材を導電性基材1とし、これに、真空熱処理、電解研磨、前処理(カソード電解脱脂、酸洗)、第一中間層2のめっき、第二中間層3のめっき、最表層4のめっき、リフロー処理を行うことで製造することができる。電解研磨は、行わずに省略してもよい。
また熱処理時はArガス雰囲気0.1~10Paなどに調整するのが好ましい。高温を長く維持すると、酸化が進行してしまうため、降温速度を速くする。これを考慮すると、輻射による放熱だけでは不足であるため、室温近いガスで真空装置内を0.1~10Paに調整し、条材表面に室温近いガス当てることで降温速度を速めることができる。また、酸化を進行させないことを考慮し反応性がない希ガスを選択することが好ましい。
本発明者らは、第一中間層2の結晶粒界は、第一中間層2のめっき時に電流密度を途中で小さく変化させることによって、入口Aの数を所望の数にする制御が達成できることを見出した。具体的には、第一中間層2の電気めっき時の電流密度を、前半は10~20A/dm2の大電流として、後半は3~8A/dm2の小電流として、めっきを行うと、所望の第一中間層2の結晶粒界が得られる。電流密度は、より好ましくは、前半は第一中間層2の全めっき厚さのうち前半30~70%のめっき厚を10~20A/dm2、後半70~30%のめっき厚を3~8A/dm2であり、さらに好ましくは前半は第一中間層2の全めっき厚さのうち前半40~60%のめっき厚を10~15A/dm2、後半60~40%のめっき厚を4~6A/dm2である。
以上説明してきた導電性条材10は、特に耐熱性に優れるので、結果的に各製造工程での熱履歴経過後の表層汚染が少なく、かつ長期信頼性に優れる。このため、端子、コネクタ、リードフレームなどの電気接点部品に好適である。
(本発明の別の実施形態)
図2は導電性基材1に圧延傷などが原因で表面が平坦でない箇所が生じた場合の例である。Lは、基材と第一中間層2の界面(又は第一中間層2と第二中間層3の界面)の長さを示す。10は、導電性条材を示す。
この場合も、図1の場合と同様に本発明の構成、作用効果が得られると考えてよいので、詳細な説明は割愛する。
厚さ0.25mm、幅40mm以上、長さ100mm以上の導電性基材1(板材)(商品名:FAS-680)に対して、仕上げ圧延を施して厚さ0.20mmに成型後、両端部5mm以上を除去し、幅30mm、長さ50mmのサイズに切断した。そしてこの導電性基材1に対して、下記に示す各処理(真空熱処理、電解研磨、前処理(カソード電解脱脂、酸洗)、第一中間層2を形成するめっき処理、第二中間層3を形成するめっき処理、最表層4を形成するめっき処理、リフロー処理)をこの順に行った。
実施例と比較例の作製手順(製造工程)を表1に示す。
全ての実施例、比較例で、第一中間層2を形成するためのNiめっき後に、第二中間層3を形成するためのCuめっき、最表層4を形成するSnめっき及びリフロー処理を実施した。第一中間層2を形成するめっき(表1中では「Niめっき」とだけ表記)後の処理は全ての試験例で同じであったため表1中には記載を省略した。
真空装置内に設けたヒーターから50mm下にインコネル製の板(厚さ1mm~2mm、幅100mm、長さ200mm)を水平に設置した。この時、ヒーターの中心位置の真下にインコネル製の板の中心が±10mm以内になるようした。インコネル製の板の中心に導電性条材10(板材)を置き、R熱電対の測定部を導電性板材の端部から10mm±3mm離れた位置に設置する。なお、R熱電対はネジと固定用の冶具でインコネル製の板に固定した。
到達真空度を10-6~10-3Paに調整後、Arガスを3~20cc/min導入しながら、ターボポンプの前にあるゲートバルブの開閉サイズを調整することで0.1~10Paになるように真空度を調整した。真空ポンプとしてはロータリーポンプとターボポンプを1台ずつ使用した。
R熱電対の温度をモニターしながら500℃になるようにヒーター出力を調整した。加熱時間は表1に記載の時間とした。なお、昇温速度は50~200℃/minになるようにヒーター出力を調整し、所定の加熱時間後、2sec以内にヒーター出力をゼロに落とした。
浴:85%リン酸水溶液
浴温:23℃
電流密度:20A/dm2
電解時間:表1に記載
対極:SUS316
[カソード電解脱脂]
脱脂液:NaOH 60g/リットル
脱脂条件:2.5A/dm2、温度60℃、脱脂時間60秒
[酸洗]
酸洗液:10%硫酸
酸洗条件:30秒 浸漬、室温
[Niめっき]添加剤フリー浴
めっき液:Ni(SO3NH2)2・4H2O 500g/リットル、NiCl2 30g/リットル、H3BO3 30g/リットル
めっき条件:温度 50℃
電流密度:表1に記載(試験例によっては、前半(膜厚の半分まで)と、後半(残り半分)とで、電流密度を変えた。)
第一中間層2厚さ:0.5μm
[Cuめっき]
めっき液:硫酸銅 180g/リットル、硫酸 80g/リットル
めっき条件:温度 40℃
電流密度:15A/dm2
第二中間層3厚さ:0.4μm
[Snめっき]
めっき液:硫酸Sn 80g/リットル、硫酸 80g/リットル
めっき条件:温度 20℃
電流密度:15A/dm2
最表層4厚さ:1.1μm
リフロー温度:700℃
時間:10sec
各層の厚さ(被覆厚)は蛍光X線膜厚測定装置(SFT-9400、商品名、SII社製)を使用し、コリメータ径0.5mmを使用して10点を測定し、その平均値を算出することで被覆厚とした。さらに第一中間層2の結晶粒界を判定するため、FIB法(Focused Ion Beam、集束イオンビーム法)により圧延垂直方向から平行方向に約10°刻みで断面試料を9視野作製した。なお、導電性基材1の幅方向の中央から±1mm以内の位置の断面資料を作成した。これは、幅方向端部ではスリット、切断などの加工歪が導入された箇所を避けるためである。SIM像(Scanning Ion Microscope Image、走査イオン顕微鏡像)観察を結晶粒界が十分判別できる程度の視野で行って、第一中間層2/導電性基材1界面の長さ10μmの中に、第一中間層2の結晶粒界との交点(入口A)の個数を1視野当り1箇所について測定し、それをもとに合計9箇所の平均値を計算した。これを表中には「入口Aの個数」と示した。また、同SIM像で、第二中間層3/第一中間層2界面の長さ10μmの中に、第一中間層2の結晶粒界との交点(出口B)の個数を1視野当り1箇所について測定し、これを表中には「出口Bの個数」と示した。
なお、ここで言う「第一中間層2/導電性基材1界面の長さ」と「第二中間層3/第一中間層2界面の長さ」とは最短距離を意味し、図1、図2に示すLに相当する。また、入口Aと出口Bは図1や図2に示すA、Bに相当する。本発明ではL=10μmの中の入口A、出口Bの個数を計測した。
各試料について、185℃で500時間保持後の接触抵抗を4端子法により、試験した。これは耐熱性の指標である。プローブは、先端が半球で曲率は5mm、材質は銀とした。接触荷重は2N、通電電流10mAとした。サンプルは縦20~50mm×横20×50mmに切断し、端部5mm以外を選択した。測定箇所は10箇所とし、各測定点は2mm以上の間隔をあけて測定し、その平均値を接触抵抗とした。この値が10mΩ未満のものを「1」、10mΩ以上20mΩ未満のものを「2」、20mΩ以上30mΩ未満のものを「3」、30mΩ以上のものを耐熱性に劣るとして「NG」で示した。この数値が1~2は耐熱性に優れ、数値が3は耐熱性に良好である。1が最も優れている。
なお、特許文献1に記載のめっき構成は比較例1.1、1.2、2.1、2.2に相当する。これらから、いずれの構成においても本発明の実施例の方が耐熱性(接触抵抗)に優れていることが明らかである。
高温下の導電性基材1の成分の拡散には、第一中間層2の結晶粒界中を介して最表層4へと拡散する粒界拡散と、粒内を介して拡散する粒内拡散が存在する。後者の場合、粒内拡散は粒内の格子欠陥(原子空孔、転位、積層欠陥など)が多いほど拡散速度が速くなる。
2 第一中間層
3 第二中間層
4 最表層
10 導電性条材
A 入口(導電性基材と第一中間層との界面と第一中間層の結晶粒界との交点)
B 出口(第一中間層と第二中間層との界面と第一中間層の結晶粒界との交点)
L 基材と第一中間層の界面又は第一中間層と第二中間層の界面の長さ
Claims (7)
- 銅または銅合金からなる導電性基材と複数のめっき層からなる導電性条材であって、
前記導電性基材と前記導電性基材上に設けられた第一中間層との界面と前記第一中間層の結晶粒界との交点の数が、界面の長さ10μm当たりの個数として、15個以上120個以下であることを特徴とする導電性条材。 - 前記導電性基材と前記第一中間層との界面と前記第一中間層の結晶粒界との交点の数が、界面の長さ10μm当たりの個数として、25個以上60個以下である請求項1に記載の導電性条材。
- 前記複数のめっき層が、
前記導電性基材上に設けられたNi又はNi合金からなる第一中間層と、
前記第一中間層上に設けられたCu又はCu-Sn合金からなる第二中間層と、
前記第二中間層上に設けられたSn又はSn合金からなる最表層とを有する請求項1又は2に記載の導電性条材。 - 前記導電性基材と前記第一中間層との界面と前記第一中間層の結晶粒界との交点の数(以下、入口の数という。)が、前記第一中間層と前記第二中間層との界面と前記第一中間層の結晶粒界との交点の数(以下、出口の数という。)に対して、比(入口の数)/(出口の数)が1.1以上である請求項1~3のいずれか1項に記載の導電性条材。
- 請求項1~4のいずれか1項に記載の導電性条材の製造方法であって、
圧延した板材に、真空熱処理、カソード電解脱脂、酸洗、第一中間層めっき、第二中間層めっき、最表層めっき、及びリフロー処理をこの順で行うことで導電性条材を製造することを特徴とする導電性条材の製造方法。 - 真空熱処理の後、カソード電解脱脂の前に、電解研磨を行う請求項5に記載の導電性条材の製造方法。
- 第一中間層めっきの全めっき厚さのうち前半30~70%のめっき厚を10~20A/dm2、後半70~30%のめっき厚を3~8A/dm2で行う請求項5又は6に記載の導電性条材の製造方法。
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JP6230732B2 (ja) | 2017-11-15 |
CN107532321B (zh) | 2019-09-17 |
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