WO2016084767A1 - 半導体用円形支持基板 - Google Patents
半導体用円形支持基板 Download PDFInfo
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- WO2016084767A1 WO2016084767A1 PCT/JP2015/082845 JP2015082845W WO2016084767A1 WO 2016084767 A1 WO2016084767 A1 WO 2016084767A1 JP 2015082845 W JP2015082845 W JP 2015082845W WO 2016084767 A1 WO2016084767 A1 WO 2016084767A1
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- support substrate
- circular support
- semiconductor chip
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- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
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- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2224/13024—Disposition the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
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- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
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- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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Definitions
- the present invention relates to a circular support substrate for bonding a wafer when manufacturing a semiconductor package.
- Patent Document 1 proposes a sapphire support substrate in which a display portion (notch) is formed for alignment.
- notch a display portion
- Patent Document 2 a film for light detection having optical characteristics such as reflectance and light transmittance that are significantly different from those of the support substrate is provided on the surface of the support substrate opposite to the side to be bonded to the processed substrate.
- This support substrate can be almost the same size as the wafer, but it takes time and effort to form a film for photodetection, and it is necessary to incorporate an optical system that can measure reflectance and transmittance in the process processing equipment. There is.
- JP 2002-184845 A Japanese Patent Laid-Open No. 2005-183689
- An object of the present invention is to provide a circular support substrate that can be aligned only by an outer peripheral shape.
- a circular support substrate wherein the string is provided at a position that is not line-symmetric with respect to a straight line passing through a central axis of the circular support substrate. 2.
- An angle formed by a line connecting both ends of the string and the central axis of the circular support substrate is 12 to 36 degrees.
- the circular support substrate described in 1. 3.
- the angle formed by two perpendicular lines out of the perpendicular lines extending from the central axis of the circular support substrate to the at least three strings is 90 degrees or 180 degrees. Or 2.
- the circular support substrate has three strings; The angles formed by the three perpendiculars extending from the central axis of the circular support substrate to the three strings are 90 degrees, 120 degrees, and 150 degrees, respectively. ⁇ 3.
- the support substrate is made of any one of 42 alloy, Invar alloy, and Kovar alloy.
- the physical properties of one surface and the other surface are different.
- a circular support substrate according to any one of A semiconductor chip bonded to the circular support substrate; A sealing resin portion for sealing the semiconductor chip; An external electrode electrically connected to the pad of the semiconductor chip by a conductive portion; A semiconductor package characterized by comprising: 9. 7.
- the external electrode is a bump.
- the semiconductor package described in 1. 10.1. ⁇ 7. A method for manufacturing a semiconductor package, comprising a step of bonding a wafer to the circular support substrate according to any one of the above. 11. A semiconductor package manufacturing method comprising at least the following steps in this order: 1. ⁇ 7.
- a semiconductor package manufacturing method comprising at least the following steps in this order: 1. ⁇ 7.
- a second step of sealing the semiconductor chip with resin A third step in which the circular support substrate is peeled off, and the pad is turned over so that it is on the upper surface.
- the circular support substrate of the present invention is arranged so that three or more strings are not line-symmetric with respect to a straight line passing through the central axis of the circular support substrate on the circumference, the position is determined using the positional relationship of the strings. Can be combined. Since alignment is possible with the outer peripheral shape, the circular support substrate may be slightly larger than the wafer. Since the wafer bonded to the circular support substrate can be processed with substantially the same size as the wafer, each process processing apparatus used in the semiconductor package manufacturing process can be downsized.
- the angle formed by two of the perpendiculars extending from the central axis of the circular support substrate to at least three strings is 90 degrees or 180 degrees, this string is used to position in the X and Y directions. Can be combined. Further, in the circular support substrate having three strings, the angles formed by the three perpendiculars extending from the central axis of the circular support substrate to the three strings are 90 degrees, 120 degrees, and 150 degrees, respectively. More precise alignment is possible by adding an inclination ( ⁇ ) to the Y direction.
- the circular support substrate of the present invention may be incorporated into a semiconductor package without being peeled off after being used in the manufacturing process.
- a circular support substrate is formed from 42 alloy, Invar alloy, or Kovar alloy, peeling at the interface can be prevented because the thermal expansion coefficient is close to that of the ceramic material forming the semiconductor chip.
- the circular support substrate of the present invention is not line symmetric, one surface and the other surface can be discriminated by the positional relationship of the strings. Therefore, it can utilize suitably for the circular support substrate from which the physical property of one surface and the other surface differs.
- Sectional drawing which shows the manufacturing method of a semiconductor package Sectional drawing which shows the manufacturing method of a semiconductor package.
- Sectional drawing which shows the manufacturing method of a semiconductor package which shows the manufacturing method of a semiconductor package.
- Sectional drawing which shows the manufacturing method of a semiconductor package Sectional drawing of one embodiment of the semiconductor package manufactured with the manufacturing method which has the process of peeling the circular support substrate of this invention.
- Sectional drawing which shows the manufacturing method of a semiconductor package Sectional drawing which shows the manufacturing method of a semiconductor package.
- the present invention relates to a circular support substrate that is bonded to a wafer when manufacturing a semiconductor package.
- the circular support substrate of the present invention is characterized in that at least three strings are provided on the circumference at positions that are not line symmetric with respect to a straight line passing through the central axis of the circular support substrate.
- FIG. 1 shows a plan view of an embodiment of the circular support substrate of the present invention.
- the circular support substrate 1 of the present invention at least three strings are arranged on the circumference at positions that are not line symmetric with respect to a straight line passing through the central axis of the circular support substrate. Can be aligned.
- the number of strings is not particularly limited as long as the number of strings is three or more. However, if the number of strings increases, the portion occupied by the strings increases with respect to the circumference, and it is difficult to determine the positional relationship. Most preferred.
- the angle (center angle) formed by the line connecting the ends of the string and the center axis of the circular support substrate is preferably 12 to 36 degrees.
- the central angle is an angle indicated by ⁇ in FIG.
- the central angle is more preferably 16 to 32 degrees, and most preferably 20 to 28 degrees. If the central angle is smaller than 12 degrees, it is difficult to confirm the position of the string because the string is too short. If the central angle is larger than 36 degrees, the arrow height becomes too high, and the size of the wafer that can be bonded without protruding from the circular support substrate becomes small.
- the arrow height is the longest distance between the circumference and the chord, and is indicated by h in FIG.
- the central angle with respect to the string that is, the length of the string may be the same or different.
- the length of one string different from the length of the other strings, it becomes easy to grasp the positional relationship of the other strings using the strings having different lengths.
- an angle formed by two perpendicular lines out of perpendicular lines extending from the central axis of the circular support substrate to at least three strings is 90 degrees or 180 degrees.
- the circular support substrate has three strings, and the angles formed by the three perpendiculars extending from the central axis to the three strings are 90 degrees, 120 degrees, and 150 degrees, respectively.
- the inclination ( ⁇ ) can be defined using the three strings in addition to the X direction and the Y direction, and more precise alignment is possible.
- the angles formed by the three perpendicular lines of the circular support substrate shown in FIG. 1 are 90 degrees, 120 degrees, and 150 degrees, respectively.
- the material for forming the circular support substrate of the present invention is not particularly limited, and copper, aluminum, stainless steel, iron, titanium, graphite, tantalum, zirconium, tungsten, molybdenum, 42 alloy, invar alloy, kovar alloy, glass, quartz, sapphire , Glass epoxy and the like can be selected as appropriate.
- copper, aluminum having excellent thermal conductivity, or 42 alloy, invar alloy, and kovar alloy having a thermal expansion coefficient close to that of a ceramic material forming a semiconductor chip are preferable.
- the method for forming the strings on the circular support substrate of the present invention is not particularly limited, and a side surface of the disk-shaped support substrate may be subjected to cutting, polishing, etc., and a circle having three or more strings from a metal plate. You may form by the punching process directly punched in plate shape.
- FIG. 2 shows a bottom view of the circular support substrate shown in FIG.
- the circular support substrate of the present invention is disposed at a position where at least three strings are not line-symmetric with respect to a straight line passing through the central axis of the circular support substrate. Since the circular support substrate of the present invention is not line-symmetric, the plan view shown in FIG. 1 and the bottom view shown in FIG. 2 do not overlap. That is, the circular support substrate of the present invention can discriminate one surface and the other surface from only the outer peripheral shape. Therefore, the circular support substrate of the present invention can be suitably used for a circular support substrate having different physical properties between one surface and the other surface. Such a support substrate can be obtained by performing different processing on one surface and the other surface, or by processing only one surface.
- the type of treatment applied to the circular support substrate is not particularly limited, and examples thereof include hydrophilic treatment, water repellency treatment, easy release treatment, smoothing treatment, roughening treatment, plating treatment, thin film formation treatment, and chamfering treatment. . Note that when one or two strings are used, line symmetry is obtained, so that one surface and the other surface cannot be distinguished only from the outer peripheral shape.
- the circular support substrate of the present invention is used by being bonded to a wafer as needed in each process of the pre-process and post-process of the semiconductor package manufacturing process without being particularly limited.
- the bonded circular support substrate may be peeled off from the wafer as necessary, or may be incorporated into a semiconductor package without being peeled off.
- the ceramic material for forming the wafer bonded to the circular support substrate is not particularly limited, and silicon, germanium, gallium arsenide, gallium arsenide phosphorus, silicon carbide, gallium nitride, sapphire, diamond, and the like can be used.
- the conventional circular support substrate provided with these marks must have a diameter larger than the wafer by 10 mm or more, preferably 20 mm or more, so that the marks can be confirmed after being bonded to the wafer.
- the circular support substrate of the present invention can be aligned by three or more strings located on the outer periphery, the gap between the wafer and the circular support substrate may be narrow.
- the diameter of the circular support substrate may be 0.1 to 8.0 mm larger than the wafer, more preferably 0.1 to 4.0 mm, and even more preferably 0.1 to 1.0 mm.
- the circular support substrate of the present invention is a device manufacturing device that performs a predetermined processing process using a unit processing apparatus having a local cleaning apparatus proposed in Japanese Patent Application Laid-Open Nos. 2012-54414 and 2014-30034. It can utilize suitably for a system.
- a wafer with a wafer size of 0.5 inches in diameter is proposed, but the wafer size used in the present invention is not limited to this. It is not limited.
- the shape of the wafer bonded to the circular support substrate of the present invention is not limited to a circle, and may be a rectangle or a polygon. Further, the wafer may be one in which a large number of patterns to be diced later to become semiconductor chips are formed, or a semiconductor chip in which a single device is formed. Since the wafer bonded to the circular support substrate can be aligned using the outer peripheral shape of the circular support substrate of the present invention, it is not necessary to form an alignment mark on the wafer. Therefore, the entire area of the wafer can be used for manufacturing semiconductor chips.
- the type of the semiconductor chip is not particularly limited, and for example, an integrated circuit, a large-scale integrated circuit, a transistor, a thyristor, a diode, a solid-state imaging device, a MEMS device, or the like can be used.
- FIG. 3 shows a cross-sectional view of a circular support substrate in which one surface is chamfered and the other surface is not chamfered.
- the chamfering can be performed on a round surface as shown in FIG. 3 (a) or a square surface as shown in FIGS. 3 (b) and 3 (c).
- the angle formed between the surface not chamfered and the side surface is 90 degrees.
- FIG. 3C when the chamfer is increased, the angle formed between the surface that is not chamfered and the side surface is 90 degrees or less, and this angle is preferably 75 to 90 degrees. If it is less than 75 degrees, the angle becomes too acute and cracks and chips are likely to occur. Since the circular support substrate is used for manufacturing a semiconductor package, it is not preferable that a crack or a chip that may be a source of foreign matter is generated.
- the method for chamfering is not particularly limited, and a chamfering may be performed at the same time as punching using a chamfering die or a method of performing cutting or polishing on a circular support substrate.
- a chamfering may be performed at the same time as punching using a chamfering die or a method of performing cutting or polishing on a circular support substrate.
- FIG. 4 shows a cross-sectional view of one embodiment of a semiconductor package having a circular support substrate in which only one surface is chamfered.
- the external electrode 2, the redistribution layer 3, the semiconductor chip 4, the adhesive 5, and the circular support substrate 1 are laminated in this order, and the chamfered surface of the circular support substrate 1 is formed on the surface of the semiconductor package 10.
- a surface and side surfaces of the semiconductor chip 4 on the rewiring layer 3 side are sealed with a sealing resin portion 7.
- the pad 8 of the semiconductor chip 4 is not covered with the sealing resin portion 7, and the pad 8 is electrically connected to the external electrode 2 by the conductive portion 9 of the rewiring layer 3.
- the semiconductor package shown in FIG. 4 is an example of a semiconductor package having the circular support substrate of the present invention, and the configuration of the semiconductor package having the circular support substrate is not limited to this.
- the semiconductor chip 4 and the circular support substrate 1 may be eutectic bonded, the circular support substrate 1 may be entirely sealed with the sealing resin portion 7, and the external electrode 2 may be pad-shaped.
- the individual semiconductor chips 4 may be sealed in parallel or stacked.
- the conductive portion 9 connecting the pad 8 and the external electrode 2 may be formed by wire bonding, TAB (Tape Automated Bonding), or flip chip bonding.
- the semiconductor package type is limited to BGA (Ball Grid Array) package. Instead, it may be a QFN (Quad Flat No-Lead Package) package or an LGA (Land Grid Array) package.
- the use of the semiconductor package of this embodiment is not particularly limited, the circular support substrate is exposed on the surface of the semiconductor package, so that the heat dissipation is excellent. Therefore, it is suitable for a CPU (Central Processing Unit) with a large calorific value, a power semiconductor, and an in-vehicle use that requires durability at high temperatures.
- CPU Central Processing Unit
- a circular semiconductor chip 4 made of silicon and having a diameter of 0.5 inch (12.5 mm) and a thickness of 0.25 mm is placed on a circular support substrate 1 made of 42 alloy and having a diameter of 13.5 mm and a thickness of 0.2 mm.
- the adhesive 5 is preferably a heat conductive adhesive. Since the circular support substrate 1 of the present invention can discriminate the chamfered surface from the outer peripheral shape, it is possible to prevent the semiconductor chip 4 from being bonded to an incorrect surface.
- the circular support substrate 1 has the shape shown in FIG. 1, and the angles formed by three perpendicular lines extending from the central axis to the string are 90 degrees, 120 degrees, and 150 degrees, respectively.
- the central angle of the string is 24 degrees and the arrow height is 0.15 mm.
- a mold having a cylindrical recess having a diameter of 12.8 mm and a depth of 0.4 mm is brought into close contact with the circular support substrate 1 to form a cavity.
- a thermosetting resin is cast in the cavity and cured to perform molding, thereby forming a sealing resin portion 7 that seals the upper surface and side surfaces of the semiconductor chip 4 (FIG. 6).
- the resin to be used is not particularly limited, and a commercially available resin can be used without any particular limitation.
- a composition containing an epoxy resin as a main component and an inorganic filler such as a phenol resin curing agent or a silica filler is used as a resin for sealing a semiconductor. It can be used without limitation.
- the gap between the semiconductor chip 4 and the circular support substrate 1 is 0.5 mm.
- die is 0.15 mm. Since the surface of the circular support substrate 1 to which the semiconductor chip 4 is bonded is not chamfered, the mold is 0.35 mm out of the 0.5 mm gap between the semiconductor chip 4 and the circular support substrate 1. The width is in close contact with the circular support substrate 1. Since the arrow height is 0.15 mm, the narrowest width at which the mold and the circular support substrate 1 are in close contact with each other at the string portion is 0.20 mm.
- the mold and the circular support substrate 1 can be in close contact with each other even at 0.20 mm in the narrowest area, it is possible to prevent the resin from protruding from the mold and generating burrs.
- the semiconductor chip 4 is bonded to the chamfered surface of the circular support substrate 1, the width of contact between the mold and the circular support substrate 1 becomes narrower than 0.20 mm, so that the resin protrudes from the mold. As a result, burrs are likely to occur.
- the resin covering the pad 8 used for signal input / output of the semiconductor chip 4 is removed by laser ablation to expose the pad 8. (FIG. 7).
- the resin that seals the semiconductor chip 4 is colored black to prevent malfunction due to light. Therefore, when the circular semiconductor chip 4 is sealed with the black sealing resin portion 7, the position of the pad 8 is changed. It will not be understood from the appearance. If the positions of the pads 8 of the semiconductor chip 4 are associated in advance with the three strings of the circular support substrate 1 used in the present invention, the positions of the pads 8 can be obtained using the positions of the strings.
- the circular support substrate 1 used here has angles of 90 degrees, 120 degrees, and 150 degrees formed by three perpendicular lines extending from the central axis to the strings, respectively, and the X direction and the Y direction using these three strings. Since the tilt ( ⁇ ) can be aligned with high accuracy, the positional deviation in the manufacturing process is very small.
- a rewiring layer 3 having a conductive portion 9 for connecting the pad 8 and the external electrode 2 is formed.
- a commonly used known process can be used for the formation of the rewiring layer 3.
- the following steps can be used.
- a copper layer 11 is formed on the sealing resin portion 7 and the pad 8 by electrolytic plating (FIG. 8). Since the sealing resin portion 7 is non-conductive, the electrolytic plating is performed after the Cu seed layer is thinly formed by sputtering. Since the circular support substrate 1 is made of 42 alloy, if electrolytic plating is performed as it is, copper plating is also formed on the surface of the circular support substrate 1 where the semiconductor chip is not bonded. Since the surface of the circular support substrate 1 to which the semiconductor chip is not bonded becomes the outermost surface of the semiconductor package, it is not preferable in appearance that a copper layer that becomes patina when rusted is formed. Therefore, it is preferable to protect the surface of the circular support substrate 1 where the semiconductor chip is not bonded with a masking tape or the like in advance.
- a conductive layer 9 is formed by forming a resist layer 12 (FIG. 9), forming a resist pattern by lithography (FIG. 10), and etching the copper layer 11 using the resist pattern as a mask (FIG. 11).
- the solder resist 14 is applied by an ink jet printer, leaving a via hole portion 13 to be a solder ball mounting portion, and then cured, and a sealing resin portion 7 for sealing the upper surface of the semiconductor chip, a conductive portion 9, A rewiring layer 3 made of the solder resist 14 is formed (FIG. 12).
- a solder ball 15 is mounted on the via hole 13 using a ball mounter (FIG. 13).
- the solder balls are melted by heating with a reflow device to form bumps that are the external electrodes 2, and the external electrodes 2 and the pads 8 are electrically connected through the conductive portions 9 (FIG. 14).
- desmear treatment after cure treatment, marking on the circular support substrate located on the outermost surface of the semiconductor package, and the like can be appropriately performed.
- FIG. 15 shows a cross-sectional view of the semiconductor package manufactured by the manufacturing method including the step of peeling the circular support substrate of the present invention.
- the external electrode 2, the rewiring layer 3, and the semiconductor chip 4 are laminated in this order, and the adhesive 5 that joined the semiconductor chip 4 and the circular support substrate 1 in the manufacturing process is incorporated in the rewiring layer 3. It is.
- the surface and side surface opposite to the rewiring layer 3 side of the semiconductor chip 4 are sealed with a sealing resin portion 7.
- the pad 8 of the semiconductor chip 4 is not covered with the adhesive 5, and the pad 8 is electrically connected to the external electrode 2 by the conductive portion 9 of the rewiring layer 3.
- This semiconductor package can be manufactured by the following manufacturing method.
- a circular semiconductor chip 4 is bonded onto the circular support substrate 1 using an adhesive 5 so that the pads 8 are concentric with the lower surface of the circular support substrate 1 (FIG. 16). Since the adhesive 5 is incorporated into the rewiring layer 3 later, an insulating material is used.
- the adhesive 5 since the adhesive 5 is used as the rewiring insulating layer, the adhesive 5 covering the pad is removed by laser ablation.
- the adhesive layer 5 can be peeled off together with the circular support substrate 1.
- the adhesive layer 5 is peeled off together with the circular support substrate 1, in the fourth step of forming the rewiring layer, after forming the pattern of the interlayer insulating film on the semiconductor chip 4, the formation of the conductive portion 9, the solder resist 14 Is applied and cured to form the rewiring layer 3.
- desmear treatment after cure treatment, marking on the circular support substrate located on the outermost surface of the semiconductor package, and the like can be appropriately performed.
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- Condensed Matter Physics & Semiconductors (AREA)
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
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Abstract
Description
また、特許文献2には、支持基板の加工基板と貼り合わせる側とは反対側の面に、支持基板に比べて反射率や光透過率などの光学特性が大きく異なる光検出用の膜を設け、この光検出用の膜を光学センサで検出して位置合わせを行うことが提案されている。この支持基板はウェハとほぼ同一のサイズにすることが可能であるが、光検出用の膜を形成する手間がかかり、また、プロセス処理装置に反射率や透過率が測定できる光学系を組み込む必要がある。
前記弦が円形支持基板の中心軸を通る直線に対して線対称とならない位置に設けられていることを特徴とする円形支持基板。
2.前記弦の両端と前記円形支持基板の中心軸とを結ぶ線とのなす角が、12~36度であることを特徴とする1.に記載の円形支持基板。
3.前記円形支持基板の中心軸から前記少なくとも3つの弦へ下ろした垂線のうち2本の垂線のなす角が、90度または180度であることを特徴とする1.または2.に記載の円形支持基板。
4.前記円形支持基板が3つの弦を有し、
前記円形支持基板の中心軸から前記3つの弦へ下ろした3本の垂線のなす角がそれぞれ、90度、120度、150度であることを特徴とする1.~3.のいずれかに記載の円形支持基板。
5.前記支持基板が42アロイ、インバー合金、コバール合金のいずれかからなることを特徴とする1.~4.のいずれかに記載の円形支持基板。
6.一方の面と他方の面との物性が異なることを特徴とする1.~5.のいずれかに記載の円形支持基板。
7.前記支持基板の一方の面が面取りされており、他方の面が面取りされていないことを特徴とする1.~6.のいずれかに記載の円形支持基板。
8.1.~7.のいずれかに記載の円形支持基板、
前記円形支持基板に接合された半導体チップ、
前記半導体チップを封止する封止樹脂部、
前記半導体チップのパッドと導電部により電気的に接続された外部電極、
を少なくとも有することを特徴とする半導体パッケージ。
9.前記外部電極がバンプであることを特徴とする8.に記載の半導体パッケージ。
10.1.~7.のいずれかに記載の円形支持基板にウェハを接合する工程を有することを特徴とする半導体パッケージの製造方法。
11.少なくとも下記工程をこの順で有することを特徴とする半導体パッケージの製造方法:
1.~7.のいずれかに記載の円形支持基板上に半導体チップをパッドが上面となるように接合する第一工程、
半導体チップを樹脂で封止する第二工程、
半導体チップのパッドを覆う樹脂を除去する第三工程、
再配線層を形成する第四工程、
バンプを形成する第五工程。
12.少なくとも下記工程をこの順で有することを特徴とする半導体パッケージの製造方法:
1.~7.のいずれかに記載の円形支持基板上に半導体チップをパッドが下面となるように接合する第一工程、
半導体チップを樹脂で封止する第二工程、
円形支持基板を剥離し、パッドが上面となるように反転する第三工程、
再配線層を形成する第四工程、
バンプを形成する第五工程。
2 外部電極
3 再配線層
4 半導体チップ
5 接着剤
6 支持基板
7 封止樹脂部
8 パッド
9 導電部
10 半導体パッケージ
11 銅層
12 レジスト層
13 ビアホール
14 ソルダーレジスト
15 はんだボール
図3に、一方の面が面取り加工され、他方の面は面取り加工されていない円形支持基板の断面図を示す。面取りは、図3(a)に示すように丸面、または図3(b)、(c)に示すように角面に行うことができる。図3(a)、(b)では面取り加工されていない面と側面とのなす角は90度である。図3(c)に示すように面取りが大きくなると、面取り加工されていない面と側面とのなす角度は90度以下になるが、この角度は75~90度であることが好ましい。75度より小さいと鋭角になりすぎて、割れや欠けが生じやすくなる。円形支持基板は半導体パッケージ製造に用いられるものであるため、異物の発生源となりうる割れや欠けが生じることは好ましくない。
42アロイからなる直径13.5mm、厚さ0.2mmの円形支持基板1上に、シリコンからなる直径0.5インチ(12.5mm)、厚さ0.25mmの円形の半導体チップ4をパッド8が上面、かつ円形支持基板1と同心円となるように接着剤5を用いて接合する(図5)。接着剤5は熱伝導性接着剤であることが好ましい。本発明の円形支持基板1は、外周形状から面取り加工が施された面を判別することができるため、誤った面に半導体チップ4を接合することを防ぐことができる。また、半導体チップ4が円形であるため、接合時に均一に拡がる未硬化の接着剤が半導体チップの端部からはみ出すことを防ぐことができる。
円形支持基板1は図1に示す形状であり、中心軸から弦に下ろした3つの垂線のなす角がそれぞれ90度、120度、150度である。また、弦の中心角は24度、矢高は0.15mmである。
直径12.8mm、深さ0.4mmの円柱状の凹部が設けられた金型を、円形支持基板1上に密着させてキャビティを形成する。熱硬化性樹脂をキャビティ内に注型、硬化してモールド成形を行い、半導体チップ4の上面と側面とを封止する封止樹脂部7を形成する(図6)。使用する樹脂は特に制限されず、市販されているものを特に制限することなく使用することができる。一般に半導体を封止する樹脂としては、エポキシ樹脂を主成分とし、フェノール樹脂系硬化剤、シリカフィラーなどの無機充填剤を配合した組成物が用いられているが、フェノール樹脂、シリコーン樹脂等も特に制限することなく用いることができる。
なお、円形支持基板1の面取りされている側の面に半導体チップ4を接合すると、金型と円形支持基板1とが接触する幅が0.20mmよりも狭くなるため、樹脂が金型からはみ出してバリが生じやすくなる。
上記第二工程で、半導体チップ4の上面は封止樹脂部7で覆われているため、半導体チップ4の信号の入出力に用いるパッド8を覆う樹脂をレーザアブレーションにより除去しパッド8を露出させる(図7)。
通常、半導体チップ4を封止する樹脂は光による誤作動を防ぐために黒色に着色されているため、円形の半導体チップ4が黒色の封止樹脂部7で封止されるとパッド8の位置が外観からは分からなくなってしまう。本発明で使用する円形支持基板1の3つの弦に対して半導体チップ4のパッド8の位置を予め関連付けておけば、弦の位置を用いてパッド8の位置を求めることができる。また、ここで使用した円形支持基板1は、中心軸から弦へ下ろした3つの垂線のなす角がそれぞれ90度、120度、150度であり、この3つの弦を用いてX方向、Y方向、傾き(θ)の高精度な位置合わせが可能であるから、製造工程での位置ずれは非常に小さい。
パッド8と外部電極2とを接続するための導電部9を有する再配線層3を形成する。再配線層3の形成には、通常使用される公知の工程を利用することができる。一例として、以下の工程を用いることができる。
ボールマウンターを用いてビアホール13上にはんだボール15を搭載する(図13)。リフロー装置で加熱してはんだボールを熔融させて外部電極2であるバンプを形成するとともに、外部電極2とパッド8とを導電部9を通じて電気的に接続する(図14)。
円形支持基板の面取り加工がされていない面上に半導体チップをパッドが下面となるように接合する第一工程。
半導体チップを樹脂で封止する第二工程。
円形支持基板を剥離し、パッドが上面となるように反転する第三工程。
再配線層を形成する第四工程。
バンプを形成する第五工程。
円形支持基板1上に、円形の半導体チップ4をパッド8が下面、かつ円形支持基板1と同心円となるように接着剤5を用いて接合する(図16)。この接着剤5は、後に再配線層3に組み込まれるため、絶縁性のものを用いる。
第二工程で封止樹脂部7が形成されたのち(図17)、円形支持基板1を剥離して、パッド8が上面となるように反転する(図18)。
Claims (12)
- 円周上に少なくとも3つの弦を有し、
前記弦が円形支持基板の中心軸を通る直線に対して線対称とならない位置に設けられていることを特徴とする円形支持基板。 - 前記弦の両端と前記円形支持基板の中心軸とを結ぶ線とのなす角が、12~36度であることを特徴とする請求項1に記載の円形支持基板。
- 前記円形支持基板の中心軸から前記少なくとも3つの弦へ下ろした垂線のうち2本の垂線のなす角が、90度または180度であることを特徴とする請求項1または2に記載の円形支持基板。
- 前記円形支持基板が3つの弦を有し、
前記円形支持基板の中心軸から前記3つの弦への垂線へ下ろした3本の垂線のなす角がそれぞれ、90度、120度、150度であることを特徴とする請求項1~3のいずれかに記載の円形支持基板。 - 前記支持基板が42アロイ、インバー合金、コバール合金のいずれかからなることを特徴とする請求項1~4のいずれかに記載の円形支持基板。
- 一方の面と他方の面との物性が異なることを特徴とする請求項1~5のいずれかに記載の円形支持基板。
- 前記支持基板の一方の面が面取りされており、他方の面が面取りされていないことを特徴とする請求項1~6のいずれかに記載の円形支持基板。
- 請求項1~7のいずれかに記載の円形支持基板、
前記円形支持基板に接合された半導体チップ、
前記半導体チップを封止する封止樹脂部、
前記半導体チップのパッドと導電部により電気的に接続された外部電極、
を少なくとも有することを特徴とする半導体パッケージ。 - 前記外部電極がバンプであることを特徴とする請求項8に記載の半導体パッケージ。
- 請求項1~7のいずれかに記載の円形支持基板にウェハを接合する工程を有することを特徴とする半導体パッケージの製造方法。
- 少なくとも下記工程をこの順で有することを特徴とする半導体パッケージの製造方法:
請求項1~7のいずれかに記載の円形支持基板上に半導体チップをパッドが上面となるように接合する第一工程、
半導体チップを樹脂で封止する第二工程、
半導体チップのパッドを覆う樹脂を除去する第三工程、
再配線層を形成する第四工程、
バンプを形成する第五工程。 - 少なくとも下記工程をこの順で有することを特徴とする半導体パッケージの製造方法:
請求項1~7のいずれかに記載の円形支持基板上に半導体チップをパッドが下面となるように接合する第一工程、
半導体チップを樹脂で封止する第二工程、
円形支持基板を剥離し、パッドが上面となるように反転する第三工程、
再配線層を形成する第四工程、
バンプを形成する第五工程。
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