WO2015170488A1 - Dispositif à semi-conducteur et son procédé de fabrication - Google Patents

Dispositif à semi-conducteur et son procédé de fabrication Download PDF

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Publication number
WO2015170488A1
WO2015170488A1 PCT/JP2015/052746 JP2015052746W WO2015170488A1 WO 2015170488 A1 WO2015170488 A1 WO 2015170488A1 JP 2015052746 W JP2015052746 W JP 2015052746W WO 2015170488 A1 WO2015170488 A1 WO 2015170488A1
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semiconductor device
insulator
electrode
insulating substrate
circuit electrode
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PCT/JP2015/052746
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English (en)
Japanese (ja)
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厚 山竹
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三菱電機株式会社
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Priority to JP2015529366A priority Critical patent/JP5826443B1/ja
Publication of WO2015170488A1 publication Critical patent/WO2015170488A1/fr

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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
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    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/732Location after the connecting process
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    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85385Shape, e.g. interlocking features
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    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/16195Flat cap [not enclosing an internal cavity]
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    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to a semiconductor device using a semiconductor module and a manufacturing method thereof, and more particularly to a semiconductor device having a structure for suppressing partial discharge and a manufacturing method thereof.
  • a gap a so-called void, may be formed between the electrode end and the insulator. Due to the presence of such voids, the occurrence of discharge still cannot be prevented.
  • the present invention has been made to solve the above-described problems, and provides a semiconductor device having a structure that suppresses partial discharge and has higher insulation reliability than conventional semiconductor devices and a method for manufacturing the same. For the purpose.
  • a semiconductor device includes an insulating substrate having a circuit electrode bonded to a main surface, a base insulator formed on the main surface adjacent to the circuit electrode, and the base insulator.
  • a conductive material formed at the same potential as the circuit electrode; and a discharge preventing insulator that covers the opposite end of the conductive material on the side opposite to the circuit electrode.
  • the electric field concentration at the end of the circuit electrode is reduced by including the conductive material having the same potential as the circuit electrode in the insulating substrate. Furthermore, by providing the insulator for preventing discharge, discharge due to electric field concentration from the end of the installed conductor can be suppressed. Therefore, it is possible to provide a semiconductor device with higher insulation reliability than conventional. In addition, it is possible to extend the life of the semiconductor device as compared with the prior art.
  • FIG. 3 is a diagram illustrating the process of manufacturing the structure illustrated in FIG. 1, and is a diagram illustrating a state in which a base insulator is arranged at a position before the stage illustrated in FIG. It is a figure showing the state discharged along the interface of the insulator for bases from a conductor in the structure shown in FIG.
  • FIG. (A)-(e) It is a figure showing the state discharged in the direction which penetrates the insulator for bases from a conductor in the structure shown in FIG. (A)-(e) is the figure explaining the manufacturing method of the structure shown in FIG. It is sectional drawing which showed the schematic structure of the semiconductor device in Embodiment 2 of this invention, and showed the structure part which suppresses discharge. It is sectional drawing which shows schematic structure of the semiconductor device in Embodiment 3 of this invention. It is an enlarged view of the B section shown in FIG. It is a figure for demonstrating the preparation methods of the structure part which suppresses the discharge shown in FIG. FIG.
  • FIG. 10 is a diagram illustrating a schematic structure of a semiconductor device according to a fourth embodiment of the present invention, and illustrates a modification of the semiconductor device according to the third embodiment illustrated in FIG. 8. It is sectional drawing which showed the schematic structure of the semiconductor device in Embodiment 5 of this invention, and showed the structure part which suppresses discharge. It is sectional drawing which showed the schematic structure of the semiconductor device in Embodiment 6 of this invention, and showed the structure part which suppresses discharge. It is an enlarged view of the electric field relaxation member shown in FIG. It is a figure which shows schematic structure of the semiconductor device in Embodiment 7 of this invention. It is a figure explaining a dielectric breakdown path
  • FIG. 17 It is an enlarged view of the A section shown in FIG. 17, and is a diagram for explaining a discharge occurrence location. It is a figure for demonstrating the void residue by application
  • FIG. 17 shows a schematic cross-sectional view of a general high-voltage semiconductor module.
  • This high voltage semiconductor module includes a semiconductor chip 1, an electrode 2, an insulating substrate 3, a lower electrode 4, solder 5, a heat sink 6, an insulating sealing material 7, and a case 8.
  • the electrode 2 and the lower electrode 4 are joined to the front and back surfaces of the insulating substrate 3, respectively, and a high voltage is applied to the electrode 2.
  • a semiconductor chip 1 as a power semiconductor device is joined to the electrode 2.
  • the lower electrode 4 is joined to the heat sink 6 with solder 5.
  • the inside of the case 8 including the periphery of the insulating substrate 3 on which the semiconductor chip 1 is mounted is sealed and insulated by an insulating sealing material 7 typified by silicone gel.
  • FIG. 17 a region A indicated by a dotted line corresponding to the end of the electrode 2 is a portion where the electric field is most easily concentrated, and an enlarged view of the portion A is shown in FIG. 18.
  • a contact point (three points) of the electrode 2, the insulating substrate 3, and the insulating sealing material 7 serves as an electric field concentration portion 9 a and serves as a starting point of discharge.
  • a discharge 17 is generated along the interface between the insulating substrate 3 and the insulating sealing material 7 from the electric field concentration portion 9a that is the starting point.
  • the occurrence of the discharge 17 impairs the insulation reliability of the high-voltage semiconductor module and causes a failure or destruction of the equipment as described above.
  • a method of increasing the thickness of the insulating substrate 3 is also taken, but there is a problem that heat dissipation from the semiconductor chip 1 is lowered. Therefore, as a method of suppressing the discharge 17 without increasing the thickness of the insulating substrate 3, there is a method of filling and applying an insulating material having a high withstand voltage to the end portion of the electrode 2 on the insulating substrate 3 where the electric field is concentrated.
  • an insulating material for example, an inorganic glass material or an epoxy resin is used.
  • such a method of filling and applying the insulator has a possibility of forming a gap, that is, a void between the end portion of the electrode 2 and the insulator, as already described. More specifically, as shown in FIG. 17, the semiconductor module including the end portion of the electrode 2 is sealed with an insulating sealing material 7 made of silicone gel. Compared with resin, there is a feature that bubbles are easily removed. On the other hand, the epoxy resin or silicon resin as an insulator covering the end of the electrode 2 tends to have voids (voids) remaining as compared with the silicone gel of the insulating sealing material 7.
  • the insulating material such as an epoxy resin
  • the end portion of the electrode 2 cannot be completely sealed and a gap is generated
  • the insulating material such as the epoxy resin contains a void. There is a possibility of curing.
  • the high withstand voltage insulator 10 is filled in the end side surface 30 of the electrode 2 that becomes the electric field concentration portion.
  • the possibility that the void 11 remains is increased as compared with the case where the insulating sealing material 7 is sealed. As a result, there is a possibility that discharge occurs in the void 11 portion.
  • the insulator 10 is applied to the end side surface 30 of the electrode 2, but as shown in FIG. There is also a structure that relaxes the electric field by covering 13.
  • the conductive material 13 can be made of metal, conductive resin, Ni plating, or the like.
  • the electric field is relaxed by making the edge of the electrode end gentle by the conductive material 13.
  • the electric field concentration portion 9b is generated at the contact point between the insulating substrate 3, the conductive material 13, and the insulating sealing material 7, it can be a starting point of discharge.
  • the semiconductor device which is an embodiment of the present invention described below has a configuration for solving the above-described problems in the semiconductor module, and as a result, has higher insulation reliability than the conventional one. be able to.
  • the semiconductor device in each of the embodiments specifically described below takes a power semiconductor module to which a high voltage is applied as an example, but is not limited thereto. That is, even in a semiconductor device using a normal semiconductor element having a withstand voltage lower than that of the power semiconductor module, the configuration described below can be adopted, and similar effects can be obtained.
  • FIG. 1 to 3 show a schematic structure of the semiconductor device 101 according to the first embodiment of the present invention, and show a portion corresponding to the A portion shown in FIG. 17 described above.
  • the semiconductor device 101 according to the first embodiment also has the semiconductor chip 1, the electrode 2, the insulating substrate 3, the lower electrode 4, the solder 5, and the heat sink. 6, an insulating sealing material 7, and a case 8.
  • the insulating substrate 3 is a ceramic plate such as alumina (Al 2 O 3 ), aluminum nitride (AlN), or silicon nitride (Si 3 N 4 ).
  • a circuit electrode (hereinafter may be simply referred to as “electrode”) 2 is bonded to the main surface 3 a of the insulating substrate 3 via a bonding material (brazing material) 12.
  • the electrode 2 is made of aluminum or copper.
  • the electrode 2 is etched to form an electrode pattern having an arbitrary shape.
  • the bonding material 12 has a higher reaction rate with the etching solution than the electrode 2, and the bonding material 12 may be scraped excessively.
  • the end 12a of the bonding material 12 with respect to the electrode 2 does not have a desired cross-sectional shape, but may be recessed more inwardly than the end side surface 30 of the electrode 2 as shown in FIG.
  • the end 12 a of the bonding material 12 is usually adjusted so as to be almost perpendicular to the insulating substrate 3 or slightly outward from the end side surface 30 of the electrode 2.
  • the electric field concentration portion 9 a exists at the contact point between the electrode 2 and the bonding material 12 and the insulating substrate 3. Therefore, if a void remains in the recessed portion, the possibility of discharge increases.
  • Apply 10a the base insulator 10a is not particularly limited as long as it is a material that can sufficiently adhere to the insulating substrate 3 after curing and has a high withstand voltage, such as an epoxy resin or a silicon resin.
  • the base insulator 10 a is provided with a gap 32 so as not to contact the electrode 2 and the bonding material 12. This is because when the base insulator 10a is formed in contact with the electrode 2 and the bonding material 12, the end portion 12a of the bonding material 12 is recessed from the end side surface 30 of the electrode 2 as described above. This is because voids remain as shown in FIG. 19 and the possibility of discharge at that portion increases.
  • the gap 32 is filled with silicone gel as the insulating sealing material 7. As described above, since the bubbles of the silicone gel are relatively easy to escape, the possibility of voids remaining is lower than when an epoxy resin or a silicone resin is applied. However, when the gap 32 is very narrow, it takes a long time to completely fill the silicone gel. Therefore, it is necessary to allow sufficient time before the silicone gel is heated and cured.
  • the conductor 13 is formed on the base insulator 10a.
  • the conductive material 13 is electrically connected to the electrode 2 via the conductive wire 18 at any position so as to have the same potential as the electrode 2. Thereby, the electric field of the electric field concentration part 9a in the vicinity of the end part of the electrode 2 can be relaxed.
  • the conductive material 13 may be formed by applying and curing a conductive paint, or may be provided with a solid conductive material such as a metal wire.
  • the material of the insulating substrate 3 is aluminum nitride (relative permittivity: 9), the thickness is 0.5 mm, the insulating sealing material 7 is silicone gel (relative permittivity: 3), and the base insulator 10a is epoxy resin ( The dielectric constant is 4), the gap between the base insulator 10a and the conductor 13 and the electrode 2 is 0.1 mm, the height (thickness) of the base insulator 10a is 30 ⁇ m, and the height (thickness) of the conductor 13 ) Is 30 ⁇ m, the thickness of the electrode 2 including the bonding material 12 is 0.4 mm, and the end portion 12 a of the electrode 2 and the bonding material 12 is perpendicular to the insulating substrate 3.
  • a discharge preventing insulator 10b which is a second solid insulator, is applied to the side surface and the upper surface of the conductive material 13 so as to cover the electric field concentration portion 9b at the end portion 35 on the side opposite to the circuit electrode located at the top. At this time, if the discharge preventing insulator 10b is applied before the base insulator 10a is cured, the adhesion interface 16 between the base insulator 10a and the discharge preventing insulator 10b can be strengthened. it can.
  • the base insulator 10a and the discharge preventing insulator 10b are made of the same material, they can be substantially integrated after curing to eliminate the interface 16. Therefore, interface insulation can be strengthened. Even in the case where the base insulator 10a and the discharge preventing insulator 10b are made of different materials, it is applicable when the interface dielectric strength of the adhesive interface 16 after curing is sufficiently high.
  • Discharge is more likely to occur in the direction along the member interface than in the direction through the material. Therefore, as shown in FIGS. 3 and 2, the interface 14 between the insulating substrate 3 and the insulating sealing material 7 and the interface 15 between the base insulator 10a and the insulating sealing material 7 with respect to the electric field concentration portion 9b. As shown in FIG. 4, a discharge 17 is generated along the interface 15. On the other hand, when the periphery of the electric field concentration portion 9b is covered with the base insulator 10a and the discharge preventing insulator 10b as shown in FIG. 5, the gap between the base insulator 10a and the discharge preventing insulator 10b is between. The interface withstand voltage of the adhesive interface 16 is large. Therefore, the discharge 17 tends to occur in a direction penetrating the base insulator 10a. For this reason, the withstand voltage is higher than when the discharge preventing insulator 10b is not present.
  • a procedure for manufacturing the structure of the semiconductor device 101 according to the first embodiment described above will be described with reference to FIG.
  • An insulating substrate 3 to which the circuit electrode 2 is bonded via the bonding material 12 is prepared in advance on the main surface 3a. At this time, it is assumed that the end 12 a of the bonding material 12 is recessed inward from the end side surface 30 of the electrode 2.
  • a spacer 19 having an arbitrary thickness is provided on the main surface 3 a of the insulating substrate 3 in order to form a gap 32 with respect to the end side surface 30 of the electrode 2. . Since the spacer 19 is removed later, a material such as Teflon (registered trademark) that is difficult to adhere to the insulating sealing material 7 is used.
  • an uncured base insulator 10 a is applied to the main surface 3 a of the insulating substrate 3 through a spacer 19.
  • the conductor 13 is placed on the base insulator 10a.
  • the conductive material 13 may be a conductive paint or a thin linear metal material.
  • the conductive wire 18 for connecting the conductive material 13 to the electrode 2 is connected to the conductive material 13.
  • the conductive material 13 is electrically conductive with respect to the side opposite to the spacer 19, that is, with respect to the counter circuit electrode side end portion 35 of the conductive material 13.
  • an uncured discharge preventing insulator 10b made of the same material as the base insulator 10a is applied so as to cover the side surface and the upper surface of the object 13.
  • the spacer 19 is removed and the conductor 18 is connected to the electrode 2. As a result, a gap 32 due to the spacer 19 is formed between the base insulator 10 a and the conductive layer 13 and the electrode 2.
  • the electric field of the electric field concentration portion 9a of the electrode 2 can be relaxed, and from the conductive material 13 installed for the electric field relaxation. It is possible to obtain a structure that suppresses the discharge. Therefore, it is possible to provide a semiconductor device having a longer lifetime than that of the conventional semiconductor device and having higher insulation reliability, and a method for manufacturing the same.
  • Embodiment 2 FIG.
  • the base insulator 10 a and the conductor 13 are provided with the gap 32 between the electrode 2. This is because, as described above, by providing the gap 32, the insulating sealing material 7 is caused to flow into the gap 32, and the purpose is to reduce the risk of void generation and residual due to the base insulator 10a.
  • a gap 32 is provided. It can be said that the merit is small.
  • the semiconductor device according to the second embodiment has a configuration in such a case.
  • FIG. 7 shows the structure of the semiconductor device 102 according to the second embodiment.
  • the base insulator 10 a is applied so as to cover the electric field concentration portion 9 a formed by the electrode 2 and the bonding material 12, that is, without providing the gap 32.
  • the discharge preventing insulator 10b is applied to the peripheral portion of the conductive material 13 so as to cover the counter circuit electrode side end portion 35 of the conductive material 13.
  • the electric field concentration portion 9a at the electrode end is covered with the base insulator 10a as described above. If the dielectric constant of the base insulator 10a is higher than the dielectric constant of the insulating sealing material 7, the electric field of the electric field concentration portion 9a is relaxed by itself.
  • the dielectric encapsulant 7 is made of silicone gel
  • the relative dielectric constant is 3
  • the base insulator 10a is made of polyimide, for example, and the thickness is 30 ⁇ m and the relative dielectric constant is 3.7.
  • the insulating substrate 3 is made of aluminum nitride having a thickness of 0.5 mm, the relative dielectric constant is 9, the thickness of the electrode 2 including the bonding material 12 is 0.4 mm, and the end portion 12a of the electrode 2 and the bonding material 12 is the insulating substrate 3 Is assumed to be perpendicular to Under this condition, the electric field of the electric field concentration portion 9a is calculated and compared with or without the base insulator 10a. As a result, when the base insulator 10a was provided, the electric field was reduced by about 5% compared to when the base insulator 10a was not provided. In addition, since the dielectric breakdown voltage of the material of the base insulator 10a itself is higher than that of the gel, the discharge voltage at the electric field concentration portion 9a can be increased by installing the base insulator 10a.
  • the conductor 13 is disposed with a gap with respect to the electrode 2, but it may be in direct contact.
  • the risk of void remaining near the end side surface 30 of the electrode 2 is small, the same as in the first embodiment.
  • the effect of suppressing the discharge by the material of the base insulator 10a can be obtained.
  • the step of providing the gap 32 is not necessary, the effect that the manufacturing of the semiconductor device can be simplified as compared with the structure in the first embodiment is also obtained.
  • the electric field concentration portion is taken as an example when it is located on the outer peripheral portion of the substrate as shown in “A” of FIG. 17.
  • the substrate used in the actual semiconductor module has a plurality of sets of electrode 2 and semiconductor chip 1 arranged on the insulating substrate 3, and the plurality of electrodes 2a and 2b are arranged. It is often arranged.
  • the semiconductor device 103 according to the third embodiment has such a structure having a plurality of electrodes 2a and 2b. Below, the structure of the area
  • FIG. 9 is an enlarged view of the dotted line B region shown in FIG.
  • the structure shown in FIG. 1 in the first embodiment is symmetrical with respect to the electrodes 2a and 2b.
  • a conductor 13a is disposed on the electrode 2a side
  • a conductor 13b is disposed on the electrode 2b side.
  • the structure shown in FIG. 1 is not independent, and the base insulator 10a and the discharge preventing insulator 10b adopt a common structure.
  • the conductor 13a and the conductor 13b are too close to each other, an insulation problem occurs.
  • the conductor 13a and the conductor 13b the distance between the electrode 2a and the electrode 2b is important, and the length in the creeping direction is not particularly important.
  • the length of the conductive material 13a and the conductive material 13b in the creeping direction is sufficient to prevent the connection of the conductor 18.
  • the conductor 13a and the conductor 13b as shown in FIG. 10, it is good to produce with the spacer 19c in between so that it may not come too close to each other.
  • the case where two sets of the electrode 2a and the electrode 2b are provided is illustrated, but the case where three sets or more are provided is also applicable. Also in the semiconductor device 103 according to the third embodiment, the same effect as that obtained by the semiconductor device 101 according to the first embodiment can be obtained.
  • FIG. 11 shows a semiconductor device 104 according to the fourth embodiment.
  • the structure shown in this semiconductor device 104 applies the structure shown in Embodiment 2 to the structure between the electrodes shown in Embodiment 3. That is, in the structure between the electrodes shown in the third embodiment, depending on the manufacturing state, in the vicinity of the end side surface 30 of the electrodes 2a and 2b including the end 12a of the bonding material 12, as in the case of the second embodiment.
  • the structure shown in the semiconductor device 104 can be applied.
  • the same effect as that obtained in the second embodiment can be obtained.
  • a process of providing a gap between each bonding material 12 and the electrodes 2a and 2b is not necessary, thereby simplifying the manufacturing.
  • the conductive material 13a and the conductive material 13b may be brought into contact with the electrode 2a and the electrode 2b, respectively.
  • FIG. 12 shows the structure of the semiconductor device 105 in the fifth embodiment.
  • This semiconductor device 105 corresponds to a modification of the semiconductor device 101 in the first embodiment. That is, in the structure shown in the first embodiment, the highest electric field is generated in the electric field concentration portion 9b at the end of the conductive material 13.
  • the discharge in the interface direction is not generated, so that the discharge itself is hardly generated. Even in such a configuration, in the penetration direction of the base insulator 10a (the thickness direction of the insulating substrate 3) or the interface direction of the base insulator 10a and the discharge preventing insulator 10b (the direction along the interface). There is a possibility of discharge.
  • the end on the side of the circuit electrode near the circuit electrode 2 of the conductor 13 is located higher in the thickness direction 3 b of the insulating substrate 3 away from the insulating substrate 3.
  • the electric field relaxation effect of the electric field concentration portion 9a in the bonding material 12 is reduced and the depth of the gap 32 between the electrodes 2 is reduced. Becomes deeper and it becomes difficult to fill the insulating sealing material 7. Therefore, the height of the circuit electrode side end portion 37 is kept low similarly to the semiconductor device 101 of the first embodiment, and the conductive material 13 is inclined as a whole as shown in FIG.
  • the base insulator 10a As a method of forming the conductive material 13 inclined in this way, when applying the base insulator 10a, it is applied so as to form a slope as shown in FIG. Is positioned at the specified height. Then, before the base insulator 10a is cured, the discharge preventing insulator 10b is applied so as to cover the electric field concentration portion 9b.
  • the semiconductor device 105 according to the fifth embodiment configured as described above, it is needless to say that the effect exhibited by the semiconductor device 101 according to the first embodiment can be obtained, but is more conductive than the semiconductor device 101.
  • the discharge from the object 13 can be suppressed, and the life can be extended and the insulation reliability can be improved.
  • Embodiment 6 FIG.
  • a manufacturing method is employed in which the base insulator 10a, the conductor 13, and the discharge preventing insulator 10b are stacked in this order.
  • the number of steps may increase and manufacturing may vary. Therefore, in the sixth embodiment, the electric field relaxation member having the role of the base insulator 10a, the discharge preventing insulator 10b, and the conductor 13 and integrally forming them is separately provided separately from the insulating substrate 3.
  • the electric field relaxation member is simply bonded to the insulating substrate 3 in advance.
  • FIG. 13 shows the semiconductor device 106 according to the sixth embodiment, which is manufactured using such an electric field relaxation member 25.
  • FIG. 14 shows an enlarged cross section of the electric field relaxation member 25.
  • the elongated metal conductor 20 corresponds to the conductor 13 described in the first to fifth embodiments, and the insulating coating 21 around the metal conductor 20 is used for the base described in the first to fifth embodiments. It corresponds to the insulator 10a and the discharge preventing insulator 10b. Since the high electric field is applied to the insulating coating 21, an epoxy resin having a high withstand voltage is used. Further, a conductive wire 18 for conduction with the electrode 2 is connected to the metal conductor 20.
  • the surface of the insulating coating 21 is formed flat in consideration of ease of installation, but may be a circular shape or the like, for example.
  • the electric field relaxation member 25 separately manufactured as described above is adhered to the main surface 3a of the insulating substrate 3 with an adhesive 23 adjacent to the circuit electrode 2 as shown in FIG. Since an electric field is applied to the adhesive 23, an adhesive having a high pressure resistance such as an epoxy resin is used. After bonding or simultaneously with bonding, the conductive wire 18 extending from the metal conductor 20 is connected to the circuit electrode 2. Thereafter, the whole is sealed with an insulating sealing material 7.
  • the semiconductor device 106 in the sixth embodiment configured as described above, it is a matter of course that the effect exhibited by the semiconductor device 101 in the first embodiment can be obtained.
  • the electric field relaxation member 25 covered with an insulator in advance, it becomes possible to simplify the manufacture of the semiconductor device and reduce the manufacturing variation.
  • FIG. 15 and 16 show the structure of the semiconductor device 107 according to the seventh embodiment.
  • This semiconductor device 107 corresponds to a modification of the semiconductor device 101 in the first embodiment.
  • the electrode 2 is bonded to the main surface 3a of the insulating substrate 3, but the back surface facing the main surface 3a is directly bonded to the heat sink 6 without passing through the electrode. It has a structure.
  • the base insulator 10 a is applied to the main surface 3 a of the insulating substrate 3 as in the first embodiment, and further covers the end side surface 3 c of the insulating substrate 3 and the upper surface of the heat sink 6. It is also applied to cover.
  • a conductive material 13 is formed on the base insulator 10 a, and a discharge preventing insulator 10 b is applied so as to cover the end portion 35 on the side opposite to the circuit electrode of the conductive material 13.
  • the base insulator 10 a extends from the insulating substrate 3 to the heat sink 6. It can be easily applied. Thereby, since the base insulator 10a can be installed so as to block the discharge with respect to the dielectric breakdown path 40 (FIG. 16) between the conductor 13 and the heat sink 6, the withstand voltage can be improved.
  • circuit electrode 3 insulating substrate, 10a insulator for base, 10b insulator for discharge prevention, 13 conductor, 17 discharge, 23 adhesive, 25 electric field relaxation member, 32 gap, 35 anti-circuit electrode side end, 37 circuit Electrode side end, 40 dielectric breakdown path, 101-106 semiconductor device.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

La présente invention concerne : un dispositif à semi-conducteur ayant une structure qui permet de prévenir une décharge partielle, le dispositif à semi-conducteur offrant une plus haute fiabilité d'isolation que l'état de la technique ; un procédé de fabrication du dispositif à semi-conducteur. Le dispositif selon la présente invention comporte : un substrat isolé (3) auquel une électrode de circuit (2) est jointe ; un isolant de base (10a) formé adjacent à l'électrode de circuit ; un conducteur (13) qui est formé sur l'isolant de base et qui a été porté au même potentiel que l'électrode de circuit ; un isolant de prévention de décharge (10b) qui recouvre une partie d'extrémité (35), positionnée du côté opposé à l'électrode de circuit, du conducteur.
PCT/JP2015/052746 2014-05-08 2015-01-30 Dispositif à semi-conducteur et son procédé de fabrication WO2015170488A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024176419A1 (fr) * 2023-02-24 2024-08-29 株式会社日立ハイテク Isolant, canon à particules chargées et dispositif à faisceau de particules chargées

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017104159A1 (fr) * 2015-12-16 2017-06-22 三菱電機株式会社 Dispositif à semi-conducteurs et son procédé de fabrication
JP6081042B1 (ja) * 2015-12-16 2017-02-15 三菱電機株式会社 半導体装置およびその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340719A (ja) * 1999-05-26 2000-12-08 Hitachi Ltd パワー半導体装置
JP2013157598A (ja) * 2012-01-06 2013-08-15 Mitsubishi Electric Corp 半導体モジュール及びそれを用いた半導体装置及び半導体モジュールの製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340719A (ja) * 1999-05-26 2000-12-08 Hitachi Ltd パワー半導体装置
JP2013157598A (ja) * 2012-01-06 2013-08-15 Mitsubishi Electric Corp 半導体モジュール及びそれを用いた半導体装置及び半導体モジュールの製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024176419A1 (fr) * 2023-02-24 2024-08-29 株式会社日立ハイテク Isolant, canon à particules chargées et dispositif à faisceau de particules chargées

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