WO2015083259A1 - Procédé de production de photopile - Google Patents

Procédé de production de photopile Download PDF

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Publication number
WO2015083259A1
WO2015083259A1 PCT/JP2013/082624 JP2013082624W WO2015083259A1 WO 2015083259 A1 WO2015083259 A1 WO 2015083259A1 JP 2013082624 W JP2013082624 W JP 2013082624W WO 2015083259 A1 WO2015083259 A1 WO 2015083259A1
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Prior art keywords
semiconductor substrate
mask pattern
passivation film
surface side
film
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PCT/JP2013/082624
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English (en)
Japanese (ja)
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唐木田　昇市
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三菱電機株式会社
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Priority to JP2015551336A priority Critical patent/JP6125042B2/ja
Priority to PCT/JP2013/082624 priority patent/WO2015083259A1/fr
Publication of WO2015083259A1 publication Critical patent/WO2015083259A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a method for manufacturing a solar battery cell.
  • solar cells Conventional bulk silicon solar cells (hereinafter sometimes referred to as solar cells) are generally manufactured by the following method.
  • a p-type silicon substrate is prepared as a first conductivity type substrate.
  • the damaged layer on the silicon surface generated when the silicon substrate is sliced from the cast ingot is removed with a thickness of 10 ⁇ m to 20 ⁇ m with an alkaline solution such as sodium hydroxide or potassium hydroxide of several wt% to 20 wt%, for example.
  • a surface uneven structure called texture is formed on the surface from which the damage layer has been removed.
  • a texture is usually formed in order to suppress light reflection and capture as much sunlight as possible onto the p-type silicon substrate.
  • an alkali texture method As a method for producing the texture, for example, there is a method called an alkali texture method.
  • anisotropic etching is performed with a solution in which an additive that promotes anisotropic etching such as IPA (isopropyl alcohol) is added to a low concentration alkali solution such as sodium hydroxide or potassium hydroxide of several wt%. Then, the texture is formed so that the silicon (111) surface appears.
  • IPA isopropyl alcohol
  • the p-type silicon substrate is treated for several tens of minutes at, for example, 800 ° C. to 900 ° C. in a mixed gas atmosphere of, for example, phosphorus oxychloride (POCl 3 ), nitrogen, and oxygen, and the second surface is uniformly applied to the entire surface.
  • An n-type layer is formed as a conductive impurity layer.
  • the end face region of the p-type silicon substrate is etched by dry etching, for example.
  • end face separation of the p-type silicon substrate may be performed by a laser. Thereafter, the p-type silicon substrate is immersed in a hydrofluoric acid aqueous solution, and the glassy material (PSG) deposited on the surface during the diffusion treatment is removed by etching.
  • PSG glassy material
  • an insulating film such as a silicon oxide film, a silicon nitride film, or a titanium oxide film is formed with a uniform thickness on the surface of the n-type layer as an insulating film (antireflection film) for the purpose of preventing reflection.
  • an insulating film such as a silicon oxide film, a silicon nitride film, or a titanium oxide film is formed with a uniform thickness on the surface of the n-type layer as an insulating film (antireflection film) for the purpose of preventing reflection.
  • a silicon nitride film as the antireflection film, for example, it is formed by plasma CVD using silane (SiH 4 ) gas and ammonia (NH 3 ) gas as raw materials under conditions of 300 ° C. or higher and reduced pressure.
  • the refractive index of the antireflection film is about 2.0 to 2.2, and the optimum film thickness is about 70 nm to 90 nm. It should be noted that the antireflection film formed
  • a silver paste to be a surface side electrode is applied to the shape of the grid electrode and the bus electrode on the antireflection film by a screen printing method and dried.
  • the silver paste for the surface-side electrode is formed on an insulating film for the purpose of preventing reflection.
  • the back aluminum electrode paste containing aluminum, glass, etc., which becomes the back aluminum electrode, and the back silver paste which becomes the back silver bus electrode are screen-printed into the shape of the back aluminum electrode and the shape of the back silver bus electrode on the back surface of the substrate, respectively. Apply and dry.
  • the electrode paste applied to the front and back surfaces of the silicon substrate is simultaneously fired at about 600 ° C. to 900 ° C. for several minutes to several tens of seconds.
  • a grid electrode and a bus electrode are formed on the front surface side of the silicon substrate as surface side electrodes
  • a back aluminum electrode and a back silver bus electrode are formed on the back surface side of the silicon substrate as back surface side electrodes.
  • the silver material comes into contact with silicon and re-solidifies while the antireflection film is melted with the glass material contained in the silver paste. Thereby, electrical connection between the surface side electrode and the silicon substrate (n-type layer) is ensured.
  • Such a process is called a fire-through method.
  • the back aluminum electrode paste also reacts with the back surface of the silicon substrate to compensate for the n-type layer formed by diffusion immediately below the back aluminum electrode, thereby forming a p + layer.
  • a silicon nitride film (SiN) is entirely formed except for an electrode region for taking out electricity on the back surface (surface opposite to the light receiving surface) of the solar cell.
  • Film or an oxide film may be formed as a back surface passivation film (see, for example, Non-Patent Document 1 and Non-Patent Document 2).
  • the back surface passivation film when a silicon nitride film (SiN film) or an oxide film is used as the back surface passivation film, there is a step of drilling a part of the back surface passivation film, which is an insulating film, for conduction with the back surface of the solar cell substrate. It is necessary separately. This process of drilling is an obstacle to mass production.
  • SiN film silicon nitride film
  • oxide film oxide film
  • the insulating film was drilled by an expensive and laborious process using photolithography technology.
  • a technique for directly drilling with a laser having a small number of processes has been established.
  • laser drilling has a low processing capability and is not suitable for mass production.
  • This invention is made in view of the above, Comprising: Obtaining the manufacturing method of the photovoltaic cell which can manufacture the photovoltaic cell which was provided with the back surface passivation film and was excellent in photoelectric conversion efficiency with a simple process with sufficient productivity. With the goal.
  • a method for manufacturing a solar battery cell according to the present invention includes a second conductivity type impurity diffusion layer on one surface side that is a light receiving surface side in a first conductivity type semiconductor substrate.
  • a second step of forming a mask pattern on the other side of the semiconductor substrate, and a passivation film having a thickness smaller than the thickness of the mask pattern is formed on the other side of the semiconductor substrate.
  • FIG. 1 is a diagram schematically illustrating the configuration of a solar battery cell according to an embodiment of the present invention, and is a top view of the solar battery cell viewed from the light receiving surface side.
  • FIG. 2 is a diagram schematically showing the configuration of the solar cell according to the embodiment of the present invention, and is a bottom view of the solar cell viewed from the side opposite to the light receiving surface (back surface).
  • FIG. 3 is a cross-sectional view of the main part of the solar battery cell according to the embodiment of the present invention, and is a cross-sectional view of the main part in the AA direction of FIG. FIG.
  • FIG. 4 is a cross-sectional view of the main part of the solar battery cell according to the embodiment of the present invention, and is a cross-sectional view of the main part in the BB direction of FIG.
  • FIG. 5 is a bottom view of the solar battery cell showing the shape of the comb-shaped opening formed in the back surface passivation film of the solar battery cell according to the embodiment of the present invention.
  • FIG. 6 is a flowchart for explaining a manufacturing process of the solar battery cell according to the embodiment of the present invention.
  • FIG. 7 is a process diagram schematically showing an example of a manufacturing process of the solar battery cell according to the embodiment of the present invention.
  • FIG. 8: is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 9 is a process diagram schematically showing an example of the manufacturing process of the solar battery cell according to the embodiment of the present invention.
  • FIG. 10 is a process diagram schematically showing an example of the manufacturing process of the solar battery cell according to the embodiment of the present invention.
  • FIG. 11 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 12 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 13 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 14 is a process diagram schematically showing an example of a manufacturing process of the solar battery cell according to the embodiment of the present invention.
  • FIG. 11 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 12 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 13 is
  • FIG. 15 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 16 is process drawing which shows typically an example of the manufacturing process of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 17 is process drawing which shows typically the manufacturing process of a back surface side electrode among the manufacturing processes of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 18 is process drawing which shows typically the manufacturing process of a back surface side electrode among the manufacturing processes of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 19 is process drawing which shows typically the manufacturing process of a back surface side electrode among the manufacturing processes of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 20 is process drawing which shows typically the manufacturing process of a back surface side electrode among the manufacturing processes of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 21 is process drawing which shows typically the manufacturing process of a back surface side electrode among the manufacturing processes of the photovoltaic cell concerning embodiment of this invention.
  • FIG. 22 is a process diagram schematically illustrating a manufacturing process of the back-side electrode among the manufacturing processes of the solar battery cell according to the embodiment of the present invention.
  • Embodiment. 1 to 5 are diagrams schematically showing a configuration of a solar battery cell 1 according to an embodiment of the present invention.
  • FIG. 1 is a top view of the solar battery cell 1 viewed from the light receiving surface side.
  • FIG. 2 is a bottom view of the solar battery cell 1 viewed from the side opposite to the light receiving surface (back surface).
  • FIG. 3 is a cross-sectional view of the main part of the solar battery cell 1, and is a cross-sectional view of the main part in the AA direction of FIG. 4 is a cross-sectional view of main parts of the solar battery cell 1, and is a cross-sectional view of main parts in the BB direction of FIG.
  • FIG. 5 is a bottom view of the solar cell 1 showing the shape of the comb-shaped opening formed in the back surface passivation film provided on the back surface side of the solar cell 1.
  • n-type impurity diffusion layer 3 is formed by phosphorous diffusion on the light-receiving surface side of semiconductor substrate 2 made of p-type single crystal silicon, and semiconductor substrate 11 having a pn junction is formed.
  • an antireflection film 4 made of a silicon nitride film (SiN film) is formed on the n-type impurity diffusion layer 3.
  • the semiconductor substrate 2 is not limited to a p-type single crystal silicon substrate, and an n-type single crystal silicon substrate may be used.
  • a texture structure constituted by minute irregularities 2a is formed on the light receiving surface side (n-type impurity diffusion layer 3) and the back surface side of the semiconductor substrate 11.
  • the texture structure increases the area that absorbs light from the outside on the light receiving surface, suppresses the light reflectance on the light receiving surface, and confines light.
  • the antireflection film 4 is made of an insulating film for the purpose of preventing reflection, such as a silicon nitride film (SiN film), a silicon oxide film (SiO 2 film), or a titanium oxide film (TiO 2 film).
  • a plurality of long and narrow surface silver grid electrodes 5 are arranged side by side on the light receiving surface side of the semiconductor substrate 11, and a surface silver bus electrode 6 electrically connected to the surface silver grid electrode 5 is substantially the same as the surface silver grid electrode 5. They are provided so as to be orthogonal to each other, and are electrically connected to the n-type impurity diffusion layer 3 at the bottom portions.
  • the front silver grid electrode 5 and the front silver bus electrode 6 are made of a silver material.
  • the front silver grid electrode 5 has a width of about 100 ⁇ m to 200 ⁇ m, for example, and is arranged substantially in parallel at intervals of about 2 mm, and collects electricity generated inside the semiconductor substrate 11. Further, the front silver bus electrodes 6 have a width of, for example, about 1 mm to 3 mm and are arranged in a number of 2 to 4 per solar battery cell, and the electricity collected by the front silver grid electrode 5 is taken out to the outside.
  • the front silver grid electrode 5 and the front silver bus electrode 6 constitute a light receiving surface side electrode 12 as a first electrode. Since the light receiving surface side electrode 12 blocks sunlight incident on the semiconductor substrate 11, it is desirable to reduce the area as much as possible from the viewpoint of improving the power generation efficiency, and a comb-shaped surface silver grid as shown in FIG. Generally, the electrodes 5 and the bar-shaped surface silver bus electrodes 6 are arranged.
  • a silver paste is usually used, for example, lead boron glass is added.
  • This glass has a frit shape and is composed of, for example, lead (Pb) 5 to 30 wt%, boron (B) 5 to 10 wt%, silicon (Si) 5 to 15 wt%, and oxygen (O) 30 to 60 wt%.
  • lead (Pb) 5 to 30 wt% boron (B) 5 to 10 wt%
  • silicon (Si) 5 to 15 wt% silicon
  • oxygen (O) 30 to 60 wt% oxygen
  • zinc (Zn), cadmium (Cd), etc. may be mixed by several wt%.
  • Such lead boron glass has a property of melting by heating at several hundred degrees C. (for example, 800.degree. C.) and eroding silicon at that time.
  • a method of obtaining electrical contact between a silicon substrate and a silver paste by using the characteristics of the glass frit is used.
  • a back surface passivation film 7 which is a back surface insulating film made of a silicon nitride film (SiN film) is formed on the entire back surface (surface opposite to the light receiving surface) of the semiconductor substrate 11.
  • the back surface passivation film 7 is provided with comb-shaped openings 7a extending in the vertical and horizontal directions in the figure.
  • attention is paid to the shape of the opening 7 a in the back surface passivation film 7, and the description of some members is omitted.
  • a back silver electrode 8 including a silver material and a back aluminum electrode 9 including an aluminum material are embedded in the opening 7a.
  • the intersection portion between the line-shaped region extending in the vertical direction and the line-shaped region extending in the horizontal direction in the comb-shaped opening 7a is formed in a square shape.
  • the intersections are arranged in substantially the same direction as the front silver bus electrode 6.
  • a back silver electrode 8 is embedded in this square intersection portion of the opening 7 a in a state in which a part protrudes from the surface of the back surface passivation film 7.
  • a back aluminum electrode 9 is embedded in a region where the back silver electrode 8 is not embedded in the opening 7a.
  • the back aluminum electrode 9 is embedded in a comb shape in the opening 7a, like the electrode on the light receiving surface side of the semiconductor substrate 11, so that current collection from the back surface of the semiconductor substrate 11 can be efficiently performed. Further, the back aluminum electrode 9 is also formed on the back surface passivation film 7 so as to surround the back silver electrode 8 on the back surface of the semiconductor substrate 11, and is formed on almost the entire back surface of the semiconductor substrate 11 surrounding the back silver electrode 8. Has been.
  • the back silver electrode 8 and the back aluminum electrode 9 constitute a back electrode 13 that is a second electrode.
  • a p + layer (BSF (Back Surface Field) layer) 10 containing a high concentration impurity is formed in the lower region of the back aluminum electrode 9 in the surface layer portion on the back surface (surface opposite to the light receiving surface) of the semiconductor substrate 11. Is formed.
  • the p + layer 10 is provided to obtain the BSF effect, and the electron concentration of the p-type layer (semiconductor substrate 2) is increased by an electric field having a band structure so that electrons in the p-type layer (semiconductor substrate 2) do not disappear. .
  • the solar cell 1 configured as described above, sunlight is irradiated from the light receiving surface side of the solar cell 1 to the pn junction surface of the semiconductor substrate 11 (the junction surface between the semiconductor substrate 2 and the n-type impurity diffusion layer 3). As a result, holes and electrons are generated. Due to the electric field of the pn junction, the generated electrons move toward the n-type impurity diffusion layer 3 and the holes move toward the p + layer 10. As a result, electrons are excessive in the n-type impurity diffusion layer 3 and holes are excessive in the p + layer 10. As a result, a photovoltaic force is generated.
  • This photovoltaic force is generated in the direction of biasing the pn junction in the forward direction, the light receiving surface side electrode 12 connected to the n-type impurity diffusion layer 3 becomes a negative pole, and the back aluminum electrode 9 connected to the p + layer 10 becomes a positive pole. Thus, a current flows through an external circuit (not shown).
  • the reason for the presence of the back silver electrode 8 is that it is necessary to tab-connect the solar cells 1 when connecting a plurality of solar cells 1 to produce a module.
  • FIG. 6 is a flowchart for explaining a manufacturing process of the solar battery cell 1 according to the embodiment of the present invention.
  • 7 to 16 are process diagrams schematically showing an example of the manufacturing process of the solar battery cell 1 according to the embodiment of the present invention, and are sectional views corresponding to FIG. 17 to 22 are process diagrams schematically showing a manufacturing process of the back surface side electrode 13 among the manufacturing processes of the solar battery cell 1 according to the embodiment of the present invention.
  • FIG. 17A to FIG. 22A are bottom views of the semiconductor substrate 11 as viewed from the side opposite to the light receiving surface (back surface).
  • (B) in FIGS. 17 to 19 is a cross-sectional view of the main part in the CC direction of (a) in each figure.
  • 20B to 22B are cross-sectional views of the main part in the DD direction of FIG.
  • a p-type single crystal silicon substrate having a thickness of several hundred ⁇ m is prepared as the semiconductor substrate 2 (FIG. 7). Since the p-type single crystal silicon substrate is manufactured by slicing an ingot formed by cooling and solidifying molten silicon with a wire saw, damage at the time of slicing remains on the surface. Therefore, the p-type single crystal silicon substrate is etched near the surface of the p-type single crystal silicon substrate by etching the surface by immersing the surface in an acid or heated alkaline solution, for example, an aqueous sodium hydroxide solution. Remove the damage area that exists in the.
  • an acid or heated alkaline solution for example, an aqueous sodium hydroxide solution.
  • the surface is removed by a thickness of 10 ⁇ m to 20 ⁇ m with an alkali solution such as sodium hydroxide or potassium hydroxide of several wt% to 20 wt%.
  • an alkali solution such as sodium hydroxide or potassium hydroxide of several wt% to 20 wt%.
  • a p-type silicon substrate used for the semiconductor substrate 2 a p-type single crystal silicon substrate having a specific resistance of 0.1 ⁇ ⁇ cm to 5 ⁇ ⁇ cm and having a (100) plane orientation will be described as an example.
  • an additive that promotes anisotropic etching such as IPA (isopropyl alcohol) is added to the same alkali low concentration solution, such as several wt% sodium hydroxide or potassium hydroxide.
  • Anisotropic etching is performed with the solution.
  • a micro-concave pattern 2a having a substantially quadrangular pyramid shape is formed on the light-receiving surface side and back surface side of the p-type single crystal silicon substrate so that the silicon (111) surface is exposed, thereby forming a texture structure. (Step S10, FIG. 8). That is, the texture structure is formed on the front and back surfaces of the p-type single crystal silicon substrate by wet etching (alkali texture method) using an alkaline solution.
  • a pn junction is formed in the semiconductor substrate 2 (step S20, FIG. 9). That is, a group V element such as phosphorus (P) is diffused into the semiconductor substrate 2 to form the n-type impurity diffusion layer 3 having a thickness of several hundred nm.
  • a pn junction is formed by diffusing phosphorus oxychloride (POCl 3 ) by thermal diffusion with respect to a p-type single crystal silicon substrate having a texture structure on the surface.
  • the p-type single crystal silicon substrate is several tens of minutes at a high temperature of, for example, 800 ° C. to 900 ° C. by a vapor phase diffusion method in a mixed gas atmosphere of, for example, phosphorus oxychloride (POCl 3 ) gas, nitrogen gas, and oxygen gas.
  • the n-type impurity diffusion layer 3 in which phosphorus (P) is diffused is uniformly formed in the surface layer of the p-type single crystal silicon substrate by thermal diffusion. Good electrical characteristics of the solar cell can be obtained when the sheet resistance range of the n-type impurity diffusion layer 3 formed on the surface of the semiconductor substrate 2 is about 30 ⁇ / ⁇ to 80 ⁇ / ⁇ .
  • the n-type impurity diffusion layer 3 is formed on the entire surface of the semiconductor substrate 2. For this reason, the front surface (light receiving surface) and the back surface of the semiconductor substrate 2 are in an electrically connected state. Therefore, in order to cut off this electrical connection, the end face region of the semiconductor substrate 2 is etched by dry etching, for example (FIG. 10). Further, a glassy (phosphosilicate glass, PSG: Phospho-Silicate Glass) layer deposited on the surface during the diffusion process is formed on the surface immediately after the formation of the n-type impurity diffusion layer 3. For this reason, the semiconductor substrate 2 is immersed in a hydrofluoric acid aqueous solution or the like to remove the PSG layer by etching.
  • PSG Phospho-Silicate Glass
  • an insulating film such as a silicon oxide film, a silicon nitride film, or a titanium oxide film is formed as a reflection preventing film 4 with a uniform thickness on one surface of the light receiving surface side of the semiconductor substrate 2 (see FIG. Step S30, FIG. 10).
  • the film thickness and refractive index of the antireflection film 4 are set to values that most suppress light reflection.
  • the antireflection film 4 is formed by using, for example, a plasma CVD method, using a mixed gas of silane (SiH 4 ) gas and ammonia (NH 3 ) gas as a raw material, and at 300 ° C. or higher and under reduced pressure. 4, a silicon nitride film is formed.
  • the refractive index is, for example, about 2.0 to 2.2, and the optimum antireflection film thickness is, for example, 70 nm to 90 nm.
  • the antireflection film 4 two or more films having different refractive indexes may be laminated.
  • the antireflection film 4 may be formed by vapor deposition, thermal CVD, or the like. It should be noted that the antireflection film 4 formed in this manner is an insulator, and simply forming the light receiving surface side electrode 12 on the surface does not act as a solar battery cell.
  • the n-type impurity diffusion layer 3 formed on the back surface of the semiconductor substrate 2 is removed by diffusion of phosphorus (P).
  • P phosphorus
  • the semiconductor substrate 2 made of p-type single crystal silicon which is the first conductivity type layer, and the n-type impurity diffusion layer 3 which is the second conductivity type layer formed on the light receiving surface side of the semiconductor substrate 2 A semiconductor substrate 11 having a pn junction is obtained (FIG. 11).
  • the n-type impurity diffusion layer 3 is formed only on one surface of the semiconductor substrate 2, the above-described etching of the end surface region of the semiconductor substrate 2 and the removal of the n-type impurity diffusion layer 3 formed on the back surface of the semiconductor substrate 2 are performed. Is unnecessary.
  • thermosetting resin a resin having resistance to the temperature (deposition temperature) at the time of forming the back surface passivation film 7 is used.
  • the shape of the mask pattern 21 is created based on a desired electrode pattern.
  • the mask pattern 21 is formed in a comb shape, and the intersection of the line-shaped region extending in the vertical direction and the line-shaped region extending in the horizontal direction in the comb-shaped shape is a square shape.
  • thermosetting resin is solidified by introducing the semiconductor substrate 11 into a baking furnace and performing heat treatment (step S40, FIG. 12, FIG. 17).
  • This thermosetting resin solidification step is performed in the chamber preceding the film forming chamber for forming the back surface passivation film 7 when the apparatus used for forming the back surface passivation film 7 to be described later is an apparatus having a multi-chamber system.
  • the semiconductor substrate 11 is held, and the temperature in the chamber is set to be equal to or higher than the solidification temperature of the thermosetting resin.
  • the semiconductor substrate 11 may be held in a film formation chamber where the back surface passivation film 7 is formed, and the temperature in the chamber may be equal to or higher than the solidification temperature of the thermosetting resin. Thereafter, the back surface passivation film 7 is formed as it is in the film forming chamber. Thereby, the continuous process of the process of solidifying a thermosetting resin and the film-forming process of the back surface passivation film 7 is possible, and the process can be simplified.
  • thermosetting resin used as a printing paste for forming the mask pattern 21
  • the film has a resistance to the film formation temperature in the subsequent film formation process of the back surface passivation film 7, and the subsequent process. If it can be easily removed by incineration or dry etching, it is not limited to this.
  • a printing paste having a solidification characteristic different from that of the thermosetting resin such as an ultraviolet curable resin.
  • an ultraviolet curable resin is used as a printing paste for forming a mask pattern, after the ultraviolet curable resin is pattern printed on the back side of the semiconductor substrate 11, the ultraviolet curable resin is irradiated with ultraviolet rays to be solidified.
  • the ultraviolet curable resin a resin having resistance to the temperature (film formation temperature) at the time of forming the back surface passivation film 7 is used.
  • a back surface passivation film 7 made of a silicon nitride film (SiN film) is formed on the entire back surface side of the semiconductor substrate 11 on which the mask pattern 21 is formed (step S50, FIG. 13, FIG. 18). That is, a silicon nitride film (SiN film) having a refractive index of 1.9 to 2.2 and a thickness of 60 nm to 300 nm is formed on the back side of the semiconductor substrate 11 on which the mask pattern 21 is formed by thermosetting resin, for example, by plasma CVD. A back surface passivation film 7 made of is formed.
  • the back surface passivation film 7 is formed by embedding the mask pattern 21 with a film thickness smaller than the thickness of the mask pattern 21 so that at least a part of the upper side surface of the mask pattern 21 is exposed. Note that the mask pattern 21 in FIG. 18A is shown through the back surface passivation film 7.
  • thermosetting resin may not be successfully removed in the process. That is, when the entire surface of the thermosetting resin is covered with the back surface passivation film 7, oxygen is not supplied to the surface of the thermosetting resin, and the thermosetting resin is hardly burned. Therefore, the back surface passivation film 7 is formed such that at least a part of the upper side surface of the mask pattern 21 is exposed under a condition with poor step coverage.
  • the plasma CVD method is used as the film formation method for the back surface passivation film 7, it is preferable to select conditions close to normal pressure (normal pressure plasma CVD method).
  • a film forming method other than the plasma CVD method is used as the film forming method for the back surface passivation film 7, it is preferable to select the sputtering method.
  • thermosetting resin of the mask pattern 21 is burned off by heat treatment (incineration removal).
  • the heating temperature in the heat treatment is such that the thermosetting resin disappears and the back surface passivation film 7 has resistance.
  • a comb-shaped opening 7 a that penetrates the back surface passivation film 7 in the film thickness direction and exposes the back surface side of the semiconductor substrate 2 is formed.
  • the opening 7 a is formed in the same comb shape as the mask pattern 21.
  • the back surface passivation film 7 since at least a part of the upper side surface of the mask pattern 21 is exposed from the back surface passivation film 7, oxygen is reliably supplied to the surface of the thermosetting resin, and the thermosetting resin is surely incinerated. . Further, by removing the mask pattern 21, the back surface passivation film 7 on the mask pattern 21 is also removed.
  • the semiconductor substrate 11 is placed in a chamber subsequent to the film forming chamber on which the back surface passivation film 7 is formed. Hold. Then, the temperature in the chamber is adjusted to a temperature at which the thermosetting resin disappears and the back surface passivation film 7 has resistance. Thereby, the continuous process of the film-forming process of the back surface passivation film 7 and the process of removing the thermosetting resin is possible, and the process can be simplified.
  • the semiconductor substrate 11 is held as it is in the film formation chamber where the back surface passivation film 7 is formed, and the temperature in the chamber is adjusted to a temperature at which the thermosetting resin disappears and the back surface passivation film 7 has resistance. May be. Thereby, the continuous process of the film-forming process of the back surface passivation film 7 and the process of removing the thermosetting resin is possible, and the process can be simplified.
  • a gas having a sufficient chemical selectivity between the silicon nitride film (SiN film) and the thermosetting resin other than the incineration removal of the mask pattern 21 by high-temperature heat treatment can be obtained even by using dry etching using.
  • the mask pattern 21 is formed on the back surface side of the semiconductor substrate 11 before the back surface passivation film 7 is formed, the back surface passivation film 7 is formed, and then the mask pattern 21 is removed by incineration. Therefore, in the present embodiment, drilling of the back surface passivation film 7 can be realized by using a thermosetting resin printing and heat treatment, which are inexpensive and simple methods.
  • the back side electrode 13 is formed (before firing).
  • the back silver paste 8a which is an electrode material paste, is applied to the shape of the back silver electrode 8 in a pad shape by screen printing on the back side of the semiconductor substrate 11 and dried (step S70, FIG. 20).
  • the back silver paste 8a is partly formed in a square area at the intersection of the line-shaped area extending in the vertical direction and the line-shaped area extending in the horizontal direction in the comb-shaped opening 7a. Is printed so as to protrude from the surface of the back surface passivation film 7.
  • the back aluminum paste 9a which is an electrode material paste, is applied to the shape of the back aluminum electrode 9 by screen printing on the back side of the semiconductor substrate 11, and dried (step S80, FIG. 15, FIG. 21).
  • the back aluminum paste 9a is applied in such a manner that the region excluding the application region of the back silver paste 8a in the comb-shaped opening 7a is filled and brought into contact with the back silver paste 8a.
  • the back aluminum paste 9 a is also applied to the back surface passivation film 7 so as to surround the back silver electrode 8 on the back surface of the semiconductor substrate 11, and is applied to almost the entire back surface of the semiconductor substrate 11 surrounding the back silver electrode 8. . Therefore, the back aluminum paste 9a is printed on the back surface of the semiconductor substrate 11 except for the region of the back silver paste 8a that has been printed and dried previously.
  • the back silver paste 8a is applied to the inner side area of the square area of the opening 7a, and the back aluminum paste is applied to the outer side area of the square area of the opening 7a. Although the case where 9a is applied is shown, the back silver paste 8a may be applied to the entire square area.
  • a surface silver electrode (light-receiving surface side electrode 12) is formed on the light-receiving surface side by screen printing (before firing). That is, a silver paste 5a, which is an electrode material paste containing glass frit, is applied to the shape of the front silver grid electrode 5 and the front silver bus electrode 6 on the antireflection film 4 which is the light receiving surface of the semiconductor substrate 11 by screen printing. After that, the silver paste 5a is dried (step S90, FIG. 15). 12 to 16 show a case where the interval between adjacent front silver grid electrodes 5 on the light receiving surface side is the same as the interval between adjacent back aluminum electrodes 9 serving as grid electrodes on the back surface side. Further, FIG. 15 corresponds to the cross-sectional view in the AA direction of FIG. 1, and therefore the back silver paste 8a is not shown in FIG.
  • the electrode paste on the front and back surfaces of the semiconductor substrate 11 is simultaneously fired at, for example, 600 ° C. to 900 ° C., so that the antireflection film 4 is melted with the glass material contained in the silver paste on the front side of the semiconductor substrate 11.
  • the silver material comes into contact with silicon and re-solidifies.
  • the front silver grid electrode 5 and the front silver bus electrode 6 as the light receiving surface side electrode 12 are obtained, and conduction between the light receiving surface side electrode 12 and the silicon of the semiconductor substrate 11 is ensured (step S100, FIG. 16). ).
  • Such a process is called a fire-through method.
  • the silver material of the back silver paste 8a comes into contact with silicon and re-solidifies to obtain the back silver electrode 8 (FIG. 22).
  • the back aluminum paste 9 a applied to the opening 7 a reacts with the silicon of the semiconductor substrate 11 to obtain the back aluminum electrode 9, and the p + layer 10 is formed immediately below the back aluminum electrode 9.
  • the back aluminum paste 9 a applied on the back surface passivation film 7 is also baked, and the back aluminum electrode 9 is obtained also on the back surface passivation film 7. Therefore, the back aluminum electrode 9 is formed on the back surface of the semiconductor substrate 11 except for the region of the back silver electrode 8.
  • the back aluminum paste 9a does not contain glass frit. For this reason, no fire-through occurs in the baking of the back aluminum paste 9a.
  • the solar battery cell 1 according to the present embodiment shown in FIGS. 1 to 5 is obtained.
  • the order (printing order) of arrangement of the paste, which is an electrode material, on the semiconductor substrate 11 may be switched between the light receiving surface side and the back surface side.
  • the back surface passivation film 7 is formed after forming the mask pattern 21 on the back surface side of the semiconductor substrate 11, and then the mask pattern 21 is removed.
  • the opening part 7a can be formed in the back surface passivation film 7 by an inexpensive and simple process.
  • the method for manufacturing a solar battery cell according to the present invention is useful when manufacturing a solar battery cell having a back surface passivation film and excellent in photoelectric conversion efficiency with a simple process and high productivity.
  • 1 solar cell 2 semiconductor substrate, 2a minute unevenness, 3 n-type impurity diffusion layer, 4 antireflection film, 5 surface silver grid electrode, 5a silver paste, 6 surface silver bus electrode, 7 back surface passivation film, 7a opening, 8 back silver electrode, 8a back silver paste, 9 back aluminum electrode, 9a back aluminum paste, 10 p + layer, 11 semiconductor substrate, 12 light receiving surface side electrode, 13 back surface side electrode, 21 mask pattern.

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Abstract

La présente invention concerne un procédé de production de photopile qui comprend : une première étape dans laquelle une seconde couche de diffusion d'impuretés de type conductrice est formée sur un côté de surface d'un premier substrat à semi-conducteurs de type conducteur, ledit côté de surface devant être le côté de surface recevant la lumière; une deuxième étape dans laquelle un dessin de masque est formé sur l'autre côté de surface du substrat à semi-conducteurs; une troisième étape dans laquelle un film de passivation ayant une épaisseur de film inférieure à l'épaisseur du dessin de masque est formé sur l'autre côté de surface du substrat à semi-conducteurs, et le dessin de masque est encastré dans le film de passivation, de manière qu'une partie d'une surface latérale du dessin de masque soit mise à nu; une quatrième étape dans laquelle une ouverture est formée par retrait du film de passivation, ladite ouverture pénétrant dans le film de passivation dans la direction de l'épaisseur de film, et mettant à nu l'autre côté de surface du substrat à semi-conducteurs; une cinquième étape dans laquelle une électrode côté surface arrière qui doit être connectée électriquement à l'autre côté de surface du substrat à semi-conducteurs est encastrée dans l'ouverture; et une sixième étape dans laquelle une électrode côté surface de réception de lumière devant être connectée électriquement à la couche de diffusion d'impuretés est formée sur le premier côté de surface du substrat à semi-conducteur.
PCT/JP2013/082624 2013-12-04 2013-12-04 Procédé de production de photopile WO2015083259A1 (fr)

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JP2015551336A JP6125042B2 (ja) 2013-12-04 2013-12-04 太陽電池セルの製造方法
PCT/JP2013/082624 WO2015083259A1 (fr) 2013-12-04 2013-12-04 Procédé de production de photopile

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JP2019165264A (ja) * 2016-09-28 2019-09-26 京セラ株式会社 太陽電池素子

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JP2010034540A (ja) * 2008-06-26 2010-02-12 Hitachi Chem Co Ltd 太陽電池用電極基材
JP2011066400A (ja) * 2009-08-18 2011-03-31 Semiconductor Energy Lab Co Ltd 光電変換装置及びその作製方法
JP2013526077A (ja) * 2010-05-05 2013-06-20 コミサリア ア レネルジィ アトミーク エ オ ゼネ ルジイ アルテアナティーフ 構造化された裏面を有する太陽電池およびその製造方法
JP2013235970A (ja) * 2012-05-09 2013-11-21 Sharp Corp 光電変換素子

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JP4967765B2 (ja) * 2007-04-05 2012-07-04 日立化成工業株式会社 凹版及びその製造方法

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JP2010034540A (ja) * 2008-06-26 2010-02-12 Hitachi Chem Co Ltd 太陽電池用電極基材
JP2011066400A (ja) * 2009-08-18 2011-03-31 Semiconductor Energy Lab Co Ltd 光電変換装置及びその作製方法
JP2013526077A (ja) * 2010-05-05 2013-06-20 コミサリア ア レネルジィ アトミーク エ オ ゼネ ルジイ アルテアナティーフ 構造化された裏面を有する太陽電池およびその製造方法
JP2013235970A (ja) * 2012-05-09 2013-11-21 Sharp Corp 光電変換素子

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019165264A (ja) * 2016-09-28 2019-09-26 京セラ株式会社 太陽電池素子

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