WO2015068572A1 - 基板用端子および基板コネクタ - Google Patents
基板用端子および基板コネクタ Download PDFInfo
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- WO2015068572A1 WO2015068572A1 PCT/JP2014/078045 JP2014078045W WO2015068572A1 WO 2015068572 A1 WO2015068572 A1 WO 2015068572A1 JP 2014078045 W JP2014078045 W JP 2014078045W WO 2015068572 A1 WO2015068572 A1 WO 2015068572A1
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- WIPO (PCT)
- Prior art keywords
- board
- terminal
- substrate
- base material
- outermost layer
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/02—Contact members
- H01R13/03—Contact members characterised by the material, e.g. plating, or coating materials
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/50—After-treatment of electroplated surfaces by heat-treatment
- C25D5/505—After-treatment of electroplated surfaces by heat-treatment of electroplated tin coatings, e.g. by melting
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/71—Coupling devices for rigid printing circuits or like structures
- H01R12/712—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
- H01R12/716—Coupling device provided on the PCB
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
- H01R43/16—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing contact members, e.g. by punching and by bending
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/50—Fixed connections
- H01R12/51—Fixed connections for rigid printed circuits or like structures
- H01R12/55—Fixed connections for rigid printed circuits or like structures characterised by the terminals
- H01R12/58—Fixed connections for rigid printed circuits or like structures characterised by the terminals terminals for insertion into holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/71—Coupling devices for rigid printing circuits or like structures
- H01R12/72—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
- H01R12/722—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures coupling devices mounted on the edge of the printed circuits
- H01R12/724—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures coupling devices mounted on the edge of the printed circuits containing contact members forming a right angle
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R2107/00—Four or more poles
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12708—Sn-base component
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12708—Sn-base component
- Y10T428/12715—Next to Group IB metal-base component
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12785—Group IIB metal-base component
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Definitions
- the present invention relates to a board terminal and a board connector.
- a terminal for a substrate used in a printed circuit board a terminal having a base material made of a Cu alloy and an Sn plating film covering the surface of the base material is known.
- this type of board terminal is used by being held in a housing to form a board connector, which is attached to a printed circuit board or directly attached to a printed circuit board.
- Patent Document 1 as a terminal used in various connectors, a plating film in which a Ni plating layer, a Cu plating layer, and a Sn plating layer are sequentially laminated on the surface of a base material made of a Cu alloy is provided. A terminal is disclosed. This document describes that the insertion force when connecting to the counterpart terminal can be reduced by adopting the configuration.
- Patent Document 2 preceding this application discloses a conductive material for connecting parts obtained by forming Cu plating and Sn plating on the surface of a Cu plate on which surface irregularities are formed and then performing reflow treatment. .
- JP 2003-147579 A Japanese Patent No. 3926355
- the conventional technology has room for improvement in the following points. That is, the conventional terminal having the Sn plating film has a problem that the friction coefficient on the surface of the Sn plating film is high due to the softness of Sn, and the insertion force when connecting to the counterpart terminal is increased.
- the board connector often adopts a multipolar structure using a plurality of board terminals, and there is a problem that the insertion force tends to increase as the number of terminals increases.
- one end of the board terminal is connected to the printed circuit board by solder bonding. Therefore, when the solder wettability of a plating film is bad, there exists a problem that connection reliability falls.
- the present invention has been made in view of the above background, and has been obtained in an attempt to provide a terminal for a board that can realize a low insertion force and has good solder wettability, and a board connector using the same. Is.
- One aspect of the present invention has a base material made of a metal material and a plating film covering the surface of the base material,
- the plating film is An Sn parent phase and an Sn—Pd alloy phase dispersed in the Sn mother phase, and the Sn mother phase and the Sn—Pd alloy phase have an outermost layer on the outer surface;
- the substrate terminal is characterized in that the Pd content in the outermost layer is 7 atomic% or less.
- Another aspect of the present invention is a board connector comprising the board terminal and a housing for holding the board terminal.
- the substrate terminal has the above configuration.
- the substrate terminal has not only a relatively soft Sn matrix phase but also a relatively hard Sn—Pd alloy phase on the outer surface of the outermost layer of the plating film. Therefore, the terminal for a board
- the above-mentioned substrate terminal can ensure good solder wettability.
- the board connector has the above-described configuration, and particularly has the board terminal. Therefore, the board connector can be fitted to the mating connector with a low insertion force. Moreover, the said board
- FIG. 2 is a sectional view taken along line II-II in FIG. It is explanatory drawing which showed typically the base material and plating film in the board
- 6 is a graph showing the measurement results of the friction coefficient of the plated member produced in Experimental Example 1.
- the board terminal is a terminal used with one end electrically connected to the printed circuit board and the other end connected to the counterpart terminal.
- the board terminal may be connected to the printed circuit board while being held in the housing, or may be directly connected to the printed circuit board. In the former case, since a plurality of board terminals are usually held in the housing, it is easy to suppress an increase in insertion force accompanying an increase in the number of terminals when mating with the mating connector, and the effect of reducing the above insertion force Can be fully exhibited.
- the base material forming the terminal shape is made of a metal material.
- a metal constituting the base material for example, Cu or Cu alloy, Al or Al alloy, or the like can be used.
- the metal constituting the substrate Cu or a Cu alloy can be suitably used from the viewpoints of high electrical conductivity, excellent workability, and appropriate strength.
- the base material can be composed of a wire or a plate material.
- the substrate can be configured by cutting a wire or punching a plate.
- the wire can be subjected to plastic working such as press working before and / or after cutting. Further, the punched plate material can be subjected to plastic working such as press working.
- plastic working such as press working before and / or after cutting.
- the punched plate material can be subjected to plastic working such as press working.
- the plating film has the outermost layer.
- the Sn parent phase is a phase containing Sn as a main constituent element.
- elements such as Ni, which may be contained in an inner layer to be described later, or an Sn—Pd alloy phase are incorporated. It may contain an element constituting the base material such as Pd or Cu which has not been formed.
- the Sn—Pd alloy phase is a phase mainly composed of an alloy of Sn and Pd, and may be contained in an inner layer to be described later such as Ni in addition to Pd as an alloy constituent element. It may contain an element or an element constituting a base material such as Cu.
- the substrate terminal has both an Sn mother phase and an Sn—Pd alloy phase on the outer surface of the outermost layer.
- Sn parent phase and the Sn—Pd alloy phase can also exist inside the outermost layer.
- An Sn oxide film may be present on the outer surface of the outermost layer as long as it does not adversely affect the realization of low insertion force and good solder wettability.
- the area ratio of the Sn—Pd alloy phase occupying the outer surface of the outermost layer is specifically 10% or more, preferably 20% or more. Since the Sn—Pd alloy phase has a high effect in reducing the friction coefficient, in this case, the friction coefficient on the outer surface of the outermost layer can be effectively reduced. Further, the area ratio of the Sn—Pd-based alloy phase in the outer surface of the outermost layer can be specifically 80% or less, preferably 50% or less. Since the Sn matrix has a low contact resistance, in this case, the contact resistance of the terminal can be easily reduced. By making the area ratio 10% or more and 80% or less, it becomes easy to achieve both reduction of the friction coefficient and reduction of the contact resistance.
- the Pd content in the outermost layer is 7 atomic% or less.
- the Pd content means the atomic% of Pd with respect to the total of Sn and Pd contained in the outermost layer.
- the Pd content in the outermost layer correlates with the zero cross time which is an index of the solder wettability of the outermost layer.
- the zero cross time is a time from when the test piece having the plating film is immersed in a solder bath using the meniscograph method until the wetting stress value becomes 0, and represents the speed at which the solder gets wet. Generally, the faster the solder gets wet, the shorter the zero cross time and the better the solder wettability.
- the zero cross time is desirably 2.5 seconds or less, more preferably 2 seconds or less.
- the Pd content in the outermost layer exceeds 7 atomic%, the zero crossing time exceeds 2.5 seconds, and the solder wettability of the board terminal deteriorates.
- the Pd content in the outermost layer is preferably 6.5 atomic percent or less, more preferably 6 atomic percent or less, even more preferably 5.5 atomic percent or less, and even more preferably 5 atoms, from the viewpoint of improving solder wettability. % Or less.
- the Pd content in the outermost layer can be 1 atomic% or more from the viewpoint of securing the Sn—Pd alloy phase.
- the thickness of the outermost layer can be about 0.5 to 3 ⁇ m, preferably about 1 to 2 ⁇ m, from the viewpoints of wear resistance and electrical conductivity.
- the plating film may be composed of an outermost layer in contact with the base material, or may have an inner layer interposed between the base material and the outermost layer. In the latter case, by selecting the type of the inner layer, it is possible to improve the adhesion of the plating film to the base material and to suppress the diffusion of the base material component to the outermost layer.
- the inner layer can be composed of one layer or two or more layers.
- the material for the inner layer include Ni and Ni alloy.
- the plating film includes an inner layer having a two-layer structure of a Ni layer in contact with the base material and a Ni—Sn alloy layer in contact with the Ni layer, and the outermost layer in contact with the inner layer. It can be set as the structure which has.
- the base material has a fractured surface formed at the time of processing the terminal shape, and the plating film covers the surface of the substrate including the fractured surface.
- the fracture surface include a cut surface of a wire material and a punched surface of a plate material that can constitute a base material.
- the fracture surface of the base material may be entirely covered with a plating film, or a part of the fracture surface that is not involved in the connection with the printed circuit board remains without being covered with the plating film. Also good.
- the substrate terminal is formed, for example, by forming an Ni plating layer having a thickness of about 1 to 3 ⁇ m on the surface of a base material made of Cu or Cu alloy or the like, if necessary, and then having a thickness of about 10 to 20 nm.
- the Pd plating layer and the Sn plating layer having a thickness of about 1 to 2 ⁇ m are sequentially formed, and a reflow process is performed at a heating temperature of about 230 to 400 ° C.
- the board connector includes the board terminal and a housing for holding the board terminal.
- substrate can be comprised so that it may be hold
- the board terminal is specifically connected between the mating connection part connected to the counterpart terminal by fitting, the board connection part connected to the board, and between the fitting connection part and the board connection part.
- a configuration having a bent portion such as an “L” shape to be connected can be employed.
- the board connector can be configured, for example, such that a plurality of board terminals are arranged in a housing arranged on the printed circuit board. In this case, since each board terminal has a low insertion force, it is possible to effectively suppress an increase in the insertion force accompanying an increase in the number of terminals, and the mating connector can be fitted with a low insertion force. Can do.
- the board terminal is preferably used by being attached to the printed circuit board by solder bonding. Since the board connector has a plating film having the outermost layer, it has excellent solder wettability and can improve connection reliability.
- Example 1 The board terminal and board connector of Example 1 will be described with reference to FIGS.
- the substrate terminal 1 of this example includes a base material 11 made of a metal material and a plating film 12 covering the surface of the base material 11.
- the plated coating 12 includes a Sn matrix 120a and a Sn—Pd alloy phase 120b dispersed in the Sn matrix 120a, and the Sn matrix 120a and the Sn—Pd alloy phase 120b are present on the outer surface. It has an outer layer 120.
- the Pd content in the outermost layer 120 is 7 atomic% or less. This will be described in detail below.
- the board terminal 1 is applied to the board connector 2.
- the board terminal 1 includes a fitting connection portion 101 connected to a counterpart terminal (not shown) by fitting, a board connection portion 102 connected to the printed circuit board P, and a fitting connection portion 101. And an L-shaped bent portion 103 that connects between the substrate connecting portion 102 and the substrate connecting portion 102.
- the substrate terminal 1 is formed by bending a Cu or Cu alloy wire having a plating film 12 formed into an L shape.
- the substrate terminal 1 may be formed by punching a Cu or Cu alloy plate material into a linear shape, then forming a plating film 12 and bending it into an L shape.
- the plating film 12 specifically has an outermost layer 120 and an inner layer 121 interposed between the substrate 11 and the outermost layer 120.
- the inner layer 121 has a two-layer structure of a Ni layer 121a in contact with the substrate 11 and a Ni—Sn alloy layer 121b in contact with the Ni layer 121a.
- the outermost layer 120 is in contact with the Ni—Sn alloy layer 121 b constituting the inner layer 121.
- the plating film 12 is formed on the surface of the base material 11 made of Cu or Cu alloy by using an electroplating method.
- the plating layer is formed in sequence and reflow treatment is performed at a heating temperature of 230 to 400 ° C.
- the board connector 2 of the present example includes the board terminal 1 and a housing 20 that holds the board terminal 1.
- the board connector 2 specifically includes a housing 20 fixed to the printed circuit board P and a plurality of board terminals 1 assembled to the housing 20. Yes.
- the housing 20 is made of synthetic resin, and a hood portion 201 that accommodates a mating connector (not shown) is formed on the front side of the housing 20 when fitted, and a back wall 202 is integrally formed behind the hood portion 201. Yes.
- the board terminal 1 is press-fitted and held in the back wall 202 of the housing 20.
- the portion of the board terminal 1 that protrudes into the hood part 201 is a fitting connection part 101 that is connected by fitting to a female terminal provided in the mating connector, and the opposite end.
- the board connecting portion 102 is connected to the land of the printed circuit board P by soldering.
- the substrate terminal 1 of this example has the above configuration.
- the substrate terminal 1 has not only the relatively soft Sn matrix 120a but also the Sn—Pd alloy phase 120b having a relatively high hardness on the outer surface of the outermost layer 120 in the plating film 12. Therefore, the board terminal 1 has a reduced coefficient of friction on the outer surface of the outermost layer 120, and can suppress the insertion force when connecting to the counterpart terminal.
- the board terminal 1 can ensure good solder wettability.
- the plating film 12 of the substrate terminal 1 has an inner layer 121. Therefore, it is possible to improve the adhesion of the plating film 12 to the base material 11 and to suppress the diffusion of the base material component to the outermost layer 120.
- the board connector 2 of this example has the above-described configuration, and in particular, has a board terminal 1. Therefore, the board connector 2 can be fitted with the mating connector with a low insertion force.
- the board connector 2 since the board connector 2 has a plurality of board terminals 1, an increase in insertion force due to an increase in the number of terminals when the connectors are fitted due to a reduction in friction of the individual board terminals 1 Can be effectively suppressed.
- the board connector 2 can be bonded well when the board terminal 1 is attached to the printed circuit board P by solder bonding.
- Example 2 The board terminal and board connector of Example 2 will be described with reference to FIG. As shown in FIG. 4, the substrate terminal 1 of Example 2 is different from the substrate terminal 1 of Example 1 in that the plating film 12 does not have the inner layer 121 and is composed of the outermost layer 120. Is different.
- the board connector 2 of the second embodiment is different from the board connector 2 of the first embodiment in that the board terminal 1 of the second embodiment is used. Other configurations are the same as those of the first embodiment.
- Example 1 A Ni plating layer having a thickness of 2.0 ⁇ m, a Pd plating layer having a thickness of 20 nm, and a Sn plating layer having a thickness of 1.0 ⁇ m were sequentially formed on the surface of a clean copper substrate (size 40 mm ⁇ 100 mm, thickness 300 ⁇ m). Then, this was heated at 300 degreeC in air
- the plating film was composed of an outermost layer and an inner layer having a two-layer structure.
- the outermost layer includes an Sn matrix and an Sn—Pd alloy phase dispersed in the Sn matrix, and the Sn matrix and the Sn—Pd alloy phase exist on the outer surface.
- the inner layer was specifically composed of two layers, a Ni layer in contact with the substrate and a Ni—Sn alloy layer in contact with the Ni layer.
- the Pd content in the outermost layer calculated using the Sn plating layer, the Pd plating layer thickness, the element density, and the atomic weight before the reflow treatment is 3.0 atomic%.
- the dynamic friction coefficient was evaluated for the plated members of Sample 1 and Comparative Sample as an index of terminal insertion force. Specifically, a flat plating member and an embossed plating member having a radius of 1 mm are held in contact with each other in the vertical direction, and a load of 5 N is applied in the vertical direction using a piezo actuator while 10 mm / min. . The embossed plated member was pulled in the horizontal direction at a speed of 5 mm, and the frictional force was measured using a load cell. At this time, the pulled distance was defined as the friction distance. A value obtained by dividing the friction force by the load was defined as a friction coefficient.
- FIG. 5 shows the measurement results of the coefficient of friction of the plated members of Sample 1 and the comparative sample. As shown in FIG. 5, it can be seen that the plated member of the comparative sample shows a high coefficient of friction because the plating film is made of a conventional Sn plating film. On the other hand, since the plating film of the sample 1 has the above-described configuration, it was confirmed that the friction coefficient was reduced as compared with the plating member of the comparative sample.
- Example 2 In the same manner as the preparation of the plated member of Sample 1, the plated members of Sample 2 to Sample 4 having different Pd contents in the outermost layer were prepared. At this time, the Pd content was adjusted by setting the thickness of the Sn plating layer to 1.0 ⁇ m and the thickness of the Pd plating layer to 10 nm (sample 2), 20 nm (sample 3), and 50 nm (sample 4). . Sample 2 has a Pd content of 1.6 atomic%, sample 3 has a Pd content of 3.0 atomic%, and sample 4 has a Pd content of 6.4 atomic%.
- the zero cross time was measured by immersing the plated members of each sample and comparative sample in a solder bath using a meniscograph method.
- the above measurement conditions are: Solder used: Sn-3.0Ag-0.5Cu (Ishikawa Metal Co., Ltd., “J3”), solder temperature: 250 ° C., immersion depth: 2 mm, immersion speed: 5 mm / second, immersion time : 10 seconds. The result is shown in FIG.
- the zero cross time can be 2.5 seconds or less.
- the Pd content of the outermost layer exceeds 7 atomic%, the zero cross time exceeds 2.5 seconds, so that the solder wettability of the board terminal deteriorates and the connection reliability decreases.
- the Pd content should be 5.5% or less in order to make the zero cross time 2 seconds or less.
- the board terminal can be used by directly connecting to the printed circuit board without having to hold the housing terminal in an optimal shape.
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- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
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- Manufacturing & Machinery (AREA)
- Electroplating Methods And Accessories (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Description
該めっき被膜は、
Sn母相と該Sn母相に分散されたSn-Pd系合金相とを備え、かつ、上記Sn母相および上記Sn-Pd系合金相が外表面に存在する最外層を有しており、
該最外層におけるPd含有率は、7原子%以下とされていることを特徴とする基板用端子にある。
実施例1の基板用端子、基板コネクタについて、図1~図3を用いて説明する。図1~図3に示すように、本例の基板用端子1は、金属材料よりなる基材11と、基材11の表面を覆うめっき被膜12とを有している。めっき被膜12は、Sn母相120aとSn母相120aに分散されたSn-Pd系合金相120bとを備え、かつ、Sn母相120aおよびSn-Pd系合金相120bが外表面に存在する最外層120を有している。最外層120におけるPd含有率は、7原子%以下とされている。以下、これを詳説する。
いる。
実施例2の基板用端子、基板コネクタについて、図4を用いて説明する。図4に示すように、実施例2の基板用端子1は、めっき被膜12が内層121を有しておらず、最外層120から構成されている点で、実施例1の基板用端子1と異なっている。また、実施例2の基板コネクタ2は、実施例2の基板用端子1を用いた点で、実施例1の基板コネクタ2と異なっている。その他の構成は、実施例1と同様である。
以下、実験例を用いてより具体的に説明する。
清浄な銅基板(大きさ40mm×100mm、厚み300μm、)の表面に、厚み2.0μmのNiめっき層、厚み20nmのPdめっき層、厚み1.0μmのSnめっき層を順次形成した。その後、これを大気中にて300℃で加熱し、試料1のめっき部材を作製した。
試料1のめっき部材の作製と同様にして、最外層におけるPd含有率の異なる試料2~試料4のめっき部材を作製した。この際、Pd含有率は、Snめっき層の厚みを1.0μmとするとともに、Pdめっき層の厚みを10nm(試料2)、20nm(試料3)、50nm(試料4)とすることにより調節した。試料2は、Pd含有率が1.6原子%、試料3は、Pd含有率が3.0原子%、試料4は、Pd含有率が6.4原子%である。
Claims (6)
- 金属材料よりなる基材と、該基材の表面を覆うめっき被膜とを有し、
該めっき被膜は、
Sn母相と該Sn母相に分散されたSn-Pd系合金相とを備え、かつ、上記Sn母相および上記Sn-Pd系合金相が外表面に存在する最外層を有しており、
該最外層におけるPd含有率は、7原子%以下とされていることを特徴とする基板用端子。 - 上記めっき被膜は、上記基材と上記最外層との間に介在する内層を有していることを特徴とする請求項1に記載の基板用端子。
- 上記基材は、端子形状加工時に形成された破面を有しており、
上記めっき被膜は、上記破面を含んで上記基材の表面を覆っていることを特徴とする請求項1または2に記載の基板用端子。 - 上記基材は、CuまたはCu合金であることを特徴とする請求項1~3のいずれか1項に記載の基板用端子。
- 請求項1~4のいずれか1項に記載の基板用端子と、該基板用端子を保持するハウジングとを有することを特徴とする基板コネクタ。
- 上記基板用端子は、はんだ接合によりプリント回路基板に取り付けられて使用されることを特徴とする請求項5に記載の基板コネクタ。
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JP2018067467A (ja) * | 2016-10-20 | 2018-04-26 | 株式会社オートネットワーク技術研究所 | 接続端子および接続端子の製造方法 |
CN109075479A (zh) * | 2016-04-20 | 2018-12-21 | 株式会社自动网络技术研究所 | 连接端子及连接端子对 |
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JP6376168B2 (ja) * | 2016-04-13 | 2018-08-22 | 住友電気工業株式会社 | コネクタ端子用線材およびこれを用いたコネクタ |
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JP7223332B2 (ja) * | 2019-09-19 | 2023-02-16 | 株式会社オートネットワーク技術研究所 | ピン端子、コネクタ、コネクタ付きワイヤーハーネス、及びコントロールユニット |
JP7226209B2 (ja) * | 2019-09-19 | 2023-02-21 | 株式会社オートネットワーク技術研究所 | ピン端子、コネクタ、コネクタ付きワイヤーハーネス、及びコントロールユニット |
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