WO2014208450A1 - Convertisseur d'énergie électrique - Google Patents

Convertisseur d'énergie électrique Download PDF

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Publication number
WO2014208450A1
WO2014208450A1 PCT/JP2014/066312 JP2014066312W WO2014208450A1 WO 2014208450 A1 WO2014208450 A1 WO 2014208450A1 JP 2014066312 W JP2014066312 W JP 2014066312W WO 2014208450 A1 WO2014208450 A1 WO 2014208450A1
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WIPO (PCT)
Prior art keywords
semiconductor element
main electrode
power conversion
conversion device
main
Prior art date
Application number
PCT/JP2014/066312
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English (en)
Japanese (ja)
Inventor
卓 下村
林　哲也
大 津川
崇 広田
健太 江森
啓一郎 沼倉
Original Assignee
日産自動車株式会社
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Application filed by 日産自動車株式会社 filed Critical 日産自動車株式会社
Priority to JP2015524014A priority Critical patent/JP6056971B2/ja
Publication of WO2014208450A1 publication Critical patent/WO2014208450A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Definitions

  • the present invention relates to a power conversion device used for an inverter or the like that operates a plurality of switching elements, and more particularly to a technique for preventing the generation of surge voltage.
  • the inverter device for converting direct current power to alternating current power turns on and off the switching element, so that a surge voltage is generated. Therefore, it is necessary to reduce the generation of surge voltage, and for example, a technique disclosed in Patent Document 1 has been proposed.
  • Patent Document 1 in order to reduce inductance when the power supply side is viewed from the switching element, additional wiring is provided on the positive (high potential side) bus bar and the negative (low potential side) bus bar connected to the power supply. It is described.
  • a power conversion device includes a first semiconductor element constituting an upper arm, a second semiconductor element constituting a lower arm, and a positive conductive member that supplies a positive potential to the upper arm.
  • a negative-side conductive member that supplies a negative potential to the lower arm, and an output-side conductive member that outputs a potential at a connection point between the upper arm and the lower arm.
  • the positive-side conductive member is a main surface of the semiconductor element.
  • the negative side conductive member has a negative side flat plate-shaped portion arranged so as to be substantially parallel to the main surface.
  • the output-side conductive member has an output-side flat plate-shaped portion that is disposed so as to be substantially parallel to the main surface of the semiconductor element.
  • the plus-side flat plate-shaped portion is arranged so as to overlap the entire main surface of the first semiconductor element, or the negative-side flat plate-shaped portion is the second semiconductor element.
  • the plus-side flat plate-shaped portion and the minus-side flat plate-shaped portion are arranged so that at least one of the arrangement is made to overlap with the entire main surface of the plate. May be.
  • one end side of the first semiconductor element and one end side of the second semiconductor element are connected, the plus side conductive member is connected to the other end side of the first semiconductor element, and the minus side conductive member is
  • the second semiconductor element may be connected to the other end side.
  • the power conversion device may be characterized in that the plus side flat plate portion, the minus side flat plate portion, and the output side flat plate portion are sealed with resin.
  • the power converter according to the present invention further includes a capacitor that connects between the plus side conductive member and the minus side conductive member, in addition to the plus side flat plate shape portion, the minus side flat plate shape portion, and the output side flat plate shape portion,
  • the capacitor may be sealed with resin.
  • the power converter according to the present invention further includes a support substrate that supports the first semiconductor element and the second semiconductor element on a surface opposite to the main surface, and includes a plus-side conductive member, a minus-side conductive member, and an output side.
  • Each of the conductive members has a fixing surface for directly fixing to the support substrate, and further, the first semiconductor element is installed on the fixing surface of the plus-side conductive member, and the second semiconductor element is an output-side conductive member
  • the fixing surface may be provided, and at least a part of the support substrate, the fixing surface, and the first semiconductor element and the second semiconductor element may be sealed with resin.
  • the power conversion device is characterized in that the third main electrode is disposed so as to straddle between the plurality of arms in parallel with at least the first main electrode or the second main electrode. May be.
  • the power converter according to the present invention may be characterized in that the third main electrode is arranged so as to overlap one or more semiconductor elements in the vertical direction.
  • the semiconductor module further includes a first main terminal portion and a second main terminal portion connected to the outside, and the first main terminal portion and the second main terminal portion are respectively the first main terminal portion.
  • the first main terminal portion is disposed on the front surface of the semiconductor module, and the second main terminal portion is disposed on the rear surface of the semiconductor module.
  • the second main terminal portion is electrically connected to the electrode and the second main electrode. It may be.
  • the power conversion device may be characterized in that the third main electrode has a portion that is in surface contact with the resin surface of the semiconductor module.
  • the power converter according to the present invention is characterized in that the semiconductor module has at least one arm sealed with resin, and the third main electrode is resin-sealed in the semiconductor module. There may be.
  • the power conversion device may be characterized in that the cooling surface of the semiconductor module is metal-bonded to the cooler via an insulating material.
  • FIG. 1 is a perspective view showing the configuration of the power converter according to the first embodiment of the present invention.
  • FIG. 2 is a circuit diagram of a three-phase inverter circuit configured using the power conversion device according to the embodiment of the present invention.
  • FIG. 3 is a perspective view showing the configuration of the power conversion device according to the second embodiment of the present invention.
  • Fig.4 (a) is a perspective view which shows the structure of the power converter device which concerns on 3rd Embodiment of this invention
  • FIG.4 (b) is sectional drawing in the A line of Fig.4 (a).
  • FIG.5 (a) is a perspective view which shows the structure of the power converter device which concerns on 4th Embodiment of this invention
  • FIG.5 (b) is sectional drawing in the B line
  • FIG. 6A is a perspective view showing a configuration of a power conversion device according to the fifth embodiment of the present invention
  • FIG. 6B is a cross-sectional view taken along line C in FIG. Fig.7 (a) is a perspective view which shows the structure of the power converter device which concerns on 6th Embodiment of this invention
  • FIG.7 (b) is sectional drawing in the D line of Fig.7 (a).
  • FIG. 11 is sectional drawing of the power converter device which concerns on the modification 1 of 7th Embodiment of this invention.
  • FIG. 12 is sectional drawing of the power converter device which concerns on the modification 2 of 7th Embodiment of this invention.
  • FIG. 13 is a perspective view of a power converter according to the eighth embodiment of the present invention.
  • FIG. 14A, FIG. 14B, and FIG. 14C are diagrams showing the configuration of the power conversion device according to the eighth embodiment of the present invention, and
  • FIG. FIG. 14B is a schematic diagram showing a current path during operation of the power conversion device.
  • FIG.14 (c) is a perspective view which shows the internal structure of the semiconductor module used for the power converter device which concerns on 8th Embodiment of this invention.
  • FIG. 15 (a) and 15 (b) are diagrams showing the configuration of the power conversion device according to the ninth embodiment of the present invention.
  • FIG. 15 (a) is a perspective view of the power conversion device
  • FIG. b) is a cross-sectional view of the power converter shown in FIG.
  • the power conversion apparatus 101 includes three bus bars 4, 7, 10, a support substrate 3, a first semiconductor element 5, and a second semiconductor element 8. Then, a bus bar portion 1 composed of flat plate-shaped portions 4a, 7a, 10a of each bus bar, a power module comprising a support substrate 3, a first semiconductor element 5, a second semiconductor element 8, and conductive portions 4b, 7b, 10b of each bus bar. Part 2 is roughly divided into two parts.
  • the power module unit 2 includes an insulating support substrate 3. On the support substrate 3, a conductive portion 4 b (fixed surface) of a bus bar 4 (plus side conductive member) and a bus bar 10 (minus side conductive member). ) Conductive portion 10b (fixed surface) and bus bar 7 (output-side conductive member) conductive portion 7b (fixed surface).
  • the bus bar 4 has a positive pole, and supplies a positive potential at point P in FIG. 2 to a first semiconductor element 5 described later.
  • the bus bar 10 has a negative pole, and supplies a negative potential at the point N (or called the N side) in FIG. 2 to a second semiconductor element 8 to be described later.
  • the bus bar 7 serves as a power output unit, and can supply a potential corresponding to the point S in FIG. 2 to a load connected to the power converter.
  • the positive potential and the negative potential are supplied to the power converter by the DC power supply VB connected via the bus bar 4 and the bus bar 10 of the power converter.
  • the present embodiment has a circuit configuration in which the voltage of the DC power source is directly switched to the output by the switching element.
  • Both the first semiconductor element 5 and the second semiconductor element 8 can perform both switching operation and reflux operation.
  • the first semiconductor element 5 forms an upper arm of one phase of the inverter device shown in FIG. 2
  • the second semiconductor element 8 forms a lower arm of one phase of the inverter device.
  • the connection point of an upper arm and a lower arm is S point shown in FIG.
  • the first semiconductor element 5 and the second semiconductor element 8 are connected to the controller MU. Switching operations of the first semiconductor element 5 and the second semiconductor element 8 are controlled by a signal from the controller MU.
  • the bus bars 7, 4, and 10 shown in FIG. 1 are each bent in a “U” shape in a side view, and the surface of the bus bar 7 that faces the support substrate 3 is a flat plate-shaped portion 7 a (output-side flat plate-shaped portion).
  • the surface of the bus bar 4 facing the support substrate 3 is a flat plate-shaped portion 4a (plus-side flat plate-shaped portion), and the surface of the bus bar 10 facing the support substrate 3 is flat-plate-shaped portion 10a (minus-side flat plate). Shape part).
  • the bus-bar part 1 is comprised by three flat shape part 4a, 7a, 10a.
  • bus bars 7, 4, and 10 are described as being formed by bending one flat plate member into a “U” shape when viewed from the side. Absent.
  • the bus bars 4, 7, 10 may be manufactured in a “U” shape in a side view by combining a plurality of flat plate-like members.
  • the flat plate-shaped portion 7a (output-side flat plate-shaped portion) is the first semiconductor element 5 and the second semiconductor element. 8 is arranged substantially parallel to the main surface. Further, the three flat plate shaped portions 4a, 7a, and 10a are also arranged substantially parallel to each other.
  • the first semiconductor element 5 and the flat plate-shaped portions 4 a, 7 a, and 10 a are arranged so as to overlap each other, and the flat plate-shaped portions 4 a, 7 a, and 10 a are more than the first semiconductor element 5.
  • the size of the capacitive coupling tends to be proportional to the area of the overlapping portion between the opposing surfaces, and tends to increase in inverse proportion to the distance between the opposing surfaces.
  • the main surface of the first semiconductor element 5 and the main surface of the second semiconductor element 8 and the three flat plate-shaped portions 4a, 7a, and 10a are arranged substantially parallel to each other, and the main surface of the first semiconductor element 5 and the first 2 Since the entire main surface of the semiconductor element 8 is arranged so as to overlap the flat plate-shaped portions 4a, 7a, 10a, the flat plate-shaped portions 4a, 7a, 10a of each bus bar, the first semiconductor element 5, and the second The capacitive coupling of the semiconductor element 8 increases.
  • the flat plate-shaped portions 4a, 7a and 10a of the bus bar are arranged so as to overlap with each other and the flat plate-shaped portion 7a for output is provided at the end, the current path of the bus bar 10 and the current path of the bus bar 4 are close to each other. Therefore, the capacitive coupling increases when the distance between the current path of the bus bar 10 and the current path of the bus bar 4 is small. Further, since the distance between the current path of the bus bar 10 and the current path of the bus bar 4 is small and the current path of the bus bar 10 and the current path of the bus bar 4 are close to each other, the current generated in each of the bus bars 4 and 10 and the mutual magnetic property are It becomes easy to obtain the action.
  • the flat plate-shaped portion 4a is arranged by arranging the flat plate-shaped portions 4a, 7a, 10a of the respective bus bars 4, 7, 10 in a range wider than the portion overlapping the entirety of the first semiconductor element 5 and the second semiconductor element 8. , 7a, 10a and the conductive portions 4b, 7b, 10b of the respective bus bars 4, 7, 10 are increased.
  • each bus bar 4, 7 and 10 is a shape in which the opposing areas are widened. Further, the bus bars 4, 7 and 10 are close to each other as long as they are not electrically connected to each other. The distance between 10a and the first semiconductor element 5 and the second semiconductor element 8 is preferably short.
  • illustration is abbreviate
  • the main component, structure, shape, number, and electrical characteristics can be arbitrarily selected.
  • each semiconductor element is installed so as to be either electrically in parallel or in series, or both. It is possible. Also in this case, it is desirable to arrange the flat plate-like portions 4a, 7a, 10a so as to overlap with respect to the main surfaces of all the semiconductor elements.
  • the main component and shape can be selected arbitrarily.
  • the conductive portions 4b, 7b and 10b and the connecting lines 6 and 9 have a large facing area between the flat plate shaped portions 4a, 7a and 10a and a short distance between the facing surfaces. As a result, both capacitive couplings increase and an inductance reduction effect is further obtained.
  • the withstand voltage of the members constituting the inverter for driving the motor is determined in consideration of the surge voltage generated inside the inverter.
  • the surge voltage can be suppressed by reducing the inductance of the current path.
  • not only the inductance of the bus bar alone but also the inductance of the entire inverter including the power module is reduced. Therefore, the withstand voltage of each member when configuring the inverter can be reduced, and the cost can be reduced.
  • FIG. 1 shows only one phase of the inverter device shown in FIG. 2, and in order to construct a three-phase inverter, the power converter device 101 shown in FIG. Just do it.
  • the power conversion device 102 according to the second embodiment includes three bus bars 4, 7, 10, two support substrates 23 a, 23 b, a first semiconductor element 5, and a second semiconductor element 8.
  • bus bar part 21 which consists of flat shape part 4a, 7a, 10a of each bus bar, support substrate 23a, the 1st semiconductor element 5, power module part 22a which consists of conductive parts 4b, 7b1 of each bus bar, support board 23b,
  • the power module portion 22b is composed of the second semiconductor element 8 and the conductive portions 7b2 and 10b of the bus bars.
  • the power module portions 22a and 22b include insulating support substrates 23a and 23b.
  • the conductive portion 4b of the bus bar 4 serving as a positive pole (corresponding to the point P in FIG. 2) and the power
  • the conductive portion 7b1 of the bus bar 7 serving as an output portion (corresponding to the point S in FIG. 2) is provided.
  • the conductive portion 10b of the bus bar 10 that becomes the negative pole (corresponding to the N point in FIG. 2) and the conductive portion of the bus bar 7 that becomes the power output portion (corresponding to the S point in FIG. 2). 7b2 is provided.
  • the conductive portion 4b of the bus bar 4 is provided with the first semiconductor element 5 (Q1, D1 shown in FIG. 2), and the conductive portion 7b2 of the bus bar 7 is provided with the second semiconductor element 8 (Q2, Q2, shown in FIG. 2). D2) is provided. That is, the first semiconductor element 5 is indirectly supported via the bus bar 4 by the support substrate 23a. The second semiconductor element 8 is indirectly supported through the bus bar 7 by the support substrate 23b. In addition, not only indirectly but it is good also as a structure supported directly on the insulating support substrates 23a and 23b.
  • the first semiconductor element 5 and the flat plate-shaped portions 4 a, 7 a, and 10 a are disposed so as to overlap each other, and the flat plate-shaped portions 4 a, 7 a, and 10 a are wider than the first semiconductor element 5. It is arranged over. That is, when viewed in plan, the entire first semiconductor element 5 is disposed so as to be covered by the flat plate-shaped portions 4a, 7a, and 10a, and the flat plate-shaped portions 4a, 7a, and 10a are disposed in a wider area. Has been.
  • the second semiconductor element 8 and the flat plate-shaped portions 4 a, 7 a, and 10 a are disposed so as to overlap each other, and the flat plate-shaped portions 4 a, 7 a, and 10 a are wider than the first semiconductor element 5. It is arranged over.
  • the main surface of the first semiconductor element 5 and the main surface of the second semiconductor element 8 and the three flat plate-shaped portions 4a, 7a, and 10a are respectively It arrange
  • the capacitive coupling between the flat plate shaped portions 4a, 7a, 10a of each bus bar and the first semiconductor element 5 and the second semiconductor element 8 is increased as in the first embodiment described above.
  • the flat plate-shaped portions 4a, 7a and 10a of the bus bar are arranged so as to overlap with each other and the flat plate-shaped portion 7a for output is provided at the end, the current path of the bus bar 10 and the current path of the bus bar 4 are close to each other. Therefore, it becomes easier to obtain the interaction between the current generated in each bus bar 10 and 4 and magnetism.
  • the flat plate-shaped portion 4a is arranged by arranging the flat plate-shaped portions 4a, 7a, 10a of the respective bus bars 4, 7, 10 in a range wider than the portion overlapping the entirety of the first semiconductor element 5 and the second semiconductor element 8. , 7a, 10a and the conductive portions 4b, 7b1, 7b2, 10b of the bus bars 4, 7, 10 are increased in capacitive coupling. Due to these factors, it is possible to reduce the inductance of the entire power conversion device 102 including the bus bar portion 21 and the power module portions 22a and 22b. As a result, it is possible to suppress the occurrence of a surge voltage caused by the inductance.
  • each bus bar 4, 7 and 10 is a shape in which the opposing areas are widened. Further, the bus bars 4, 7 and 10 are close to each other as long as they are not electrically connected to each other. The distance between 10a and the first semiconductor element 5 and the second semiconductor element 8 is preferably short.
  • the main component, structure, shape, number, and electrical characteristics can be arbitrarily selected.
  • each element should be installed so as to be either in parallel or in series or both. Is possible.
  • the main component and shape can be selected arbitrarily.
  • the conductive portions 4b, 7b1, 7b2, 10b and the connecting lines 6, 9 have a large facing area between the flat plate-shaped portions 4a, 7a, 10a and a short distance between the facing surfaces. As a result, both capacitive couplings increase and the inductance can be further reduced.
  • the power conversion device 103 according to the third embodiment is different from the power conversion device 101 (see FIG. 1) shown in the first embodiment in that a sealing agent 24 is provided on the bus bar portion 1 side. To do.
  • a sealing agent 24 is provided on the bus bar portion 1 side.
  • the power conversion device 103 includes three plate-shaped portions 4a (plus-side plate-shaped portions), a plate-shaped portion 7a (output-side plate-shaped portions), and a plate-shaped portion 10a (minus-side plate-shaped portions).
  • the bus bar portion 1 is sealed with a sealant 24.
  • FIG. 4B shows a cross-sectional view taken along line A shown in FIG. As shown in FIG. 4B, the bus bar portion 1 including the three flat plate-shaped portions 4a, 7a, and 10a is sealed with two types of resins 24a and 24b.
  • FIG. 4B shows a state where the periphery of the bus bar portion 1 and the power module portion 2 is sealed with a resin 24a.
  • the size of the capacitive coupling tends to be proportional to the area of the overlapping portion between the opposing surfaces, and tends to increase in inverse proportion to the distance between the opposing surfaces.
  • the dielectric constant between the opposing surfaces increases by filling the resin between the opposing surfaces, the magnitude of the capacitive coupling tends to increase.
  • the capacitive coupling between the regions between the flat plate-shaped portions 4a, 7a and 10a and the first semiconductor element 5 and the second semiconductor element 8 can be enhanced. Moreover, since the dielectric constant of the space between the region between the flat plate-shaped portions 4a, 7a, and 10a and the first semiconductor element 5 and the second semiconductor element 8 is set high by the resin 24b, the interaction between the current paths is increased. Can be increased. And the inductance which arises between the bus bar part 1 and the power module part 2 by these two effects can be reduced further.
  • the bus bar portion 1 and the power module portion 2 are magnetically formed by the resin 24a. Shielded. That is, the magnetic field generated in the bus bar unit 1 and the power module unit 2 is prevented from leaking outside the region surrounded by the resin 24a, and as a result, the interaction of the current paths can be enhanced.
  • the power converter device 104 which concerns on 4th Embodiment is the point which provided the sealing agent 25 in the power module part 2 side compared with the power converter device 101 (refer FIG. 1) shown in 1st Embodiment. Is different.
  • the same parts as those of the power conversion device 101 shown in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
  • the power conversion device 104 seals the support substrate 3 and the conductive portions 4b, 7b, and 10b mounted on the support substrate 3 with a sealant 25.
  • FIG. 5B shows a cross-sectional view taken along line B shown in FIG.
  • the power module unit 2 including the support substrate 3 and the conductive portions 4b, 7b, and 10b mounted on the support substrate 3 is sealed with two types of resins 25a and 25b. Yes.
  • each conductive portion 4b, 7b, 10b is sealed with a resin 25b having a high dielectric constant, and the region serving as the surrounding portion is sealed with a resin 25a having a high magnetic permeability.
  • the power converter device 105 which concerns on 5th Embodiment is the point which provided the sealing agent 26 so that the whole apparatus might be covered compared with the power converter device 101 (refer FIG. 1) shown in 1st Embodiment. Is different.
  • the same parts as those of the power conversion device 101 shown in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
  • the power conversion device 105 seals the bus bar portion 1 composed of three flat plate-shaped portions 4a, 7a, and 10a and the power module portion 2 composed of the support substrate 3 and the respective conductive portions 4b, 7b, and 10b. Seal with a stopper 26.
  • FIG. 6B shows a cross-sectional view taken along line C shown in FIG. As shown in FIG. 6B, the bus bar portion 1 and the power module portion 2 are sealed with two types of resins 26a and 26b.
  • Fig.7 (a) is a perspective view which shows the structure of the power converter device 106 which concerns on 6th Embodiment of this invention.
  • This power conversion device 106 constitutes one phase of a three-phase inverter device, as in the first embodiment described above.
  • the power converter 106 has a capacitor 29 (C1 shown in FIG. 2) on the upper side of the bus bar unit 1 as compared with the power converter 101 (see FIG. 1) shown in the first embodiment.
  • a sealant 27 is provided so as to cover the entire region including the bus bar portion 1 and the capacitor 29.
  • the bus bar portion 1 including the three flat plate shape portions 4a (plus side flat plate shape portion), the flat plate shape portion 7a (output side flat plate shape portion), and the flat plate shape portion 10a (minus side flat plate shape portion)
  • the bus bar 4 Capacitor 29 that connects between positive side conductive member
  • bus bar 10 negative side conductive member
  • FIG. 7B shows a cross-sectional view taken along line D shown in FIG.
  • the three flat plate shaped portions 4a, 7a, 10a and the capacitor 29 are sealed with two kinds of resins 27a, 27b.
  • the region between the capacitor 29 and each flat plate-shaped portion 4a, 7a, 10a is sealed with a resin 27b having a high dielectric constant, and the region surrounding the capacitor 29 is sealed with a resin 27a having a high magnetic permeability.
  • This power conversion device 201 constitutes one phase of a three-phase inverter circuit, similarly to the power conversion devices described in the first to sixth embodiments.
  • FIG. 8A, FIG. 8B, and FIG. 8C are diagrams showing the configuration of the power conversion device 201 according to the seventh embodiment of the present invention.
  • 8A is a perspective view of the power converter 201
  • FIG. 8B is a plan view of the power converter 201.
  • FIG.8 (c) is the schematic which shows the current pathway in the power converter device 201 at the time of operation
  • the power conversion device 201 includes a semiconductor module 208L (first semiconductor module) that constitutes an upper arm, a semiconductor module 208R (second semiconductor module) that constitutes a lower arm, and a third main electrode 209 (output-side conductive member). Is done.
  • the third main electrode 209 electrically connects the semiconductor modules 208L and 208R in series. As a result of this connection, the third main electrode 209 and the semiconductor modules 208L and 208R form upper and lower arm circuits.
  • the third main electrode 209 outputs a potential at a connection point between the upper arm and the lower arm in the upper and lower arm circuits.
  • the semiconductor modules 208L and 208R constituting the power conversion device 201 have the same structure as the semiconductor module 208 shown in FIGS. 9A, 9B, and 9C.
  • the semiconductor modules 208L and 208R will be described as having the same structure.
  • the semiconductor modules 208L and 208R may be referred to as the semiconductor module 208.
  • FIG. 9A, FIG. 9B, and FIG. 9C are diagrams showing the semiconductor module 208 that constitutes the power conversion apparatus 201.
  • FIG. FIG. 9A shows a perspective view of the semiconductor module 208, and shows how power terminals 207 a and 207 b (first terminal portion and second terminal portion, respectively), which will be described later, are exposed to the outside of the semiconductor module 208.
  • FIG. 9B shows a perspective view of the internal structure of the semiconductor module 208.
  • FIG. 9C is a diagram showing a plan view of the internal structure of the semiconductor module 208.
  • the semiconductor module 208 is electrically connected to the semiconductor element 210, the first main electrode 203 and the second main electrode 202 electrically connected to the semiconductor element 210, and the first main electrode 203 and the second main electrode 202, respectively.
  • Power terminals 207a and 207b As shown in FIG. 9B, the semiconductor element 210 is disposed on the first main electrode 203, and the semiconductor element 210 and the first main electrode 203 are electrically connected via a bonding material 206 on the lower surface of the semiconductor element 210. It is connected. Further, the second main electrode 202 is disposed on the semiconductor element 210, and the semiconductor element 210 and the second main electrode 202 are electrically connected via a bonding material 206 on the upper surface of the semiconductor element 210.
  • a signal terminal connected to the semiconductor element 210 for transmitting a signal for controlling the semiconductor element 210 is omitted.
  • signal terminals for controlling the semiconductor element 210 are exposed on the surface of the semiconductor module 208.
  • the signal terminal is connected to the controller MU as shown in FIG.
  • an element for forming one arm of the three-phase inverter circuit in the semiconductor module 208 is indicated by one semiconductor element 210.
  • FIG. The semiconductor element 210 can perform both a switching operation and a reflux operation. The switching operation of the semiconductor element 210 is controlled by a signal from the controller MU transmitted through a signal terminal (not shown).
  • the third main electrode 209 constitutes a power terminal 207b of the semiconductor module 208L constituting the upper arm and a lower arm on the front side of the power conversion device 201.
  • the power terminal 207a of the semiconductor module 208R to be connected is connected.
  • the third main electrode 209 is connected and fixed to the power terminal 207b of the semiconductor module 208L and the power terminal 207a of the semiconductor module 208R by means such as screwing.
  • the third main electrode 209 has a portion that is placed on the resin surface on the upper surface of the semiconductor modules 208L and 208R, and is arranged so as to cover a part or the whole of the upper surface of the semiconductor modules 208L and 208R. .
  • the semiconductor modules 208L and 208R are disposed so as to straddle both upper surfaces.
  • the upper and lower arm circuits configured as described above are supplied with a potential from a power supply external to the power converter 201 by the bus bars 207P and 207N.
  • the bus bar 207P can be connected and fixed to the power terminal 207a of the semiconductor module 208L by means such as screwing.
  • the power terminal 207b of the semiconductor module 208R can be connected to the bus bar 207N by means of screwing or the like. It can be fixed.
  • a positive potential at point P in FIG. 2 is supplied to the power terminal 207a of the semiconductor module 208L through the bus bar 207P.
  • a negative potential at point N in FIG. 2 is supplied to the power terminal 207b of the semiconductor module 208R through the bus bar 207N.
  • FIG. 10 shows a cross-sectional view of the power conversion device 201 shown in FIG.
  • This cross-sectional view shows a cross section in a plane passing through the semiconductor element 210 of the semiconductor modules 208L and 208R and perpendicular to the lower surfaces of the semiconductor modules 208L and 208R.
  • the third main electrode 209 is disposed so as to contact the upper surfaces of the semiconductor modules 208L and 208R and cover the upper surfaces of the semiconductor modules 208L and 208R. That is, the third main electrode 209 is disposed so as to overlap with the semiconductor element 210 in the semiconductor modules 208L and 208R in the vertical direction.
  • the third main electrode 209 is close to the second main electrode 202 with a region insulated by the sealant 205 interposed therebetween.
  • FIG. 10 shows a state where the power conversion device 201 is disposed on the cooler RG.
  • the power conversion device 201 is in contact with the cooler RG on the lower surfaces of the semiconductor modules 208L and 208R. That is, the lower surfaces of the semiconductor modules 208L and 208R serve as cooling surfaces for the power conversion device 201 and the semiconductor modules 208L and 208R.
  • the cooler RG exhausts heat generated inside the power conversion device 201 when the power conversion device 201 operates, in particular, heat generated in the semiconductor element 210 to the outside of the power conversion device 201.
  • the third main electrode 209 has a structure close to the second main electrode 202 with the sealant 205 interposed therebetween, the heat generated in the semiconductor element 210 is generated by the second main electrode 202. , And the third main electrode 209 via the sealant 205.
  • the cooler RG has a structure close to the first main electrode 203 with the sealant 205 interposed therebetween, the heat generated in the semiconductor element 210 causes the first main electrode 203 and the sealant 205 to flow. To the cooler RG.
  • the first main electrode 203 and the second main electrode 202 are preferably made of a metal material that is relatively inexpensive and has good thermal conductivity, such as copper or aluminum.
  • the semiconductor element 210 in the semiconductor module 208L and the semiconductor element 210 in the semiconductor module 208R are the first semiconductor element 5 and the first semiconductor element 208, respectively. 2 corresponds to the semiconductor element 8.
  • the third main electrode 209 corresponds to a part of the bus bar 7 which is an output side conductive member.
  • the first main electrode 203 in the semiconductor module 208L corresponds to a part of the bus bar 4 that is a plus-side conductive member.
  • the second main electrode 202 in the semiconductor module 208 ⁇ / b> L corresponds to the connection line 6 and a part of the bus bar 7.
  • the first main electrode 203 in the semiconductor module 208 ⁇ / b> R corresponds to a part of the bus bar 7.
  • the second main electrode 202 in the semiconductor module 208R corresponds to the connection line 9 and a part of the bus bar 10 that is the negative side conductive member.
  • FIG. 8C shows a current path when current flows from the P side to the N side of the upper and lower arm circuits.
  • the P side and N side of the upper and lower arm circuits correspond to the points P and N in FIG. 2, respectively.
  • a point P1 indicates a joint portion between the power terminal 207a of the semiconductor module 208L and the bus bar 207P.
  • a point P9 indicates a joint portion between the power terminal 207b of the semiconductor module 208R and the bus bar 207N.
  • a point P4 indicates a joint portion between the power terminal 207b of the semiconductor module 208L and the third main electrode 209.
  • a point P6 indicates a joint portion between the power terminal 207a of the semiconductor module 208R and the third main electrode 209.
  • Points P2 and P7 indicate joint portions of the first main electrode 203 and the semiconductor element 210 in the semiconductor modules 208L and 208R, respectively.
  • Points P3 and P8 indicate joint portions of the second main electrode 202 and the semiconductor element 210 in the semiconductor modules 208L and 208R, respectively.
  • a point P5 indicates a position near the middle between the points P4 and P6 in the third main electrode 209.
  • the current introduced from the bus bar 207P to the power conversion device 201 is the point P1, P2, P3, P4, P5.
  • the first current path flows counterclockwise in turn, and then the second current path flows counterclockwise in the order of points P5, P6, P7, P8, and P9.
  • the first current circuit includes the third main electrode 209 and the semiconductor module 208L. More specifically, the first current circuit includes the third main electrode 209, the power terminal 207a of the semiconductor module 208L, the first main electrode 203, the semiconductor element 210, the second main electrode 202, and the power terminal 202b.
  • the second current circuit is composed of the third main electrode 209 and the semiconductor module 208R. More specifically, the second current circuit includes the third main electrode 209, the power terminal 207a of the semiconductor module 208R, the first main electrode 203, the semiconductor element 210, the second main electrode 202, and the power terminal 202b.
  • a first magnetic field in a direction from the lower surface to the upper surface of the power conversion device 201 is generated in a region surrounded by the first current path.
  • a second magnetic field from the lower surface to the upper surface of the power conversion device 201 is generated in a region surrounded by the second current path.
  • the first magnetic field is directed from the upper surface to the lower surface of the power conversion device 201 outside the region surrounded by the first current path.
  • the second magnetic field is directed from the upper surface to the lower surface of the power converter 201 outside the region surrounded by the second current path. For this reason, the first magnetic field and the second magnetic field face in opposite directions, so that they weaken each other.
  • the semiconductor modules 208L and 208R are arranged adjacent to each other, and the first magnetic field and the second magnetic field that are generated when a current flows through the semiconductor modules 208L and 208R are mutually weakened. This corresponds to suppressing the radiation of the magnetic field from the power converter 201 by increasing the interaction between the semiconductor modules 208L and 208R. By increasing the interaction between the semiconductor modules 208L and 208R and increasing the effect of canceling out magnetic fields, the overall inductance of the power conversion device 201 can be reduced.
  • the third main electrode 209 is disposed on the semiconductor modules 208L and 208R so as to straddle both the semiconductor modules 208L and 208R and covers the upper and lower arm circuits, the semiconductor modules 208L and 208R are disposed.
  • the leakage of the first magnetic field and the second magnetic field radiated from the outside is suppressed. Therefore, the magnetic field strengths of the first magnetic field and the second magnetic field in the power conversion device 201 are improved, so that the effect of canceling each other between the first magnetic field and the second magnetic field is enhanced. As a result, the inductance of the entire power conversion device 201 can be reduced.
  • the third main electrode 209 is disposed on the semiconductor modules 208L and 208R, so that the third main electrode 209, the first main electrode 203, and the second main electrode 202 are close to each other.
  • the mutual inductance increases between at least one of the first main electrode 203 or the second main electrode 202 and the third main electrode 209, the overall inductance of the power converter 201 can be reduced. it can.
  • the power terminal 207a of the semiconductor module 208L and the power terminal 207b of the semiconductor module 208R are adjacent, the P side and N side of the upper and lower arm circuits are adjacent. For this reason, the PNs can be connected to an external circuit while being adjacent to each other. For example, if the bus bars 207P and 207N are overlapped with each other and connected to a capacitor, motor, battery, or the like at the circuit destination, the inductance to the connection destination can be reduced.
  • the inductance of the entire power conversion device 201 can be reduced, the surge voltage can be effectively reduced. Furthermore, the switching frequency can be increased by suppressing the surge voltage.
  • the third main electrode 209 and the cooler RG are close to the first main electrode 203 and the second main electrode 202, and the distance between the cooler RG and the first main electrode 203, the third main electrode 209, The distance between the second main electrodes 202 is shortened. Therefore, the heat generated in the power conversion device 201, particularly the heat generated in the semiconductor element 210 is transmitted to the first main electrode 203 and the second main electrode 202, and then transmitted to the third main electrode 209 and the cooler RG. The distance required for heat conduction is shortened. Since the heat generated inside the power conversion device 201 is finally transferred to the third main electrode 209 and the cooler RG to be exhausted from the power conversion device 201, the thermal resistance of the power conversion device 201 can be reduced. it can.
  • the third main electrode 209 is disposed close to the second main electrode 202, heat transfer is easy between the semiconductor modules 208L and 208R and the third main electrode 209. Therefore, heat can be transferred to the semiconductor modules 208L and 208R of the arm on the non-operating side of the upper and lower arm circuits. That is, the thermal resistance can be reduced also by the inverter operation.
  • the inductance reduction and the thermal resistance reduction of the entire power conversion device 201 can be realized at the same time, a separate heat countermeasure is required when the power conversion device 201 is increased in frequency. Therefore, the heat generated in the semiconductor module 208 can be easily released to the outside. Therefore, the power converter 201 can be reduced in size. That is, a small power conversion device 201 capable of high-frequency operation can be obtained.
  • the semiconductor module 208 is resin-sealed by molding, insulation can be maintained in parallel with the plane of the first main electrode 203 or the second main electrode 202 with high accuracy, so that the third main electrode 209 is made of semiconductor.
  • a high degree of parallelism can be maintained when used either inside or outside the module 208. Therefore, the mutual inductance between the semiconductor modules 208L and 208R can be made to work more effectively. As a result, the overall inductance of the power converter 201 can be reduced.
  • the resin is sealed, the heat distortion applied to the semiconductor element 210 mounted inside the resin and the solder material used for mounting can be reduced, so that the reliability is improved.
  • the warpage of the semiconductor module 208 can be suppressed, the degree of parallelism with respect to the warpage can be increased.
  • the thickness of the resin between the first main electrode 203, the second main electrode 202, and the third main electrode 209 is as thin as possible while ensuring the necessary insulation distance, and the effect of mutual inductance is higher.
  • the effect of reducing the inductance is increased.
  • the insulation distance can be minimized and the inductance can be further reduced.
  • the third main electrode 209 is externally attached to the semiconductor module 208, the third main electrode 209 and the second main electrode 202 are reliably insulated from each other while the third main electrode 209 and the second main electrode 202 are simultaneously insulated.
  • the distance between the main electrode 209 and the second main electrode 202 can be shortened.
  • the sealing agent 205 existing between the surface of the semiconductor module 208 and the second main electrode is used when molding the exterior of the semiconductor module 208.
  • the layer can be thinly formed and then the third main electrode 209 can be externally attached. Therefore, the distance between the third main electrode 209 and the second main electrode 202 can be shortened at the same time while reliably insulating the third main electrode 209 and the second main electrode 202.
  • the effect of the mutual inductance between the third main electrode 209 and the second main electrode 202 can be enhanced. it can. As a result, the effect of reducing the inductance of the entire power conversion device 201 is increased.
  • FIG. 11 has shown sectional drawing of the power converter device 301 which concerns on the modification 1 of 7th Embodiment.
  • This power conversion device 301 constitutes one phase of a three-phase inverter device, as in the first to seventh embodiments described above.
  • the power conversion device 301 according to the modification 1 is different from the power conversion device 201 (see FIG. 10) in that the upper arm and the lower arm are packaged in one semiconductor module 208W1.
  • the same parts as those of the power conversion device 301 shown in the seventh embodiment are denoted by the same reference numerals, and description thereof will be omitted.
  • the semiconductor module 208W1 has two semiconductor elements 210, two first main electrodes 203, and two second main electrodes 202, and power terminals 207a and 207b. There are also two each.
  • the semiconductor module 208W1 has the structure of two semiconductor modules 208, and a single semiconductor module 208W1 can constitute an upper and lower arm circuit.
  • the semiconductor module 208W1 is a component corresponding to the two arms of the three-phase inverter and is called a 2-in-1 power semiconductor module.
  • one semiconductor module 208W1 can constitute one phase of a three-phase inverter circuit.
  • the connection method between the power terminals 207a and 207b is the same as that of the power converter 201.
  • the third main electrode 209 is disposed so as to be in contact with the upper surface of the semiconductor module 208W1 and to cover the upper surface of the semiconductor module 208W1, so that the third main electrode 209 is insulated by the sealing agent 205.
  • the two main main electrodes 202 located in the semiconductor module 208W1 are close to each other across the region to be processed. Therefore, since the mutual inductance increases between at least one of the first main electrode 203 or the second main electrode 202 and the third main electrode 209, the inductance of the entire power conversion device 301 can be reduced.
  • the third main electrode 209 and the cooler RG are close to the first main electrode 203 and the second main electrode 202, and the distance between the third main electrode 209 and the first main electrode 203, The distance between the cooler RG and the second main electrode 202 is shortened. Therefore, similarly to the power converter 201, the heat generated inside the power converter 301 is transmitted to the third main electrode 209 and the cooler RG, and is easily exhausted from the power converter 301. Therefore, the thermal resistance of the power converter 301 can be reduced.
  • FIG. 12 shows a cross-sectional view of a power conversion device 401 according to Modification 2 of the seventh embodiment.
  • the cross section of the power converter device 401 is shown at a position corresponding to the cross sectional view shown in FIG. 10 when the power converter device 201 is described.
  • This power conversion device 401 constitutes one phase of a three-phase inverter device as in the first to seventh embodiments described above.
  • the power conversion device 401 according to the modification 2 is different from the power conversion device 301 (see FIG. 10) in that the third main electrode 209 is packaged in the semiconductor module 208W2.
  • the same parts as those of the power conversion device 301 shown in the seventh embodiment are denoted by the same reference numerals, and description thereof will be omitted.
  • the sealing agent 205 is reliably filled between the third main electrode 209 and the second main electrode 202. Therefore, it is necessary to devise measures such as increasing the distance between the third main electrode 209 and the second main electrode 202 with the sealant 205 as compared with the case where the third main electrode 209 is externally attached to the semiconductor module 208. .
  • the external work of the third main electrode 209 is unnecessary, so that versatility and mass productivity can be improved while being small.
  • the semiconductor module Within 208W2 Even in a situation where thermal stress and mechanical stress generated between the part constituting the upper arm and the part constituting the lower arm are generated, and warpage that cannot be suppressed by the sealant 205 may occur, the semiconductor module Within 208W2, the third main electrode 209 provided so as to cover the upper and lower arm circuits is supported, and the warpage of the semiconductor module 208W2 due to thermal stress and mechanical stress can be reduced. As a result, the semiconductor module 208W2 can be reliably kept in contact with the surface of the cooler.
  • This power conversion device 501 configures one phase of the three-phase inverter circuit, similarly to the power conversion devices described in the first to seventh embodiments and the first and second modifications of the seventh embodiment. To do.
  • FIG. 13 is a perspective view of the power conversion device 501 according to the eighth embodiment.
  • FIG. 14A, FIG. 14B, and FIG. 14C are diagrams showing the configuration of the power converter 501.
  • FIG. 14A is a plan view of the power converter 501.
  • FIG. ) Is a schematic diagram showing a current path during operation of the power conversion device 501.
  • FIG. 14C is a perspective view showing the internal structure of the semiconductor modules 208AL and 208AR (semiconductor module 208A) used in the power conversion device 501.
  • the semiconductor modules 208AL and 208AR constituting the power conversion device 501 will be described as having the same structure.
  • the semiconductor modules 208AL and 208AR may be referred to as the semiconductor module 208A.
  • the power terminals 207a and 207b are respectively disposed on the opposing surfaces of the semiconductor module 208A with the semiconductor element 210 interposed therebetween.
  • the power terminal 207a is disposed on the front surface of the semiconductor module 208A
  • the power terminal 207b is disposed on the rear surface of the semiconductor module 208A. Therefore, in the semiconductor module 208A, the power terminal 207a, the semiconductor element 210, and the power terminal 207b are arranged in substantially the same straight line in this order.
  • the power terminal 207a of the semiconductor module 208AL constituting the upper arm and the power terminal 207b of the semiconductor module 208AR constituting the lower arm are arranged adjacent to each other.
  • the power terminal 207b of the semiconductor module 208AL constituting the upper arm and the power terminal 207a of the semiconductor module 208AR constituting the lower arm are arranged adjacent to each other.
  • the power terminal 207b of the semiconductor module 208AL constituting the upper arm and the power terminal 207a of the semiconductor module 208AR constituting the lower arm are electrically connected by the third main electrode 209A, and the semiconductor module 208AL and the semiconductor module 208AR are They are connected in series so as to form upper and lower arm circuits.
  • one of the two semiconductor modules 208A is rotated 180 degrees and arranged to form semiconductor modules 208AL and 208AR. Therefore, as in the current path shown in FIG. 14B, the flow of current flowing from the P side to the N side of the upper and lower arm circuits proceeds in the order of points P1, P2, P3, and P4, and then turns back at point P5. , Following the flowing path in the order of points P6, P7, P8, and P9. Since the current flows in such a manner as shown in FIG. 14B, by shortening the length of the side from the point P4 to the point P6 in the current path in FIG. 14B, the current path (from the point P1 to the point on the semiconductor module 208AL side).
  • the mutual inductance between the side up to P4) and the current path on the semiconductor module 208AR side (side from the point P6 to the point P9) can be increased.
  • the effect of reducing the inductance of the entire power conversion device 501 is increased.
  • the width of the semiconductor module 208A can be reduced. Further, as compared with the case where the power terminals 207a and 207b are arranged on the same side surface (front surface) as in the semiconductor module 208 shown in the seventh embodiment, between the power terminals 207a and 207b of the semiconductor module 208A. Since the insulation distance can be easily shortened, the width between the semiconductor modules 208A when the semiconductor modules 208A are arranged can be narrowed. With these features, the power conversion device 501 can be downsized.
  • This power conversion device 601 constitutes one phase of a three-phase inverter circuit, similarly to the power conversion devices described in the first to eighth embodiments.
  • the power conversion device 601 shown in FIG. 15 includes two third main electrodes 209B and 209B separately on the third main electrode 209A of the power conversion device 501 described in the eighth embodiment via an insulator 235.
  • the state where 209C is arranged is shown. Since other configurations are the same as those of the power conversion device 501 of the eighth embodiment, description thereof is omitted.
  • terminals for connection with external circuits included in the third main electrodes 209A, 209B, and 209C are omitted.
  • the third main electrode 209C is electrically connected to the power terminal 207a of the semiconductor module 208AL by a connecting fitting 221.
  • the third main electrode 209B is electrically connected to the power terminal 207b of the semiconductor module 208AR by a connecting fitting 222. Therefore, the third main electrode 209C is connected to the P side of the upper and lower arm circuit, and the third main electrode 209B is connected to the N side of the upper and lower arm circuit.
  • the effect of current folding back is provided.
  • a mutual inductance effect can be generated between the third main electrode 209C and the semiconductor module 208AL.
  • the third main electrode 209B connected to the N side is provided to oppose the current direction of the power terminal 207b (N side) of the semiconductor module 208AR, the third main electrode 209B is similarly provided. It is possible to generate a mutual inductance effect between the semiconductor module 208AR and the semiconductor module 208AR.
  • the upper and lower arrangement of the plurality of third main electrodes 209A, 209B, and 209C can be freely changed depending on the configuration with the semiconductor modules 208AL and 208AR, and an optimum arrangement can be selected so as to obtain a predetermined effect.
  • the third main electrodes 209A, 209B, and 209C are connected to a capacitor, a motor, a battery, or the like at a circuit destination while the third main electrodes 209A, 209B, and 209C are overlapped, inductance to the connection destination can be reduced.
  • each of the semiconductor elements 5, 8, and 210 has been described as a single element part. However, if the switching operation and the reflux operation are performed, it is not necessarily formed as a single element part, and each of the semiconductor elements 5, 8, 210 is formed by combining a plurality of element parts. It does not matter.
  • a MOSFET can perform a switching operation and a recirculation operation with a PN diode built in the MOSFET, so that the semiconductor elements 5, 8, and 210 can be configured by using one MOSFET as an element component.
  • an FWD diode
  • the semiconductor elements 5, 8, 210 may be made of Si, SiC, or the like.
  • an inverter having a circuit configuration in which the voltage of a DC power supply is directly connected to an output by a switching element and connected that is, a voltage type inverter has been described as an example.
  • the same effect can be obtained even when applied to an inverter having a circuit configuration in which a constant current is supplied from a DC power source via an inductor and a terminal into which the current flows is switched by switching, that is, a current type inverter.
  • a current type inverter by increasing the capacitive coupling between the bus bar constituting the inverter and the semiconductor element, the inductance of the entire inverter can be reduced, and the generation of a surge voltage caused by the inductance can be suppressed. .
  • the third main electrodes 209 and 209A output the potential at the connection point between the upper arm and the lower arm of the upper and lower arm circuits.
  • the third main electrodes 209 and 209A may alternatively output the P-side potential or the N-side potential of the upper and lower arm circuits.
  • the third main electrodes 209 and 209A are provided close to the second main electrode 202 in the semiconductor modules 208, 208W1, 208W2 and 208A and are arranged so as to cover the upper and lower arm circuits. This has the same effect as the seventh to ninth embodiments.
  • the semiconductor modules 208L and 208R or the semiconductor modules 208AL and 208AR have been described as having the same structure (semiconductor modules 208 and 208A), but the upper and lower arms constituting the phases of the three-phase inverter circuit
  • the structure is not necessarily the same as long as the structure is such that the magnetism generated by the current flowing through the semiconductor module 208L and the magnetism generated by the current flowing through the semiconductor module 208R cancel each other.
  • the power terminals 207a and 207b are provided as separate members from the first main electrode 203 and the second main electrode 202, respectively, and are electrically connected to the first main electrode 203 and the second main electrode 202 through the bonding material 206, respectively. Described as connected. However, it is not limited to such a structure, and the power terminal 207a and the first main electrode 203 may be integrally formed. Similarly, the power terminal 207b and the second main electrode 202 may be integrally formed.
  • connection / fixation method between the power terminals 207a, 207b and the third main electrode 209 and the connection / fixation method between the power terminals 207a, 207b and the bus bars 207P, 207N have been described as being screwed. Moreover, it is realizable also by the method of welding or joining with joining materials, such as solder. As long as the bus bars 207P and 207N are respectively connected and fixed to the power terminals 207a and 207b, they are not limited to these methods.
  • the semiconductor element 210 has been described as being directly connected to the first main electrode 203 and the second main electrode 202 by the bonding material 206, the semiconductor element 210 is connected between the semiconductor element 210 and the first main electrode 203 or between the semiconductor element 210 and the second main electrode 203.
  • the semiconductor element 210 may be connected between the two main electrodes 202 with a conductive substance made of copper or copper molybdenum interposed therebetween.
  • the insulating material examples include an insulating sheet made of resin and an insulating substrate made of ceramic.
  • a method of joining to the cooler RG there are a method of direct joining such as solder or wax material or indirect joining such as grease.
  • the cooler RG may be air-cooled or water-cooled.
  • Modification 1 and Modification 2 described in the seventh embodiment of the present invention can be applied to the other eighth and ninth embodiments. That is, instead of the semiconductor modules 208 and 208A corresponding to one arm, the semiconductor modules 208W1 and 208W2 in which two arm circuits are packaged in one can be used. It is also possible to use a semiconductor module in which two or more arm circuits are packaged.
  • the ninth embodiment of the present invention can also be applied to the other seventh embodiment, its modifications 1 and 2, and the eighth embodiment. That is, in addition to the third main electrode 209 for outputting the potential at the connection point of the upper arm and the lower arm, the third main electrode electrically connected to the P side and the N side of the upper and lower arm circuits, respectively. It may be provided.
  • the plus-side flat plate-shaped portion, the minus-side flat plate-shaped portion, and the output-side flat plate-shaped portion are arranged so that the main surfaces of the first semiconductor element and the second semiconductor element are substantially parallel.
  • the capacitive coupling between the members and the capacitive coupling between the conductive member and the semiconductor element can be increased, and the inductance existing in the entire power conversion device can be reduced.

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Abstract

La présente invention concerne une partie en forme de plaque (4a) d'une barre omnibus (4) qui sert d'élément conducteur de côté positif, une partie en forme de plaque (10a) d'une barre omnibus (10) qui sert d'élément conducteur de côté négatif et une partie en forme de plaque (7a) d'une barre omnibus (7) qui sert d'élément conducteur de côté sortie, disposées de façon à se trouver globalement parallèles aux surfaces principales d'un premier élément semi-conducteur (5) et d'un second élément semi-conducteur (8). Par conséquent, il est possible d'augmenter le couplage capacitif entre des régions respectives entre les parties en forme de plaque (4a, 7a, 10a) et le premier élément semi-conducteur (5) et le second élément semi-conducteur (8), d'où une baisse d'ensemble de l'inductance du dispositif.
PCT/JP2014/066312 2013-06-24 2014-06-19 Convertisseur d'énergie électrique WO2014208450A1 (fr)

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Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016140210A (ja) * 2015-01-29 2016-08-04 株式会社明電舎 回転機駆動装置
JP2017005805A (ja) * 2015-06-05 2017-01-05 株式会社デンソー 電力変換装置
JP2017169399A (ja) * 2016-03-17 2017-09-21 株式会社デンソー 電力変換装置
WO2017205730A1 (fr) * 2016-05-27 2017-11-30 General Electric Company Module de puissance à semi-conducteur
WO2019106839A1 (fr) * 2017-12-01 2019-06-06 日産自動車株式会社 Dispositif de conversion de courant
CN110299340A (zh) * 2018-03-23 2019-10-01 株式会社东芝 半导体装置
EP3547365A1 (fr) * 2018-03-29 2019-10-02 Delta Electronics, Inc. Module de puissance et son procédé de fabrication
WO2019187700A1 (fr) * 2018-03-26 2019-10-03 パナソニックＩｐマネジメント株式会社 Module semi-conducteur
CN110506384A (zh) * 2017-03-27 2019-11-26 Sme股份公司 低电感半桥功率模块
JP2020022357A (ja) * 2018-07-31 2020-02-06 ヴァレオ ジーメンス エーアオトモーティヴェ ゲルマニー ゲーエムベーハーＶａｌｅｏ Ｓｉｅｍｅｎｓ ｅＡｕｔｏｍｏｔｉｖｅ Ｇｅｒｍａｎｙ ＧｍｂＨ バスバーデバイスとパワーコンバータハウジングとを備えたシステム、その生産方法、車両用パワーコンバータ、および車両
WO2020156842A1 (fr) * 2019-01-31 2020-08-06 Valeo Equipements Electriques Moteur Module electronique de puissance, convertisseur de tension et systeme electrique
EP3703126A4 (fr) * 2017-10-27 2020-09-02 Nissan Motor Co., Ltd. Dispositif à semi-conducteur
JP2020156310A (ja) * 2018-07-25 2020-09-24 株式会社デンソー パワーモジュール及び電力変換装置
EP3748674A1 (fr) * 2019-06-04 2020-12-09 Siemens Aktiengesellschaft Module semi-conducteur de puissance à accouplement inductif minimal d'éléments de raccordement
US10998309B2 (en) 2018-09-14 2021-05-04 Fuji Electric Co., Ltd. Semiconductor unit, semiconductor module, and semiconductor device having terminal region extending in parallel to the transistors
WO2021171425A1 (fr) * 2020-02-26 2021-09-02 三菱電機株式会社 Dispositif d'alimentation en courant continu, dispositif de cycle de réfrigération, climatiseur et réfrigérateur
US20220077792A1 (en) * 2020-09-04 2022-03-10 Hitachi Astemo, Ltd. Power control unit
US11289466B2 (en) 2019-03-19 2022-03-29 Fuji Electric Co., Ltd. Semiconductor unit, semiconductor module, and semiconductor device
JP2022068929A (ja) * 2020-10-23 2022-05-11 富士電機株式会社 電力変換装置
JP7278441B1 (ja) 2022-02-15 2023-05-19 三菱電機株式会社 半導体モジュールおよび電力変換器
WO2023210348A1 (fr) * 2022-04-29 2023-11-02 株式会社デンソー Dispositif de conversion de puissance

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216331A (ja) * 1999-01-25 2000-08-04 Mitsubishi Electric Corp パワ―半導体モジュ―ルおよびそれを用いた電力変換装置
US20010033477A1 (en) * 2000-04-19 2001-10-25 Seiji Inoue Coolant cooled type semiconductor device
WO2007142038A1 (fr) * 2006-06-09 2007-12-13 Honda Motor Co., Ltd. dispositif semi-conducteur

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4138612B2 (ja) * 2003-09-05 2008-08-27 三菱電機株式会社 電力用半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216331A (ja) * 1999-01-25 2000-08-04 Mitsubishi Electric Corp パワ―半導体モジュ―ルおよびそれを用いた電力変換装置
US20010033477A1 (en) * 2000-04-19 2001-10-25 Seiji Inoue Coolant cooled type semiconductor device
WO2007142038A1 (fr) * 2006-06-09 2007-12-13 Honda Motor Co., Ltd. dispositif semi-conducteur

Cited By (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016140210A (ja) * 2015-01-29 2016-08-04 株式会社明電舎 回転機駆動装置
JP2017005805A (ja) * 2015-06-05 2017-01-05 株式会社デンソー 電力変換装置
JP2017169399A (ja) * 2016-03-17 2017-09-21 株式会社デンソー 電力変換装置
WO2017205730A1 (fr) * 2016-05-27 2017-11-30 General Electric Company Module de puissance à semi-conducteur
JP2019517733A (ja) * 2016-05-27 2019-06-24 ゼネラル・エレクトリック・カンパニイ 半導体パワーモジュール
US10347608B2 (en) 2016-05-27 2019-07-09 General Electric Company Power module
CN110506384A (zh) * 2017-03-27 2019-11-26 Sme股份公司 低电感半桥功率模块
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EP3580843B1 (fr) * 2017-03-27 2022-07-27 Dana Tm4 Italia S.R.L. Module de puissance demi-pont avec inductance basse
EP3703126A4 (fr) * 2017-10-27 2020-09-02 Nissan Motor Co., Ltd. Dispositif à semi-conducteur
WO2019106839A1 (fr) * 2017-12-01 2019-06-06 日産自動車株式会社 Dispositif de conversion de courant
CN110299340B (zh) * 2018-03-23 2023-03-14 株式会社东芝 半导体装置
JP2019169609A (ja) * 2018-03-23 2019-10-03 株式会社東芝 半導体装置
CN110299340A (zh) * 2018-03-23 2019-10-01 株式会社东芝 半导体装置
WO2019187700A1 (fr) * 2018-03-26 2019-10-03 パナソニックＩｐマネジメント株式会社 Module semi-conducteur
JPWO2019187700A1 (ja) * 2018-03-26 2021-02-12 パナソニックＩｐマネジメント株式会社 半導体モジュール
US10886200B2 (en) 2018-03-29 2021-01-05 Delta Electronics, Inc. Power module and manufacturing method thereof
EP3547365A1 (fr) * 2018-03-29 2019-10-02 Delta Electronics, Inc. Module de puissance et son procédé de fabrication
JP2020156310A (ja) * 2018-07-25 2020-09-24 株式会社デンソー パワーモジュール及び電力変換装置
JP7338278B2 (ja) 2018-07-25 2023-09-05 株式会社デンソー パワーモジュール及び電力変換装置
JP2020022357A (ja) * 2018-07-31 2020-02-06 ヴァレオ ジーメンス エーアオトモーティヴェ ゲルマニー ゲーエムベーハーＶａｌｅｏ Ｓｉｅｍｅｎｓ ｅＡｕｔｏｍｏｔｉｖｅ Ｇｅｒｍａｎｙ ＧｍｂＨ バスバーデバイスとパワーコンバータハウジングとを備えたシステム、その生産方法、車両用パワーコンバータ、および車両
JP7449051B2 (ja) 2018-07-31 2024-03-13 ヴァレオ ジーメンス エーアオトモーティヴェ ゲルマニー ゲーエムベーハー バスバーデバイスとパワーコンバータハウジングとを備えたシステム、その生産方法、車両用パワーコンバータ、および車両
US10998309B2 (en) 2018-09-14 2021-05-04 Fuji Electric Co., Ltd. Semiconductor unit, semiconductor module, and semiconductor device having terminal region extending in parallel to the transistors
WO2020156842A1 (fr) * 2019-01-31 2020-08-06 Valeo Equipements Electriques Moteur Module electronique de puissance, convertisseur de tension et systeme electrique
FR3092453A1 (fr) * 2019-01-31 2020-08-07 Valeo Equipements Electriques Moteur Module électronique de puissance, convertisseur de tension et système électrique
US11289466B2 (en) 2019-03-19 2022-03-29 Fuji Electric Co., Ltd. Semiconductor unit, semiconductor module, and semiconductor device
EP3748674A1 (fr) * 2019-06-04 2020-12-09 Siemens Aktiengesellschaft Module semi-conducteur de puissance à accouplement inductif minimal d'éléments de raccordement
WO2021171425A1 (fr) * 2020-02-26 2021-09-02 三菱電機株式会社 Dispositif d'alimentation en courant continu, dispositif de cycle de réfrigération, climatiseur et réfrigérateur
US20220077792A1 (en) * 2020-09-04 2022-03-10 Hitachi Astemo, Ltd. Power control unit
US11901837B2 (en) * 2020-09-04 2024-02-13 Hitachi Astemo, Ltd. Power control unit
JP2022068929A (ja) * 2020-10-23 2022-05-11 富士電機株式会社 電力変換装置
JP7074175B2 (ja) 2020-10-23 2022-05-24 富士電機株式会社 電力変換装置
JP7278441B1 (ja) 2022-02-15 2023-05-19 三菱電機株式会社 半導体モジュールおよび電力変換器
JP2023118160A (ja) * 2022-02-15 2023-08-25 三菱電機株式会社 半導体モジュールおよび電力変換器
WO2023210348A1 (fr) * 2022-04-29 2023-11-02 株式会社デンソー Dispositif de conversion de puissance

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