WO2014175062A1 - パワー半導体モジュールおよびその製造方法、電力変換器 - Google Patents
パワー半導体モジュールおよびその製造方法、電力変換器 Download PDFInfo
- Publication number
- WO2014175062A1 WO2014175062A1 PCT/JP2014/060178 JP2014060178W WO2014175062A1 WO 2014175062 A1 WO2014175062 A1 WO 2014175062A1 JP 2014060178 W JP2014060178 W JP 2014060178W WO 2014175062 A1 WO2014175062 A1 WO 2014175062A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulating layer
- power semiconductor
- metal block
- semiconductor module
- metal plate
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 192
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 title claims description 21
- 229910052751 metal Inorganic materials 0.000 claims abstract description 283
- 239000002184 metal Substances 0.000 claims abstract description 283
- 229910010293 ceramic material Inorganic materials 0.000 claims abstract description 14
- 239000000919 ceramic Substances 0.000 claims description 32
- 239000010419 fine particle Substances 0.000 claims description 25
- 238000000151 deposition Methods 0.000 claims description 16
- 239000000443 aerosol Substances 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 10
- 229910052582 BN Inorganic materials 0.000 claims description 9
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 9
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 9
- 239000000945 filler Substances 0.000 claims description 9
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 9
- 238000007750 plasma spraying Methods 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 6
- 239000011810 insulating material Substances 0.000 claims description 6
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000017525 heat dissipation Effects 0.000 abstract description 30
- 229920005989 resin Polymers 0.000 description 16
- 239000011347 resin Substances 0.000 description 16
- 230000002093 peripheral effect Effects 0.000 description 15
- 229910000679 solder Inorganic materials 0.000 description 13
- 229910052782 aluminium Inorganic materials 0.000 description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 10
- 230000008569 process Effects 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 150000001875 compounds Chemical class 0.000 description 8
- 239000002245 particle Substances 0.000 description 8
- 230000009467 reduction Effects 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 7
- 238000001816 cooling Methods 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 239000003822 epoxy resin Substances 0.000 description 6
- 238000009413 insulation Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 229920000647 polyepoxide Polymers 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 239000003566 sealing material Substances 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 239000003365 glass fiber Substances 0.000 description 4
- 239000004519 grease Substances 0.000 description 4
- 229920001296 polysiloxane Polymers 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000012387 aerosolization Methods 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000007751 thermal spraying Methods 0.000 description 3
- 239000011882 ultra-fine particle Substances 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000009770 conventional sintering Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/045—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads having an insulating passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4878—Mechanical treatment, e.g. deforming
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48105—Connecting bonding areas at different heights
- H01L2224/48106—Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48155—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48157—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
Definitions
- the present invention relates to a power semiconductor module used for an inverter, a servo controller, a UPS (uninterruptible power supply) and the like, a method of manufacturing the same, and a power converter.
- UPS uninterruptible power supply
- Power semiconductor modules are used in a wide range of power conversion equipment fields, from household use such as home air conditioners and refrigerators, to industrial use such as inverters and servo controllers.
- the power semiconductor module is mounted on a DCB (Direct Copper Bonding) substrate or a metal base printed wiring board, which has excellent heat dissipation, in terms of power consumption.
- a DCB Direct Copper Bonding
- One or more circuit elements such as power semiconductor elements are mounted on these wiring boards, and a plastic case frame (resin case) is adhered and sealed with a sealing material such as silicone gel or epoxy resin.
- the metal base printed wiring board is one of a copper foil for circuit pattern and a printed wiring board consisting of a resin insulating layer and a metal plate, and a circuit pattern is formed on the upper surface.
- the power converter is composed of a main circuit using the power semiconductor module described above, and other power supply circuits and control circuits.
- the power supply circuit and the control circuit are composed of various components such as an IC (Integrated Circuit), an LSI (Large Scale Integrated Circuit), a resistor, a capacitor, and a reactor, but are usually mounted on a printed circuit board.
- FIG. 9 is a main part configuration diagram of a power converter 600 adopting a conventional power semiconductor module 30.
- power semiconductor element 51 constituting a main circuit is mounted on heat sink 11 (hereinafter also referred to as "cooling fin") via a thermal compound (heat dissipation grease) (not shown) to enhance heat dissipation.
- the power semiconductor module 30 is mounted.
- the printed circuit board 40a and the printed circuit board 40b on which the electronic components 60 necessary for the power supply circuit other than the main circuit in the power converter 600 and the control circuit are mounted are stacked and spaced apart And is fixed to the heat sink 11 by a support 70 (pin or the like). And, the whole of these structures is covered with the case 50.
- a semiconductor device in which a chip (power semiconductor element) is fixed by soldering is mounted on a heat sink (heat sink) via an insulating layer provided on each back surface of a resin substrate and a heat sink (metal block) A power converter is shown.
- Patent No. 3791772 (FIG. 10) JP 2000-228466 A
- the power semiconductor module 30 mounted on the heat sink 11 includes the metal base printed wiring board 20.
- the metal base printed wiring board 20 has a structure in which a metal base plate, an insulating film and a circuit pattern are sequentially stacked from the heat sink 11 side, and a power semiconductor element 51 is fixed to the circuit pattern. Therefore, a large number of materials (circuit pattern, insulating film, metal base plate, etc.) intervene in the heat dissipation path from the power semiconductor element 51 to the heat sink 11. Therefore, the thermal resistance increases, the cooling characteristics are not always sufficient, and the heat generated in the power semiconductor element 51 can not be sufficiently dissipated to the heat sink 11.
- the power semiconductor module 30 When the power semiconductor module 30 is attached to the heat sink 11, the power semiconductor module 30 is fixed with a screw or the like using the attachment holes 32 provided on the outer peripheral portion of the resin case 31. At this time, a gap 34 may occur between the heat sink 11 and the vicinity of the center of the metal base plate 33 of the metal base printed wiring board 20. Therefore, a thermal compound (heat dissipation grease) is applied to the contact surface of the heat sink 11 to fix the power semiconductor module 30, and the gap 34 between the metal base plate 33 and the heat sink 11 is filled with the thermal compound to reduce contact thermal resistance. I am trying to
- An object of the present invention is to solve the above-mentioned problems, and to provide a low-cost power semiconductor module excellent in heat dissipation, a method of manufacturing the same, and a power converter mounted with the power semiconductor module.
- a power semiconductor module is provided by: a metal plate having a brazed through hole; each surface other than the upper surface of the metal block; An insulating layer provided metal block in which an insulating layer made of a ceramic material is directly formed in a portion excluding the element mounting region on the upper surface, the insulating layer provided metal block in the brazed through hole of the metal plate An upper side is fitted to abut on a ridge of the flanged through hole, and a power semiconductor element is fixed to the element mounting area on the upper surface of the metal block, and the power semiconductor element and the metal plate are insulated It is set as the structure connected with the circuit pattern arrange
- the lower surface of the metal block having high heat capacity and excellent heat dissipation has the power semiconductor element fixed on the upper surface thereof. Since it can be in direct contact with the heat sink through the insulating layer made of ceramic material, the thermal resistance of the lower part of the power semiconductor element can be reduced, whereby the heat dissipation of the power semiconductor module can be improved. .
- a metal block with an insulating layer in which an insulating layer made of a ceramic material is directly formed in each surface of the metal block other than the upper surface and the element mounting region of the upper surface in the flanged through hole of the metal plate.
- the upper side is fitted so as to abut on the ridge of the flanged through hole. Therefore, in a state where the semiconductor module is fixed to the heat sink by screwing through the mounting holes in the peripheral portion of the metal plate, the clamping pressure by the screwing is transmitted through the metal plate having high rigidity and Since the pressure is transmitted to the outer peripheral portion on the upper side of the metal block with an insulating layer, uniform pressure is transmitted to the bottom surface of the metal block with an insulating layer.
- the bottom surface of the insulating-layer-provided metal block in which the power semiconductor element is fixed to the element mounting area on the upper side contacts the heat sink uniformly and at a sufficiently high pressure, so that good heat dissipation can be obtained.
- the heat generated by the power semiconductor element can be efficiently dissipated, the temperature of the power semiconductor element at the time of operation can be sufficiently lowered.
- the heat dissipation surface area of the power semiconductor element itself may be small, it is possible to adopt a power semiconductor element with a smaller area and lower cost.
- the area of the power semiconductor element can be further reduced, a metal block with an insulating layer on which the power semiconductor element is mounted, and a metal plate in which the metal block with an insulating layer is fitted in the through hole It is possible to miniaturize, thereby achieving downsizing and cost reduction of the power semiconductor module.
- the metal block with an insulating layer is a metal block other than the top surface of a metal block having a convex stepped portion at the top.
- An insulating layer made of a ceramic material is directly formed on each surface and on the upper surface excluding the element mounting region, and the insulating-layer-provided metal block is in the stepped portion of the stepped portion of the metal plate.
- the insulating layer formed on the bottom surface may be fitted so as to abut on the ridge of the flanged through hole.
- the metal block in the metal block with the insulating layer is configured to have a convex stepped portion at the top. If there is no convex step on the top of the metal block, depending on the thickness of the power semiconductor element and the circuit pattern, the thickness of the ridge in the metal plate through hole, and between the metal plate and the circuit pattern A state in which the upper surface of the power semiconductor element is lower than the upper surface of the circuit pattern is generated by the same degree as the total thickness of the intervening insulating material.
- the insulating layer formed on the bottom surface of the convex step portion at the top of the metal block abuts on the lower surface of the ridge of the through hole and the step portion Since the power semiconductor device is fixed to the upper surface of the metal block projecting upward from the bottom surface, the height of the upper surface of the power semiconductor device can be made closer to the height of the upper surface of the circuit pattern, whereby the power semiconductor device and the circuit
- the connection work with a connection conductor such as an aluminum wire with the pattern can be made easier.
- the bottom surface of the conductive block with the insulating layer preferably protrudes from the back surface of the metal plate.
- the third aspect of the present invention by making the bottom surface of the insulating layer provided metal block project from the back surface of the metal plate, the area of the metal plate on which the circuit pattern is disposed via the insulating material is large. Even in the case where the semiconductor module is fixed to the heat sink by screwing the semiconductor module through the mounting holes in the peripheral part of the metal plate, the bottom surface of the metal block with insulating layer is brought into contact with the heat sink with uniform and sufficiently high pressure As a result, good heat dissipation can be reliably obtained.
- the thickness of the insulating layer is 50 ⁇ m or more and 2000 ⁇ m or less. .
- the insulating layer is made of silicon oxide, aluminum oxide, silicon nitride, or aluminum nitride. It is preferable that the ceramic layer is made of at least one kind of filler group made of boron nitride.
- the insulating layer deposits ceramic fine particles of at least one of the filler group by plasma spraying. It is good to form.
- the insulating layer deposits ceramic fine particles by at least one kind of the filler group by an aerosol deposition method. It is good to form by
- the circuit pattern is a circuit of a printed circuit board fixed on the metal plate. It is good that it is a pattern and electronic parts are fixed to this circuit pattern.
- another printed circuit board disposed on the upper side is also required to be an electronic component other than the main circuit of the power converter, for example, in a power supply circuit or a control circuit.
- the area of the lower printed circuit board fixed on the metal plate can be reduced and the area of the metal plate can also be reduced. Therefore, the power semiconductor module can be miniaturized. it can.
- the thickness of the metal plate necessary to prevent the deflection when the metal plate is screwed to the heat sink, and to cope with this. Since the thickness of the metal block can also be reduced, the weight of the power semiconductor module can also be reduced.
- the assemblability in the case of configuring the power converter by fixing the power semiconductor module to a heat sink can be improved, and cost reduction can be achieved.
- the power converter comprises the power semiconductor module according to any one of claims 1 to 9 and a heat sink, and the metal The power semiconductor module is fixed to the heat sink such that the lower surface of the block is in contact with the heat sink via the insulating layer.
- a method of manufacturing a power semiconductor module includes the steps of: forming a brazed through hole in a metal plate; each surface other than the upper surface of the metal block; Forming an insulating layer comprising a ceramic material directly on a portion of the top surface excluding the element mounting region to form a metal block with an insulating layer, and bonding a power semiconductor element to the element mounting region on the top surface of the metal block And fitting and fixing the insulating-layer-provided metal block in the flanged through hole of the metal plate such that the upper side of the metal block abuts against the ridge of the flanged through hole;
- the method includes a step of forming a circuit pattern through an insulating material, and a step of connecting the power semiconductor element and the circuit pattern with a connection conductor.
- each surface other than the upper surface of the metal block having the convex level difference portion at the upper part, and the element of the upper surface An insulating layer made of a ceramic material is directly formed on the portion excluding the mounting region to constitute the metal block with an insulating layer, and the metal block with an insulating layer in the brazed through hole of the metal plate It is preferable that the insulating layer formed on the bottom surface of the housing be fitted and fixed so as to abut on the ridge of the flanged through hole.
- the insulating layer is made of silicon oxide, aluminum oxide, silicon nitride, aluminum nitride, or boron nitride.
- the ceramic fine particles according to at least one kind of filler group may be formed by depositing using any of plasma spraying, aerosol deposition or sputtering.
- the power semiconductor element having a smaller area and lower cost can be adopted, so that the cost can be reduced.
- a power semiconductor module with excellent heat dissipation can be manufactured. Further, by mounting this power semiconductor module, a small-sized power converter can be manufactured at low cost.
- FIG. 1a is a principal part top view
- FIG. 1 b is principal part sectional drawing cut
- FIG. 1 c and FIG. 1 d are partial cross-sectional views showing different configuration examples of the power semiconductor module.
- It is principal part manufacturing process sectional drawing which showed the manufacturing method of the power semiconductor module 100 shown in FIG. 1 based on 2nd Example of this invention to process order.
- It is principal part manufacturing process sectional drawing which showed the manufacturing method of the power semiconductor module 100 shown in FIG. 1 based on 2nd Example of this invention which followed in FIG. 2 to process order.
- FIG. 1a is a principal part top view
- FIG. 1 b is principal part sectional drawing cut
- FIG. 1 c and FIG. 1 d are partial cross-sectional views showing different configuration examples of the power semiconductor module.
- It is principal part manufacturing process sectional drawing which showed the manufacturing method of the power semiconductor module 100 shown in FIG. 1 based on 2nd Example of
- FIG. 4 is a cross-sectional view showing the manufacturing method of the power semiconductor module 100 shown in FIG. 1 in the order of steps according to the second embodiment of the present invention, following FIG. 3; It is a principal part block diagram of the power semiconductor module 200 which concerns on 3rd Example of this invention. It is a principal part block diagram of the power converter 300 which concerns on 4th Example of this invention. It is principal part sectional drawing of the power converter 400 which concerns on 5th Example of this invention. It is principal part sectional drawing of the power converter 500 which concerns on 6th Example of this invention. It is a principal part block diagram of the power converter device 600 which employ
- FIG. 1 is a block diagram of a power semiconductor module 100 according to a first embodiment of the present invention
- FIG. 1a is a plan view of the main part
- FIG. 1b is a cross-sectional view of the main part cut along line XX in FIG.
- FIGS. 1c and 1d are partial cross-sectional views showing different configuration examples of the power semiconductor module.
- This power semiconductor module 100 includes a metal plate 5 provided with a flanged through hole 17 having a ridge 17a, and a metal block with an insulating layer fitted with the ridged through hole 17 and having a convex stepped portion 12 at the top 3 and an opening 16 of the insulating layer 2 of the metal block 3 with an insulating layer, which is directly fixed to the element mounting area where the upper surface of the metal block 1 is exposed, for example, by bonding with solder And a power semiconductor element 4 such as an insulated gate bipolar transistor (hereinafter also referred to as a "semiconductor chip").
- a power semiconductor element 4 such as an insulated gate bipolar transistor (hereinafter also referred to as a "semiconductor chip").
- the flanged through hole 17 of the metal plate 5 is a protrusion projecting inward at the upper end of the inner peripheral side wall of the opening (through hole) penetrating the metal plate 5 in the plate thickness direction. It has a structure provided with 17a.
- the bottom surface 13 covered with the insulating layer 2 in the convex step 12 of the metal block 3 with an insulating layer is the ridge 17a of the through hole 17 of the metal plate 5.
- the metal block 3 with an insulating layer is fitted in and fixed to the through hole 17 of the metal plate 5 so as to abut on the lower surface of the metal plate 5.
- the insulating-layer-provided metal block 3 has a configuration in which the insulating layer 2 made of a ceramic material is directly formed on each surface other than the upper surface of the metal block 1 and on the upper surface except for the element mounting region (opening 16).
- the electrical insulation between the metal block 3 with the insulating layer and the metal plate 5 is the insulating layer 2 with the metal block 3 with the insulating layer fitted and fixed in the through hole 17 of the metal plate 5.
- the metal plate 5 Secured by Thereby, as shown in FIG. 6 described later, in a state where the power semiconductor module 100 is fixed to the heat sink 11 made of a metal material, the metal plate 5 is in direct contact with the heat sink 11 and becomes the same potential as the heat sink 11
- the block 1 is electrically isolated from the heat sink 11.
- the metal material which forms the metal block 1 is not restricted to copper, For example, a copper alloy, aluminum, aluminum alloy etc. are applicable.
- the power semiconductor module 100 includes the printed circuit board 6 fixed on the metal plate 5, the electronic component 8 fixed to the circuit pattern 6 a of the printed circuit board 6, and the circuit pattern 6 a of the power semiconductor element 4 and the printed circuit board 6. And an aluminum wire 7 to be connected.
- the power semiconductor module 100 not only the power semiconductor element 4 constituting the main circuit of the power converter but also other electronic components constituting the power supply circuit other than the main circuit of the power converter and the control circuit are necessary. It will be In addition, a circuit pattern is also required to electrically connect the power semiconductor element 4 to the outside. Therefore, as described above, the printed circuit board 6 on which the circuit pattern 6 a is formed is fixed on the metal plate 5.
- a collector electrode on the back surface of the IGBT is joined to the element mounting region (upper surface of the metal block 1) of the insulating layer provided metal block 3 and an emitter formed on the surface of the IGBT
- the electrode and the gate electrode are connected to the circuit pattern 6 a of the printed circuit board 6 by aluminum wires 7 respectively.
- the printed circuit board 6 fixed on the metal plate 5 is, for example, an insulating board 6b made of glass epoxy (epoxy resin reinforced with glass fiber) or the like, and a circuit pattern 6a formed on the insulating board 6b.
- An opening 19 corresponding to the opening 17 b at the location of the ridge 17 a of the flanged through hole 17 of the metal plate 5 is formed in the central portion.
- the material for forming the insulating substrate 6b is not limited to the above glass epoxy, and any insulating material capable of supporting the circuit pattern 6a in a state of being electrically insulated from the metal plate 5 may be used.
- the power semiconductor module 100 further includes a resin case 9 fixed to the outer periphery of the printed circuit board 6 and having an external lead terminal (not shown), and a sealing material 10 such as silicone gel filled in the resin case 9.
- the electronic component 8 shown in FIG. 1 is a part of components such as an inductor, a resistor, and a capacitor which constitute a power supply circuit other than the main circuit in the power converter and a control circuit.
- reference numeral 17b denotes an opening at a portion of the ridge 17a
- 21 denotes a mounting hole provided on the outer peripheral portion of the metal plate 5 and the printed circuit board 6.
- the mounting holes 21 are arranged at, for example, two places at the center part of both ends and four places at four corners of the end part.
- the insulating layer 2 is a ceramic layer formed of ceramic fine particles of at least one of silicon oxide, aluminum oxide, silicon nitride, aluminum nitride, and boron nitride.
- the insulating layer provided metal block 3 is formed such that the bottom surface (hereinafter also referred to as "lower surface”) 18 of the insulating layer provided metal block 3 slightly protrudes from the back surface (hereinafter also referred to as "lower surface”) 5a of the metal plate 5 It is fixed to the metal plate 5.
- the height of the protrusion is about several tens of ⁇ m.
- the insulating layer provided metal block 3 is fitted in the flanged through hole 17 formed in the metal plate 5 such that the bottom surface 18 slightly protrudes from the back surface 5 a of the metal plate 5.
- Mounting holes 21 for screwing are formed in the outer peripheral portions of the metal plate 5 and the printed circuit board 6 in order to fix the power semiconductor module 100 to the heat sink 11 for cooling (see FIG. 6).
- the transmission of the clamping pressure by screwing will be described with reference to FIG.
- the outer peripheral portion of the metal plate 5 is fixed in close contact with the upper surface of the heat sink 11 by screwing.
- the clamping pressure P by screwing is transmitted through the rigid metal plate 5 and transmitted from the ridge 17 a of the flanged through hole 17 to the convex step 12 on the upper side of the metal block 3 with the insulating layer. Since the step portion 12 is formed on the outer peripheral portion of the insulating layer provided metal block 3, the uniform pressure P is transmitted to the bottom surface 18 of the insulating layer provided metal block 3.
- the metal block 3 with an insulating layer contacts the heat sink 11 with a uniform and sufficiently large pressure.
- excellent heat dissipation can be obtained.
- a thermal compound heat dissipation grease
- the bottom surface 18 of the metal block 3 with insulating layer Can be brought into contact with the heat sink 11 with a uniform and sufficiently large pressure.
- the power semiconductor element 4 is fixed directly to the metal block 1 having a large heat capacity and excellent heat dissipation without intervention of the insulating layer 2 by, for example, bonding with solder, the heat generated in the power semiconductor element 4 is generated. Can be dissipated efficiently, so that the temperature of the power semiconductor element 4 during operation can be sufficiently lowered. As a result, since the heat dissipation surface area of the power semiconductor element (semiconductor chip) 4 itself may be small, it is possible to achieve cost reduction by adopting the smaller power semiconductor element (semiconductor chip) 4 with a smaller area. .
- the contact between the insulating layer provided metal block 3 and the heat sink 11 is improved, the heat dissipation surface area of the insulating layer provided metal block 3 itself may be small. Therefore, the insulating layer provided metal block 3 is miniaturized. While being able to do it, cost reduction can also be achieved by this.
- the contact thermal resistance between the power semiconductor module 100 and the heat sink 11 can be reduced by causing the insulating layer 2 of the bottom surface 18 of the insulating layer provided metal block 3 to protrude from the back surface 5 a of the metal plate 5 as described above.
- the contact thermal resistance By reducing the contact thermal resistance, the temperature of the power semiconductor element 4 which rises during the operation of the power semiconductor module 100 can be suppressed to a lower level. Therefore, while being able to miniaturize the power semiconductor element (semiconductor chip) 4, the metal block 3 with an insulating layer can also be miniaturized further by this. And, the miniaturization can reduce the manufacturing cost.
- the heat generated by the electronic component 8 can be efficiently dissipated to the metal plate 5.
- the heat dissipation can be improved by applying a thermal compound.
- the electronic components 8 can be densely arranged on the printed circuit board 6, the printed circuit board 6 can be downsized and reduced in cost.
- the same circuit configuration can be obtained by fixing the power semiconductor element 4 directly to the element mounting area where the upper surface of the metal block 1 is exposed, for example, by bonding with solder.
- the power semiconductor element 51 is fixed to the circuit pattern of the metal base printed wiring board 20 as in the power semiconductor module 30 in the conventional power converter 600 shown in FIG. The size and cost can be reduced.
- the power semiconductor module 30 in the conventional power converter 600 shown in FIG. 9 does not have the electronic components 60 required for the power supply circuit and control circuit other than the main circuit in the power converter 600, Similarly, when the power semiconductor module 100 of the present invention is not mounted with the electronic component 8 required for the power supply circuit other than the main circuit and the control circuit, the power semiconductor module 100 of the present invention is Since the heat dissipation is superior to that of the power semiconductor module 30, the size can be reduced, and the manufacturing cost can also be reduced.
- FIG. 1 c and FIG. 1 d are each a partial cross-sectional view showing a different configuration example of the power semiconductor module, showing a cross-sectional structure of a portion of the insulating layer provided metal block.
- the power semiconductor module 100A shown in FIG. 1c is the same as the power semiconductor module 100 shown in FIG. 1b except that the metal block 3A with an insulating layer has a step 12A instead of the step 12 of the metal block 3 with an insulating layer. The point is different.
- the height dimension of the side surface portion of the stepped portion 12A of the insulating layer provided metal block 3A is larger than that of the stepped portion 12 of the insulating layer provided metal block 3, and the upper surface of the insulating layer provided metal block 3A is shown from the upper surface of the metal plate 5 Protrudes above the
- the height of the portion of the insulating layer 2 in the side surface portion of the step portion 12A which protrudes from the upper surface of the metal plate 5 is effective as the insulation creepage distance between the metal block 1A and the metal plate 5.
- the protrusion dimension from the upper surface of the metal plate 5 of the upper surface of the metal block 3A with an insulating layer is set so that sufficient insulation creeping distance can be ensured between the metal block 1A and the metal plate 5, As shown in FIG. 1c, the insulating layer 2 may not be formed over the entire top surface of the metal block 1A constituting the insulating layer provided metal block 3A.
- the fitting structure of the metal block 3A with the insulating layer in the power semiconductor module 100A and the flanged through hole 17 of the metal plate 5 is the same as that of the power semiconductor module 100.
- the configuration of the power semiconductor module 100A is the same as that of the power semiconductor module 100 except for the structure of the metal block with the insulating layer, and the entire structure of the power semiconductor module 100A is not shown in FIG.
- the power semiconductor module 100B shown in FIG. 1d is different from the power semiconductor module 100 shown in FIG. 1b in that the metal block 3B with an insulating layer does not have the step portion 12 like the metal block 3 with an insulating layer. It is different.
- the peripheral edge of the upper surface of the insulating layer provided metal block 3B covered with the insulating layer 2 abuts on the lower surface of the ridge 17a of the flanged through hole 17 of the metal plate 5.
- the metal block 3B with the insulating layer is fitted and fixed in the flanged through hole 17 of the metal plate 5.
- the configuration of the power semiconductor module 100B is the same as that of the power semiconductor module 100 except for the structure of the metal block with the insulating layer, and the entire structure of the power semiconductor module 100B is not shown in FIG. 1d.
- FIGS. 2 to 4 are main part manufacturing process sectional views showing the method of manufacturing the power semiconductor module 100 shown in FIG. 1 in the order of processes according to the second embodiment of the present invention.
- a copper plate having a thickness of about 1.0 mm to 5.0 mm is stamped into a square or a rectangle to form a metal block 1 having a convex step 12a on the top.
- Reference numeral 13a in the drawing denotes the bottom surface of the step 12a.
- the mask 15 is disposed at the center of the upper surface of the insulating layer provided metal block 3, and the opening 16 (element mounting region) of the insulating layer 2 to which the upper surface of the metal block 1 is exposed is provided.
- the power semiconductor element (semiconductor chip) 4 is fixed to the surface of the exposed metal block 1 directly through solder or the like to be electrically and mechanically joined.
- the other parts of the metal block 1 are covered with the insulating layer 2 described above.
- FIG. 2b shows the case where the metal block 1 is fixed and the thermal spraying or deposition of the ceramic fine particles 14 (14a) is performed from the top, bottom, left, and right of the metal block 1.
- the metal block 1 may be rotated to spray or deposit the ceramic fine particles 14 (14a) from one direction.
- the step 12a and the bottom 13a of the metal block 1 shown in FIG. 2a are changed to the step 12 and the bottom 13 covered with the insulating layer 2 in the metal block 3 with an insulating layer shown in FIG. 2b.
- Ceramic fine particles of at least one of silicon oxide, aluminum oxide, silicon nitride, aluminum nitride, and boron nitride may be used as the ceramic fine particles 14 necessary for forming the insulating layer 2.
- the atmosphere for forming the insulating layer 2 is air or under reduced pressure, and thermal spraying is performed on the metal block 1 to deposit the insulating layer 2, thereby forming the insulating layer provided metal block 3.
- the thickness of the insulating layer 2 can be adjusted by controlling the spraying time (on the order of seconds).
- the thickness of the insulating layer 2 is preferably in the range of 50 to 2000 ⁇ m. This is because when the thickness of the insulating layer 2 is less than 50 ⁇ m, the dielectric breakdown strength is too low, and application to a power semiconductor module with a rated voltage of 100 V or more is difficult.
- the thickness of the insulating layer 2 is more than 2000 ⁇ m, the insulating layer 2 becomes too thick and the thermal resistance increases, which makes it difficult to adopt.
- the thickness of the insulating layer 2 is 50 ⁇ m or more and 500 ⁇ m or less.
- the thickness of the insulating layer 2 is about 200 ⁇ m, it has an insulation breakdown strength of 5 kV or more by an AC breakdown voltage, and can be applied to a power semiconductor module having a withstand voltage rating of 1200 V. .
- the aerosol deposition method is a technology of mixing fine particles or ultrafine particle materials with gas and forming an aerosol, and forming a film on a substrate (here, metal block 1) through a nozzle. Helium or air is used for the gas.
- the film forming apparatus is composed of an aerosolization chamber and a film forming chamber. The deposition chamber is depressurized to about 50 to 1 kPa with a vacuum pump.
- the ceramic fine particles 14a or the ultrafine particle material which is a raw material, is in a dry state and mixed with gas in the aerosolization chamber to be aerosolized. Fine particles (ultrafine particles) aerosolized by the gas flow generated by the pressure difference between both chambers are transported to the film forming chamber, accelerated through the nozzle on the slit, and jetted to the metal block 1.
- the raw material ceramic fine particles 14a ceramics crushed to a particle size of 0.1 to 2 ⁇ m is used.
- the ceramic fine particles 14a transported by gas are accelerated to several hundred m / sec by passing through the nozzle of the minute opening in the decompressed chamber. Since the film forming speed and the density of the film formed body largely depend on the particle size, the aggregation state, the dry state, etc. of the ceramic fine particles 14a used, the crusher or classifier of the aggregated particles is formed between the aerosolization chamber and the film formation chamber. The device is installed.
- the mechanism in which the insulating layer 2 is formed on the metal block 1 in the form of a film will be described.
- ceramic fine particles 14a with a particle size of 0.1 to 2 ⁇ m are sprayed on metal block 1 at high speed, the collision energy at that time causes them to be broken into fine crystal particles of about 10 to 30 nm, a new surface is formed, and the surface is activated.
- a ceramic film (insulating layer 2) of a dense nanocrystalline structure is formed.
- the ceramic film (insulation layer 2) can be formed at normal temperature without particularly raising the temperature.
- a ceramic fine particle of any of silicon nitride, aluminum nitride, or boron nitride is coated with an aluminum oxide film, or, in the ceramic fine particles of any of silicon nitride, aluminum nitride, or boron nitride, silicon oxide is used. It is applicable even if the film of the above is formed.
- the insulating layer 2 in which two or more types are combined can be formed.
- the thickness of the insulating layer 2 is the same as that of the thermal spraying method, and is preferably in the range of 50 to 2000 ⁇ m. Preferably, the thickness of the insulating layer 2 is in the range of 50 ⁇ m to 500 ⁇ m. Moreover, although it is an example, when the thickness of the insulating layer 2 is about 200 ⁇ m, it has an insulation breakdown strength of 5 kV or more by an AC breakdown voltage, and can be applied to a power semiconductor module having a withstand voltage rating of 1200 V. .
- the insulating layer 2 may be formed using a sputtering method or the like other than the plasma spraying method and the aerosol deposition method described above.
- the process of fixing the power semiconductor element (semiconductor chip) 4 to the insulating layer provided metal block 3 will be described.
- the power semiconductor element (semiconductor chip) 4 is fixed by soldering or the like to the opening 16 (element mounting area) where the metal block 1 on the upper surface of the metal block 3 with insulating layer is exposed.
- Solder bonding is usually performed using a cream solder in a reflow furnace.
- solder material for example, a high temperature solder made of SnPbAg, a lead-free solder made of SnAgCu, or the like is used.
- the soldering temperature is set according to the melting point of the solder.
- a metal plate 5 to which the metal block 3 with an insulating layer is attached is prepared.
- a flanged through hole 17 for fitting and fixing the metal block 3 with an insulating layer is formed.
- the ridges 17 a of the through holes 17 are in contact with the bottom surface 13 of the convex step 12 of the insulating layer metal block 3 to transmit the downward pressure P transmitted from the metal plate 5 to the insulating layer metal block 3. It works to communicate to the bottom surface 13. Therefore, high thermal conductivity and high rigidity are required for the metal plate 5, and for example, an aluminum plate or a copper plate is used.
- the thickness t of the metal plate 5 varies depending on the area, but may be set to about 1 mm to 5 mm so as not to cause a deflection.
- Reference numeral 17b in the figure is an opening at the position of the weir 17a as described above.
- the metal block 3 with an insulating layer is fitted and fixed to the flanged through hole 17 of the metal plate 5.
- the pressure P of the metal plate 5 is transmitted from the ridge 17a of the through hole 17 to the bottom surface 13 of the convex step 12 of the metal block 3 with the insulating layer.
- the bottom surface 13 is brought into contact.
- the protruding portion 12b of the convex step 12 and the opening 17b at the position of the ridge 17a are designed to be aligned with each other.
- the metal block 3 with an insulating layer may be fitted and fixed via an adhesive so as not to be pulled out of the through hole 17.
- the bottom surface 18 of the insulating layer provided metal block 3, ie, the lower surface of the insulating layer 2 is several tens of ⁇ m from the back surface 5a of the metal plate 5. It is good to make it project to some extent.
- the surface heights of the back surface 5a and the bottom surface 18 may be the same.
- the area of the metal plate 5 is small, it may not be made to project.
- the metal block 3 with the insulating layer is disposed with the power semiconductor element 4 mounting surface side up, and the metal plate 5 is moved downward from above with the soldered through hole 17 facing up and soldered through
- the metal block 3 with an insulating layer is fitted and fixed to the hole 17.
- the metal plate 5 is disposed with the through hole 17 side down and the metal block 3 with the insulating layer from above and the mounting surface side of the power semiconductor element 4 down.
- the metal block 3 with the insulating layer may be fitted and fixed to the flanged through hole 17 by moving the metal block 3 to the through hole 17.
- the bottom surface 13 of the convex step 12 at the top of the metal block 3 with an insulating layer is brought into contact with the ridge 17 a of the flanged through hole 17.
- the thickness dimension of the insulating layer provided metal block 3 so that the bottom surface 18 of the insulating layer provided metal block 3, that is, the lower surface of the insulating layer 2 protrudes about several tens of ⁇ m from the back surface 5a of the metal plate 5 Is designed.
- a printed circuit board 6 to be attached to the metal plate 5 is prepared.
- the printed circuit board 6 is composed of, for example, an insulating substrate 6b made of glass epoxy (epoxy resin reinforced with glass fiber) and a circuit pattern 6a formed on the insulating substrate 6b.
- An opening 19 corresponding to the opening 17 b of the portion of the flange 17 a of the flanged through hole 17 of the plate 5 is formed.
- mounting holes 21 for fixing the heat sink 11 with screws are formed in the outer peripheral portion of the printed circuit board 6.
- the outer periphery of the metal plate 5 and the printed circuit board 6 such that the opening 19 of the printed circuit board 6 is positioned at the opening 17 b of the portion of the flange 17 a of the flanged through hole 17 of the metal plate 5. Align the mounting holes 21 formed in the part with each other. In this state, the printed circuit board 6 is attached to the metal plate 5 with an adhesive.
- the adhesive one having a large thermal conductivity is preferable.
- a part of the electronic component 8 necessary for the power supply circuit other than the main circuit of the power converter and the control circuit is fixed to the printed circuit board 6.
- the circuit patterns 6 a formed on the power semiconductor element 4 and the printed circuit board 6 are connected to each other by a connection conductor such as an aluminum wire 7.
- the aluminum wire 7 has a wire diameter of about 125 to 500 ⁇ m, and is joined to each part by ultrasonic bonding. This connection may be made by using a lead frame or a ribbon-like connection conductor such as aluminum instead of the aluminum wire 7.
- the fixing of the electronic component 8 to the circuit pattern 6a of the printed circuit board 6 is performed by solder or the like.
- the resin case 9 is formed on the metal plate 5 in order to electrically insulate and protect the circuit patterns 6a of the electronic components 8 and the printed circuit board 6 fixed to the power semiconductor element 4 and the printed circuit board 6.
- the inside of the resin case 9 is filled with a sealing material 10 such as silicone gel.
- the sealing material 10 you may use fillers, such as an epoxy resin and a urethane resin.
- FIG. 5 is a schematic view of a power semiconductor module 200 according to a third embodiment of the present invention.
- the printed circuit board for mounting the electronic components required for the power supply circuit other than the main circuit of the power converter and the control circuit is a metal plate
- the printed circuit board 6 attached to the upper surface of the printed circuit board 5 and the printed circuit board 6A disposed at an interval above the printed circuit board 6 have a two-stage configuration.
- the printed circuit board 6A is, for example, an insulating board 6Ab made of glass epoxy (epoxy resin reinforced with glass fiber) or the like, and a circuit pattern 6Aa formed on the insulating board 6Ab. And consists of.
- the power semiconductor module 200 is fixed to the outer periphery of the printed circuit board 6 and has a resin case 9 having an external lead terminal (not shown) and a seal such as silicone gel filled in the resin case 9.
- a stopper 10 is provided.
- the electronic component 8 shown in FIG. 5 is a part of components such as an inductor, a resistor, and a capacitor which constitute a power supply circuit other than the main circuit of the power converter and a control circuit.
- the printed circuit board 6A disposed above the printed circuit board 6 with a gap is supported, for example, so as to be fixed to the inner peripheral surface of the resin case 9, and the members in the resin case 9 including this printed circuit board 6A. Is sealed by the sealing material 10.
- the area of the lower printed circuit board 6 can be reduced by mounting a part of the electronic component 8 necessary for the power supply circuit other than the main circuit of the power converter and the control circuit on the upper printed circuit board 6A.
- the area of the metal plate 5 to which the printed board 6 is attached can be reduced, and the power semiconductor module 200 can be miniaturized.
- the thickness of the metal plate 5 necessary for preventing the deflection when the metal plate 5 is screwed to the heat sink 11 can be reduced. Since the thickness of the metal block 1 can be reduced correspondingly, the weight of the power semiconductor module 200 can also be reduced.
- the assemblability in the case where the power semiconductor module 200 is fixed to the heat sink 11 to constitute a power converter (power converter 400 described later) is improved and cost reduction is achieved.
- S indicates the floor area of the power semiconductor module 200.
- FIG. 6 is a block diagram of a main part of a power converter 300 according to a fourth embodiment of the present invention, which is a power converter manufactured by fixing the power semiconductor module 100 of FIG. 1 to a heat sink (cooling fin) 11. An example is shown.
- the power semiconductor module 100 of FIG. 1 is screwed to a heat sink (cooling fin) 11 for heat dissipation via a thermal compound (heat dissipation grease) to complete the power converter 300. If the floor area of the power semiconductor module 100 is small, the thermal compound may not be used.
- a metal material which forms the heat sink 11 copper, a copper alloy, aluminum, an aluminum alloy etc. are applicable, for example.
- Fixing of the power semiconductor module 100 to the heat sink 11 is carried out by screwing using the mounting holes 21 formed in the outer peripheral portion and the screw holes 11 a of the heat sink 11. Since the bottom surface 18 of the insulating layer provided metal block 3 protrudes from the back surface 5 a of the metal plate 5 even by screwing with this outer peripheral portion, the bottom surface 18 of the insulating layer provided metal block 3 contacts the heat sink 11 with uniform pressure. Excellent heat dissipation can be obtained.
- the insulating layer 2 constituting the bottom surface 18 of the insulating layer provided metal block 3 in the power converter 300 ie, the insulating layer 2 formed on the bottom surface (lower surface) side of the metal block 1, particularly in the second embodiment described above.
- the insulating layer of the ceramic material by the described aerosol deposition method or plasma spraying method is employed, the following advantages can be obtained.
- Thermal conductivity is equivalent to that of bulk, and thermal conductivity is, for example, about 20 W / m ⁇ K for aluminum oxide (Al 2 O 3 ), and about 160 to 180 W / m for aluminum nitride (AlN) ⁇ About 80 W / m ⁇ K can be secured with K and silicon nitride (Si 3 N 4 ).
- the insulating layer 2 can be formed thin, which lowers the overall thermal resistance.
- the bottom surface (lower surface) of the metal block 1 on the upper surface of which the power semiconductor element 4 is mounted is attached to the heat sink 11 via the insulating layer 2 made of a ceramic material excellent in thermal conductivity. Since the contact is made with uniform pressure, the thermal resistance under the power semiconductor element 4 can be made sufficiently small, and it has excellent heat dissipation, which makes it possible to achieve the conventional structure. Compared with this, miniaturization and cost reduction can be achieved.
- the power supply circuits other than the main circuit of the power converter 300 and the electronic components 8 (inductors, resistors, capacitors, etc.) constituting the control circuit may be mounted on the printed circuit board 6, Only some of the components may be mounted on the printed circuit board 6 and the remaining components may be mounted on another printed circuit board (not shown) fixed to the heat sink 11.
- FIG. 7 is a cross-sectional view of an essential part of a power converter 400 according to a fifth embodiment of the present invention.
- the difference between the power converter 400 and the power converter 300 of FIG. 6 is that the power semiconductor module 200 mounted with the two-stage printed circuit board is fixed to the heat sink (cooling fin) 11.
- the floor area S of the power semiconductor module 200 is smaller than the floor area of the power semiconductor module 100 in the power converter 300, whereby the heat sink 11 can be further miniaturized.
- power converter 400 can be further miniaturized and reduced in cost as compared with power converter 300 of FIG.
- the electronic components constituting the power supply circuit other than the main circuit of power converter 400 and the circuit for control when there are electronic components which can not be mounted on printed circuit boards 6 and 6A of two stages, the electronic components The power converter 400 can be configured to be mounted on another printed circuit board (not shown) and to fix this other printed circuit board to the heat sink 11.
- FIG. 8 is a cross-sectional view of main parts of a power converter 500 according to a sixth embodiment of the present invention.
- the difference between the power converter 500 and the power converter 300 of FIG. 6 is that the power semiconductor module 100 includes the electronic components 8 required for the power supply circuit other than the main circuit of the power converter 500 and the control circuit.
- the printed circuit board 6B on which a part of the components is mounted is stacked and arranged at an interval and covered with the case 22.
- the printed circuit board 6B is, for example, an insulating board 6Bb made of glass epoxy (epoxy resin reinforced with glass fiber) or the like, and a circuit formed on the insulating board 6Bb. It is comprised by pattern 6Ba.
- the support structure of the printed circuit board 6B can be configured such that the side edge of the printed circuit board 6B is fixed to the support 23 provided on the heat sink 11, as shown in FIG.
- the configuration is not limited to such a configuration.
- the configuration may be such that the back surface (lower surface) of the printed circuit board 6B is fixed to the upper end portion of the resin case 9 of the power semiconductor module 100.
- power converter 500 As described above, a part of electronic components 8 required for the power supply circuit and control circuit other than the main circuit of power converter 500 is provided outside power semiconductor module 100. Since the printed circuit board 6B is mounted on the printed circuit board 6B, the printed circuit board 6 provided inside the power semiconductor module 100 can be miniaturized, and the metal plate 5 to which the printed circuit board 6 is attached can also be miniaturized. The semiconductor module 100 can be miniaturized.
- the assemblability of the power semiconductor module 100 can be improved and the cost can be reduced.
- the floor area of power semiconductor module 100 in power converter 500 is smaller than the floor area of power semiconductor module 100 in power converter 300.
- the heat sink 11 can be miniaturized as the floor area of the power semiconductor module 100 becomes smaller, whereby the miniaturization and reduction of the power converter 500 can be achieved. Cost can be achieved.
- the power converter 500 is configured to stack one printed circuit board 6B on which the electronic component 8 is mounted at intervals on the power semiconductor module 100, but may be configured to stack multiple layers. .
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Dispersion Chemistry (AREA)
- Geometry (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Inverter Devices (AREA)
Abstract
Description
図2aにおいて、最初に、1.0mm~5.0mm程度の厚さの銅板を、プレス加工により、正方形または長方形に打ち抜いて、上部に凸状の段差部12aを有する金属ブロック1を形成する。図中の符号で13aは段差部12aの底面である。
[A]プラズマ溶射法を用いる場合
絶縁層2の形成に必要なセラミックス微粒子14には酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素、の少なくとも1種によるセラミックス微粒子を用いればよい。
エアロゾルデポジション法とは、微粒子あるいは超微粒子原料をガスと混合してエアロゾル化し、ノズルを通して基板(ここでは金属ブロック1)に皮膜を形成する技術である。ガスにはヘリウムもしくは空気が用いられる。皮膜形成装置はエアロゾル化チャンバーと成膜チャンバーから構成されている。成膜チャンバーは真空ポンプで50~1kPa前後に減圧する。
粒径0.1~2μmのセラミックス微粒子14aを高速で金属ブロック1上に吹付けると、その時の衝突エネルギーで10~30nm前後の微結晶粒子に破砕され新生面が形成され表面が活性化され粒子同士が結合される。したがって、緻密なナノ結晶組織のセラミックス膜(絶縁層2)が形成される。また、このセラミックス膜(絶縁層2)は、特に温度を上げることなく常温で形成可能である。
図2cにおいて、絶縁層付金属ブロック3の上面の金属ブロック1が露出した開口部16(素子実装領域)にパワー半導体素子(半導体チップ)4をはんだなどで固着して電気的・機械的に接合する。
図3dにおいて、前記絶縁層付金属ブロック3を取り付ける金属板5を用意する。
金属板5の中央付近に、絶縁層付金属ブロック3を嵌合・固定するための庇付貫通孔17を形成する。この庇付貫通孔17の庇17aは絶縁層付金属ブロック3の凸状の段差部12の底面13と接触して金属板5から伝達される下方への圧力Pを絶縁層付金属ブロック3の底面13に伝える働きをする。そのため、この金属板5には、高い熱伝導性と高い剛性が要求され、例えば、アルミニム板や銅板を用いる。金属板5の厚みtは、面積によって変わるが、たわみが生じないように1mm~5mm程度に設定するとよい。図中の符号の17bは前記したように庇17aの箇所の開口部である。
図3eにおいて、前記絶縁層付金属ブロック3を金属板5の庇付貫通孔17に嵌合・固定する。このとき、庇付貫通孔17の庇17aから絶縁層付金属ブロック3の凸状の段差部12の底面13に金属板5の圧力Pが伝達するようにするために庇17aと段差部12の底面13を接触させる。ここで、凸状の段差部12の突出した箇所12bと庇17aの箇所の開口部17bとが互いに位置が合うように設計されている。また、絶縁層付金属ブロック3が庇付貫通孔17から抜けないように接着剤を介して嵌合・固定してもよい。
次に、金属板5に絶縁層付金属ブロック3を嵌合・固定する方法について説明する。
図3fにおいて、前記金属板5上に貼り付けるプリント基板6を用意する。このプリント基板6は例えばガラスエポキシ(ガラスファイバで強化されたエポキシ樹脂)などで構成される絶縁基板6bと、この絶縁基板6b上に形成された回路パターン6aとで構成され、中央部には金属板5の庇付貫通孔17の庇17aの箇所の開口部17bに対応する開口部19が形成されている。また、プリント基板6の外周部にはヒートシンク11にネジで固定するための取り付け孔21が形成されている。
図4iにおいて、パワー半導体素子4やプリント基板6に固着した電子部品8およびプリント基板6の回路パターン6a同士を電気的に絶縁したり表面保護したりするために、樹脂ケース9を金属板5に(図ではプリント基板6も含めて)固着した後で、樹脂ケース9内をシリコーンゲルなどの封止材10で充填する。なお、封止材10としては、エポキシ樹脂やウレタン樹脂などの充填材を用いても良い。このような工程を経て、パワー半導体モジュール100が完成する。
エアロゾルデポジション法では、室温(常温)で成膜が可能であり、かつ音速レベルのスピードでサブミクロンオーダーのセラミックス微粒子を基板に衝突させるため、活性な新生面が露出したセラミックス微粒子が結合する。また、プラズマ溶射法によっても同様である。いずれの方法においても、非常にち密な電気絶縁膜であるセラミックス微粒子層を形成することが可能となり、膜内に空孔(ボイド)が含まれないため、従来の焼結法により形成されたセラミックス板よりも単位長さ当たりの破壊電圧が10倍程度向上する。
熱伝導率はバルクと同等であり、熱伝導率は例えば酸化アルミニウム(Al2O3)で約20W/m・K、窒化アルミニウム(AlN)で約160~180W/m・K、窒化珪素(Si3N4)で約80W/m・K程度確保できる。これに加えて単位長さ当たりの破壊電圧が向上するため、絶縁層2を薄く形成することができ、このため全体の熱抵抗が低くなる。
これらの点により、絶縁層2の高絶縁と低熱抵抗とを共に確保することが可能となる。
Claims (13)
- 庇付貫通孔を有する金属板と、
金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層が直接形成された絶縁層付金属ブロックとを備え、
前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックが、その上部側が前記庇付貫通孔の庇に当接するように嵌合されているとともに、
前記金属ブロックの上面の前記素子実装領域にパワー半導体素子が固着され、
前記パワー半導体素子と前記金属板上に絶縁材を介して配設された回路パターンとが接続導体で接続されている
ことを特徴とするパワー半導体モジュール。 - 前記絶縁層付金属ブロックは、上部に凸状の段差部を有する金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層が直接形成されてなり、前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックが、前記段差部の底面に形成された絶縁層が前記庇付貫通孔の庇に当接するように嵌合されていることを特徴とする請求項1に記載のパワー半導体モジュール。
- 前記絶縁層付金属ブロックの底面が前記金属板の裏面から突出していることを特徴とする請求項1または2に記載のパワー半導体モジュール。
- 前記絶縁層の厚みが、50μm以上、2000μm以下であることを特徴とする請求項1~3のいずれか一項に記載のパワー半導体モジュール。
- 前記絶縁層は、酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素からなるフィラー群の少なくとも1種類からなるセラミックス層であることを特徴とする請求項1~4のいずれか一項に記載のパワー半導体モジュール。
- 前記絶縁層は、前記フィラー群の少なくとも1種によるセラミックス微粒子をプラズマ溶射法にて堆積させることにより形成したことを特徴とする請求項5に記載のパワー半導体モジュール。
- 前記絶縁層は、前記フィラー群の少なくとも1種によるセラミックス微粒子をエアロゾルデポジション法にて堆積させることにより形成したことを特徴とする請求項5に記載のパワー半導体モジュール。
- 前記回路パターンは前記金属板上に固着されたプリント基板の回路パターンであり、この回路パターンに電子部品が固着されていることを特徴とする請求項1~7のいずれか一項に記載のパワー半導体モジュール。
- 前記プリント基板の上方に、電子部品が固着した別のプリント基板を配設していることを特徴とする請求項8に記載のパワー半導体モジュール。
- 請求項1~9のいずれか一項に記載のパワー半導体モジュールと、ヒートシンクとを備え、前記金属ブロックの下面が前記絶縁層を介して前記ヒートシンクに当接するようにして前記パワー半導体モジュールが前記ヒートシンクに固定されていることを特徴とする電力変換器。
- 金属板に庇付貫通孔を形成する工程と、
金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層を直接形成して絶縁層付金属ブロックを構成する工程と、
前記金属ブロックの上面の前記素子実装領域にパワー半導体素子を固着する工程と、
前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックを、その上部側が前記庇付貫通孔の庇に当接するように嵌合して固定する工程と、
前記金属板上に絶縁材を介して回路パターンを形成する工程と、
前記パワー半導体素子と前記回路パターンとを接続導体で接続する工程と、
を含むことを特徴とするパワー半導体モジュールの製造方法。 - 上部に凸状の段差部を有する金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層を直接形成して前記絶縁層付金属ブロックを構成するとともに、前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックを、前記段差部の底面に形成された絶縁層が前記庇付貫通孔の庇に当接するように嵌合して固定することを特徴とする請求項11に記載のパワー半導体モジュールの製造方法。
- 前記絶縁層が、酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素からなるフィラー群の少なくとも1種類によるセラミックス微粒子をプラズマ溶射法、エアロゾルデポジション法またはスパッタ法のいずれかを用いて堆積させることにより形成されることを特徴とする請求項11または12に記載のパワー半導体モジュールの製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP14788541.2A EP2991106A1 (en) | 2013-04-24 | 2014-04-08 | Power semiconductor module and method for manufacturing same, and power converter |
CN201480020428.0A CN105229785B (zh) | 2013-04-24 | 2014-04-08 | 功率半导体模块及其制造方法、电力变换器 |
JP2015513666A JP6004094B2 (ja) | 2013-04-24 | 2014-04-08 | パワー半導体モジュールおよびその製造方法、電力変換器 |
US14/875,139 US9373555B2 (en) | 2013-04-24 | 2015-10-05 | Power semiconductor module, method for manufacturing the same, and power converter |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013-090971 | 2013-04-24 | ||
JP2013090971 | 2013-04-24 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/875,139 Continuation US9373555B2 (en) | 2013-04-24 | 2015-10-05 | Power semiconductor module, method for manufacturing the same, and power converter |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2014175062A1 true WO2014175062A1 (ja) | 2014-10-30 |
Family
ID=51791643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2014/060178 WO2014175062A1 (ja) | 2013-04-24 | 2014-04-08 | パワー半導体モジュールおよびその製造方法、電力変換器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9373555B2 (ja) |
EP (1) | EP2991106A1 (ja) |
JP (1) | JP6004094B2 (ja) |
CN (1) | CN105229785B (ja) |
WO (1) | WO2014175062A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019071328A (ja) * | 2017-10-06 | 2019-05-09 | 株式会社豊田中央研究所 | 半導体実装基板、半導体モジュールおよび半導体実装基板の製造方法 |
WO2022118510A1 (ja) * | 2020-12-03 | 2022-06-09 | 株式会社日立製作所 | 絶縁基板および電力変換装置 |
WO2023243167A1 (ja) * | 2022-06-15 | 2023-12-21 | 日立Astemo株式会社 | 電力変換装置 |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8816383B2 (en) * | 2012-07-06 | 2014-08-26 | Invensas Corporation | High performance light emitting diode with vias |
JP6090529B2 (ja) * | 2014-03-20 | 2017-03-08 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
JP6451257B2 (ja) * | 2014-11-21 | 2019-01-16 | 富士電機株式会社 | 半導体装置 |
JP6283379B2 (ja) * | 2016-01-29 | 2018-02-21 | 本田技研工業株式会社 | コンデンサの配置構造 |
US10566316B2 (en) * | 2017-01-17 | 2020-02-18 | Mitsubishi Electric Corporation | Semiconductor device and power conversion apparatus |
US10903754B2 (en) * | 2017-01-17 | 2021-01-26 | Hitachi Automotive Systems, Ltd. | Power converter |
JP2019054069A (ja) * | 2017-09-14 | 2019-04-04 | 株式会社東芝 | 半導体装置 |
JP7025948B2 (ja) * | 2018-02-13 | 2022-02-25 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
JP6674501B2 (ja) * | 2018-05-18 | 2020-04-01 | 本田技研工業株式会社 | 電力変換装置 |
JP7322369B2 (ja) * | 2018-09-21 | 2023-08-08 | 富士電機株式会社 | 半導体装置の製造方法 |
JP7378379B2 (ja) * | 2020-11-02 | 2023-11-13 | 三菱電機株式会社 | パワー半導体モジュール及び電力変換装置 |
FR3119930B1 (fr) * | 2021-02-18 | 2023-02-24 | Safran Electrical & Power | Module électronique de puissance |
KR102537710B1 (ko) * | 2021-05-28 | 2023-05-31 | (주)티에스이 | 일괄 접합 방식의 다층 회로기판 및 그 제조 방법 |
KR20220160967A (ko) * | 2021-05-28 | 2022-12-06 | (주)티에스이 | 이종 재질의 다층 회로기판 및 그 제조 방법 |
CN115064510B (zh) * | 2022-06-24 | 2024-07-05 | 广东汇芯半导体有限公司 | 一种半导体电路模块及其制备方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000091481A (ja) * | 1998-09-08 | 2000-03-31 | Tokin Corp | 電力用トランジスタケースおよび電力用トランジスタ |
JP2000228466A (ja) | 1999-02-08 | 2000-08-15 | Hitachi Ltd | 半導体装置及びその製造方法ならびに電子装置 |
JP2005142323A (ja) * | 2003-11-06 | 2005-06-02 | Mitsubishi Electric Corp | 半導体モジュール |
JP3791772B2 (ja) | 2000-10-31 | 2006-06-28 | 富士電機機器制御株式会社 | 電力変換装置 |
JP2007012928A (ja) * | 2005-06-30 | 2007-01-18 | Allied Material Corp | 放熱基板とそれを備えた半導体装置 |
JP2009081246A (ja) * | 2007-09-26 | 2009-04-16 | Daikin Ind Ltd | 半導体実装基板及びその製造方法 |
WO2011058607A1 (ja) * | 2009-11-13 | 2011-05-19 | 株式会社日立製作所 | 絶縁性構造及びその製造方法 |
JP2011114010A (ja) * | 2009-11-24 | 2011-06-09 | Fuji Electric Holdings Co Ltd | 半導体モジュールおよびその製造方法ならびに電気機器 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07161925A (ja) * | 1993-12-09 | 1995-06-23 | Mitsubishi Electric Corp | パワーモジュール |
US6650559B1 (en) | 2000-10-31 | 2003-11-18 | Fuji Electric Co., Ltd. | Power converting device |
JP2002246515A (ja) * | 2001-02-20 | 2002-08-30 | Mitsubishi Electric Corp | 半導体装置 |
US7183587B2 (en) * | 2003-09-09 | 2007-02-27 | Cree, Inc. | Solid metal block mounting substrates for semiconductor light emitting devices |
US20060097385A1 (en) * | 2004-10-25 | 2006-05-11 | Negley Gerald H | Solid metal block semiconductor light emitting device mounting substrates and packages including cavities and heat sinks, and methods of packaging same |
US20060124953A1 (en) * | 2004-12-14 | 2006-06-15 | Negley Gerald H | Semiconductor light emitting device mounting substrates and packages including cavities and cover plates, and methods of packaging same |
CN100485925C (zh) * | 2006-07-07 | 2009-05-06 | 启萌科技有限公司 | 发光二极管模组 |
KR101081622B1 (ko) * | 2007-05-18 | 2011-11-10 | 가부시키가이샤 산샤덴키세이사쿠쇼 | 아크방전장치 |
JP5176507B2 (ja) * | 2007-12-04 | 2013-04-03 | 富士電機株式会社 | 半導体装置 |
-
2014
- 2014-04-08 JP JP2015513666A patent/JP6004094B2/ja not_active Expired - Fee Related
- 2014-04-08 EP EP14788541.2A patent/EP2991106A1/en not_active Withdrawn
- 2014-04-08 CN CN201480020428.0A patent/CN105229785B/zh not_active Expired - Fee Related
- 2014-04-08 WO PCT/JP2014/060178 patent/WO2014175062A1/ja active Application Filing
-
2015
- 2015-10-05 US US14/875,139 patent/US9373555B2/en not_active Expired - Fee Related
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000091481A (ja) * | 1998-09-08 | 2000-03-31 | Tokin Corp | 電力用トランジスタケースおよび電力用トランジスタ |
JP2000228466A (ja) | 1999-02-08 | 2000-08-15 | Hitachi Ltd | 半導体装置及びその製造方法ならびに電子装置 |
JP3791772B2 (ja) | 2000-10-31 | 2006-06-28 | 富士電機機器制御株式会社 | 電力変換装置 |
JP2005142323A (ja) * | 2003-11-06 | 2005-06-02 | Mitsubishi Electric Corp | 半導体モジュール |
JP2007012928A (ja) * | 2005-06-30 | 2007-01-18 | Allied Material Corp | 放熱基板とそれを備えた半導体装置 |
JP2009081246A (ja) * | 2007-09-26 | 2009-04-16 | Daikin Ind Ltd | 半導体実装基板及びその製造方法 |
WO2011058607A1 (ja) * | 2009-11-13 | 2011-05-19 | 株式会社日立製作所 | 絶縁性構造及びその製造方法 |
JP2011114010A (ja) * | 2009-11-24 | 2011-06-09 | Fuji Electric Holdings Co Ltd | 半導体モジュールおよびその製造方法ならびに電気機器 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019071328A (ja) * | 2017-10-06 | 2019-05-09 | 株式会社豊田中央研究所 | 半導体実装基板、半導体モジュールおよび半導体実装基板の製造方法 |
WO2022118510A1 (ja) * | 2020-12-03 | 2022-06-09 | 株式会社日立製作所 | 絶縁基板および電力変換装置 |
JP7535444B2 (ja) | 2020-12-03 | 2024-08-16 | 株式会社日立製作所 | 絶縁基板および電力変換装置 |
WO2023243167A1 (ja) * | 2022-06-15 | 2023-12-21 | 日立Astemo株式会社 | 電力変換装置 |
Also Published As
Publication number | Publication date |
---|---|
CN105229785B (zh) | 2018-01-16 |
JPWO2014175062A1 (ja) | 2017-02-23 |
US20160027709A1 (en) | 2016-01-28 |
CN105229785A (zh) | 2016-01-06 |
EP2991106A1 (en) | 2016-03-02 |
US9373555B2 (en) | 2016-06-21 |
JP6004094B2 (ja) | 2016-10-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2014175062A1 (ja) | パワー半導体モジュールおよびその製造方法、電力変換器 | |
JP6332439B2 (ja) | 電力変換装置 | |
JP5971333B2 (ja) | 電力変換器 | |
US8450845B2 (en) | Semiconductor device | |
JP6024750B2 (ja) | 半導体モジュール | |
JP2006179856A (ja) | 絶縁基板および半導体装置 | |
JP4023397B2 (ja) | 半導体モジュールおよびその製造方法 | |
TW201501248A (zh) | 功率覆蓋結構及其製造方法 | |
JP2007305772A (ja) | 半導体装置および半導体装置の製造方法 | |
JP5861846B2 (ja) | 電力変換器およびその製造方法 | |
JP5246143B2 (ja) | 半導体モジュールおよびその製造方法ならびに電気機器 | |
JP2006013080A (ja) | 半導体モジュールおよびその製造方法 | |
KR20150108685A (ko) | 반도체모듈 패키지 및 그 제조 방법 | |
JP2006165498A (ja) | 半導体装置および、半導体装置の製造方法 | |
US9532448B1 (en) | Power electronics modules | |
JP2013046004A (ja) | 絶縁回路基板並びに半導体モジュール及びその製造方法 | |
JP5630375B2 (ja) | 絶縁基板、その製造方法、半導体モジュールおよび半導体装置 | |
JP2014030059A (ja) | 絶縁基板、その製造方法、半導体モジュールおよび半導体装置 | |
US20230317554A1 (en) | Embedded heat slug in a substrate | |
JP7520273B1 (ja) | パワーモジュール | |
TWI831247B (zh) | 功率模組及其製作方法 | |
WO2019221242A1 (ja) | パワー半導体モジュール |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 201480020428.0 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 14788541 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2015513666 Country of ref document: JP Kind code of ref document: A |
|
REEP | Request for entry into the european phase |
Ref document number: 2014788541 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2014788541 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |