WO2014075460A1 - 复合型连体igbt器件及其加工方法 - Google Patents

复合型连体igbt器件及其加工方法 Download PDF

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Publication number
WO2014075460A1
WO2014075460A1 PCT/CN2013/079554 CN2013079554W WO2014075460A1 WO 2014075460 A1 WO2014075460 A1 WO 2014075460A1 CN 2013079554 W CN2013079554 W CN 2013079554W WO 2014075460 A1 WO2014075460 A1 WO 2014075460A1
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Prior art keywords
igbt
igbt device
composite
devices
conjoined
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French (fr)
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严利人
刘道广
刘志弘
张伟
周卫
崔杰
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Tsinghua University
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Tsinghua University
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/112—Field plates comprising multiple field plate segments

Definitions

  • the present invention relates to a composite type connected IGBT power device and a method of processing the same. Background technique
  • Insulated Gate Bipolar Transistor is one of the current mainstream power electronic devices, suitable for medium and high power power conversion applications. Especially in the case of faster switching speed, the size and weight of the power supply system will be greatly reduced, and the power efficiency and conversion quality will be greatly improved. Therefore, from the perspective of energy conservation and sustainable development of the national economy, this is an important class of power conversion and control.
  • the IGBT insulated gate bipolar transistor can be regarded as a composite of two structures of a bipolar transistor and a field effect transistor, and can also be regarded as a MOS device fabricated on the upper surface of the wafer and a PN junction diode fabricated on the bottom surface of the wafer. Combine.
  • the MOS devices and diodes at the upper and lower surfaces are joined together by a N-drift region of semiconductor material.
  • the N-drift region of the semiconductor material is relatively long (that is, when the wafer is relatively thick), the withstand voltage of the IGBT device is high; otherwise, the withstand voltage is relatively low.
  • the conventional method of fabricating a non-punch-through IGBT device is divided into two steps, which can be referred to as a front process and a back process.
  • the front surface of the wafer is processed (also referred to as the front side of the wafer), and the back surface is processed to the bottom surface (also referred to as the back side of the wafer).
  • the back surface is processed to the bottom surface (also referred to as the back side of the wafer).
  • a plurality of MOS device structures are simultaneously fabricated on one wafer, and after all the processes are completed, the front device structure is subjected to a certain passivation protection, and then transferred to the post il.
  • Subsequent processing includes wafer thinning from the back side (to a thickness suitable for withstand voltage requirements), ion implantation of the entire back surface, implantation of impurity annealing activation, back metallization, and dicing, electrode bonding and packaging, etc.
  • Get commodity IGBT devices the main problem with current IGBT devices is that the switching speed of the device operation is still not high enough. Summary of the invention In order to overcome the above drawbacks, the present invention provides a connected IGBT device having a higher switching speed.
  • the present invention provides a composite IGBT device, the device comprising at least two IGBT devices, the drift regions of the two IGBT devices are connected to each other, and the IGBT devices independently lead the electrodes.
  • the composite IGBT device is composed of four IGBT devices in a field shape, and each IGBT device is connected to the drift region of the connected IGBT device.
  • the IGBT device in the upper left corner and the IGBT device in the lower right corner form a first block in parallel
  • the IGBT device in the upper right corner and the IGBT device in the lower left corner are connected in parallel to form a second block, and the two blocks are respectively turned on and off. status.
  • the composite IGBT device is composed of IGBT devices having the same or different area sizes.
  • an IGBT device occupies a larger chip area.
  • another IGBT device connected accounts for a small chip area, which serves to accelerate the switching of the main device.
  • Auxiliary device is
  • the composite IGBT device has a spatially distinct separation of the sub-IGBT devices constituting the composite structure, and other isolations are provided between the sub-devices except for deep trench isolation at the upper and lower surfaces.
  • Technology also includes field rings, field plates, etc., as well as some combination of these isolation techniques.
  • the present invention provides a method of processing a composite IGBT device, comprising the steps of:
  • step 8.1 a groove is formed on the upper surface, and a passivation layer is deposited to protect the exposed portion;
  • the method of opening the trench in step 8.2 is wet etching, dry etching, dry-wet composite etching or laser ablation.
  • the steps for opening the back slot in step 8.5 are:
  • the composite IGBT device of the present invention is formed by connecting the N-drift region of the IGBT device through a connection portion, and the use characteristic of the composite IGBT is that two or two sets of IGBT devices operate at this level. In this way, the switching speeds of the IGBT devices can be mutually promoted, and the beneficial effect of further increasing the operating speed can be obtained.
  • the processing method of the composite IGBT device of the present invention adds a few process steps such as slotting on the basis of the existing IGBT device processing method, and realizes processing of the composite IGBT device. Low processing costs are simple and easy.
  • FIG. 1 is a schematic structural view of a preferred embodiment of the present invention.
  • 2 is a schematic structural view of a third embodiment of the present invention.
  • Figure 3 is a schematic view of a preferred embodiment 5.
  • Figure 4 is a schematic view of a preferred embodiment 6.
  • 1 is an N+ type conductive region
  • 2 is a P-type semiconductor region
  • 3 is an N-region
  • 4 is an N-connection region
  • 5 is a P or P+ region
  • 6 is a gate
  • 7 is a composite IGBT.
  • 1 is a P+ type conductive region
  • 2 is an N-type semiconductor region
  • 3 is a P-region
  • 4 is a P-connection region
  • 5 is an N or N+ region
  • 6 is a gate
  • 7 is a sub-device constituting a composite IGBT.
  • 8 is a deep groove for isolation at the upper surface.
  • 11 is an NPT type composite IGBT device whose bottom surface is a P+ region
  • 12 is an NPT type composite IGBT device whose bottom surface is an N+ region
  • 13 is a transformer.
  • the composite IGBT device is composed of two conventional IGBT devices connected by a drift region connection portion 4, and the IGBT device includes a front MOS structure and a PN junction on the bottom surface.
  • the front MOS structure is composed of an N+ source/drain region 1, a P-type channel region 2, and an N-type drift region 3 functioning as a source/drain region.
  • the PN junction structure of the bottom surface is composed of a P+ bottom surface region 5 and an N-type drift region 3.
  • the MOS structure is fabricated on the front side of the wafer using a conventional process. That is: using an N-type substrate wafer as a substrate, doping and diffusion of impurities on the substrate to obtain a P-type region 2, fabricating a gate 6, impurity implantation and activation to obtain an N+-type source region 1, in the resulting structure A protective medium is deposited on the upper surface, the metallized wiring is opened after the contact hole is opened, and the upper surface is passivated. A region between the two IGBT devices is wet-etched to form a deep trench, and then a passivation layer is deposited to protect the exposed portion.
  • the wafer is thinned from the back side, and the back side is implanted with doping, annealing, and metallization.
  • the backside exposure is performed using a two-sided lithography technique, and the connection region of the two IGBT devices is opened by a wet etching method from the back side.
  • the two IGBT devices are diced and divided as a whole, and the IGBT devices independently lead the electrodes.
  • the source region leads to the emitter of the IGBT device, and the bottom region leads to the collector of the IGBT device.
  • Two IGBTs The devices are packaged together to produce a connected IGBT device product.
  • two IGBT devices are connected through a drift region connection portion to form a composite or connected IGBT device, and the working state of the connected IGBT device is a state in which the first IGBT device is turned on and the second IGBT device is turned off. vice versa.
  • the carriers accumulated in the N-region of the first IGBT device can be quickly discharged to the N of the second IGBT device.
  • - Zone so the turn-off speed of the first IGBT device will increase, and the turn-on speed of the second IGBT device will also increase. This generally improves the switching speed of the overall device.
  • Composite IGBT devices have the performance of conventional IGBT devices, and the switching speed has been greatly improved, not the simple superposition of two IGBT devices.
  • the operating frequency is generally about 20 kHz.
  • the operating frequency of the connected IGBT device can be increased to 30-50 kHz or even higher.
  • the composite IGBT device is composed of two conventional IGBT devices connected by a drift region connection. However, one of the two conventional IGBT devices occupies a large area, which is called a main switching device; and the other occupies a small area, which is called an acceleration switching device.
  • Each IGBT device includes a front MOS structure and a PN junction on the bottom surface.
  • the front MOS structure is composed of an N+ source and drain region, a P-type channel region, and an N-type drift region functioning as a source/drain region.
  • the PN junction structure of the bottom surface is composed of a P+/N+ bottom surface region and an N-type floating region.
  • a deep trench is opened by dry etching on the upper surface region of the wafer, and then a MOS structure is fabricated on the front side of the wafer using a conventional process, that is, using an N-type substrate wafer as a substrate, on the substrate
  • the impurity is doped and diffused to obtain a P-type region
  • a gate electrode is formed, an impurity is implanted and activated to obtain an N+-type source region, a protective medium is deposited on the upper surface of the resultant structure, a metallized wiring is opened after the contact hole is opened, and the upper surface is passivated.
  • the wafer is thinned from the back side, and the back side is implanted with doping, annealing, and metallization.
  • the backside exposure is performed by a double-sided lithography technique, and the deep trench is opened by the dry etching method from the back side corresponding to the position of the upper deep trench, so that the two IGBT devices are only connected at the connection region.
  • the two IGBT devices are diced and divided as a whole, and the IGBT devices independently lead out the electrodes, one big and one small
  • the IGBT devices are packaged together to obtain a connected IGBT device product.
  • two large and small IGBT devices are connected through a drift region connection portion to form a composite IGBT device.
  • the working state of the composite IGBT device is that the IGBT device is turned on and the IGBT device is turned off, and vice versa.
  • the carriers accumulated in the drift region can be flown from the main IGBT device region to the region where the IGBT device is accelerated, or the carrier is accelerated from the region of the accelerating IGBT device to the main switching device, thereby shortening
  • the on/off time of the master device increases the switching speed of the device and improves the performance of the IGBT device as a whole.
  • Composite IGBT devices have the performance of conventional IGBT devices, and the switching speed has been greatly improved, not the simple superposition of two IGBT devices.
  • Preferred Embodiment 3 As shown in Fig. 2, the composite IGBT device is connected by four conventional IGBT devices 7 through a drift region connection portion 4 to form a field-shaped structure.
  • Each IGBT device includes a front MOS structure and a PN junction on the bottom surface.
  • the front MOS structure is composed of an N+ source and drain region, a P-type channel region, and an N-type drift region functioning as a source/drain region.
  • the PN junction structure of the bottom surface is composed of a P+/N+ bottom surface region and an N-type drift region.
  • a deep trench is opened by dry etching on the upper surface region of the wafer, and then a MOS structure is fabricated on the front side of the wafer using a conventional process, that is, using an N-type substrate wafer as a substrate, on the substrate
  • the impurity is doped and diffused to obtain a P-type region
  • a gate electrode is formed, an impurity is implanted and activated to obtain an N+-type source region, a protective medium is deposited on the upper surface of the resultant structure, a metallized wiring is opened after the contact hole is opened, and the upper surface is passivated.
  • the wafer is thinned from the back.
  • the backside exposure is performed by a double-sided lithography technique, and the deep trench is opened by the dry etching method from the back side corresponding to the position of the upper deep trench, so that each two adjacent IGBT devices are only connected at the connection region.
  • the backside processing of conventional IGBT devices is performed. Namely: backside ion implantation doping, annealing and metallization.
  • the four IGBT devices are diced and divided as a whole, and the IGBT devices independently lead out the electrodes, and the four IGBT devices are collectively packaged to obtain a composite IGBT device product.
  • four IGBT devices are connected through a drift region connection portion to form a field-shaped connection.
  • the IGBT device the working state of the connected IGBT device is the state in which an IGBT device is turned on and the adjacent IGBT device is turned off, and vice versa.
  • Four IGBTs can be turned on and off.
  • the carriers accumulated in the drift region can flow from one IGBT device region to another IGBT device, which simultaneously shortens the on/off of the device and the speed of the adjacent device. , improve the performance of IGBT devices as a whole.
  • Composite IGBT devices have the performance of conventional IGBT devices, and the switching speed has been greatly improved, not the simple superposition of four IGBT devices.
  • the composite IGBT device is connected by four conventional IGBT devices through a drift region connection portion to form a field-shaped structure.
  • Each IGBT device includes a front MOS structure and a bottom PN junction.
  • the front MOS structure is composed of an N+ source and drain region, a P-type channel region, and an N-type drift region functioning as a source/drain region.
  • the PN junction structure of the bottom surface is composed of a P+/N+ bottom surface region and an N-type drift region.
  • the MOS structure is fabricated on the front side of the wafer using a conventional process, that is, using an N-type substrate wafer as a substrate, impurity doping and diffusion on the substrate to obtain a P-type region, fabrication of a gate, impurity implantation, and activation
  • a conventional process that is, using an N-type substrate wafer as a substrate, impurity doping and diffusion on the substrate to obtain a P-type region, fabrication of a gate, impurity implantation, and activation
  • An N+ type source region is obtained, a protective medium is deposited on the upper surface of the resultant structure, the contact hole is opened, and the upper surface is passivated.
  • a deep trench is opened by dry etching on the upper surface region of the wafer.
  • the backside processing of conventional IGBT devices is performed. That is: the wafer is thinned from the back side, and the backside is ion-doped, annealed, and metallized.
  • the backside exposure is performed by double-sided lithography, and the deep trench is opened by the dry etching method from the back side corresponding to the position of the upper deep trench, so that each two adjacent IGBT devices are only kept.
  • the connection area is connected.
  • the four devices are diced and divided as a whole, and the four IGBT devices are packaged together to obtain a connected IGBT device product.
  • the IGBT device in the upper left corner and the IGBT device in the lower right corner are connected in parallel to form a block; the IGBT device in the upper right corner and the IGBT device in the lower left corner are connected in parallel to form another block, forming two groups of blocks, which are connected to each other.
  • Siamese IGBT devices are used to form a block.
  • IGBT devices are connected through a drift region connection, and in the upper left corner of the IGBT device, from turn-on to turn-off, it accumulates carriers during turn-on, either to the upper right IGBT device region.
  • the bleeder can also be vented to the IGBT device area in the lower left corner, thus improving the bleed efficiency and further increasing the operating speed of the device.
  • Preferred Embodiment 5 As shown in FIG. 3, two composite IGBTs of complementary conductivity type can form a full bridge circuit to control the direction of current in the primary winding of the transformer, and serve as a module circuit for switching control of a core in a high quality power supply. .
  • the structure of the IGBT device can be regarded as a MOS device at the upper surface, and a PN junction structure at the lower surface, which is formed by the intermediate drift region, in Fig. 3, a PN junction and a MOS are used.
  • the device is used to schematically represent the IGBT.
  • Preferred Embodiment 6 As shown in FIG. 4, four composite IGBT devices of the same type, four of which constitute a full bridge circuit, control the current in the primary coil of the transformer.
  • the other four sub-devices can be used as a simple accelerating tube to speed up the operation of the circuit. They can also be connected in a similar, full-bridge circuit connection to control the current direction in the primary winding of the other transformer. Therefore, multiple voltage outputs can be obtained.
  • the IGBT devices constituting the connected structure in the present invention are spatially distinctly separated, for example, between 250 ⁇ m and 1 mm apart.
  • the sub-IGBT is a NPT (non-punch-through type) structure, and it is obvious that the sub-IGBT can also be replaced with a PT (punch-through) type, a field-off type, a trench IGBT, or a structure of a super junction device;
  • the device of the present invention can be made of a silicon material, and naturally can also be replaced by SiC, GaN, or other materials, and these should be covered by the scope of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of protection defined by the claims.

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Abstract

提供一种复合型连体IGBT功率器件，为解决现有器件开关速度不够高的问题而发明的。器件（1）包括至少漂移区（3）互相连通的两个IGBT器件，各IGBT器件独立引出电极。复合型连体IGBT器件也可以由四个漂移区（3）互相连通的IGBT器件组成。复合型IGBT器件也可以由四个漂移区（3）互相连通的IGBT器件组成。复合型IGBT器件也可以具体实现为一承担较大电流主开关器件的IGBT器件和一起到加速主器件开关切换作用的辅助IGBT器件的两个IGBT器件相连。其加工方法为在常规IGBT制造的基础上，增加开槽等少数几步工艺来得到的复合型IGBT器件。该器件及其制造方法加工成本低，简单易行，可利用两个或者多个IGBT器件开关速度相互促进而获得工作速度进一步提高的有益效果。

Description

说 明 书 复合型连体 IGBT器件及其加工方法
技术领域 本发明涉及一种复合型连体 IGBT功率器件及其加工方法。 背景技术
绝缘栅双极晶体管 （ IGBT )是当前主流的电力电子器件之一， 适合于中、 大功率的电力变换应用。 特别是在开关速度较快的情况下， 电源系统的体积、 重量都会大大降低， 而用电效率和转换质量都会有很大的提高。 因此从节能减 排和国民经济可持续发展的角度来看， 这是一类重要的电力变换和控制的基础 器件。
IGBT 绝缘栅双极晶体管可以看做是双极晶体管和场效应晶体管两种结构 的复合体，也可以看做是晶圆片上表面处制作的 MOS器件与晶圆片底面所制作 的 PN结二极管的结合。 上、 下表面处的 MOS器件与二极管， 是通过一个半导 体材料 N-漂移区连结在一起的。 当半导体材料 N-漂移区比较长时（即晶圓片比 较厚时）， IGBT器件的耐压较高； 否则耐压比较低。 传统制作非穿通型 IGBT器件的方法分为两个步骤，可以称作是前道工艺和 后道工艺。 前道工艺加工晶圓片的上表面 （也称晶圓片正面）， 而后道工艺加工 其底面 （也称晶圓片的背面）。 在前道工艺中， 在一个晶圓片上同时制作出多个 MOS器件结构， 在所有工艺完成后， 对正面器件结构进行一定的钝化保护， 然 后转到后 il 口工。后道加工包括晶圓片从背面减薄（至适合于耐压要求的厚度）， 对整个背面进行离子注入， 注入杂质退火激活， 背面金属化， 以及划片切割、 电极压焊与封装等， 得到商品 IGBT器件。 但当前 IGBT器件的主要问题是器件 工作的开关速度仍不够高。 发明内容 为了克服上述的缺陷， 本发明提供一种开关速度更高的连体 IGBT器件。 为达到上述目的，一方面， 本发明提供一种复合型的 IGBT器件， 所述器件 包括至少两个 IGBT器件， 两个 IGBT器件的漂移区互相连通， 各 IGBT器件独 立引出电极。 特别是， 所述复合型 IGBT器件由四个 IGBT器件组成田字形， 每个 IGBT 器件分别与相连的 IGBT器件连通漂移区。 进一步， 左上角的 IGBT器件和右下角的 IGBT器件并联形成第一组块， 右 上角的 IGBT器件和左下角的 IGBT器件并联形成第二组块， 两个组块分别处于 开通和关断的工作状态。
特别是， 所述复合型 IGBT器件由面积尺寸相同或不同的 IGBT器件组成。 当子器件尺寸不同时，一 IGBT器件占较大的芯片面积，作为承担较大的电流的 主开关器件，相连的另一 IGBT器件占较小的芯片面积，作为起到加速主器件开 关切换作用的辅助器件。
特别是， 所述复合型 IGBT器件， 构成复合型结构的各子 IGBT器件在空间 上是显著分开的， 各子器件之间， 除了在上、 下表面处开深槽隔离之外， 其他 的隔离技术还包括做场环， 场板等， 以及这些隔离技术的某种组合。
另一方面， 本发明提供一种复合型 IGBT器件的加工方法， 包括下述步骤：
8.1在第一导电类型的衬底晶圆片上， 通过杂质掺杂和扩散得到第二导电类 型的沟道区； 制备栅极， 通过杂盾注入及掺杂激活工艺得到第一导电类型的源 区； 淀积保护介质层， 开接触孔， 金属化布线， 上表面钝化；
8.2在步骤 8.1之前、 之中或之后， 在上表面开上槽， 淀积钝化层保护棵露 部分；
8.3将晶圆片背面减薄；
8.4背面离子注入掺杂、 退火、 金属化； 8.5在步骤 8.4之前、 之中或之后， 在背面对应上槽的位置处开背槽；
8.6划片， 复合型 IGBT器件的各组成器件独立引出电极； 封装。 特别是， 步驟 8.2中开上槽使用的是湿法腐蚀、 干法刻蚀、 干湿法复合刻蚀 或激光烧蚀的方法。 特别是， 步驟 8.5中开背槽的步骤为：
8.5.1对应上槽的位置处在背面采用双面对准光刻技术进行曝光；
8.5.2使用湿法腐蚀、 干法刻蚀、干湿法复合刻蚀或激光烧蚀的方法开背槽。 最后， 本发明复合型 IGBT器件是通过连接部将 IGBT器件的 N-漂移区相 连而形成， 复合型 IGBT的使用特征为， 两个或两组 IGBT器件工作于此开彼关 /此关彼开的方式， 因而 IGBT器件的开关速度可以相互促进， 获得工作速度进 一步提高的有益效果。 本发明复合型 IGBT器件的加工方法在现有 IGBT器件加工方法的基础上增 加了开槽等少数工艺步骤， 实现了复合型 IGBT器件的加工。 加工成本低， 简单 易行。 在另一方面， 如果实际应用中， 下表面处的两个子 IGBT器件的发射极电 极连接至相同的电位， 则只要保证两子器件之间充分隔离， 也可以不采取开槽 的工艺， 这样实现起来会更容易一些。 附图说明 图 1为本发明优选实施例一结构示意图。 图 2为本发明优选实施例三结构示意图。
图 3为优选实施例五的示意图。 图 4为优选实施例六的示意图。 图中， 当 1为 N+型导电区时， 2为 P型半导体区， 3为 N-区， 4为 N-连接 区， 5为 P或 P+区， 6为栅， 7为构成复合型 IGBT的子器件， 8为上表面处进 行隔离的深槽。
当 1为 P+型导电区时， 2为 N型半导体区， 3为 P-区， 4为 P-连接区， 5 为 N或 N+区， 6为栅， 7为构成复合型 IGBT的子器件， 8为上表面处进行隔离 的深槽。
图中， 11为最底面为 P+区的 NPT型的复合型 IGBT器件， 12为最底面为 N+区的 NPT型的复合型 IGBT器件， 13为变压器。
具体实施方式
下面结合说明书附图和优选实施例对本发明做详细描述。
优选实施例一： 如图 1所示， 复合型 IGBT器件由两个常规 IGBT器件通过 漂移区连接部 4相连组成， IGBT器件包括正面的 MOS结构和底面的 PN结。 其中， 正面的 MOS结构由 N+源漏区 1、 P型沟道区 2和起到源漏区作用的 N 型漂移区 3构成。 底面的 PN结结构是由 P+底面区 5和 N型漂移区 3构成。
使用常规工艺在晶圆片正面制造 MOS结构。 即： 使用 N-型的衬底晶圓片 作为衬底， 在衬底上杂质摻杂和扩散得到 P型区 2 , 制作栅极 6， 杂质注入及激 活得到 N+型源区 1 , 在所得结构的上表面淀积保护介质， 开接触孔后金属化布 线， 上表面钝化。 在两个 IGBT器件之间的区域用湿法腐蚀的方法开上深槽，然后淀积钝化层 保护棵露部分。
进行常规 IGBT器件的背面加工工艺。 即： 将晶圓片从背面减薄， 背面离子 注入掺杂、 退火及金属化。
采用双面对准的光刻技术进行背面曝光，对两个 IGBT器件的连接区从背面 用湿法腐蚀方法开背深槽。
将两个 IGBT器件作为一个整体进行划片分割出来，各 IGBT器件独立引出 电极。源区引出 IGBT器件的发射极，底面区引出 IGBT器件的收集极。两个 IGBT 器件共同封装得到连体 IGBT器件产品。
本优选实施例中将两个 IGBT 器件通过漂移区连接部相连接形成复合型的 或连体的 IGBT器件， 连体 IGBT器件的工作状态是第一 IGBT器件开而第二 IGBT器件关的状态， 反之亦然。 当第一 IGBT器件由开到关、 第二 IGBT器件 由关到开进行开关状态的切换时， 由于第一 IGBT器件 N-区中积累的载流子可 以迅速地排出到第二 IGBT器件的 N-区， 所以第一 IGBT器件的关断速度会有 所提升， 而第二 IGBT器件的开通速度同样有所提升。这样就从总体上提高了整 体器件的开关速度。 复合型 IGBT器件具有常规 IGBT器件的性能， 而在开关速 度上有了很大的提高， 并不是两个 IGBT器件的简单迭加。 当前 IGBT器件用做 逆变电源时的工作频率一般在 20kHz左右， 本优选实施例中连体 IGBT器件的 工作频率可提高至 30-50kHz， 甚至更高。
优选实施例二： 复合型 IGBT器件由两个常规 IGBT器件通过漂移区连接部 相连组成。 但是这两个常规 IGBT器件一个占据较大的面积， 称作主开关器件； 而另一个占据较小的面积， 称作加速开关器件。 各 IGBT器件包括正面的 MOS 结构和底面的 PN结。 其中， 正面的 MOS结构由 N+源漏区、 P型沟道区和起到 源漏区作用的 N型漂移区构成。 底面的 PN结结构是由 P+/N+底面区和 N型漂 移区构成。
在晶圓片上表面区域用干法刻蚀的方法开上深槽， 然后使用常规工艺在晶 圆片正面制造 MOS结构， 即： 使用 N-型的衬底晶圆片作为衬底， 在衬底上杂 质掺杂和扩散得到 P型区， 制作栅极， 杂质注入及激活得到 N+型源区， 在所得 结构的上表面淀积保护介质， 开接触孔后金属化布线， 上表面钝化。
进行常规 IGBT器件的背面加工工艺。 即： 将晶圓片从背面减薄， 背面离子 注入掺杂、 退火及金属化。
采用双面对准的光刻技术进行背面曝光， 对应着上深槽的位置从背面用干 法刻蚀方法开背深槽， 令两个 IGBT器件仅保持连接区处相连。 将两个 IGBT器 件作为一个整体进行划片分割出来，各 IGBT器件独立引出电极，一大一小两个 IGBT器件共同封装得到连体的 IGBT器件产品。
本优选实施例中将两个一大一小的 IGBT 器件通过漂移区连接部相连接形 成复合型 IGBT器件，复合型 IGBT器件的工作状态是此 IGBT器件开而彼 IGBT 器件关的状态， 反之亦然。 在主器件开关状态切换的瞬间， 漂移区中所积累的 载流子可以由主 IGBT器件区域流向加速 IGBT器件的区域， 或者从加速 IGBT 器件的区域向主开关器件补充载流子， 就縮短了主器件开 /关的时间， 提高了器 件的开关速度， 整体性地提升 IGBT器件的工作性能。 复合型 IGBT器件具有常 规 IGBT器件的性能， 而在开关速度上有了很大的提高， 并不是两个 IGBT器件 的简单迭加。 优选实施例三： 如图 2所示， 复合型 IGBT器件由四个常规 IGBT器件 7通 过漂移区连接部 4相连组成田字形结构。 各 IGBT器件包括正面的 MOS结构和 底面的 PN结。 其中， 正面的 MOS结构由 N+源漏区、 P型沟道区和起到源漏区 作用的 N型漂移区构成。 底面的 PN结结构是由 P+/N+底面区和 N型漂移区构 成。
在晶圓片上表面区域用干法刻蚀的方法开上深槽， 然后使用常规工艺在晶 圆片正面制造 MOS结构， 即： 使用 N-型的衬底晶圆片作为衬底， 在衬底上杂 质掺杂和扩散得到 P型区， 制作栅极， 杂质注入及激活得到 N+型源区， 在所得 结构的上表面淀积保护介质， 开接触孔后金属化布线， 上表面钝化。
将晶圓片从背面减薄。 采用双面对准的光刻技术进行背面曝光， 对应着上 深槽的位置从背面用干法刻蚀方法开背深槽，令每两个相邻的 IGBT器件仅保持 连接区处相连。 进行常规 IGBT器件的背面加工工艺。 即： 背面离子注入掺杂、 退火及金属化。 将四个 IGBT器件作为一个整体进行划片分割出来，各 IGBT器件独立引出 电极， 四个 IGBT器件共同封装得到复合型 IGBT器件产品。 本优选实施例中将四个 IGBT 器件通过漂移区连接部相连接形成田字形连 体 IGBT器件， 连体 IGBT器件的工作状态是某一 IGBT器件开而与之相邻的 IGBT器件关的状态， 反之亦然。 四个 IGBT可轮转进行导通和关断。 在开关状 态切换的瞬间， 漂移区中所积累的载流子可以由一个 IGBT 器件区域流向另一 IGBT 器件的区域， 就同时缩短了此器件开 /关以及与之相邻器件关 /开的速度， 整体性地提升 IGBT器件的工作性能。 复合型 IGBT器件具有常规 IGBT器件的 性能， 而在开关速度上有了很大的提高， 并不是四个 IGBT器件的简单迭加。 优选实施例四： 复合型 IGBT器件由四个常规 IGBT器件通过漂移区连接部 相连组成田字形结构。 各 IGBT器件包括正面的 MOS结构和底面的 PN结。 其 中， 正面的 MOS结构由 N+源漏区、 P型沟道区和起到源漏区作用的 N型漂移 区构成。 底面的 PN结结构是由 P+/N+底面区和 N型漂移区构成。
使用常规工艺在晶圓片正面制造 MOS结构， 即： 使用 N-型的衬底晶圓片 作为衬底， 在衬底上杂质掺杂和扩散得到 P型区， 制作栅极， 杂质注入及激活 得到 N+型源区， 在所得结构的上表面淀积保护介质， 开接触孔后金属化布线， 上表面钝化。 在此过程中， 在晶圆片上表面区域用干法刻蚀的方法开上深槽。 进行常规 IGBT器件的背面加工工艺。 即： 将晶圓片从背面减薄， 背面离子 注入掺杂、 退火及金属化。 在此过程中， 釆用双面对准的光刻技术进行背面曝 光， 对应着上深槽的位置从背面用干法刻蚀方法开背深槽， 令每两个相邻的 IGBT器件仅保持连接区处相连。 将四个器件作为一个整体进行划片分割出来，四个 IGBT器件共同封装得到 连体 IGBT器件产品。 位于左上角的 IGBT器件和右下角的 IGBT器件并联在一 起， 构成一个组块； 右上角的 IGBT器件和左下角的 IGBT器件并联构成另一个 组块， 形成的是两组块、 彼此连体的连体 IGBT器件。 本优选实施例中将四个 IGBT 器件通过漂移区连接部相连接， 以左上角 IGBT器件由开通到关闭的转换而论， 其在开通期间所积聚载流子， 既可以向右 上角 IGBT器件区泄放， 也可以向左下角 IGBT器件区泄放， 因此可提高泄放效 率， 进一步提升器件的工作速度。 优选实施例五： 如图 3所示， 两个导电类型互补的复合型 IGBT可以组成一 个全桥电路， 控制变压器初级线圏中的电流的方向， 作为高品质电源中核心的 开关控制的模块电路。 由于 IGBT器件的结构可以看成是上表面处的一个 MOS 器件， 和下表面处的一个 PN结结构， 通过中间的漂移区相连接构成， 所以在图 3中， 是用一个 PN结和一个 MOS器件来示意性地表示 IGBT的。
优选实施例六： 如图 4所示， 4个相同类型的复合型 IGBT器件， 其中的 4 个子器件构成一个全桥电路， 控制变压器初级线圈中的电流。 另外的 4个子器 件既可以作为单纯的加速管， 起到加快电路工作速度的作用； 也可以按照类似 的、 全桥电路的连接方式相连接， 控制另一个变压器的初级线圏的中的电流方 向， 因而可以得到多路电压输出。 本发明中构成连体结构的各 IGBT器件在空间上是显著分开的 ,例如其间隔 在 250微米至 1毫米之间。
以上， 仅为本发明的较佳实施例， 但本发明的保护范围并不局限于此， 任 何熟悉本技术领域的技术人员在本发明揭露的技术范围内， 可轻易想到的变化 或替换， 例如， 本发明示意图中， 子 IGBT为 NPT (非穿通型） 的结构， 显然 子 IGBT也可以换用 PT (穿通）型， 场截止型， 沟槽 IGBT, 抑或超结器件的结 构等； 又如， 本发明中的器件， 可以采用硅材料制作， 自然也可换用 SiC, GaN, 或其他材料制作等， 这些都应涵盖在本发明的保护范围之内。 因此， 本发明的 保护范围应该以权利要求所界定的保护范围为准。

Claims

权 利 要 求 书
1、一种复合型连体 IGBT器件， 其特征在于， 所述器件包括至少两个 IGBT 器件， 两个 IGBT器件的漂移区互相连通， 各 IGBT器件独立引出电极。
2、 根据权利要求 1所述的复合型连体 IGBT器件， 其特征在于， 所述复合 型 IGBT器件由四个 IGBT器件组成田字形，每个 IGBT器件分别与相连的 IGBT 器件连通漂移区。
3、 根据权利要求 2所述的复合型连体 IGBT器件， 其特征在于， 左上角的 IGBT器件和右下角的 IGBT器件并联形成第一组块， 右上角的 IGBT器件和左 下角的 IGBT器件并联形成第二组块。
4、 根据权利要求 1所述的复合型连体 IGBT器件， 其特征在于， 所述复合 型 IGBT器件由两个面积尺寸相同或不同的 IGBT器件组成。
5、 根据权利要求 1所述的复合型连体 IGBT器件， 其特征在于， 所述复合 型 IGBT器件由两个面积尺寸不同的 IGBT器件组成； 其中一 IGBT器件占较大 的芯片面积，作为承担较大的电流的主开关器件，相连的另一 IGBT器件占较小 的芯片面积， 作为起到加速主器件开关切换作用的辅助器件。
6、 根据权利要求 1所述的复合型连体 IGBT器件， 其特征在于， 所述构成 连体结构的各 IGBT器件在空间上的间隔大于 250微米。
7、 根据权利要求 1所述的复合型连体 IGBT器件， 其特征在于， 所述的各 IGBT器件通过拉开空间间距、 做场环、 场板中的一种或其组合进行隔离的。
8、 一种复合性连体 IGBT器件的加工方法， 其特征在于， 包括下述步骤：
8.1在第一导电类型的衬底晶圆片上， 通过杂质掺杂和扩散得到第二导电类 型的沟道区； 制备栅极， 通过杂质注入及掺杂激活工艺得到第一导电类型的源 区； 淀积保护介质层， 开接触孔， 金属化布线， 上表面钝化；
8.2在步骤 8.1之前、 之中或之后， 在上表面开上槽， 淀积钝化层保护棵露 部分；
8.3将晶圆片背面减薄；
8.4背面离子注入掺杂、 退火、 金属化；
8.5在步驟 8.4之前、 之中或之后， 在背面对应上槽的位置处开背槽； 8.6划片， 复合型 IGBT器件的各组成器件独立引出电极； 封装。
9、根据权利要求 8所述的复合型连体 IGBT器件的加工方法，其特征在于， 步骤 8.2中开上槽使用的是湿法腐蚀、干法刻蚀、 干湿法复合刻蚀或激光烧独的 方法。
10、根据权利要求 8所述的复合型连体 IGBT器件的加工方法，其特征在于， 步驟 8.5中开背槽的步驟为：
8.5.1对应上槽的位置处在背面采用双面对准光刻技术进行曝光；
8.5.2使用湿法腐蚀、 干法刻蚀、干湿法复合刻蚀或激光烧蚀的方法开背槽。
11、 复合型连体 IGBT器件的应用方式， 其特征在于， 复合型 IGBT中一个 或一组子器件开通时， 另一个或一组 IGBT子器件刚好关断，这样两部分器件的 开通-关断速度可以支到相互促进。
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