JP4748149B2 - 半導体装置 - Google Patents
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- JP4748149B2 JP4748149B2 JP2007331261A JP2007331261A JP4748149B2 JP 4748149 B2 JP4748149 B2 JP 4748149B2 JP 2007331261 A JP2007331261 A JP 2007331261A JP 2007331261 A JP2007331261 A JP 2007331261A JP 4748149 B2 JP4748149 B2 JP 4748149B2
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- 239000004065 semiconductor Substances 0.000 title claims description 268
- 239000010410 layer Substances 0.000 claims description 109
- 239000000758 substrate Substances 0.000 claims description 47
- 238000002955 isolation Methods 0.000 claims description 17
- 239000012212 insulator Substances 0.000 claims description 12
- 239000012535 impurity Substances 0.000 claims description 9
- 239000002344 surface layer Substances 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 20
- 238000001514 detection method Methods 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000008186 active pharmaceutical agent Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000000926 separation method Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000003334 potential effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7815—Vertical DMOS transistors, i.e. VDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7826—Lateral DMOS transistors, i.e. LDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
R1,R2 抵抗
C1m〜C4m メインセル
C1s〜C6s センスセル
Dm メインセルのドレイン端子
Ds センスセルのドレイン端子
10〜13 半導体基板
1 N型半導体層
20〜25 分離領域
1m 第1領域
1s,1sa,1sb 第2領域
2C,2Ca PNコラム層
2p,2pa P型コラム
2n,2na N型コラム
3 P型半導体層
Claims (12)
- 絶縁ゲートトランジスタが半導体基板に複数のセルの集合体として形成されてなる半導体装置であって、
前記複数のセルが、負荷への電流を供給するための多数のメインセルと、前記メインセルに流れる電流を検出するための少数のセンスセルとからなり、
前記メインセルのゲート端子と前記センスセルのゲート端子とが共通接続され、
前記メインセルのソース端子と前記センスセルのソース端子とが低電位側で共通接続され、
抵抗の一方の端子が前記センスセルのドレイン端子に共通接続され、該抵抗のもう一方の端子と前記メインセルのドレイン端子とが高電位側で共通接続されてなり、
前記抵抗の電位を検出して、前記絶縁ゲートトランジスタのゲート電圧をフィードバック制御する半導体装置において、
前記半導体基板の厚さ方向において、
第1導電型コラムと第2導電型コラムが当接して交互に繰り返し配置されてなるPNコラム層が形成され、
前記PNコラム層の第1界面に当接して、第2導電型半導体層が形成され、
前記PNコラム層の第2界面に当接して、第1導電型半導体層が形成されてなり、
前記絶縁ゲートトランジスタが、
前記第2導電型コラムをドリフト領域とし、前記第2導電型半導体層をドレイン領域とし、前記第1導電型半導体層をチャネル形成層とし、前記第1導電型半導体層の表層部に形成された第2導電型領域をソース領域とする、縦型の絶縁ゲートトランジスタであって、
前記第2導電型半導体層を貫通して前記第1導電型コラムに達する分離領域が、基板面内において前記センスセルを取り囲むようにして形成されてなり、
該分離領域により、前記第2導電型半導体層が、前記メインセルのドレイン端子が接続される第1領域と前記センスセルのドレイン端子が接続される第2領域に電気的に分離されてなることを特徴とする半導体装置。 - 前記PNコラム層が、前記半導体基板の基板面内において、
前記第1導電型コラムと前記第2導電型コラムのストライプの繰り返しパターン形状に設定されてなることを特徴とする請求項1に記載の半導体装置。 - 前記PNコラム層が、前記半導体基板の基板面内において、
前記第1導電型コラムに取り囲まれた前記第2導電型コラムの円もしくは多角形の繰り返しパターン形状に設定されてなることを特徴とする請求項1に記載の半導体装置。 - 前記絶縁ゲートトランジスタが、
前記第1導電型半導体層を貫通して前記第2導電型コラムに達するトレンチ構造の絶縁ゲート電極を有する、
トレンチゲート型の絶縁ゲートトランジスタであることを特徴とする請求項1乃至3のいずれか一項に記載の半導体装置。 - 前記分離領域が、第1導電型半導体領域からなることを特徴とする請求項1乃至4のいずれか一項に記載の半導体装置。
- 前記分離領域が、絶縁体領域からなることを特徴とする請求項1乃至4のいずれか一項に記載の半導体装置。
- 前記絶縁体領域が、
基板面内において前記センスセルを取り囲むようにして形成されてなる、前記第2導電型半導体層を貫通して前記第1導電型コラムに達するトレンチと該トレンチ内に埋め込まれた絶縁体とで構成されてなることを特徴とする請求項6に記載の半導体装置。 - 前記絶縁体領域が、
基板面内において前記センスセルを取り囲むようにして形成されてなる、前記第2導電型半導体層を貫通して前記第1導電型コラムに達するトレンチと該トレンチ上に形成された絶縁膜とで構成されてなることを特徴とする請求項6に記載の半導体装置。 - 前記第2領域の不純物濃度が、前記第1領域の不純物濃度より低く設定されてなり、
前記第2領域が、前記抵抗として機能することを特徴とする請求項1乃至8のいずれか一項に記載の半導体装置。 - 前記第2領域の幅が、前記第2導電型コラムの幅より狭く設定されてなり、
前記第2領域が、前記抵抗として機能することを特徴とする請求項1乃至8のいずれか一項に記載の半導体装置。 - 前記縦型の絶縁ゲートトランジスタが、パワーMOSFETであることを特徴とする請求項1乃至10のいずれか一項に記載の半導体装置。
- 前記半導体装置が、車載用であることを特徴とする請求項1乃至11のいずれか一項に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2007331261A JP4748149B2 (ja) | 2007-12-24 | 2007-12-24 | 半導体装置 |
US12/292,351 US7932553B2 (en) | 2007-12-24 | 2008-11-18 | Semiconductor device including a plurality of cells |
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JP2007331261A JP4748149B2 (ja) | 2007-12-24 | 2007-12-24 | 半導体装置 |
Publications (2)
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JP2009152506A JP2009152506A (ja) | 2009-07-09 |
JP4748149B2 true JP4748149B2 (ja) | 2011-08-17 |
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JP2007331261A Expired - Fee Related JP4748149B2 (ja) | 2007-12-24 | 2007-12-24 | 半導体装置 |
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JP (1) | JP4748149B2 (ja) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
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US9437729B2 (en) | 2007-01-08 | 2016-09-06 | Vishay-Siliconix | High-density power MOSFET with planarized metalization |
US9947770B2 (en) | 2007-04-03 | 2018-04-17 | Vishay-Siliconix | Self-aligned trench MOSFET and method of manufacture |
US9484451B2 (en) | 2007-10-05 | 2016-11-01 | Vishay-Siliconix | MOSFET active area and edge termination area charge balance |
US9443974B2 (en) * | 2009-08-27 | 2016-09-13 | Vishay-Siliconix | Super junction trench power MOSFET device fabrication |
US9431530B2 (en) | 2009-10-20 | 2016-08-30 | Vishay-Siliconix | Super-high density trench MOSFET |
KR102181898B1 (ko) | 2010-12-17 | 2020-11-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 산화물 재료 및 반도체 장치 |
JP5757101B2 (ja) | 2011-02-17 | 2015-07-29 | 富士電機株式会社 | 超接合半導体素子 |
JP5875680B2 (ja) * | 2012-05-29 | 2016-03-02 | 三菱電機株式会社 | 絶縁ゲート型バイポーラトランジスタ |
US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
JP5758365B2 (ja) * | 2012-09-21 | 2015-08-05 | 株式会社東芝 | 電力用半導体素子 |
CN102956638B (zh) * | 2012-11-13 | 2015-04-15 | 清华大学 | 连体igbt器件及其加工方法 |
US9123701B2 (en) | 2013-07-11 | 2015-09-01 | Infineon Technologies Austria Ag | Semiconductor die and package with source down and sensing configuration |
US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
US9882044B2 (en) | 2014-08-19 | 2018-01-30 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
WO2016028943A1 (en) | 2014-08-19 | 2016-02-25 | Vishay-Siliconix | Electronic circuit |
JP6622611B2 (ja) * | 2016-02-10 | 2019-12-18 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US10147790B2 (en) * | 2016-06-21 | 2018-12-04 | Semiconductor Components Industries, Llc | Method of forming a semiconductor device and structure therefor |
JP6693438B2 (ja) * | 2017-02-15 | 2020-05-13 | 株式会社デンソー | 半導体装置 |
IT201700046614A1 (it) * | 2017-04-28 | 2018-10-28 | St Microelectronics Srl | Dispositivo mos di potenza con sensore di corrente integrato e relativo processo di fabbricazione |
CN108198851B (zh) * | 2017-12-27 | 2020-10-02 | 四川大学 | 一种具有载流子存储效应的超结igbt |
CN113130639A (zh) * | 2019-12-31 | 2021-07-16 | 比亚迪半导体股份有限公司 | 集成电流检测结构的igbt器件及制备方法 |
CN112071914B (zh) * | 2020-09-24 | 2022-04-08 | 电子科技大学 | 带有mos单元和电压感测及控制单元的半导体器件 |
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JP4843843B2 (ja) * | 2000-10-20 | 2011-12-21 | 富士電機株式会社 | 超接合半導体素子 |
JP3647802B2 (ja) * | 2001-01-25 | 2005-05-18 | 株式会社東芝 | 横型半導体装置 |
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DE112004001163B4 (de) * | 2003-08-20 | 2017-12-28 | Denso Corporation | Halbleiteranordnung eines vertikalen Typs |
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2007
- 2007-12-24 JP JP2007331261A patent/JP4748149B2/ja not_active Expired - Fee Related
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2008
- 2008-11-18 US US12/292,351 patent/US7932553B2/en not_active Expired - Fee Related
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US20090159963A1 (en) | 2009-06-25 |
US7932553B2 (en) | 2011-04-26 |
JP2009152506A (ja) | 2009-07-09 |
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