WO2013145979A1 - めっき処理方法、めっき処理システムおよび記憶媒体 - Google Patents
めっき処理方法、めっき処理システムおよび記憶媒体 Download PDFInfo
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- WO2013145979A1 WO2013145979A1 PCT/JP2013/054505 JP2013054505W WO2013145979A1 WO 2013145979 A1 WO2013145979 A1 WO 2013145979A1 JP 2013054505 W JP2013054505 W JP 2013054505W WO 2013145979 A1 WO2013145979 A1 WO 2013145979A1
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- WIPO (PCT)
- Prior art keywords
- plating
- layer
- substrate
- vacuum deposition
- plating layer
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 89
- 238000003860 storage Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 205
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- 239000003054 catalyst Substances 0.000 claims abstract description 38
- 230000008569 process Effects 0.000 claims description 54
- 238000001179 sorption measurement Methods 0.000 claims description 29
- 238000009792 diffusion process Methods 0.000 claims description 12
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- 229910052751 metal Inorganic materials 0.000 description 6
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- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
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- 239000006087 Silane Coupling Agent Substances 0.000 description 3
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- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 2
- 229910018503 SF6 Inorganic materials 0.000 description 2
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- 239000010703 silicon Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
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- 238000009623 Bosch process Methods 0.000 description 1
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- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
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- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 1
- XTVVROIMIGLXTD-UHFFFAOYSA-N copper(II) nitrate Chemical compound [Cu+2].[O-][N+]([O-])=O.[O-][N+]([O-])=O XTVVROIMIGLXTD-UHFFFAOYSA-N 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- PEVJCYPAFCUXEZ-UHFFFAOYSA-J dicopper;phosphonato phosphate Chemical compound [Cu+2].[Cu+2].[O-]P([O-])(=O)OP([O-])([O-])=O PEVJCYPAFCUXEZ-UHFFFAOYSA-J 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
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- 238000009713 electroplating Methods 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
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- 230000006872 improvement Effects 0.000 description 1
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- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- HPGGPRDJHPYFRM-UHFFFAOYSA-J tin(iv) chloride Chemical compound Cl[Sn](Cl)(Cl)Cl HPGGPRDJHPYFRM-UHFFFAOYSA-J 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/18—Pretreatment of the material to be coated
- C23C18/1851—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material
- C23C18/1872—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment
- C23C18/1886—Multistep pretreatment
- C23C18/1893—Multistep pretreatment with use of organic or inorganic compounds other than metals, first
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/38—Coating with copper
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
- C23C28/322—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer only coatings of metal elements only
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
Definitions
- the present invention relates to a plating method, a plating system, and a storage medium for plating a substrate.
- LSIs semiconductor devices such as LSIs are required to have higher density in order to cope with problems such as space saving of mounting area and improvement of processing speed.
- a multilayer wiring technique for manufacturing a multilayer substrate such as a three-dimensional LSI by stacking a plurality of wiring substrates is known.
- a through via hole penetrating the wiring board and embedded with a conductive material such as copper (Cu) is provided in the wiring board.
- a conductive material such as copper (Cu)
- An electroless plating method is known as an example of a technique for producing a through via hole in which a conductive material is embedded.
- a substrate having a recess is prepared, and then a barrier film as a Cu diffusion prevention film is formed in the recess of the substrate, and a seed film is not formed on the barrier film.
- a method of forming by electrolytic Cu plating is known. Thereafter, Cu is embedded in the recesses by electrolytic Cu plating, and the substrate embedded with Cu is thinned by a polishing method such as chemical mechanical polishing, thereby producing a wiring substrate having a through via hole embedded with Cu.
- a catalyst is adsorbed on the board in advance to form a catalyst adsorption layer, and a plating process is performed on the catalyst adsorption layer to thereby form a Co—WB layer.
- a barrier film made of is obtained.
- the barrier film is then baked to remove internal moisture and to strengthen the intermetallic bond.
- the barrier film as the Cu diffusion preventing film is formed by plating, and then baked to enhance the moisture removal inside and the bond between metals.
- the substrate has a recess, and the barrier film as the Cu diffusion preventing film is formed on the inner surface of the recess and on the outer surface of the substrate outside the recess.
- the barrier film formed on the outer surface of the substrate may be peeled off by an external force or the like acting on the substrate during substrate processing. In this case, a defect occurs in the manufactured multilayer substrate.
- the present invention has been made in consideration of the above points.
- a plating layer such as a barrier film is formed on a substrate by plating
- the plating layer formed on the outer surface of the substrate outside the recesses is formed from the substrate.
- An object is to provide a plating method, a plating system, and a storage medium that do not peel.
- the present invention relates to a plating method for performing a plating process on a substrate, a step of preparing the substrate, a step of performing a vacuum deposition process on the substrate to form a vacuum deposition process layer on the substrate, A plating process using a plating solution to form a plating layer having a specific function on the vacuum deposition layer.
- the present invention relates to a plating system that performs plating on a substrate, and performs vacuum deposition processing on the substrate to form a vacuum deposition processing layer on the substrate surface, and plating on the substrate.
- the substrate is transported between a plating layer forming unit that forms a plating layer having a specific function on the vacuum deposition processing layer, a vacuum deposition processing layer forming unit, and a plating layer forming unit by performing plating using a liquid.
- a control unit that controls the substrate deposition unit, the vacuum deposition process layer forming unit, the plating layer forming unit, and the substrate transport unit.
- the present invention relates to a storage medium storing a computer program for causing a plating system to execute a plating method.
- the plating method includes: a step of preparing a substrate; And forming a plating layer having a specific function on the vacuum deposition treatment layer by performing a plating treatment on the substrate using a plating solution. Storage medium.
- the vacuum deposition process is performed on the substrate to form the vacuum deposition process layer on the substrate, the plating process is performed on the substrate, and the plating layer is formed on the vacuum deposition process layer.
- the vacuum deposition process layer is formed on the substrate as a base layer, and the surface of the substrate is smoothed by the vacuum deposition process layer as the base layer. For this reason, the plating layer can be formed on the substrate with good adhesion by the vacuum deposition treatment layer as an underlayer, and the plating layer is prevented from dropping or peeling off due to an external force acting on the substrate during the substrate processing. be able to.
- FIG. 1 is a block diagram illustrating a plating system according to an embodiment of the present invention.
- FIG. 2 is a flowchart showing a plating method in the embodiment of the present invention.
- FIGS. 3A to 3G are views showing a substrate on which a plating method according to an embodiment of the present invention is applied.
- FIG. 4 is a cross-sectional view showing a plating layer laminate as a Cu diffusion preventing film.
- FIG. 5 is a side sectional view showing a plating layer forming portion.
- FIG. 6 is a plan view showing a plating layer forming portion.
- FIG. 7 is a side cross-sectional view showing a plated layer baking portion.
- FIG. 8 is a side sectional view showing a vacuum deposition processing layer forming portion.
- FIG. 1 is a block diagram illustrating a plating system according to an embodiment of the present invention.
- FIG. 2 is a flowchart showing a plating method in the embodiment of the present invention.
- FIG. 9 is a cross-sectional view showing a plating layer laminate as a seed film showing a modification of the present invention.
- 10 (a) and 10 (b) are diagrams showing a vacuum deposition process layer formed on a substrate.
- FIG. 11 is a view showing a substrate on which a plating method according to a modification of the present invention is applied.
- the plating system 10 performs a plating process on a substrate (silicon substrate) 2 having a recess 2a such as a semiconductor wafer (see FIGS. 3A to 3G).
- Such a plating system 10 includes a cassette station 18 on which a cassette (not shown) containing the substrate 2 is placed, a substrate transfer arm 11 that takes out the substrate 2 from the cassette on the cassette station 18 and conveys it, And a travel path 11a on which the substrate transfer arm 11 travels.
- a vacuum deposition process is performed on the substrate 2 to form a vacuum deposition process layer 2 ⁇ / b> A on the surface of the substrate 2, and a vacuum deposition process layer 2 ⁇ / b> A of the substrate 2.
- a catalyst adsorption layer forming portion 13 to be formed and a plating layer forming portion 14 for forming plating layers 23a and 23b functioning as a Cu diffusion prevention film (barrier film) to be described later are disposed on the catalyst adsorption layer 22 of the substrate 2. Yes.
- An electroless Cu plating layer forming portion 16 for forming a functioning electroless copper plating layer (electroless Cu plating layer) 24 is disposed.
- an electrolysis for filling an electrolytic copper plating layer (electrolytic Cu plating layer) 25 with the electroless Cu plating layer 24 as a seed film in the recess 2a formed in the substrate 2 adjacent to the plating layer baked portion 15 is performed.
- a Cu plating layer forming part 17 is arranged.
- the first plating layer 23 a is baked in the plating layer baking unit 15. Further, in the plating layer forming part 14, the second plating layer 23 b is formed so as to overlap the baked first plating layer 23 a, and this second plating layer 23 b is baked in the plating layer baking part 15.
- the plating layer laminate 23 composed of the first plating layer 23a and the second plating layer 23b is formed on the catalyst adsorption layer 22 of the substrate 2.
- Both the first plating layer 23a and the second plating layer 23b of the plating layer laminate 23 having such a configuration function as a Cu diffusion prevention film (barrier film).
- each component of the plating processing system described above for example, the cassette station 18, the substrate transfer arm 11, the vacuum deposition processing layer forming unit 27, the adhesion layer forming unit 12, the catalyst adsorption layer forming unit 13, the plating layer forming unit 14, and the plating layer.
- the baking unit 15, the electroless Cu plating layer forming unit 16 and the electrolytic Cu plating layer forming unit 17 are all driven and controlled by the control unit 19 in accordance with various programs recorded in the storage medium 19 ⁇ / b> A provided in the control unit 19.
- the storage medium 19A stores various programs such as various setting data and a plating program described later.
- known media such as a computer-readable memory such as ROM and RAM, and a disk-shaped storage medium such as a hard disk, CD-ROM, DVD-ROM, and flexible disk can be used.
- a vacuum deposition treatment layer forming part 27 a plating layer forming part 14 for forming a first plating layer 23a and a second plating layer 23b functioning as a Cu diffusion preventing film (barrier film), a plating layer baking part 15 and The electroless Cu plating layer forming part 16 will be further described.
- the vacuum deposition processing layer forming unit 27 includes a hermetically sealed casing 27a, a substrate holder 27d provided inside the sealed casing 27a for holding the substrate 2, and a substrate held by the substrate holder 27d. And an evaporation source 27 ⁇ / b> A in which metal deposited on the two surfaces is stored.
- the sealed casing 27a is provided with a vacuum exhaust port 27b for evacuating the sealed casing 27a, and a vacuum pump (not shown) is connected to the vacuum exhaust port 27b, so that the sealed casing 27a functions as a vacuum chamber.
- a shutter 27c is provided between the substrate 2 held by the substrate holder 27d and the evaporation source 27A, and the heater 27e covers the substrate holder 27d above the substrate holder 27d. Is provided.
- a PVD process is performed on the substrate 2 and a vacuum deposition process layer 2A is formed on the substrate 2 by the PVD process.
- the vacuum deposition process layer 2A formed on the substrate 2 by the PVD process includes a vacuum deposition process layer formed by depositing Pd or Ru, and a vacuum deposition process layer formed by depositing PdN or RuN.
- a vacuum deposition process layer formed by depositing Ti or Ta, a vacuum deposition process layer formed by depositing TiN or TaN, or a vacuum deposition process layer formed by depositing Ru can be considered.
- a treatment layer such as a laminate of Pd and PdN, a laminate of Ru and RuN, a laminate of Ti and TiN, and a laminate of Ta and TaN can be considered.
- vacuum deposition processing layer forming unit 27 a CVD processing apparatus that forms the vacuum deposition processing layer 2A on the substrate 2 by CVD processing instead of PVD processing can be used.
- a processing layer formed by depositing Ru can be considered.
- the vacuum deposition process layer 2A is not limited to the metal as described above, and may be any metal that has adhesiveness with each layer on the vacuum deposition process layer 2A and is capable of electroless reaction. Good.
- the vacuum deposition processing layer 2A functions as a base layer, and the surface of the substrate 2 can be smoothed. For this reason, the adhesiveness of each layer on the vacuum evaporation processing layer 2A mentioned later, for example, the contact
- the plating layer forming part 14 and the electroless Cu plating layer forming part 16 can each be constituted by the plating treatment apparatuses 14 and 16 shown in FIGS.
- Such plating apparatuses 14 and 16 are as shown in FIG. 5 and FIG.
- the plating processing apparatuses 14 and 16 are provided with a substrate rotation holding mechanism (substrate housing portion) 110 for rotating and holding the substrate 2 inside the casing 101, and the surface of the substrate 2.
- Liquid supply mechanisms 30 and 90 for supplying a plating solution and a cleaning solution, a cup 105 for receiving a plating solution and a cleaning solution scattered from the substrate 2, and outlets 124 and 129 for discharging the plating solution and the cleaning solution received by the cup 105, 134, liquid discharge mechanisms 120, 125, and 130 for discharging the liquid collected at the discharge port, substrate rotation holding mechanism 110, liquid supply mechanisms 30, 90, cup 105, and liquid discharge mechanisms 120, 125, and 130 are controlled. And a control mechanism 160.
- the substrate rotation holding mechanism 110 includes a hollow cylindrical rotating shaft 111 extending vertically in the casing 101 and a turntable 112 attached to the upper end of the rotating shaft 111, as shown in FIGS. And a wafer chuck 113 that is provided on the outer peripheral portion of the upper surface of the turntable 112 and supports the substrate 2, and a rotation mechanism 162 that rotates the rotation shaft 111.
- the rotation mechanism 162 is controlled by the control mechanism 160, and the rotation shaft 111 is rotationally driven by the rotation mechanism 162, whereby the substrate 2 supported by the wafer chuck 113 is rotated.
- the liquid supply mechanisms 30 and 90 include a plating liquid supply mechanism 30 that supplies a plating liquid that performs plating on the surface of the substrate 2, a cleaning processing liquid supply mechanism 90 that supplies a cleaning processing liquid to the surface of the substrate 2, Is included.
- the discharge nozzle 32 is attached to the nozzle head 104.
- the nozzle head 104 is attached to the tip of an arm 103.
- the arm 103 can be extended in the vertical direction and is fixed to a support shaft 102 that is rotationally driven by a rotation mechanism 165.
- the plating solution supply pipe 33 of the plating solution supply mechanism 30 is disposed inside the arm 103. With such a configuration, the plating solution can be discharged from a desired height to any location on the surface of the substrate 2 via the discharge nozzle 32.
- the cleaning processing liquid supply mechanism 90 is used in the cleaning process of the substrate 2 and includes a nozzle 92 attached to the nozzle head 104 as shown in FIG. In this case, either the cleaning processing liquid or the rinsing processing liquid is selectively discharged from the nozzle 92 onto the surface of the substrate 2.
- liquid discharge mechanism 120, 125, and 130 for discharging the plating solution and the cleaning solution scattered from the substrate 2 will be described with reference to FIG.
- a cup 105 that is driven up and down by an elevating mechanism 164 and has outlets 124, 129, and 134 is disposed in the casing 101.
- the liquid discharge mechanisms 120, 125, and 130 discharge the liquid collected at the discharge ports 124, 129, and 134, respectively.
- the plating solution discharge mechanisms 120 and 125 have recovery flow paths 122 and 127 and waste flow paths 123 and 128 that are switched by flow path switches 121 and 126, respectively.
- the recovery channels 122 and 127 are channels for recovering and reusing the plating solution
- the discard channels 123 and 128 are channels for discarding the plating solution.
- the treatment liquid discharge mechanism 130 is provided with only the waste flow path 133.
- a recovery channel 122 of a plating solution discharge mechanism 120 that discharges the plating solution 35 is connected to the outlet side of the substrate storage unit 110.
- a cooling buffer 120 ⁇ / b> A for cooling the plating solution 35 is provided in the vicinity of the outlet side of the portion 110.
- the plating layer baking unit 15 includes a hermetically sealed casing 15a and a hot plate 15A disposed inside the sealed casing 15a.
- the inside of the sealed casing 15a is exhausted through the exhaust port 15b, and the inside of the sealed casing 15a can be maintained in an inert atmosphere by filling the inside of the sealed casing 15a with N 2 gas.
- a recess 2a is formed on a substrate (silicon substrate) 2 made of a semiconductor wafer or the like, and the substrate 2 on which the recess 2a is formed is transferred into the plating system 10 according to the present invention.
- a conventionally known method can be appropriately employed. Specifically, for example, as a dry etching technique, a general-purpose technique using a fluorine-based or chlorine-based gas or the like can be applied. In particular, a hole having a large aspect ratio (hole depth / hole diameter) is formed.
- ICP-RIE Inductively Coupled Plasma Reactive Ion Etching
- sulfur hexafluoride A method called a Bosch process in which an etching step using SF6) and a protection step using a Teflon-based gas such as C4F8 are repeated can be suitably employed.
- the vacuum deposition processing layer 2A is formed on the substrate 2 having the recess 2a (FIGS. 2 and 3A).
- the substrate 2 is subjected to PVD treatment, and the vacuum vapor deposition treatment layer 2A is formed on the substrate 2 by this PVD treatment.
- the vacuum deposition process layer 2 ⁇ / b> A may be formed on the substrate 2 by performing a CVD process on the substrate 2.
- the vacuum deposition process layer 2A functions as a base layer, smoothes the surface of the substrate 2, and then each layer and substrate formed on the substrate 2 2 can be improved.
- the substrate 2 is sent to the adhesion layer forming unit 12 by the substrate transfer arm 11.
- the adhesion layer 21 is formed on the vacuum deposition layer 2A of the substrate 2 having the recess 2a in the adhesion layer forming part 12 (FIG. 2 and FIG. 3B).
- the adhesion layer forming part 12 has a vacuum chamber (not shown) having a heating part, and in this adhesion layer forming part 12, a silane coupling agent or the like is formed on the vacuum deposition treatment layer 2A of the substrate 2 having the recess 2a.
- the coupling agent is adsorbed, and the adhesion layer 21 is thus formed on the substrate 2 (SAM treatment).
- SAM treatment The adhesion layer 21 formed by adsorbing the silane coupling agent improves the adhesion between the catalyst adsorption layer 22 and the substrate 2 described later.
- the substrate 2 on which the adhesion layer 21 is formed in the adhesion layer forming unit 12 is sent to the catalyst adsorption layer forming unit 13 by the substrate transfer arm 11.
- the catalyst adsorption layer forming unit 13 pd ions, for example, that serve as a catalyst are adsorbed on the adhesion layer 21 of the substrate 2 to form the catalyst adsorption layer 22 (FIG. 3C).
- a treatment in which a palladium chloride aqueous solution is sprayed onto the substrate 2 with a nozzle and Pd ions serving as a catalyst are adsorbed on the surface of the substrate 2 can be employed.
- a tin chloride solution is sprayed on the substrate 2 to adsorb tin ions on the surface of the substrate 2, and then an aqueous palladium chloride solution is sprayed on the substrate 2 to replace the tin ions with Pd ions, thereby replacing the Pd ions.
- sodium hydroxide is sprayed onto the substrate 2 to remove excess tin ions.
- the substrate 2 is sent to the plating layer formation unit 14 by the substrate transfer arm 11.
- a first plating layer 23a that functions as a Cu diffusion prevention film (barrier film) is formed on the catalyst adsorption layer 22 of the substrate 2 (see FIGS. 3D and 23). ).
- the plating layer forming unit 14 includes a plating apparatus as shown in FIGS. 5 and 6, and forms the first plating layer 23 a by performing an electroless plating process on the catalyst adsorption layer 22 of the substrate 2. be able to.
- a plating solution containing Co—WB can be used as the plating solution, and the temperature of the plating solution is kept at 40 to 70 ° C. Yes.
- the first plating layer 23 a containing Co—WB is formed on the catalyst adsorption layer 22 of the substrate 2 by electroless plating. .
- the substrate 2 on which the first plating layer 23 a is formed on the catalyst adsorption layer 22 is sent from the plating layer forming unit 14 into the sealed casing 15 a of the plating layer baking unit 15 by the substrate transport arm 11. Then, in the closed casing 15a of the plating layer baking unit 15, the substrate 2 is heated on a hot plate 15A in an inert atmosphere N 2 gas is filled. In this way, the first plating layer 23a of the substrate 2 is baked (Bake process).
- the baking temperature when baking the first plating layer 23a is 150 to 200 ° C., and the baking time is 10 to 30 minutes.
- the substrate 2 heated in the plating layer baking unit 15 is sent again to the plating layer forming unit 14 by the substrate transfer arm 11. Thereafter, in the plating layer forming unit 14, the substrate 2 is subjected to electroless plating, and the second plating layer 23b is formed on the first plating layer 23a by an autocatalytic plating action.
- a plating solution containing Co—WB can be used as the plating solution, as in the case of forming the first plating layer 23a.
- the temperature of the plating solution is also kept at 40 to 70 ° C. as in the case of forming the first plating layer 23a.
- the plating solution when forming the second plating layer 23b in the plating layer forming portion 14, unlike the case of forming the first plating layer 23a, instead of the plating solution containing Co—WB, the plating solution is Co—W—.
- the plating temperature can be set to 40 to 80 ° C.
- a plating solution containing the same metal (Co—W) as the first plating layer 23a is used, and the second plating layer 23b formed in this way is also used. It functions as a Cu diffusion prevention film (barrier film).
- the substrate 2 on which the second plating layer 23 b is formed in the plating layer forming unit 14 is sent again from the plating layer forming unit 14 to the plating layer baking unit 15 by the substrate transport arm 11. Then, the substrate 2 is heated by the hot plate 15A in the hermetic casing 15a of the plating layer baking portion 15, and baking of the second plating layer 23b is performed.
- the baking temperature and baking time when baking the second plating layer 23b are substantially the same as the baking temperature and baking time when baking the first plating layer 23a.
- the baking temperature and baking time for the second plating layer 23b may be set to be different from the baking temperature and baking time for the first plating layer 23a.
- the plating layer laminate 23 composed of the first plating layer 23a and the second plating layer 23b and functioning as a Cu diffusion prevention film (barrier film) can be formed on the substrate 2.
- the metal-to-metal bond between the plating layers 23a and 23b can be increased.
- the thickness of the plating layer to be baked is large, between the base layer and the plating layer. The stress accompanying the shape change of a plating layer arises.
- the plating layer laminate 23 functioning as a barrier film includes the first plating layer 23a obtained by the first plating layer forming step and the plating layer baking step, and the second time.
- the plating layer thickness is determined by the thickness of the plating layer to be baked in the first or second baking step. It can be made smaller than the entire body 23.
- the stress generated between the plating layer 23a, 23b and the underlayer is reduced by reducing the stress generated between the plating layer 23a, 23b and the underlayer (for example, the catalyst adsorption layer 22). Can do.
- the plating layer laminate 23 is not limited to having the first plating layer 23a and the second plating layer 23b. In addition to the first plating layer 23a and the second plating layer 23b, an additional third plating layer and You may have a 4th plating layer.
- the substrate 2 on which the plating layer laminate 23 that functions as a barrier film is formed is then sent to the electroless Cu plating layer forming unit 16 by the substrate transfer arm 11.
- an electroless Cu plating layer 24 that functions as a seed film for forming the electrolytic Cu plating layer 25 is formed on the plating layer laminate 23 of the substrate 2 (FIG. 3 (e)).
- the electroless Cu plating layer forming unit 16 includes a plating apparatus as shown in FIGS. 5 and 6, and by performing electroless plating on the plating layer laminate 23 of the substrate 2, the electroless Cu plating is performed.
- a plating layer 24 can be formed.
- the electroless Cu plating layer 24 formed in the electroless Cu plating layer forming unit 16 functions as a seed film for forming the electrolytic Cu plating layer 25 and is used in the electroless Cu plating layer forming unit 16.
- the plating solution contains a copper salt as a copper ion source, for example, copper sulfate, copper nitrate, copper chloride, copper bromide, copper oxide, copper hydroxide, copper pyrophosphate and the like.
- the plating solution further contains a copper ion complexing agent and a reducing agent. Further, the plating solution may contain various additives for improving the stability and speed of the plating reaction.
- the substrate 2 on which the electroless Cu plating layer 24 is thus formed is sent to the electrolytic Cu plating layer forming unit 17 by the substrate transport arm 11.
- the substrate 2 on which the electroless Cu plating layer 24 is formed may be sent to the baking unit 15 for baking and then sent to the electrolytic Cu plating layer forming unit 17.
- the electrolytic Cu plating process is performed on the substrate 2, and the electrolytic Cu plating layer 25 is filled in the recess 2 a of the substrate 2 using the electroless Cu plating layer 24 as a seed film. (FIG. 3 (f)).
- the substrate 2 is discharged outward from the plating processing system 10, and the back surface side (the side opposite to the concave portion 2a) of the substrate 2 is subjected to chemical mechanical polishing (FIG. 3G).
- the vacuum deposition process layer 2A functions as an underlayer, and the surface of the substrate 2 can be smoothed. For this reason, the adhesion between the adhesion layer 21 formed on the vacuum deposition layer 2A and the substrate 2 is improved, whereby the plating layer laminate 23 functioning as a barrier film on the substrate 2 or the seed film functioning as a seed film. The adhesion between the electroplating layer 24 and the substrate 2 can be improved. Thus, the plating layer laminate 23 functioning as a barrier film or the electroless plating layer 24 functioning as a seed film is not peeled off from the substrate 2.
- the substrate 2 has the recess 2a.
- the vacuum deposition process layer forming unit 27 performs the vacuum deposition process
- the vacuum deposition process layer 2A may be formed over the entire inner surface of the recess 2a as shown in FIG. 2A may not reach the entire inner surface of the recess 2a, and the vacuum deposition layer 2A may be formed only on the outer surface of the substrate 2 outside the recess 2a and on the upper surface of the inner surface of the recess 2a (see FIG. 10B).
- the vacuum deposition process layer 2A may be formed only on the outer surface of the substrate 2 outside the recess 2a (not shown).
- an external force may be applied to the substrate 2, and such an external force is applied to the outer surface of the substrate 2.
- a vacuum deposition process layer 2A as a base layer is formed on the outer surface of the substrate 2 outside the recess 2a of at least the substrate 2. Therefore, even if an external force is applied to the outer surface of the substrate 2, the vacuum deposition treatment layer 2 ⁇ / b> A improves the adhesion between the adhesion layer 21, the plating layer laminate 23 and the electroless Cu plating layer 24, and the substrate 2. Thus, the adhesion layer 21, the plating layer laminate 23 and the electroless Cu plating layer 24 can be prevented from falling off or peeling off from the substrate 2.
- the plating layer laminate 23 functioning as a barrier film is obtained by the first plating layer forming step and the plating layer baking step, and the first plating layer 23a and the second time And the second plating layer 23b obtained by the plating layer forming step and the plating layer baking step. For this reason, it is possible to improve the adhesion of the underlayer while suppressing the stress with the underlayer generated during the baking of the plating layers 23a and 23b.
- the plating layer laminated body 23 which functions as a Cu diffusion prevention film showed the example which has the 1st plating layer 23a and the 2nd plating layer 23b, not only this but a sheet film
- the electroless Cu plating layer 24 that functions as a plating layer laminate 24 having a first plating layer 24a and a second plating layer 24b (FIG. 8).
- the first plating layer 24 a of the electroless Cu plating layer 24 is formed by the first plating layer forming process in the electroless Cu plating forming portion 16, and then the first time in the plating layer baking portion 15.
- the plating layer is baked by the baking step.
- the second plating layer 24b is formed by the second plating layer forming step in the electroless Cu plating forming portion 16, and then the second plating layer baking portion 15 is baked by the second plating layer baking step. It is done. In this way, the plating layer laminate 24 having the first plating layer 24 a and the second plating layer 24 b and functioning as a seed film for the electrolytic Cu plating layer 25 is obtained.
- an adhesion layer 21 and a catalyst adsorption layer 22 are provided on the vacuum deposition layer 2A formed on the substrate 2 and a plating layer laminate 23 that functions as a barrier film is provided on the catalyst adsorption layer 22 is shown.
- the plating layer laminate 23 that functions as a barrier film may be provided without providing the adhesion layer 21 and the catalyst adsorption layer 22 on the vacuum deposition layer 2A on the substrate 2.
- plating layer laminated body 23 which has the 1st plating layer 23a and the 2nd plating layer 23b which function as a barrier film below the electroless Cu plating layer 24 which functions as a seed film was shown, instead of the plating layer laminate 23, a plating layer 23 made of a single layer functioning as a barrier film may be provided.
- plating layer laminate 23 that functions as a barrier film below the electroless Cu plating layer 24 that functions as a seed film.
- the vacuum deposition layer 2A is provided on the substrate 2 having the recess 2a, and the adhesion layer 21 and the catalyst adsorption layer 22 are provided on the vacuum deposition layer 2A.
- an electroless Cu plating layer 24 as a seed film may be provided by catalytic plating.
- FIG. 11 corresponds to FIG. 3 (f). As shown in FIG. 11, an electrolytic Cu plating layer 25 is filled in the recess 2a of the substrate 2 using the electroless Cu plating layer 24 as a seed film. Yes.
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Abstract
Description
図1乃至図8により本発明の一実施の形態について説明する。
このうち真空蒸着処理層形成部27は図8に示すように、密閉された密閉ケーシング27aと、密閉ケーシング27a内部に設けられ基板2を保持する基板ホルダ27dと、基板ホルダ27dに保持された基板2表面に対して蒸着される金属が貯えられている蒸発源27Aとを備えている。また密閉ケーシング27aには密閉ケーシング27a内を真空引きする真空排気口27bが設けられ、真空排気口27bには図示しない真空ポンプが接続され、このため密閉ケーシング27aは真空室として機能する。
次にめっき層形成部14および無電解Cuめっき層形成部16について述べる。
このうち基板回転保持機構110は、図5および図6に示すように、ケーシング101内で上下に伸延する中空円筒状の回転軸111と、回転軸111の上端部に取り付けられたターンテーブル112と、ターンテーブル112の上面外周部に設けられ、基板2を支持するウエハチャック113と、回転軸111を回転駆動する回転機構162と、を有している。このうち回転機構162は、制御機構160により制御され、回転機構162によって回転軸111が回転駆動され、これによって、ウエハチャック113により支持されている基板2が回転される。
次に、基板2の表面にめっき液や洗浄液などを供給する液供給機構30,90について、図5および図6を参照して説明する。液供給機構30,90は、基板2の表面に対してめっき処理を施すめっき液を供給するめっき液供給機構30と、基板2の表面に洗浄処理液を供給する洗浄処理液供給機構90と、を含んでいる。
洗浄処理液供給機構90は、後述するように基板2の洗浄工程において用いられるものであり、図5に示すように、ノズルヘッド104に取り付けられたノズル92を含んでいる。この場合、ノズル92から、洗浄処理液またはリンス処理液のいずれかが選択的に基板2の表面に吐出される。
次に、基板2から飛散しためっき液や洗浄液などを排出する液排出機構120,125,130について、図5を参照して説明する。図5に示すように、ケーシング101内には、昇降機構164により上下方向に駆動され、排出口124,129,134を有するカップ105が配置されている。液排出機構120,125,130は、それぞれ排出口124,129,134に集められる液を排出するものとなっている。
次にめっき層焼きしめ部15について述べる。
しかしながら、第2めっき層23bに対する焼きしめ温度および焼きしめ時間を第1めっき層23aに対する焼きしめ温度および焼きしめ時間と異なるように設定してもよい。
次に本発明の変形例について述べる。上記実施の形態において、Cu拡散防止膜(バリア膜)として機能するめっき層積層体23が、第1めっき層23aと第2めっき層23bとを有する例を示したが、これに限らずシート膜として機能する無電解Cuめっき層24を第1めっき層24aと第2めっき層24bとを有するめっき層積層体24から構成してもよい(図8)。
2A 真空蒸着処理層
2a 凹部
10 めっき処理システム
11 基板搬送アーム
12 密着層形成部
13 触媒吸着層形成部
14 めっき層形成部
15 めっき層焼きしめ部
15A ホットプレート
15a 密閉ケーシング
15b 排気口
15c N2ガス供給口
16 無電解Cuめっき層形成部
17 電解Cuめっき層形成部
18 カセットステーション
19 制御部
19A 記憶媒体
21 密着層
22 触媒吸着層
23 めっき層積層体
23a 第1めっき層
23b 第2めっき層
24 無電解Cuめっき層
25 電解Cuめっき層
27 真空蒸着処理層形成部
Claims (12)
- 基板に対してめっき処理を施すめっき処理方法において、
基板を準備する工程と、
基板に対して真空蒸着処理を施して、基板上に真空蒸着処理層を形成する工程と、
基板に対してめっき液を用いてめっき処理を施して、真空蒸着処理層上に特定機能を有するめっき層を形成する工程とを備えたことを特徴とするめっき処理方法。 - めっき層は、Cu拡散防止膜としての機能を有することを特徴とする請求項1記載のめっき処理方法。
- めっき層は、電解Cuめっき層形成用のシード膜としての機能を有することを特徴とする請求項1記載のめっき処理方法。
- めっき層を形成する前に、基板上に触媒を吸着させて触媒吸着層を形成することを特徴とする請求項2記載のめっき処理方法。
- 触媒吸着層を形成する前に、基板の真空蒸着処理層上にカップリング剤を吸着させて密着層を形成することを特徴とする請求項4記載のめっき処理方法。
- 真空蒸着処理層はPVD処理層からなることを特徴とする請求項1記載のめっき処理方法。
- 真空蒸着処理層はCVD処理層からなることを特徴とする請求項1記載のめっき処理方法。
- 基板は凹部を有し、真空蒸着処理層は少なくとも凹部外側の基板外面に形成されることを特徴とする請求項1記載のめっき処理方法。
- 基板に対してめっき処理を施すめっき処理システムにおいて、
基板に対して真空蒸着処理を施して、基板表面に真空蒸着処理層を形成する真空蒸着処理層形成部と、
基板上にめっき液を用いてめっき処理を施して、真空蒸着処理層上に特定機能を有するめっき層を形成するめっき層形成部と、
真空蒸着処理層形成部と、めっき層形成部との間で基板を搬送する基板搬送部と、
真空蒸着処理層形成部、めっき層形成部および基板搬送部を制御する制御部とを備えたことを特徴とするめっき処理システム。 - めっき層を形成する前に基板上に触媒を吸着させて触媒吸着層を形成する触媒吸着層形成部を設けたことを特徴とする請求項9記載のめっき処理システム。
- 触媒吸着層を形成する前に基板上にカップリング剤を吸着させて密着層を形成する密着層形成部を設けたことを特徴とする請求項10記載のめっき処理システム。
- めっき処理システムにめっき処理方法を実行させるためのコンピュータプログラムを格納した記憶媒体において、
めっき処理方法は、
基板を準備する工程と、
基板に対して真空蒸着処理を施して、基板上に真空蒸着処理層を形成する工程と、
基板に対してめっき液を用いてめっき処理を施して、真空蒸着処理層上に特定機能を有するめっき層を形成する工程とを備えたことを特徴とする記憶媒体。
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