Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/60—Insulated-gate field-effect transistors [IGFET]
  • H10D30/67—Thin-film transistors [TFT]
  • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
  • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/60—Insulated-gate field-effect transistors [IGFET]
  • H10D30/67—Thin-film transistors [TFT]
  • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
  • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D99/00—Subject matter not provided for in other groups of this subclass

Definitions

• the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.
• a semiconductor device refers to all types of devices which can function by utilizing semiconductor characteristics; an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.
• a technique by which a transistor is formed using a semiconductor thin film (also referred to as thin film transistor (TFT)) formed over a substrate having an insulating surface has been attracting attention.
• the transistor is applied to a wide range of electronic devices such as an integrated circuit (IC) and an image display device (display device).
• IC integrated circuit
• display device display device
• a silicon-based semiconductor material is widely known as a material for a semiconductor thin film applicable to the transistor.
• an oxide semiconductor has been attracting attention.
• a transistor whose semiconductor layer including an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) (an In-Ga-Zn-O-based amorphous oxide) is formed over a substrate is disclosed (see Patent Document 1 ).
• Patent Document 1 Japanese Published Patent Application No. 201 1 -181 801
• Improvement in reliability of semiconductor devices that include transistors including an oxide semiconductor is important for commercialization of the semiconductor devices.
• variation and decrease in electrical characteristics of the semiconductor device might reduce the reliability thereof.
• the spin density of the oxide sem iconductor film is lower than or equal to 1 x 1 0 1 8 spins/cm 3 , preferably lower than or equal to 1 x 10 ' 7 spins/cm J , further preferably lower than or equal to 1 x l O 16 spins/cm J .
• the conductivity of the oxide semiconductor film is lower than or equal to 1 x l O ' ' S/cm, preferably lower than or equal to 1 x l O 2 S/cm, further preferably lower than or equal to 1 x l O 1 S/cm.
• Defects typified by oxygen defects in the oxide semiconductor film are preferably reduced.
• Defects typified by oxygen defects function as sources for supplying carriers in the oxide semiconductor film, which might change the electric conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film in which such defects are reduced has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like.
• the number of lone electrons in the oxide semiconductor film can be measured as a spin density of the oxide semiconductor film by electron spin resonance (ESR), whereby the number of oxygen defects can be estimated.
• ESR electron spin resonance
• An oxide insulating film containing nitrogen can be used for an insulating film which is provided over a source electrode layer and a drain electrode layer and is in contact with the oxide semiconductor film.
• the oxide insulating film containing nitrogen can be a sil icon oxide film containing nitrogen, an aluminum oxide film containing nitrogen, or the like.
• the concentration of nitrogen in the oxide insulating film may be higher than or equal to 0.01 atoms%, preferably higher than or equal to 0. 1 atoms% and lower than or equal to 50 atoms%, further preferably higher than or equal to 0.5 atoms% and lower than or equal to 1 5 atoms%.
• a silicon oxide fi lm that contains nitrogen at the above concentration is referred to as a silicon oxynitride film in some cases.
• the oxygen insulating film can contain oxygen more than that in the stoichiometric composition.
• the silicon oxynitride film can be formed by a formation method using a film formation gas, for example, by a chemical vapor deposition (CVD) method.
• CVD chemical vapor deposition
• One embodiment of the invention disclosed in this specification is a semiconductor device which includes a gate electrode layer over a substrate having an insulating surface; a gate insulating film, an oxide semiconductor film, and source and drain electrode layers which are stacked in this order over the gate electrode layer; and an oxide insulating film which is over the source and drain electrode layers and in contact with the oxide semiconductor film and contains nitrogen.
• the spin density of the oxide semiconductor film is lower than or equal to 1 x 10 18 spins/cm 3 .
• Another embodiment of the invention disclosed in this specification is a method for manufacturing a semiconductor device including the following steps: forming a gate electrode layer; forming a gate insulating film over the gate electrode layer; forming an oxide semiconductor film over the gate insulating film in a region overlapping with the gate electrode layer; forming source and drain electrode layers electrically connected to the oxide semiconductor film; and forming an oxide insulating film containing nitrogen over the Oxide semiconductor film and the source and drain electrode layers to be in contact with the oxide semiconductor film.
• the spin density of the oxide semiconductor fi lm is lower than or equal to 1 x 10 1 spins/cm .
• One embodiment of the present invention relates to a sem iconductor device including a transistor or a semiconductor device including a circuit which is formed by using a transistor.
• a sem iconductor device includ ing a transistor in which a channel formation region is formed using an oxide sem iconductor or a sem iconductor device includ ing a circu it which is formed by using such a transistor.
• the present invention relates to an electronic device which includes, as a component, an LSI, a CPU, a power device mounted in a power circu it, a sem iconductor integrated circuit incl uding a memory, a thyristor, a converter, an image sensor, or the l ike, an electro-optical device typified by a l iquid crystal d isplay panel, or a l ight-emitting display device including a l ight-em itting element.
• a highly rel iable sem iconductor device which includes a transistor including an oxide sem iconductor is provided.
• FIGS. 1 A and I B are a plan view and a cross-sectional view illustrating one embodiment of a sem iconductor device.
• FIGS. 2A to 2C are cross-sectional views il lustrating one embodiment of a method for manufacturing a sem iconductor device.
• FIG. 3 is a cross-sectional view illustrating one embodiment of a semiconductor device.
• FIGS. 4A to 4C are plan views each illustrating one embodiment of a semiconductor device.
• FIGS. 5A and 5B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device.
• FIGS. 6A and 6B are cross-sectional views each i llustrating one embodiment of a semiconductor device.
• FIGS. 7A and 7B are a circuit diagram and a cross-sectional view of one embodiment of a semiconductor device.
• FIGS. 8A to 8C each illustrate an electronic device.
• FIGS. 9A to 9C illustrate an electronic device.
• FIG. 10 shows the spin density and the conductivity of oxide semiconductor films.
• FIG. 1 1 shows electrical characteristics of Example Transistor.
• FIG. 12 shows electrical characteristics of Comparative Transistor. BEST MODE FOR CARRYING OUT THE INVENTION
• FIGS. 1 A and I B one embodiment of a semiconductor device and a method for manufacturing the semiconductor device are described with reference to FIGS. 1 A and I B.
• a transistor including an oxide semiconductor film is described as an example of the semiconductor device.
• the transistor may have a single-gate structure in which one channel formation region is formed, a double-gate structure in which two channel formation regions are formed, or a triple-gate structure in which three channel formation regions are formed.
• the transistor may have a dual-gate structure including two gate electrode layers positioned above and below a channel formation region with a gate insulating film provided therebetween.
• a transistor 440 illustrated in FIGS. I A and I B is an example of a transistor which is a kind of bottom-gate transistor and is also referred to as an inverted-staggered transistor.
• FIG. 1 A is a plan view
• FIG. I B is a cross-sectional view taken along the chain line V-Z in FIG. 1 A.
• a semiconductor device including the transistor 440 includes a gate electrode layer 401 over a substrate 400 and a gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b which are over the gate electrode layer 401 . Further, an insulating film 407 covering the transistor 440 is provided.
• the transistor 440 disclosed in this specification includes the oxide semiconductor film 403 having a spin density of 1 x 10' 8 spins/cm 3 or lower, preferably 1 x l O 17 spins/cm J or lower, further preferably 1 x l O' 6 spins/cm J or lower.
• the conductivity of the oxide semiconductor film 403 is lower than or equal to 1 x 10 3 S/cm, preferably lower than or equal to 1 x 10 2 S/cm, further preferably lower than or equal to 1 x 10' S/cm.
• the oxide semiconductor film 403 in this embodiment has a low spin density, few defects, and a low conductivity. With the oxide semiconductor film 403, the normally-off transistor 440 having favorable electrical characteristics can be provided.
• An oxide semiconductor used for the oxide semiconductor film 403 contains at least indium (In).
• In and zinc (Zn) are preferably contained.
• gallium (Ga) be additionally contained as a stabilizer for reducing variation in electrical characteristics of a transistor including the oxide semiconductor film.
• Tin (Sn) is preferably contained as a stabilizer.
• Hafnium (Hf) is preferably contained as a stabilizer.
• Aluminum (Al) is preferably contained as a stabilizer.
• Zirconium (Zr) is preferably contained as a stabilizer.
• lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu) may be contained.
• La lanthanum
• Ce cerium
• Pr praseodymium
• Nd neodymium
• Sm samarium
• Eu europium
• Gd gadolinium
• Tb terbium
• Dy dysprosium
• Ho holmium
• Er erbium
• Tm thulium
• Yb ytterbium
• Lu lutetium
• an "In-Ga-Zn-based oxide” means an oxide containing In, Ga, and Zn as its main component and there is no particular limitation on the ratio of In:Ga:Zn.
• the In-Ga-Zn-based oxide may contain a metal element other than In, Ga, and Zn.
• a material represented by a chemical formula In 0 3 (ZnO) m (m > 0 is satisfied, and m is not an integer) may be used as an oxide semiconductor.
• M represents one or more metal elements selected from Ga, Fe, Mn, and Co.
• a material represented by a chemical formula In 2 Sn05(ZnO) tripod (n > 0, n is an integer) may be used.
• the composition of the oxide semiconductor containing indium is not limited to those described above, and a material having an appropriate composition can be used in accordance with semiconductor characteristics which are necessary (such as mobility, threshold value, and variation).
• semiconductor characteristics which are necessary such as mobility, threshold value, and variation.
• high mobility can be obtained relatively easily in the case of using an In-Sn-Zn oxide.
• mobility can be increased by reducing the defect density in a bulk also in the case of using an In-Ga-Zn-based oxide.
• oxide semiconductor film 403 is in a single crystal state, a polycrystalline (also referred to as polycrystal) state, an amorphous state, or the like.
• the oxide semiconductor film is preferably a c-axis aligned crystalline oxide semiconductor (CAAC-OS) film.
• the CAAC-OS film is a thin film which is single crystal along c-axis.
• the film has a mosaic pattern in the a-b plane, and the crystal grain boundary is unclear.
• the CAAC-OS film is not completely single crystal nor completely amorphous.
• the CAAC-OS film is an oxide semiconductor film with a crystal-amorphous mixed phase structure where a crystal portion is included in an amorphous phase. Note that in most cases, the crystal portion fits inside a cube whose one side is less than 100 nm. From an observation image obtained with a transmission electron microscope (TEM), a boundary between an amorphous portion and a crystal portion in the CAAC-OS film is not clear. Further, with the TEM, a grain boundary in the CAAC-OS film is not found. Thus, in the CAAC-OS film, a reduction in electron mobility due to the grain boundary is suppressed.
• TEM transmission electron microscope
• a c-axis is al igned in a direction parallel to a normal vector of a surface where the CAAC-OS film is formed or a normal vector of a surface of the CAAC-OS film, triangular or hexagonal atomic arrangement which is seen from the direction perpendicular to the a-b plane is formed, and metal atoms are arranged in a layered manner or metal atoms and oxygen atoms are arranged in a layered manner when seen from the direction perpendicular to the c-axis.
• the directions of the a-axis and the b-axis of one crystal region may be different from those of another crystal region.
• a simple term "perpendicular” includes a range from 85° to 95°.
• a simple term “parallel” includes a range from -5° to 5°.
• the CAAC-OS film distribution of crystal portions is not necessarily uniform.
• the proportion of crystal portions in the vicinity of the surface of the oxide semiconductor film is higher than that in the vicinity of the surface where the oxide semiconductor film is formed in some cases.
• the crystal portion in a region to which the impurities are added becomes amorphous. in some cases.
• the d irections of the c-axes may be di fferent from each other depending on the shape of the CAAC-OS film (the cross-sectional shape of the surface where the CAAC-OS film is formed or the cross-sectional shape of the surface of the CAAC-OS film).
• the direction of c-axis of the crystal portion is the direction parallel to a normal vector of the surface where the CAAC-OS fi lm is formed or a normal vector of the surface of the CAAC-OS film.
• the crystal portion is formed by fi lm formation or by perform ing a treatment for crystall ization such as a heat treatment after film formation.
• the transistor With use of the CAAC-OS film in a transistor, variation in electrical characteristics of the transistor due to irradiation with visible light or ultraviolet light is small . Thus, the transistor has high rel iability.
• part of oxygen included in the oxide semiconductor film may be substituted with n itrogen.
• the oxide sem iconductor is preferably formed over a flat surface.
• the oxide semiconductor is preferably formed over a surface with an average surface roughness (Ra) of less than or equal to 1 nm, further preferably less than or equal to 0.3 nm, still further preferably less than or equal to 0.1 nm.
• an average surface roughness (Ra) is obtained by expanding arithmetic mean surface roughness, which is defined by JIS B0601 : 2001 (IS04287: 1997), into three dimensions so as to be applicable to a curved surface.
• an average surface roughness (Ra) can be expressed as "the average value of the absolute values of deviations from a reference surface to a designated surface" and is defined by the following formula.
• the designated surface is a surface which is a target of roughness measurement, and is a quadrilateral region which is specified by four points represented by the coordinates (x u y ⁇ , A x 2, vi)), and (x 2 , yi i, 3 ⁇ 4)).
• the area of a rectangle which is obtained by projecting the designated surface on the xv plane is represented by So, and the height of the reference surface (the average height of the designated surface) is represented by Z 0 .
• the average surface roughness Ra can be measured using an atom ic force microscope (AFM).
• the transistor 440 is a bottom-gate transistor
• the substrate 400, the gate electrode layer 401 , and the gate insulating film 402 are located below the oxide semiconductor film. Accordingly, planarization treatment such as CM P treatment may be performed after the gate electrode layer 401 and the gate insulating film 402 are formed to obtain the above flat surface.
• the oxide semiconductor film 403 has a thickness larger than or equal to 1 nm and smaller than or equal to 30 nm (preferably larger than or equal to 5 nm and smaller than or equal to 10 nm) and can be formed by a sputtering method, a molecular beam epitaxy (MBE) method, a CVD method, a pulse laser deposition method, an atomic layer deposition (ALD) method, or the like as appropriate.
• the oxide semiconductor film 403 may be formed with a sputtering apparatus where deposition is performed with surfaces of a plurality of substrates set substantially perpendicular to a surface of a sputtering target.
• the C A AC-OS film is formed by a sputtering method with a polycrystalline oxide semiconductor sputtering target.
• a crystal region included in the sputtering target may be cleaved along an a-b plane, and a sputtered particle having a plane parallel to an a-b plane (flat-plate-like sputtered particle or pellet-like sputtered particle) may separate from the sputtering target.
• the flat-plate-l ike sputtered particle reaches a substrate while maintaining their crystal state, whereby the CAAC-OS film can be formed.
• the following conditions are preferably employed.
• the crystal state can be prevented from being broken by the impurities.
• the concentration of impurities e.g., hydrogen, water, carbon dioxide, and nitrogen
• the concentration of impurities in a deposition gas may be reduced.
• a deposition gas whose dew point is lower than or equal to -80 °C, preferably lower than or equal to - 100 °C is used.
• the substrate heating temperature during the deposition is higher than or equal to 100 °C and lower than or equal to 740 °C, preferably higher than or equal to 200 °C and lower than or equal to 500 °C.
• the proportion of oxygen in the deposition gas be increased and the power be optimized in order to reduce plasma damage at the deposition.
• the proportion of oxygen in the deposition gas is higher than or equal to 30 vol.%, preferably 100 vol.%.
• an In-Ga-Zn-0 compound target is described below.
• the In-Ga-Zn-0 compound target which is polycrystall ine, is made by mixing
• ⁇ powder, GaO v powder, and ZnO r powder in a predetermined molar ratio, applying pressure, and perform ing a heat treatment at a temperature higher than or equal to 1000 °C and lower than or equal to 1 500 °C.
• x, y, and ⁇ are each a given positive number.
• the predetermined molar ratio of lnO, v powder to GaO,, powder and ZnO z powder is, for example, 2 :2 : 1 , 8 :4:3, 3 : 1 : 1 , 1 : 1 : 1 , 4:2:3, or 3 : 1 :2.
• the kinds of powder and the molar ratio for mixing powder may be determined as appropriate depending on the desired sputtering target.
• the oxide sem iconductor film 403 be the one which is h ighly purified and hard ly contain impurities such as copper, aluminum, and chlorine.
• impurities such as copper, aluminum, and chlorine.
• steps in which these impurities are not mixed into the oxide semiconductor fi lm or attached to the surface of the oxide sem iconductor film are preferably selected as appropriate.
• the impurities on the surface of the oxide semiconductor fi lm are preferably removed by exposure to oxalic acid or dilute hydrofluoric acid or plasma treatment (such as N 2 0 plasma treatment).
• the concentration of copper in the oxide semiconductor film is lower than or equal to 1 x 10 18 atoms/cm J , preferably lower than or equal to 1 x 1 0 1 7 atoms/cm ⁇ .
• the concentration of alum inum in the oxide semiconductor film is lower than or equal to 1 x 10 18 atoms/cm 3 .
• the concentration of chlorine in the oxide semiconductor film is lower than or equal to 2 x 1 0 18 atoms/cm 3 .
• FIGS. 2A to 2C illustrate an example of a method for manufacturing a semiconductor device including the transistor 440.
• a substrate that can be used as the substrate 400 having an insulating surface as long as it has heat resistance enough to withstand a heat treatment performed later.
• a large-sized glass substrate which has a shrinkage of 20 ppm or less, preferably 1 0 ppm or less, further preferably 5 ppm or less after heat treatment at 450°C, preferably 500 °C for one hour may be used as the substrate.
• a ceramic substrate, a quartz substrate, a sapphire substrate, or the like can be used as the substrate 400.
• a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate made of silicon germanium or the like, an SOI substrate, or the like can be used.
• any of these substrates over which a semiconductor element is provided may be used.
• the semiconductor device may be manufactured using a flexible substrate as the substrate 400.
• the transistor 440 including the oxide semiconductor film 403 may be directly formed over a flexible substrate; or alternatively, the transistor 440 including the oxide semiconductor film 403 may be formed over a formation substrate, and then may be separated from the formation substrate and transferred to a flexible substrate. Note that, in order to separate the transistor from the formation substrate and transfer it to the flexible substrate, a separation layer may be provided between the formation substrate and the transistor 440 including an oxide semiconductor film.
• an insulating film may be provided over the substrate 400.
• the insulating film can be formed by a plasma CVD method, a sputtering method, or the like, using an oxide insulating material such as silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, or gallium oxide; a nitride insulating material such as silicon nitride, si licon nitride oxide, aluminum nitride, or alum inum nitride oxide; or a mixed material of any of these materials.
• the substrate 400 may be subjected to a heat treatment.
• the heat treatment can be performed at 650 °C for 1 minute to 5 minutes with a gas rapid thermal annealing (GRTA) apparatus which performs a heat treatment using a high-temperature gas.
• GRTA gas rapid thermal annealing
• an inert gas which does not react with an object to be processed by a heat treatment such as nitrogen or a rare gas like argon, is used.
• the heat treatment may be performed at 500 °C for 30 minutes to an hour with an electric furnace.
• a conductive film is formed over the substrate 400 and is etched into the gate electrode layer 401.
• the conductive film may be etched using either dry etching or wet etching, or using both dry etching and wet etching.
• the gate electrode layer 401 can be formed using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, or scandium or an alloy material which contains any of these materials as its main component.
• a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, or scandium or an alloy material which contains any of these materials as its main component.
• a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or a silicide film such as a nickel silicide film may be used as the gate electrode layer 401 .
• the gate electrode layer 401 may have a single-layer structure or a layered structure.
• the gate electrode layer 401 can also be formed using a conductive material such as indium oxide-tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium oxide-zinc oxide, or indium tin oxide to which silicon oxide is added. It is also possible that the gate electrode layer 401 has a layered structure of the above conductive material and the above metal material.
• a metal oxide film containing nitrogen, speci fically, an in-Ga-Zn-0 film containing nitrogen, an ln-Sn-0 film containing n itrogen, an In-Ga-0 film containing nitrogen, an In-Zn-0 film containing nitrogen, a Sn-0 film containing nitrogen, an In-0 film containing nitrogen, or a metal nitride (e.g., InN or SnN) film can be used as the gate electrode layer 401 .
• Such a film has a work function higher than or equal to 5 eV (electron volts), preferably higher than or equal to 5.5 eV (electron volts), and the use of this film as the gate electrode layer enables the threshold voltage of electrical characteristics of a transistor to be positive. Accordingly, a norma!ly-off switching element can be obtained.
• a tungsten film with a thickness of 100 nm is formed by a sputtering method.
• the substrate 400 and the gate electrode layer 401 may be subjected to a heat treatment after the gate electrode layer 401 is formed.
• the heat treatment can be performed at 650 °C for 1 minute to 5 minutes with a GRTA apparatus.
• the heat treatment may be performed at 500 °C for 30 minutes to an hour with an electric furnace.
• the gate insulating film 402 is formed over the gate electrode layer 401 (see FIG. 2A).
• planarization treatment may be performed on a surface of the gate electrode layer 401 . It is preferable that the flatness of the surface of the gate electrode layer 401 be good particularly when the thickness of the gate insulating film 402 is small.
• the thickness of the gate insulating film 402 is greater than or equal to 1 nm and less than or equal to 300 nm and the gate insulating film 402 can be formed by a sputtering method or a CVD method using a film formation gas.
• a sputtering method a low-pressure CVD (LPCVD) method, a plasma CVD method, or the like can be used.
• LPCVD low-pressure CVD
• plasma CVD method or the like can be used.
• a lternatively, a coating method can be used, for example.
• the gate insulating film 402 can be formed using a sil icon oxide film, a gallium oxide film, an aluminum oxide film, a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or a silicon nitride oxide film.
• the gate insulating film 402 can be formed using a high-k material such as a hafnium oxide film, an yttrium oxide film, a hafnium silicate film (HfSi. T O v (x > 0, y > 0)), a hafnium silicate film to which nitrogen is added (HfSiO ⁇ N y (x > 0, y > 0)), a hafnium aluminate film ( ⁇ ifA ⁇ x O y (x > 0, y > 0)), or a lanthanum oxide film, whereby gate leakage current can be reduced. Further, the gate insulating film 402 may have either a single-layer structure or a layered structure.
• a silicon oxynitride film with a thickness of 100 nm is formed as the gate insulating film 402 by a plasma CVD method.
• the gate insulating film 402 may be subjected to dehydration or dehydrogenation treatment by heat treatment. Even if a gas containing hydrogen is used as a film formation gas for the gate insulating film 402, hydrogen in the gate insulating film 402 can be removed by dehydrogenation treatment performed on the gate insulating film 402.
• a plasma CVD method can be preferably employed. By a plasma CVD method, a film can be deposited at relatively high deposition rate with less dust or the like attached to or mixed into the film in film deposition; accordingly, the film thickness can be increased, leading to advantages in productivity.
• the temperature of the heat treatment is higher than or equal to 300 °C and lower than or equal to 700 °C, or lower than the strain point of the substrate.
• the temperature of the heat treatment is preferably higher than the film formation temperature of the gate insulating film 402 because the film is more effectively dehydrated or dehydrogenated.
• the substrate is put in an electric furnace which is a kind of heat treatment apparatus, and then the gate insulating film 402 is subjected to heat treatment at 450 °C for one hour under vacuum.
• the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater may be used.
• a heater such as a resistance heater
• an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used.
• An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
• a GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas.
• the high temperature gas an inert gas which does not react with an object to be processed by heat treatment, such as nitrogen or a rare gas like argon, is used.
• GRTA may be performed as follows.
• the substrate is put in an inert gas heated at high temperature of 650 °C to 700 °C, is heated for several minutes, and is taken out of the inert gas.
• the heat treatment may be performed under reduced pressure (under vacuum), under a nitrogen atmosphere, or under a rare gas atmosphere. It is preferable that water, hydrogen, and the like be not contained in the atmosphere of nitrogen, a rare gas, or the like.
• the purity of nitrogen or the rare gas which is introduced into the heat treatment apparatus is preferably 6N or higher (99.9999 %), further preferably 7N or higher (99.99999 %) (that is, the impurity concentration is preferably lower than or equal to 1 ppm, further preferably lower than or equal to 0. 1 ppm).
• the gate insulating film 402 can be dehydrated or dehydrogenated, whereby the gate insulating film 402 from which impurities such as hydrogen and water causing a change in characteristics of a transistor is eliminated can be formed.
• a surface of the gate insulating fi lm 402 be not in a state where hydrogen, water, or the like is prevented from being released (for example, by providing a film or the like which is not permeable to (or blocks) hydrogen, water, or the like), but in a state where the surface of the gate insulating film 402 is exposed.
• the heat treatment for dehydration or dehydrogenation may be performed plural times, and may double as another heat treatment.
• Oxygen doping treatment may be performed on the gate insulating film 402 which has been dehydrated or dehydrogenated. By the oxygen doping treatment on the gate insulating film 402, oxygen is supplied to the gate insulating film 402, so that oxygen is contained in the gate insulating film 402 and the vicinity of the interface.
• the gate insulating film 402 preferably contains oxygen which exceeds at least the stoichiometric ratio in (a bulk of) the film.
• oxygen doping in this specification means that oxygen (which includes at least one of an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and oxygen cluster ion) is added to a bulk.
• oxygen which includes at least one of an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and oxygen cluster ion
• bulk is used in order to clarify that oxygen is added not only to a surface of a thin film but also to the inside of the thin film.
• oxygen doping includes “oxygen plasma doping” in which oxygen which is made to be plasma is added to a bulk.
• oxygen an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and/or oxygen cluster ion
• an ion implantation method an ion doping method, a plasma immersion ion implantation method, plasma treatment, or the like.
• a gas cluster ion beam can be used for the ton implantation method.
• the oxygen doping treatment may be performed on the entire surface at one time or may be performed by scanning the substrate by a linear ion beam or the like.
• oxygen for the doping an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and/or oxygen cluster ion
• a plasma generating apparatus with use of a gas containing oxygen or from an ozone generating apparatus.
• oxygen can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a resist mask, or the like to process the gate insulating film 402, [0090]
• a gas containing oxygen can be used for the oxygen doping treatment.
• the gas containing oxygen dinitrogen monoxide, nitrogen dioxide, carbon dioxide, carbon monoxide, or the like can be used.
• a rare gas may be used for the oxygen doping treatment.
• the dose may be greater than or equal to 1 x l O 13 ions/cm 2 and smaller than or equal to 5 x l O 16 ions/cm 2 .
• planarity of the surface of the gate insulating film 402 can be improved by the oxygen doping treatment.
• the oxide semiconductor film 403 is formed over the gate insulating film 402.
• a planarization treatment may be performed on the region of the gate insulating fi lm 402 which is in contact with the oxide semiconductor film 403.
• a polishing treatment e.g., a chemical mechanical polishing (CMP) method
• CMP chemical mechanical polishing
• a dry etching treatment e.g., a plasma treatment
• the above-described oxygen doping treatment can also serve as the planarization treatment of the gate insulating f lm 402.
• reverse sputtering in which an argon gas is introduced and plasma is generated can be performed.
• the reverse sputtering is a method in which voltage is applied to a substrate side with the use of an RF power source under an argon atmosphere and plasma is generated in the vicinity of the substrate so that a substrate surface is modified.
• a nitrogen atmosphere, a helium atmosphere, an oxygen atmosphere, or the like may be used instead of an argon atmosphere.
• the reverse sputtering can remove particle substances (also referred to as particles or dust) attached to the surface of the gate insulating film 402.
• planarization treatment a polishing treatment, a dry etching treatment, or a plasma treatment may be performed plural times, or these treatments may be performed in combination.
• the order of steps is not particularly limited and may be set as appropriate depending on the roughness of the surface of the gate insulating film 402.
• the oxide semiconductor film 403 be formed under a condition that much oxygen is contained during film formation (e.g., deposited by a sputtering method under a 100 % oxygen atmosphere), so that a film containing much oxygen (preferably including a region containing oxygen in excess of the stoichiometric composition of an oxide semiconductor in a crystalline state) is formed.
• an In-Ga-Zn-based oxide film with a thickness of 35 nm is formed by a sputtering method with a sputtering apparatus including an AC power supply device.
• deposition conditions are as follows: atmosphere, oxygen gas and argon gas (the flow rate of oxygen: 50 %); pressure, 0.6 Pa; electric power, 5 kW; and substrate temperature, 170 °C.
• the deposition rate is 16 nm/m in.
• a high-purity gas from which impurities such as hydrogen, water, a hydroxyl group, and hydride is removed be used as a sputtering gas when the oxide semiconductor film 403 is deposited.
• the substrate is held in a deposition chamber kept under reduced pressure. Then, a sputtering gas from which hydrogen and moisture are removed is introduced while residual moisture in the deposition chamber is removed, and the oxide semiconductor film 403 is deposited over the substrate 400 using the above target.
• an entrapment vacuum pump such as a cryopump, an ion pump, or a titanium sublimation pump is preferably used.
• a turbo molecular pump to which a cold trap is added may be used as a turbo molecular pump to which a cold trap is added.
• hydrogen a hydrogen atom
• a compound containing hydrogen a hydrogen atom
• water H 2 0
• a compound containing a carbon atom a compound containing a carbon atom
• the gate insulating film 402 and the oxide semiconductor film 403 are formed in succession so as not to expose the gate insulating film 402 to the air. Forming the gate insulating film 402 and the oxide semiconductor film 403 in succession so as not to expose the gate insulating film 402 to the air can prevent impurities such as hydrogen and moisture from being adsorbed onto the surface of the gate insulating film 402.
• heat treatment may be performed on the oxide semiconductor film 403 in order to remove excess hydrogen (including water and a hydroxy! group) (to perform dehydration or dehydrogenation treatment).
• the substrate is introduced into an electric furnace which is one of heat treatment apparatuses, and the oxide semiconductor film 403 is subjected to heat treatment at 450 °C under a nitrogen atmosphere for one hour and further to heat treatment at 450 °C under an atmosphere of nitrogen and oxygen for one hour.
• the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater may be used.
• a heater such as a resistance heater
• an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used.
• An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
• a GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas.
• the high temperature gas an inert gas which does not react with an object to be processed by heat treatment, such as nitrogen or a rare gas like argon, is used.
• GRTA may be performed as follows.
• the substrate is put in an inert gas heated at high temperature of 650 °C to 700 °C, is heated for several minutes, and is taken out of the inert gas.
• water, hydrogen, and the like be not contained in nitrogen or a rare gas such as helium, neon, or argon.
• the purity of nitrogen or the rare gas such as helium, neon, or argon which is introduced into the heat treatment apparatus is set to preferably 6N or higher (99.9999 %) , further preferably 7N or higher (99.99999 %) (that is, the impurity concentration is preferably lower than or equal to 1 ppm, further preferably lower than or equal to 0. 1 ppm).
• a high-purity oxygen gas, a high-purity dinitrogen monoxide gas, or ultra dry air (the moisture amount is less than or equal to 20 ppm (-55 °C by conversion into a dew point), preferably less than or equal to 1 ppm, further preferably less than or equal to 10 ppb according to the measurement with a dew point meter of a cavity ring down laser spectroscopy (CRDS) system) may be introduced into the same furnace. It is preferable that water, hydrogen, or the like be not contained in the oxygen gas or the dinitrogen monoxide gas.
• the purity of the oxygen gas or the dinitrogen monoxide gas which is introduced into the heat treatment apparatus is preferably 6N or higher, further preferably 7N or higher (i.e., the impurity concentration in the oxygen gas or the dinitrogen monoxide gas is preferably lower than or equal to 1 ppm, further preferably lower than or equal to 0.1 ppm).
• the oxygen gas or the dinitrogen monoxide gas acts to supply oxygen that is a main constituent material of the oxide semiconductor and that is reduced by the step for removing impurities for dehydration or dehydrogenation, so that the oxide semiconductor film 403 can be a highly-purified, i-type (intrinsic) oxide semiconductor film.
• the timing of the heat treatment for dehydration or dehydrogenation may be either after the formation of the oxide semiconductor film or after the formation of the island-shaped oxide semiconductor film 403.
• the heat treatment for dehydration or dehydrogenation may be performed plural times and may double as another heat treatment.
• the heat treatment for dehydration or dehydrogenation be performed while the gate insulating film 402 is covered with the oxide semiconductor film which has not been processed into the island-shaped oxide semiconductor film 403 because oxygen contained in the gate insulating film 402 can be prevented from being released by the heat treatment.
• the oxide semiconductor film 403 can be highly purified with the dehydration or dehydrogenation treatment.
• the concentration of hydrogen in the oxide semiconductor film 403 is lower than or equal to 2 x 10 l 9 /cm 3 , preferably lower than or equal to 5 x l O' ⁇ /cm " ', further preferably lower than or equal to 2 x 10 l 8 /cm J .
• concentration of hydrogen can be measured by analysis using secondary ion mass spectrometry (SIMS).
• oxygen (which includes at least one of an oxygen radical, an oxygen atom, and an oxygen ion) may be introduced to the oxide semiconductor film 403 which has been subjected to the dehydration or dehydrogenation treatment to supply oxygen to the oxide semiconductor film.
• the dehydration or dehydrogenation treatment may be accompanied by elimination of oxygen which is a main constituent material of an oxide semiconductor to lead to a reduction in oxygen.
• Oxygen vacancies exist in a portion where oxygen is eliminated in an oxide semiconductor film, and a donor level which leads to variation in electrical characteristics of a transistor is formed owing to the oxygen vacancies.
• oxygen an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and/or oxygen cluster ion
• oxygen is preferably supplied to the oxide semiconductor film which has been subjected to the dehydration or dehydrogenation treatment.
• oxygen vacancies in the film can be repaired.
• Oxygen is introduced to the dehydrated or dehydrogenated oxide semiconductor film 403 to be supplied thereto, so that the oxide semiconductor film 403 can be highly purified and be i-type (intrinsic). Variation in electrical characteristics of a transistor having the highly-purified and i-type (intrinsic) oxide semiconductor film 403 is suppressed, and thus the transistor is electrically stable.
• Oxygen can be introduced by an ion implantation method, an ion doping method, a plasma immersion ion implantation method, plasma treatment, or the like. Further, a gas cluster ion beam can be used for the ion implantation method. The doping treatment may be performed on the entire surface at one time or may be performed by scann ing the substrate by a linear ion beam or the like.
• oxygen for the doping an oxygen radical, an oxygen atom, an oxygen molecule, ozone, an oxygen ion (oxygen molecule ion), and/or oxygen cluster ion
• a plasma generating apparatus with use of a gas containing oxygen or from an ozone generating apparatus.
• oxygen can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a resist mask, or the like to process the oxide semiconductor film.
• oxygen may be added to the oxide semiconductor film 403 directly or to the oxide semiconductor film 403 through another film such as the insulating film 407.
• An ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like can be employed for the introduction of oxygen through another film, whereas plasma treatment or the like can also be employed for the direct introduction of oxygen to the exposed oxide semiconductor film 403.
• the introduction of oxygen to the oxide semiconductor film 403 is preferably performed after dehydration or dehydrogenation treatment is performed thereon, but the timing is not limited thereto. Further, oxygen may be introduced plural times into the dehydrated or dehydrogenated oxide semiconductor film 403.
• the oxide semiconductor film provided in the transistor include a region containing oxygen in excess of the stoichiometric composition of an oxide semiconductor in a crystalline state.
• the oxygen content is preferably larger than that in the stoichiometric composition of the oxide semiconductor.
• the oxygen content is higher than that of the oxide semiconductor in a single crystal state. In some cases, oxygen may exist between lattices of the oxide semiconductor.
• a resist mask for forming the island-shaped oxide semiconductor fi lm 403 may be formed by an ink-jet method. Formation of the resist mask by an ink-jet method needs no photomask; thus, manufacturing cost can be reduced.
• the etching of the oxide semiconductor film 403 may be performed using either dry etching or wet etching, or using both dry etching and wet etching.
• an etchant used for wet etching of the oxide semiconductor film 403 for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used.
• ITO-07N produced by KANTO CHEMICAL CO., INC.
• the oxide semiconductor film 403 may be etched by a dry etching method using an inductively coupled plasma (ICP) etching method.
• ICP inductively coupled plasma
• a conductive film to be the source electrode layer and the drain electrode layer (including a wiring formed in the same layer as the source electrode layer and the drain electrode layer) is formed over the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403.
• the conductive film is formed using a material that can withstand a heat treatment in a later step.
• a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W it is possible to use, for example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, a metal nitride film containing any of these elements as its component (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film), or the like.
• a metal film having a high melting point such as Ti, Mo, W, or the like or a metal nitride film of any of these elements may be stacked on one of or both of a lower side and an upper side of a metal film of Al, Cu, or the like.
• the conductive film used for the source electrode layer and the drain electrode layer may be formed using a conductive metal oxide.
• indium oxide (ln 2 03), tin oxide (Sn0 2 ), zinc oxide (ZnO), ind ium oxide-tin oxide (I ⁇ C -SnC ⁇ ), indium oxide-zinc oxide (In 2 0 3 -ZnO), or any of these metal oxide materials in which sil icon oxide is contained can be used.
• a resist mask is formed over the conductive film, and the source electrode layer 405a and the drain electrode layer 405b are formed by selective etching. After the source electrode layer 405a and the drain electrode layer 405b are formed, the resist mask is removed.
• the channel length L of the transistor 440 that is to be completed later is determined by a distance between bottom edges of the source electrode layer 405a and the drain electrode layer 405b which are adjacent to each other over the oxide semiconductor film 403.
• the light exposure at the time of forming the resist mask can be performed using extreme ultraviolet having an extremely short wavelength of several nanometers to several tens of nanometers. In the light exposure by extreme ultraviolet light, the resolution is high and the focus depth is large. Therefore, the channel length L of the transistor that is to be completed later can be greater than or equal to 10 nm and less than or equal to 1000 nm, which enables high operation speed of a circuit.
• an etching step may be performed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensities.
• a resist mask formed with the use of a multi-tone mask has a plurality of thicknesses and further can be changed in shape by etching; therefore, the resist mask can be used in a plurality of etching steps for processing into different patterns. Therefore, a resist mask corresponding to at least two kinds of different patterns can be formed by one multi-tone mask.
• the number of light-exposure masks can be reduced and the number of corresponding photolithography processes can also be reduced, whereby the process can be simplified.
• the conductive film can be etched using a gas containing chlorine, for example, a gas containing chlorine (CI?), boron trichloride (BC ), silicon tetrachloride (S1CI4), or carbon tetrachloride (CCI 4 ).
• a gas containing fluorine for example, a gas containing carbon tetrafluoride (CF 4 ), sulfur hexafluoride (SFe), nitrogen trifluoride (NF3), or trifluoromethane (CHF3) can be used.
• a rare gas such as helium (He) or argon (Ar) is added, or the like can be used.
• etching method a parallel plate reactive ion etching (R1E) method or an inductively coupled plasma (ICP) etching method can be used.
• the etching condition (the amount of electric power applied to a coil-shaped electrode, the amount of electric power applied to an electrode on a substrate side, the temperature of the electrode on the substrate side, or the like) is adjusted as appropriate.
• the conductive film a stack of a 100-nm-thick titanium film, a 400-nm-thick aluminum film, and a 100-nm-thick titanium film which are formed by a sputtering method is used.
• the etching of the conductive film the stack of the titanium film, the aluminum film, and the titanium film is etched by a dry etching method, and the source electrode layer 405a and the drain electrode layer 405b are formed.
• the upper titanium film and the aluminum film are etched under first etching conditions and then the lower titanium film is etched under second etching conditions.
• the first etching conditions are as follows: the flow rate of BCI3 is 750 seem and the flow rate of C is 1 50 seem; the bias power is 1500 W; the ICP power is 0 W; and the pressure is 2.0 Pa.
• the second etching conditions are as follows: the flow rate of BCI3 is 700 seem and the flow rate of CI2 is 100 seem; the bias power is 750 W; the ICP power is 0 W; and the pressure is 2.0 Pa.
• etching conditions be optimized so as not to etch and divide the oxide semiconductor film 403 when the conductive film is etched.
• part of the oxide semiconductor film 403 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove (depressed portion) is formed.
• the transistor 440 of th is embodiment is formed (see FIG. 2B).
• the insulating film 407 is formed over the source electrode layer 405a and the drain electrode layer 405b and in contact with the oxide semiconductor film 403 (see FIG. 2C).
• the insulating film 407 can be formed by a CVD method using a film formation gas.
• a CVD method an LPCVD method, a plasma CVD method, or the like can be used.
• a coating method can be used, for example.
• the insulating film 407 can be formed using an oxide insulating film containing nitrogen.
• the oxide insulating film containing nitrogen can be a silicon oxide film containing nitrogen, an aluminum oxide film containing nitrogen, or the like.
• the concentration of nitrogen in the oxide insulating film may be higher than or equal to 0.01 atoms%, preferably higher than or equal to 0.1 atoms% and lower than or equal to 50 atoms%, further preferably higher than or equal to 0.5 atoms% and lower than or equal to 1 5 atoms%.
• a silicon oxide film that contains nitrogen at the above concentration is referred to as a silicon oxynitride film in some cases.
• the oxygen insulating film can contain oxygen more than that in the stoichiometric composition.
• a silicon oxynitride film with a th ickness of 600 nm is formed as the insulating film 407 by a plasma CVD method.
• the insulating film 407 was formed under the following deposition conditions: the flow rate of S1H4 gas is 30 seem and the flow rate of N 2 0 gas is 4000 seem; the pressure is 200 Pa; the F power (power supply output) is 1 50 W; and the substrate temperature is 220 °C.
• the insulating film 407 may be subjected to dehydration or dehydrogenation treatment by heat treatment.
• a plasma CVD method can be preferably employed.
• a film can be deposited at relatively high deposition rate with less dust or the like attached to or mixed into the film in film deposition; accordingly, the film thickness can be increased, leading to advantages in productivity.
• the temperature of the heat treatment is higher than or equal to 300 °C and lower than or equal to 700 °C, or lower than the strain point of the substrate.
• the temperature of the heat treatment is preferably higher than the film formation temperature of an insulating film 496 because the film is more effectively dehydrated or dehydrogenated.
• the substrate is put in an electric furnace which is a kind of heat treatment apparatus, and then the insulating film 496 is subjected to heat treatment at 450 °C for one hour under vacuum.
• the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater may be used.
• a heater such as a resistance heater
• an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used.
• An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
• a GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas.
• a high temperature gas an inert gas wh ich does not react with an object to be processed by heat treatment, such as nitrogen or a rare gas like argon, is used.
• GRTA may be performed as follows.
• the substrate is put in an inert gas heated at high temperature of 650 °C to 700 °C, is heated for several minutes, and is taken out of the inert gas.
• the heat treatment may be performed under reduced pressure, under a nitrogen atmosphere, or under a rare gas atmosphere. It is preferable that water, hydrogen, and the like be not contained in the atmosphere of nitrogen, a rare gas, or the like.
• the purity of nitrogen or the rare gas which is introduced into the heat treatment apparatus is preferably 6N (99.9999 %) or higher, further preferably 7N (99.99999 %) or higher (that is, the impurity concentration is preferably lower than or equal to 1 ppm, further preferably lower than or equal to 0.1 ppm).
• the insulating film 407 can be dehydrated or dehydrogenated, whereby the insulating film 407 from which impurities such as hydrogen and water is eliminated can be formed.
• a surface of the insulating film 407 be not in a state where hydrogen, water, or the like is prevented from being released (for example, by providing a film or the like which is not permeable to (or blocks) hydrogen, water, or the like), but in a state where the surface of the insulating film 407 is exposed.
• the heat treatment for dehydration or dehydrogenation may be performed plural times and may double as another heat treatment.
• Heat treatment for dehydration or dehydrogenation is performed, whereby impurities such as water and hydrogen contained in the insulating film 407 can be removed from the insulating film 407 and reduced in impurity concentration.
• impurities such as water and hydrogen contained in the insulating film 407
• the backchannel of the oxide semiconductor film 403 might have lower resistance (N-type conductivity) and a parasitic channel might be formed.
• Heat treatment for dehydration or dehydrogenation is performed, whereby the insulating film 407 can be a film containing hydrogen as little as possible. Consequently, variation in characteristics of the transistor 440 can be suppressed, and the transistor 440 can have stable electrical characteristics.
• Oxygen doping treatment may be performed on the insulating film 407 which has been dehydrated or dehydrogenated.
• oxygen doping treatment By the oxygen doping treatment on the insulating film 407, oxygen is supplied to the insulating film 407, so that oxygen is contained in the insulating film 407 and the vicinity of the interface.
• the insulating film 407 preferably contains oxygen which exceeds at least the stoichiometric ratio in (a bulk of) the film.
• the insulating film 407 can be a film containing much (excessive) oxygen (preferably, a film including a region containing oxygen in excess of the stoichiometric composition of a crystalline state), in which case the insulating film 407 can suitably function as the supply source of oxygen for the oxide semiconductor film 403.
• the heat treatment is preferably performed while part (a channel formation region) of the oxide semiconductor film 403 is in contact with the insulating film 407. Through the heat treatment, oxygen can be supplied effectively from the insulating film 407 to the oxide semiconductor film 403.
• oxygen is introduced to the oxide semiconductor film 403 to be supplied thereto, so that the oxide semiconductor fi lm 403 can be highly purified and be i-type (intrinsic).
• the heating step is performed at a temperature higher than or equal to 250 °C and lower than or equal to 700 °C, preferably higher than or equal to 400 °C and lower than or equal to 700 °C. or lower than the strain point of the substrate.
• the substrate is introduced into an electric furnace which is one of heat treatment apparatuses, and the heating step is performed on the oxide semiconductor film at 250 °C under a nitrogen atmosphere for an hour.
• the heating step may be performed under reduced pressure, under a nitrogen atmosphere, under an oxygen atmosphere, in ultra dry air (air in which the moisture amount is less than or equal to 20 ppm (-55 °C by conversion into a dew point), preferably less than or equal to 1 ppm, further preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter in the cavity ring down laser spectroscopy (CRDS) system), or under a rare gas (argon, helium, or the like) atmosphere. It is preferable that water, hydrogen, and the like be not contained in the nitrogen atmosphere, in the oxygen atmosphere, in the ultra dry air, in the rare gas atmosphere, or the like.
• the purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus be set to be 6N or higher (99.9999 %), further preferably 7N or higher (99.99999 %) (i.e., the concentration of impurities is lower than or equal to 1 ppm, preferably lower than or equal to 0.1 ppm).
• a dense inorganic insulating film may be provided over the insulating film 407.
• an aluminum oxide film is formed over the insulating film 407 by a sputtering method.
• a high-density aluminum oxide film (with a film density of 3.2 g/cm J or higher, preferably 3.6 g/cm 3 or higher), the electrical characteristics of the transistor 440 can be stabilized.
• the film density can be measured by Rutherford backscattering spectrometry (RBS) or X-ray reflection (XRR).
• the aluminum oxide film which can be used as an insulating fi lm provided over the transistor 440 has a high shielding effect (blocking effect) of preventing penetration of both oxygen and impurities such as hydrogen and moisture through the film.
• the alum inum oxide film functions as a protective film for preventing entry of impurities such as hydrogen and moisture, which might cause variation in electrical characteristics, into the oxide sem iconductor film 403, and release of oxygen which is a main component material of the oxide semiconductor from the oxide semiconductor film 403.
• planarization insulating film may be formed thereover in order to reduce surface roughness due to the transistor 440.
• an organic material such as polyimide, acrylic, or a benzocyclobutene-based resin can be used.
• a low dielectric constant material low-k material
• the planarization insulating film may be formed by stacking a plurality of insulating films formed from these materials.
• an acrylic resin film with a thickness of 1500 nm is formed as the planarization insulating film.
• the acrylic resin film can be formed by coating using a coating method and then baking (e.g., at 250 °C under a nitrogen atmosphere for an hour).
• a heat treatment may be performed after the planarization insulating film is formed.
• the heat treatment is performed at 250 °C under a nitrogen atmosphere for an hour.
• a heat treatment may be performed after the transistor 440 is formed.
• the heat treatment may be performed more than once.
• the transistor 440 including an oxide sem iconductor film having a spin density of 1 x 10' 8 spins/cm " or lower, preferably I x l O 1 7 spins/cm 3 or lower, further preferably 1 x l O 16 spins/cm J or lower, and thus the transistor 440 is electrically stable.
• the transistor 440 having stable electrical characteristics can be manufactured.
• FIG. 3 illustrates a transistor 410 in which the gate insulating film 402 and the insulating film 407 each have a staked-layer structure.
• the transistor 410 illustrated in FIG. 3 includes the gate insulating film 402 and the insulating film 407.
• a gate insulating film 402a and a gate insulating film 402b are stacked in this order from the gate electrode layer 401 side.
• an insulating film 407a and an insulating film 407b are stacked in this order from the oxide semiconductor film 403 side.
• At least the gate insulating film 402b which is in contact with the oxide semiconductor film 403 preferably contains much oxygen.
• at least the insulating film 407a which is in contact with the oxide semiconductor film 403 preferably contains much oxygen. In the case where these films contain much oxygen, oxygen can be supplied from the insulating film in contact with the oxide semiconductor film 403 to the oxide semiconductor film 403, so that oxygen vacancies in the oxide semiconductor film 403 or at an interface between the oxide semiconductor film 403 and the insulating film in contact with the oxide semiconductor film 403 can be reduced.
• a silicon nitride oxide film is used as the gate insulating film 402b and the insulating film 407a.
• the insulating film 407b functions as a protective film of the transistor 410.
• an aluminum oxide film is preferably provided as the insulating film 407b.
• an aluminum oxide film is preferably provided as the gate insulating film 402a which is in contact with the gate electrode layer 401 .
• the aluminum oxide film has a high blocking effect and thus is less likely to transmit both oxygen and impurities such as hydrogen and moisture.
• the use of an aluminum oxide film as the gate insulating film 402a and the insulating film 407b can prevent elimination of oxygen from the oxide semiconductor film 403 and the gate insulating film 402b and the insulating film 407a which are in contact with the oxide semiconductor film 403 and entry of water and hydrogen into the oxide semiconductor [0173]
• a high-density aluminum oxide film (with a film density of 3.2 g/cm 3 or higher, preferably 3.6 g/cm 3 or higher) because the electrical characteristics of the transistor 410 can be stable.
• An insulating film containing reduced hydrogen and much oxygen is provided in contact with the oxide semiconductor film 403, and an insulating film having a blocking effect (in this embodiment, an aluminum oxide film) is provided outside the insulating film, so that electrical characteristics of the transistor can be more stable.
• a semiconductor device having the normaily-off transistor 440 or the normally-off transistor 410 with favorable electrical characteristics and high reliability can be manufactured.
• a semiconductor device with a display function (also referred to as a display device) can be manufactured using any of transistors described in Embodiment 1 . Moreover, part or all of the driver circuit which includes the transistor can be formed over a substrate where a pixel portion is formed, whereby a system-on-panel can be formed.
• a sealant 4005 is provided so as to surround a pixel portion 4002 provided over a substrate 4001 , and the pixel portion 4002 is sealed with a substrate 4006.
• a scan line driver circuit 4004 and a signal line driver circuit 4003 which are each formed using a single crystal semiconductor film or a polycrystalline semiconductor film over an 1C chip or a substrate separately prepared are mounted on the substrate 4001 , in a region that is different from the region surrounded by the sealant 4005.
• a variety of signals and potentials are supplied to the signal line driver circuit 4003 and the scan line driver circuit 4004 which are separately formed and the pixel portion 4002 from flexible printed circuits (FPCs) 4018a and 401 8b.
• FPCs flexible printed circuits
• the sealant 4005 is provided so as to surround the pixel portion 4002 and the scan line driver circuit 4004 which are provided over the substrate 4001 .
• the substrate 4006 is provided over the pixel portion 4002 and the scan line driver circuit 4004. Consequently, the pixel portion 4002 and the scan line driver circuit 4004 are sealed together with a display element by the substrate 4001 , the sealant 4005, and the substrate 4006.
• the signal line driver circuit 4003 which is formed using a single crystal semiconductor film or a polycrystalline semiconductor film over an IC chip or a substrate separately prepared is mounted on the substrate 4001 , in a region that is different from the region surrounded by the sealant 4005.
• a variety of signals and potentials are supplied from an FPC 401 8 to the scan line driver circuit 4004 or the pixel portion 4002, and the signal line driver circuit 4003 which is separately formed.
• FIGS. 4B and 4C each illustrate an example in which the signal line driver circuit 4003 is formed separately and mounted on the substrate 4001 , one embodiment of the present invention is not limited to this structure.
• the scan line driver circuit may be formed separately and then mounted, or only part of the signal line driver circuit or only part of the scan line driver circuit may be formed separately and then mounted.
• connection method of such a separately formed driver circuit is not particularly limited; for example, a chip on glass (COG) method, a wire bonding method, or a tape automated bonding (TAB) method can be used.
• COG chip on glass
• TAB tape automated bonding
• FIG. 4A illustrates an example in which the signal l ine driver circuit 4003 and the scan l ine driver circuit 4004 are mounted by a COG method
• FIG. 4B illustrates an example in which the signal line driver circuit 4003 is mounted by a COG method
• FIG. 4C illustrates an example in which the signal line driver circuit 4003 is mounted by a TAB method.
• the display device includes in its category a panel in which a display element is sealed, and a module in which an IC including a controller or the like is mounted on the panel.
• the display device in this specification means an image display device, a display unit, or a light source (including a lighting device). Furthermore, the display device also includes in its category the following modules: a module to which a connector such as an FPC, a TAB tape, or a TCP is attached; a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided; and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
• a module to which a connector such as an FPC, a TAB tape, or a TCP is attached
• a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
• IC integrated circuit
• the pixel portion and the scan line driver circuit provided over the substrate include a plurality of transistors and any of transistors described in Embodiment 1 can be applied.
• a liquid crystal element also referred to as a liquid crystal display element
• a light-emitting element also referred to as a light-emitting display element
• the light-emitting element includes in its category an element whose luminance is controlled by a current or a voltage, and specifically includes an inorganic electroluminescent (EL) element, an organic EL element, and the like.
• EL inorganic electroluminescent
• a display medium whose contrast is changed by an electric effect, such as electronic ink, can also be used.
• FIGS. 4A to 4C are cross-sectional views taken along the line M-N of FIG. 4B.
• the semiconductor device includes a connection terminal electrode 4015 and a terminal electrode 4016, and the connection terminal electrode 401 5 and the terminal electrode 4016 are electrically connected to a terminal included in the FPC 401 8 through an anisotropic conductive film 401 9.
• connection terminal electrode 4015 is formed using the same conductive film as a first electrode layer 4030, and the terminal electrode 4016 is formed using the same conductive film as gate electrode layers of transistors 4010 and 401 1 .
• Each of the pixel portion 4002 and the scan line driver circuit 4004 which are provided over the substrate 4001 includes a plurality of transistors.
• the transistor 4010 included in the pixel portion 4002 and the transistor 4011 included in the scan line driver circuit 4004 are illustrated as an example.
• An insulating film 4020 is provided over the transistors 4010 and 4011 in FIG. 6A, and an insulating film 4021 is further provided in FIG. 6B.
• any of the transistors described in Embodiment 1 can be applied to the transistors 4010 and 401 1 .
• the transistors 4010 and 401 1 are each a staggered transistor having a bottom-gate structure.
• the transistors 4010 and 401 1 include an oxide semiconductor film having a
• the transistors 4010 and 401 1 can be normally-off transistors having stable electrical characteristics.
• semiconductor devices which include the transistors 401 0 and 401 1 , which are il lustrated in FIGS. 6A and 6B in this embodiment.
• a conductive layer may be further provided so as to overlap with the channel formation region in the oxide semiconductor film of the transistor 401 1 for the driver circuit.
• the conductive layer may have a potential the same as or a potential different from that of the gate electrode layer of the transistor 401 1 , and can function as a second gate electrode layer.
• the potential of the conductive layer may be GND or 0 V, or the conductive layer may be in a floating state.
• the conductive layer also has a function of blocking an external electric field, that is, a function of preventing an external electric field (particularly, to prevent static electricity) from effecting the inside (a circuit portion including a transistor).
• a blocking function of the conductive layer can prevent the variation in electrical characteristics of the transistor due to the effect of external electric field such as static electricity.
• the transistor 4010 included in the pixel portion 4002 is electrically connected to a display element to constitute a display panel.
• a display element there is no particular limitation on the kind of the display element as long as display can be performed, and various kinds of display elements can be used.
• FIG. 6A An example of a liquid crystal display device using a liquid crystal element as a display element is illustrated in FIG. 6A.
• a liquid crystal element 4013 which is a display element includes the first electrode layer 4030, a second electrode layer 4031 , and a liquid crystal layer 4008.
• An insulating film 4032 and an insulating film 4033 functioning as alignment films are provided so that the liquid crystal layer 4008 is provided therebetween.
• the second electrode layer 4031 is provided on the substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 403 I are stacked with the liquid crystal layer 4008 provided therebetween.
• a spacer 4035 is a columnar spacer obtained by selective etching of an insulating film and is provided in order to control the film thickness of the liquid crystal layer 4008 (cell gap).
• a spherical spacer may be used.
• thermotropic liquid crystal a low-molecular liquid crystal, a high-molecular liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an anti-ferroelectric liquid crystal, or the like
• a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on conditions.
• a liquid crystal composition exhibiting a blue phase for which an alignment film is not used may be used for the liquid crystal layer 4008.
• the liquid crystal layer 4008 is in contact with the first electrode layer 4030 and the second electrode layer 4031.
• the blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while temperature of a cholesteric liquid crystal is increased.
• the blue phase can be exhibited using a liquid crystal composition which is a mixture of a liquid crystal and a chiral agent.
• a liquid crystal layer can be formed by adding a polymerizable monomer, a polymerization initiator, and the like to a liquid crystal composition exhibiting a blue phase and by performing polymer stabil ization treatment.
• the liquid crystal composition exhibiting a blue phase has a short response time, and has optical isotropy, so that the alignment process is not necessary and the viewing angle dependence is low.
• electrostatic discharge damage caused by the rubbing treatment can be prevented and defects and damage of the liquid crystal display device in the manufacturing process can be reduced.
• the productivity of the liquid crystal display device can be improved.
• a transistor including an oxide semiconductor film has a possibility that the electrical characteristics of the transistor may fluctuate significantly by the influence of static electricity and deviate from the designed characteristics. Therefore, it is more effective to use a liquid crystal composition exhibiting a blue phase for the liquid crystal display device which includes the transistor including an oxide semiconductor film.
• the specific resistivity of the liquid crystal material is greater than or equal to 1 x 10 9 ⁇ -crn, preferably greater than or equal to 1 ⁇ ⁇ ⁇ " ⁇ -cm, further preferably greater than or equal to 1 x l O 12 ⁇ -cm.
• the resistivity in this specification is measured at 20 °C.
• the capacitance of a storage capacitor in the liquid crystal display device is set considering the leakage current of the transistor in the pixel portion or the like so that charge can be held for a predetermined period.
• the capacitance of the storage capacitor may be set considering the off-state current of the transistor or the like.
• the current in an off state (off-state current) can be suppressed to be low. Accordingly, an electric signal such as an image signal can be held for a longer period, and a writing interval can be set longer in an on state. The frequency of refresh operation can be accordingly reduced, which leads to an effect of suppressing power consumption.
• the transistor can operate at high speed.
• a switching transistor in a pixel portion and a driver transistor in a driver circuit portion can be formed over one substrate. That is, a semiconductor device formed using a silicon wafer or the like is not additional ly needed as a driver circuit, by which the number of components of the semiconductor device can be reduced.
• the transistor which can operate at high speed can be used also in the pixel portion, whereby a high-quality image can be provided.
• a twisted nematic (TN) mode for the liquid crystal display device, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an anti-ferroelectric liquid crystal (AFLC) mode, or the like
• TN twisted nematic
• IPS in-plane-switching
• FFS fringe field switching
• ASM axially symmetric aligned micro-cell
• OBC optical compensated birefringence
• FLC ferroelectric liquid crystal
• AFLC anti-ferroelectric liquid crystal
• a normally black liquid crystal display device such as a transmissive liquid crystal display device utilizing a vertical alignment (VA) mode may be used.
• VA vertical alignment
• Some examples are given as the vertical alignment mode; for example, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, or an advanced super view (ASV) mode can be used.
• MVA multi-domain vertical alignment
• PVA patterned vertical alignment
• ASV advanced super view
• this embodiment can be applied to a VA liquid crystal display device.
• the VA liquid crystal display device has a kind of form in which alignment of liquid crystal molecules of a liquid crystal display panel is controlled.
• liquid crystal molecules are aligned in a vertical direction with respect to a panel surface when no voltage is applied.
• it is possible to use a method called domain multiplication or multi-domain design in which a pixel is divided into some regions (subpixels) and molecules are aligned in different directions in their respective regions.
• a black matrix (light-blocking layer)
• an optical member In the display device, a black matrix (light-blocking layer), an optical member
• optical substrate such as a polarizing member, a retardation member, or an an ti -reflect ion member, and the like are provided as appropriate.
• circular polarizer which consists of a polarizing substrate and a retardation substrate, may be provided.
• a backlight, a side light, or the like may be used as a light source.
• a progressive method, an interlace method, or the like can be employed as a display method in the pixel portion.
• color elements controlled in a pixel at the time of color display are not limited to three colors: R, G, and B (R, G, and B correspond to red, green, and blue, respectively).
• R, G, B, and W W corresponds to white
• R, G, B, and one or more of yellow, cyan, magenta, and the like can be used.
• the sizes of display regions may be different between respective dots of color elements.
• the disclosed invention is not limited to a display device for color display; the disclosed invention can also be applied to a display device for monochrome display.
• a light-emitting element utilizing electroluminescence can be used as the display element included in the display device.
• Light-emitting elements utilizing electroluminescence are classified according to whether a light-emitting material is an organic compound or an inorganic compound. In general, the former is referred to as an organic EL element, and the latter is referred to as an inorganic EL element.
• the organic EL element by application of voltage to the light-emitting element, electrons and holes are separately injected from a pair of electrodes into a layer containing a light-emitting organic compound, and current flows.
• the carriers (electrons and holes) are recombined, and thus, the light-emitting organic compound is excited.
• the light-emitting organic compound returns to the ground state from the excited state, thereby emitting light.
• a light-emitting element is called a current-excitation light-emitting element owing to such a mechanism.
• an organic EL element is used as the light-emitting element is described.
• the inorganic EL elements are classified according to their element structures into a dispersion-type inorganic EL element and a thin-film inorganic EL element.
• the dispersion-type inorganic EL element has a light-emitting layer where particles of a light-emitting material are dispersed in a binder, and its light emission mechanism is donor-acceptor recombination type l ight emission that utilizes a donor level and an acceptor level.
• the thin-film inorganic EL element has a structure where a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and its light emission mechanism is localized type l ight em ission that utilizes inner-shell electron transition of metal ions.
• An organic EL element is used as the light-emitting element for description here.
• a transistor and the light-emitting element are formed over a substrate.
• the light-emitting element can employ any of the following emission structures: a top emission structure in which light emission is extracted through the surface opposite to the substrate; a bottom emission structure in which light emission is extracted through the surface on the substrate side; or a dual emission structure in which light emission is extracted through the surface opposite to the substrate and the surface on the substrate side.
• FIGS. 5A and 5B and FIG. 6B Examples of a light-emitting device in which a light-emitting element is used as a display element are illustrated in FIGS. 5A and 5B and FIG. 6B.
• FIG. 5A is a plan view of the light-emitting device
• FIG. 5B is a cross-sectional view taken along the chain lines Sl-Tl , S2-T2, and S3-T3 in FIG. 5A. Note that in the plan view in FIG. 5A, an electroluminescent layer 542 and a second electrode layer 543 are not illustrated.
• the light-emitting device illustrated in FIGS. 5A and 5B includes, over a substrate 500, a transistor 510, a capacitor 520, and an intersection 530 of wiring layers.
• the transistor 510 is electrically connected to a light-emitting element 540.
• FIGS. 5A and 5B illustrate a bottom-emission light-emitting device in which light from the light-em itting element 540 is extracted through the substrate 500.
• any of the transistors described in Embodiment I can be applied to the transistor 5 10.
• the transistor 510 is a staggered transistor having a bottom-gate structure.
• the transistor 5 10 includes gate electrode layers 5 1 l a and 51 1 b, a gate insulating fi lm 502, an oxide semiconductor film 512, and conductive layers 5 13a and 513b each functioning as a source electrode layer or a drain electrode layer.
• the transistor 510 includes an oxide semiconductor film having a spin density of 1 x l O 1 8 spins/cm 3 or lower, preferably 1 x l O 1 7 spins/cm " ' or lower, further preferably 1 x l O 16 spins/cm 3 or lower. Accordingly, the transistor 510 can be a normally-off transistor having stable electrical characteristics.
• a semiconductor device including the transistor 510 illustrated in FIGS. 5A and 5B in this embodiment can have high reliability.
• the capacitor 520 includes conductive layers 521a and 521 b, the gate insulating film 502, an oxide semiconductor film 522, and a conductive layer 523.
• the gate insulating film 502 and the oxide semiconductor film 522 are sandwiched between the conductive layer 523 and the conductive layers 521a and 521 b, so that the capacitor is formed.
• intersection 530 of wiring layers is an intersection of a conductive layer 533 and the gate electrode layers 51 1 a and 5 1 1 b.
• the conductive layer 533 and the gate electrode layers 5 1 1 a and 51 1 b intersect with each other with the gate insulating film 502 provided therebetween.
• the gate electrode layer has a layered structure of a titanium film and a copper thin film.
• An IGZO film with a thickness of 25 nm is used as the oxide semiconductor films 512 and 522.
• An interlayer insulating film 504 is formed over the transistor 5 10, the capacitor 520, and the intersection 530 of wiring layers. Over the interlayer insulating film 504, a color filter layer 505 is provided in a region overlapping with the l ight-emitting element 540. An insulating film 506 functioning as a planarization insulating film is provided over the interlayer insulating film 504 and the color filter layer 505.
• the light-emitting element 540 having a layered structure in which a first electrode layer 541 , the electroluminescent layer 542, and the second electrode layer 543 are stacked in this order is provided over the insulating film 506.
• the first electrode layer 541 and the conductive layer 513a are in contact with each other in an opening formed in the insulating film 506 and the interlayer insulating film 504, which reaches the conductive layer 513a; thus the light-emitting element 540 and the transistor 510 are electrically connected to each other.
• a partition 507 is provided so as to cover part of the first electrode layer 541 and the opening.
• a silicon oxynitride film with a thickness larger than or equal to 200 nm and smaller than or equal to 600 nm, which is formed by a plasma CVD method can be used.
• a photosensitive acrylic film with a thickness of 1500 nm and a photosensitive polyimide film with a thickness of 1500 nm can be used as the insulating film 506 and the partition 507, respectively.
• a chromatic light-transmitting resin can be used as the color filter layer 505.
• a chromatic light-transmitting resin a photosensitive organic resin or a non-photosensitive organic resin can be used.
• a photosensitive organic resin layer is preferably used, because the number of resist masks can be reduced, leading to simplification of a process.
• Chromatic colors are colors except achromatic colors such as black, gray, and white.
• the color filter layer is formed using a material which transmits only light of the chromatic color. As chromatic color, red, green, blue, or the like can be used. Cyan, magenta, yellow, or the like may also be used. "Transmitting only light of the chromatic color” means that the light transmitted through the color filter layer has a peak at a wavelength of light of the chromatic color.
• the thickness of the color filter layer may be controlled to be optimal as appropriate in consideration of the relationship between the concentration of a coloring material to be contained and the transmittance of light. For example, the thickness of the color fi lter layer 505 may be larger than or equal to 1500 nm and smaller than or equal to 2000 nm.
• a light-emitting element 4513 which is a display element is electrically connected to the transistor 4010 provided in the pixel portion 4002.
• a structure of the light-emitting element 4513 is not limited to the illustrated layered structure including the first electrode layer 4030, an electroluminescent layer 451 1 , and the second electrode layer 4031.
• the structure of the light-emitting element 4513 can be changed as appropriate depending on a direction in which light is extracted from the light-emitting element 4513, or the like.
• a partition 4510 and the partition 507 are formed using an organic insulating material or an inorganic insulating material. It is particularly preferable that the partition 4510 and the partition 507 be formed using a photosensitive resin material to have openings over the first electrode layer 4030 and the first electrode layer 541 , respectively, so that a sidewall of each opening is formed as a tilted surface with continuous curvature.
• the electroluminescent layers 451 1 and 542 may be formed using either a single layer or a plurality of layers stacked.
• a protective film may be formed over the second electrode layer 403 1 and the partition 4510 and over the second electrode layer 543 and the partition 507 in order to prevent entry of oxygen, hydrogen, moisture, carbon dioxide, or the like into the light-emitting elements 4513 and 540.
• a silicon nitride film, a silicon nitride oxide film, a DLC film, or the like can be formed.
• the light-emitting elements 45 1 3 and 540 may be covered with respective layers containing an organic compound deposited by an evaporation method so that oxygen, hydrogen, moisture, carbon dioxide, or the like do not enter the light-emitting elements 45 13 and 540.
• a filler 4514 is provided for sealing.
• the light-emitting elements 4513 and 540 be packaged (sealed) with a protective film (such as a laminate film or an ultraviolet curable resin film) or a cover material with high air-tightness and little degasification so that the light-emitting elements 45 13 and 540 are not exposed to the outside air, in this manner.
• an ultraviolet curable resin or a thermosetting resin can be used as well as an inert gas such as nitrogen or argon.
• an inert gas such as nitrogen or argon.
• PVC polyvinyl chloride
• acrylic acrylic
• polyimide an epoxy resin
• silicone resin polyvinyl butyral
• EVA ethylene vinyl acetate
• nitrogen is used as the filler.
• an optical film such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (a quarter-wave plate or a half-wave plate), or a color filter may be provided as appropriate on a light-emitting surface of the light-emitting element.
• the polarizing plate or the circularly polarizing plate may be provided with an anti-reflection film. For example, anti-glare treatment by which reflected light can be diffused by projections and depressions on the surface so as to reduce the glare can be performed.
• electronic paper in which electronic ink is driven can be provided as the display device.
• the electronic paper is also called electrophoretic display device (electrophoretic display) and is advantageous in that it exhibits the same level of readabi lity as plain paper, it has lower power consumption than other display devices, and it can be made thin and lightweight.
• the electrophoretic display device can have various modes
• the electrophoretic display device contains a plurality of microcapsules dispersed in a solvent or a solute, each microcapsule containing first particles which are positively charged and second particles which are negatively charged.
• first particles and the second particles each contain a pigment and do not move without an electric field.
• the first particles and the second particles have different colors (which may be colorless).
• an electrophoretic display device is a display device that utilizes a dieiectrophoretic effect by which a substance having a high dielectric constant moves to a high electric field region.
• a solution in which the above microcapsules are dispersed in a solvent is referred to as electronic ink.
• This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like. Further, by using a color filter or particles that have a pigment, color display can also be achieved.
• the first particles and the second particles in the microcapsules may each be formed of a single material selected from a conductive material, an insulating material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electrochromic material, and a magnetophoretic material, or formed of a composite material of any of these.
• the twisting ball display system refers to a method in which spherical particles each colored in black and white are arranged between a first electrode layer and a second electrode layer which are electrode layers used for a display element, and a potential difference is generated between the first electrode layer and the second electrode layer to control orientation of the spherical particles, so that display is performed.
• a flexible substrate as well as a glass substrate can be used as the substrates 4001 , 500, and 4006.
• a light-transmitting plastic substrate or the like can be used.
• plastic a fiberglass-reinforced plastics (FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or an acrylic resin film can be used.
• FRP fiberglass-reinforced plastics
• PVF polyvinyl fluoride
• polyester film a polyester film
• acrylic resin film acrylic resin film
• a metal substrate (metal film) of aluminum, stainless steel, or the like may be used.
• a sheet with a structure in which an aluminum foil is sandwiched between PVF films or polyester films can be used.
• a silicon oxynitride film formed by a plasma CVD method is used as the insulating film 4020.
• an aluminum oxide film be formed over the silicon oxynitride film and then heat treatment be performed.
• the aluminum oxide film has a high shielding effect (blocking effect) of preventing penetration of both oxygen and impurities such as hydrogen and moisture through the film.
• the aluminum oxide film functions as a protective film for preventing entry of impurities such as hydrogen and moisture, which might cause variation, into the silicon oxynitride film, and release of oxygen.
• the insulating films 4021 and 506 each functioning as a planarization insulating film can be formed using an organic material having heat resistance, such as acrylic, polyimide, a benzocyclobutene-based resin, polyamide, or epoxy. Other than such organic materials, it is also possible to use a low-dielectric constant material (low-k material), a siloxane-based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like. Note that the insulating films may be formed by stacking a plurality of insulating films formed from these materials.
• an organic material having heat resistance such as acrylic, polyimide, a benzocyclobutene-based resin, polyamide, or epoxy.
• low-k material low-dielectric constant material
• PSG phosphosilicate glass
• BPSG borophosphosilicate glass
• the insulating films may be formed by stacking a plurality of insulating films formed from these materials.
• the method of forming the insulating films 402 1 and 506 can be used depending on the material: a sputtering method, spin coating, dipping, spray coating, a droplet discharge method (such as an ink-jet method), a printing method (such as screen printing or offset printing), a doctor knife, a roll coater, a curtain coater, a knife coater, or the like.
• a sputtering method spin coating, dipping, spray coating, a droplet discharge method (such as an ink-jet method), a printing method (such as screen printing or offset printing), a doctor knife, a roll coater, a curtain coater, a knife coater, or the like.
• the display device displays an image by transmitting light from the light source or the display element. Therefore, the substrate and the thin films such as the insulating film and the conductive film provided for the pixel portion where light is transmitted have light-transmitting properties with respect to light in the visible light wavelength range.
• the first electrode layer and the second electrode layer (also called pixel electrode layer, common electrode layer, counter electrode layer, or the like) for applying voltage to the display element may have light-transmitting properties or light-reflecting properties, which depends on the direction in which light is extracted, the position where the electrode layer is provided, and the pattern structure of the electrode layer.
• the first electrode layers 4030 and 541 and the second electrode layers 403 1 and 543 can be formed using a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or graphene.
• a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or graphene.
• the first electrode layers 4030 and 541 and the second electrode layers 4031 and 543 can be formed using one or plural kinds selected from a metal such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), or silver (Ag); an alloy thereof; and a nitride of these metals.
• a metal such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), or silver (Ag); an alloy
• the first electrode layer 541 has a light-transmitting property and the second electrode layer 543 has a light-reflecting property. Accordingly, in the case of using a metal film as the first electrode layer 541 , the film is preferably made thin enough to secure a light-transmitting property; and in the case of using a light-transmitting conductive film as the second electrode layer 543, a light-reflecting conductive film is preferably stacked therewith.
• a conductive composition containing a conductive high molecule can be used for the first electrode layers 4030 and 541 and the second electrode layers 4031 and 543.
• a conductive high molecule also called a conductive polymer
• a ⁇ -electron conjugated conductive polymer can be used as the conductive high molecule.
• polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, a copolymer of two or more of aniline, pyrrole, and thiophene or a derivative thereof can be given.
• a protection circuit for protecting the driver circuit is preferably provided.
• the protection circuit is preferably formed using a nonlinear element.
• a semiconductor device having an image sensor function for reading data of an object can be formed with the use of any of the transistors described in Embodiment 1 .
• FIGS. 7A and 7B illustrate an example of a semiconductor device having an image sensor function.
• FIG. 7A is an equivalent circuit diagram of a photosensor
• FIG. 7B is a cross-sectional view of part of the photosensor.
• One electrode of a photodiode 602 is electrically connected to a photodiode reset signal line 658, and the other electrode of the photodiode 602 is electrically connected to a gate of a transistor 640.
• One of a source and a drain of the transistor 640 is electrically connected to a photosensor reference signal line 672, and the other of the source and the drain thereof is electrically connected to one of a source and a drain of a transistor 656.
• a gate of the transistor 656 is electrically connected to a gate signal line 659, and the other of the source and the drain thereof is electrically connected to a photosensor output signal line 671.
• a transistor including an oxide semiconductor film is denoted by a symbol "OS" so that it can be clearly identified as a transistor including an oxide semiconductor film.
• the transistors 640 and 656 are transistors each including an oxide semiconductor film, to which any of the transistors described in Embodiment 1 can be applied.
• This embodiment illustrates an example in which a transistor having a structure similar to that of the transistor 440 described in Embodiment 1 is used.
• the transistors 640 and 656 are each a staggered transistor having a bottom-gate structure.
• FIG. 7B is a cross-sectional view of the photodiode 602 and the transistor 640 in the photosensor.
• the transistor 640 and the photodiode 602 functioning as a sensor are provided over a substrate 601 (an element substrate) having an insulating surface.
• a substrate 613 is provided over the photodiode 602 and the transistor 640 with the use of an adhesive layer 608.
• An insulating film 63 1 , an interlayer insulating film 633, and an interlayer insulating film 634 are provided over the transistor 640.
• the photodiode 602 is provided over the interlayer insulating film 633.
• a first semiconductor film 606a, a second semiconductor film 606b, and a third semiconductor fi lm 606c are stacked in this order from the interlayer insulating film 633 side, between electrode layers 641 a and 64 l b formed over the interlayer insulating film 633 and an electrode layer 642 formed over the interlayer insulating film 634.
• the electrode layer 641 b is electrically connected to a conductive layer 643 formed over the interlayer insulating film 634, and the electrode layer 642 is electrically connected to a conductive layer 645 through the electrode layer 641 a.
• the conductive layer 645 is electrically connected to the gate electrode layer of the transistor 640, and the photodiode 602 is electrically connected to the transistor 640.
• a pin photodiode in which a semiconductor film having p-type conductivity as the first semiconductor film 606a, a high-resistance semiconductor film (i-type semiconductor film) as the second semiconductor film 606b, and a semiconductor film having n-type conductivity as the third semiconductor film 606c are stacked is illustrated as an example.
• the first semiconductor film 606a is a p-type semiconductor film and can be formed using an amorphous silicon film containing an impurity element imparting p-type conductivity.
• the first semiconductor film 606a is formed by a plasma CVD method with the use of a semiconductor source gas containing an impurity element belonging to Group 13 (e.g., boron (B)).
• a semiconductor source gas e.g., boron (B)
• siiane (SiH 4 ) can be used.
• Si 2 H 6 , S1H2CI2, S1HCI 3 , S1CI4, S1 4, or the like may be used.
• an amorphous silicon film which does not contain an impurity element may be formed, and then an impurity element may be added to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like can be performed to diffuse the impurity element after the impurity element is added by an ion implantation method or the like.
• a method of forming the amorphous silicon film an LPCVD method, a vapor deposition method, a sputtering method, or the like may be used as a method of forming the amorphous silicon film.
• the first semiconductor film 606a is pre ferably formed with a thickness larger than or equal to 10 nm and smaller than or equal to 50 nm.
• the second semiconductor film 606b is an i-type semiconductor film (intrinsic sem iconductor film) and is formed using an amorphous sil icon film.
• an amorphous silicon film is formed by a plasma CVD method with the use of a sem iconductor source gas.
• the semiconductor source gas siiane (SiH 4 ) can be used.
• Si 2 H6, SiH ⁇ C , SiHCI 3 , SiCI 4 , S1F4, or the like may be used.
• the second semiconductor film 606b may be formed by an LPCVD method, a vapor deposition method, a sputtering method, or the like.
• the second semiconductor film 606b is preferably formed with a thickness larger than or equal to 200 nm and smaller than or equal to 1000 nm.
• the third semiconductor film 606c is an n-type semiconductor film and can be formed using an amorphous silicon film containing an impurity element imparting n-type conductivity.
• the third semiconductor film 606c is formed by a plasma CVD method with the use of a semiconductor source gas containing an impurity element belonging to Group 15 (e.g., phosphorus (P)).
• a semiconductor source gas e.g., phosphorus (P)
• siiane (S1H4) can be used.
• Si 2 H , S1H2CI2, S1HCI 3 , S1CI4, SiF 4 , or the like may be used.
• an amorphous silicon film which does not contain an impurity element may be formed, and then an impurity element may be added to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like can be performed to diffuse the impurity element after the impurity element is added by an ion implantation method or the like.
• a method of forming the amorphous silicon film an LPCVD method, a vapor deposition method, a sputtering method, or the like can be used as a method of forming the amorphous silicon film.
• the third semiconductor film 606c is preferably formed with a thickness larger than or equal to 20 nm and smaller than or equal to 200 nm.
• the first semiconductor film 606a, the second semiconductor film 606b, and the third semiconductor film 606c are not necessarily formed using an amorphous semiconductor, and may be formed using a polycrystalline semiconductor or a microcrystalline semiconductor (semi-amorphous semiconductor: SAS).
• a pin photodiode has better characteristics when a surface on the p-type semiconductor film side is used as a light-receiving plane.
• a surface on the p-type semiconductor film side is used as a light-receiving plane.
• light received by the photodiode 602 from a surface of the substrate 601 , over which the pin photodiode is formed, is converted into electric signals is described.
• light from the semiconductor film having the conductivity type opposite to that of the semiconductor film on the light-receiving plane is disturbance light; therefore, the electrode layer is formed using a light-blocking conductive film.
• a surface on the n-type semiconductor film side can alternatively be used as the light-receiving plane.
• the insulating film 631 , the interlayer insulating film 633, and the interlayer insulating film 634 can be formed using the following method depending on the material: a sputtering method, a plasma CVD method, spin coating, dipping, spray coating, a droplet discharge method (such as an ink-jet method), or a printing method (such as screen printing or offset printing).
• the insulating film 631 can be a single layer or a stacked layer including an inorganic insulating film.
• the inorganic insulating films are an oxide insulating film (e.g., a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, and an aluminum oxynitride layer) and a nitride insulating film (e.g., a silicon nitride layer, a silicon nitride oxide layer, an aluminum nitride layer, and an aluminum nitride oxide layer).
• a silicon oxynitride film formed by a plasma CVD method is used as the insulating film 631 .
• an aluminum oxide film be formed over the silicon oxynitride film and then heat treatment be performed.
• the aluminum oxide film has a high shielding effect (blocking effect) of preventing penetration of both oxygen and impurities such as hydrogen and moisture through the film.
• the aluminum oxide film functions as a protective film for preventing entry of impurities such as hydrogen and moisture, which might cause variation, into the silicon oxynitride film, and release of oxygen.
• an insulating film functioning as a planarization insulating film is preferably used as each of the interlayer insulating films 633 and 634.
• an organic insulating material having heat resistance such as polyimide, acrylic, a benzocyclobutene-based resin, polyamide, or epoxy, can be used.
• organic insulating materials it is possible to use a single layer or stacked layers of a low-dielectric constant material (low-k material), a siloxane-based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like.
• a light source such as a backlight can be used at the time of reading data on the object to be detected.
• the transistor 640 includes an oxide semiconductor film having a spin density of 1 x l O 18 spins/cm J or lower, preferably 1 x 10 17 spins/cm 3 or lower, further preferably 1 x 10 16 spins/cm J or lower. Accordingly, the transistor 640 can be a normally-off transistor having stable electrical characteristics.
• a semiconductor device including the transistor 640 in this embodiment can have high reliability.
• a semiconductor device disclosed in this specification can be applied to a variety of electronic devices (including game machines).
• electronic devices include a television set (also referred to as a television or a television receiver), a monitor of a computer or the like, cameras such as a digital camera and a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproducing device, a game machine (e.g., a pachinko machine or a slot machine), and a game console.
• a television set also referred to as a television or a television receiver
• cameras such as a digital camera and a digital video camera, a digital photo frame
• a mobile phone such as a portable game machine, a portable information terminal, an audio reproducing device, a game machine (e.g., a pachinko machine or a slot machine), and a game console.
• a game machine e.g., a pachinko machine or a slot machine
• game console Specific examples
• FIG. 8A illustrates a table 9000 having a display portion.
• a display portion 9003 is incorporated in a housing 9001 and an image can be displayed on the display portion 9003.
• the housing 9001 is supported by four leg portions 9002.
• a power cord 9005 for supplying power is provided for the housing 9001.
• the semiconductor device described in any of Embodiments 1 to 3 can be used for the display portion 9003 so that the electronic device can have a high reliability.
• the display portion 9003 has a touch-input function.
• the display portion 9003 may function as a control device which controls the home appliances by operation on the screen.
• the display portion 9003 can have a touch-input function.
• the screen of the d isplay portion 9003 can be placed perpendicular to a floor with a hinge provided for the housing 9001 ; thus, the table 9000 can also be used as a television set.
• a television device having a large screen is set in a small room, an open space is reduced; however, when a display portion is incorporated in the table, a space in the room can be efficiently used.
• FIG. 8B illustrates a television set 9100.
• a display portion 9103 is incorporated in a housing 9101 and an image can be displayed on the display portion 9103. Note that here the housing 9101 is supported by a stand 9105.
• the television set 9100 can be operated with an operation switch of the housing
• the remote controller 91 10 may be provided with a display portion 9107 for displaying data output from the remote controller 91 10.
• the television set 9100 illustrated in FIG. 8B is provided with a receiver, a modem, and the like. With the receiver, the television set 9100 can receive a general television broadcast. Further, when the television set 9100 is connected to a communication network with or without wires connection via the modem, one-way (from a transmitter to a receiver) or two-way (between a transmitter and a receiver or between receivers) data communication can be performed. [0290]
• the semiconductor device described in any of Embodiments 1 to 3 can be used for the display portions 9103 and 9107 so that the television set and the remote controller can have a high reliability.
• FIG. 8C illustrates a computer, which includes a main body 9201 , a housing 9202, a display portion 9203, a keyboard 9204, an external connection port 9205, a pointing device 9206, and the like.
• the semiconductor device described in any of Embodiments 1 to 3 can be used for the display portion 9203 so that the computer can have a high rel iability.
• FIGS. 9A and 9B illustrate an example of a foldable tablet.
• FIG. 9A illustrates the tablet which is unfolded.
• the tablet includes a housing 9630, a display portion 963 1 a, a display portion 963 1 b, a display mode switch 9034, a power switch 9035, a power-saving mode switch 9036, a clasp 9033, and an operation switch 9038.
• the semiconductor device described in any of Embodiments 1 to 3 can be used for the display portions 963 1 a and 9631 b so that the tablet terminal can have a high reliability.
• Part of the display portion 9631a can be a touch panel region 9632a, and data can be input by touching operation keys 9638a that are displayed.
• a structure in which a half region in the display portion 9631 a has only a display function and the other half region has a touch panel function is shown as an example, the display portion 9631 a is not limited to this structure.
• the whole region in the display portion 9631 a may have a touch panel function.
• the display portion 9631 a can display a keyboard in the whole region to be a touch panel, and the display portion 963 1 b can be used as a display screen.
• part of the display portion 9631 b can be a touch panel region 9632b, and data can be input by touching operation keys 9638b that are displayed.
• a keyboard display switching instruction portion 9639 displayed on the touch panel is touched with a finger, a stylus, or the like, a keyboard can be displayed on the display portion 9631 b.
• Touch input can be performed in the touch panel region 9632a and the touch panel region 9632b at the same time.
• the switch 9034 for switching display modes can switch the display between a portrait mode and a landscape mode, and between monochrome display and color display, for example.
• the switch 9036 for switching to power-saving mode can control display luminance to be optimal in accordance with the amount of external light in use of the tablet terminal wh ich is detected by an optical sensor incorporated in the tablet terminal.
• Another detection device including a sensor for detecting inclination, such as a gyroscope or an acceleration sensor, may be incorporated in the tablet terminal, in addition to the optical sensor.
• the display portion 9631 a and the display portion 963 1 b have the same display area in FIG. 9A, one embodiment of the present invention is not particularly limited to this example.
• the display portion 9631 a and the display portion 9631 b may have different areas or different display quality. For example, higher definition images may be displayed on one of the display portions 9631 a and 9631 b.
• FIG. 9B illustrates the tablet terminal which is folded, which includes the housing 9630, a solar battery 9633, a charge and discharge control circuit 9634, a battery 9635, and a DC-DC converter 9636.
• FIG. 9B illustrates the charge and discharge control circuit 9634 including the battery 9635 and the DC-DC converter 9636.
• the housing 9630 can be closed when not in use.
• the display portions 9631 a and 9631 b can be protected, which makes it possible to provide a tablet terminal with high durability and improved reliability for long-term use.
• the tablet terminal illustrated in FIGS. 9A and 9B can also have a function of displaying various kinds of data (e.g., a still image, a moving image, and a text image), a function of displaying a calendar, the date, the time, or the like on the display portion, a touch-input function of operating or editing data displayed on the display portion by touch input, a function of control ling processing by various kinds of software (programs), and the like.
• various kinds of data e.g., a still image, a moving image, and a text image
• the solar battery 9633 which is attached on a surface of the tablet terminal, can supply electric power to a touch panel, a display portion, an image signal processor, and the like. Note that the solar battery 9633 can be provided on one or two surfaces of the housing 9630, so that the battery 9635 can be charged efficiently.
• the use of a lithium ion battery as the battery 9635 is advantageous in downsizing or the like.
• FIG. 9C illustrates the solar battery 9633, the battery 9635, the DC-DC converter 9636, a converter 9637, switches SW l to SW3, and a display portion 9631.
• the battery 9635, the DC-DC converter 9636, the converter 9637, and the switches SW l to SW3 correspond to the charge and discharge control circuit 9634 illustrated in FIG. 9B.
• the solar battery 9633 is shown as an example of a charge means, there is no particular limitation on the charge means and the battery 9635 may be charged with another means such as a piezoelectric element or a thermoelectric conversion element (Peltier element).
• the battery 9635 may be charged with a non-contact power transmission module which is capable of charging by transmitting and receiving power by wireless (without contact), or another charge means used in combination.
• Example Sample and Comparative Sample were formed.
• the oxide semiconductor f lm was subjected to heat treatment under a nitrogen atmosphere at 350 °C for one hour and then was subjected to heat treatment under an atmosphere of nitrogen and oxygen at 350 °C for one hour.
• a silicon oxynitride film with a thickness of 400 nm was formed over the oxide semiconductor film by a plasma CVD method.
• the silicon oxynitride film of Example Sample was formed under the following deposition conditions: the flow rate of S1H4 gas was 30 seem and the flow rate of N 2 0 gas was 3000 seem; the pressure was 200 Pa; the RF power (power supply output) was 150 W; and the substrate temperature was 220 °C.
• the silicon oxynitride film of Comparative Sample was formed under the following deposition conditions: the flow rate of S1H 4 gas was 30 seem and the flow rate of N 2 0 gas was 3000 seem; the pressure was 40 Pa; the RF power (power supply output) was 150 W; and the substrate temperature was 220 °C.
• the conductive layer had a stack of a 100-nm-thick titanium fi lm, a 400-nm-thick aluminum film, and a 1 00-nm-thick titanium film.
• Comparative Sample was measured by electron spin resonance (ESR).
• ESR electron spin resonance
• the measurement conditions were as follows. The temperature was 25 °C, the power of microwaves (9.2 GHz) was 20 mW, the direction of a magnetic field was parallel to a surface of each of the oxide semiconductor films, and the lower limit of the detection range was 1.0 x l O' 7 spins/cm 3 . Further, the conductivity of the oxide semiconductor films in Example Sample and Comparative Sample was measured.
• FIG. 10 shows the spin density (bar graphs) and the conductivity (rhombic dots) of Example Sample and Comparative Sample.
• the spin density of the oxide semiconductor film of Example Sample was 7.8 x lO 17 spins/cm 3 , which was in the range of 1 .0 ⁇ l O 18 spins/cm 3 or lower.
• the spin density of the oxide semiconductor film of Comparative Sample was 2.4 x 10 18
• spins/cm which was in the range of 1 .0 x 10 spins/cm or higher.
• the conductivity of the oxide semiconductor film of Example Sample was 1 .0 x 10 J S/cm 3 , which was in the range of 1 .0 x 10 J S/cm J or lower.
• the conductivity of the oxide semiconductor film of Example Sample was 9.5 ⁇ 10 4 S/cm 3 , which was in the range of 1 .0 x 10 J S/cm J or higher.
• the oxide semiconductor film of Example Sample has a low spin density, few defects, and a low conductivity. With the oxide semiconductor film, the normally-off transistor having favorable electrical characteristics can be provided.
• a transistor including an oxide semiconductor film was formed and the electrical characteristics thereof were evaluated.
• Example Transistor and Comparative Transistor were formed to have a similar structure to the transistor 440 illustrated in FIGS. I A and I B. Methods for forming Example Transistor and Comparative Transistor are described below.
• a silicon nitride film with a thickness of 1 00 nm and a silicon nitride oxide film with a thickness of 1 50 nm were formed by a plasma CVD method as an insulating layer over a glass substrate.
• the silicon nitride film was formed under the following deposition conditions: the flow rate of SiH 4 gas was 30 seem, the flow rate of H 2 gas was 800 seem, and the flow rate of NH3 gas was 300 seem; the power for film formation (RF) was 600 W; the film formation pressure was 60 Pa; and the substrate temperature was 330 °C.
• the silicon nitride oxide film was formed under the following deposition conditions: the flow rate of S1H4 gas was 10 seem, and the flow rate of N 2 0 gas was 1200 seem; the power for film formation (RF) was 30 W; the film formation pressure was 22 Pa; and the substrate temperature was 330 °C.
• a tungsten film with a thickness of 100 nm was formed over the insulating layer by a sputtering method, and was etched by an etching method to form a gate electrode layer.
• a silicon oxynitride film with a thickness of 100 nm was formed over the gate electrode layer by a high-density plasma CVD method to form a gate insulating film.
• the silicon oxynitride film was formed under the following deposition conditions: the flow rate of SiH 4 gas was 250 seem, the flow rate of N2O gas was 2500 seem, and the flow rate of Ar gas was 2500 seem; the pressure was 30 Pa; the substrate temperature was 325 °C; the power was 5 kW (the frequency: 2.45 GHz, the number of power sources: 4); and the distance between an electrode and the substrate was 160 mm.
• Heat treatment was performed at 1 70 °C for four minutes under vacuum before the IGZO film was formed. Through this heat treatment, water adsorbed on the surface of the gate insulating film can be removed.
• the IGZO film was processed into an island shape by a wet etching method, so that an oxide semiconductor film was formed.
• the oxide semiconductor film was subjected to heat treatment under a nitrogen atmosphere at 450 °C for one hour and then was subjected to heat treatment under an atmosphere of nitrogen and oxygen at 350 °C for one hour.
• a stack of a 100-nm-thick titanium film, a 400-nm-thick aluminum film, and a 100-nm-thick titanium film was formed as a conductive layer over the oxide semiconductor film by a sputtering method, and was processed by etching to form a source electrode layer and a drain electrode layer.
• a sil icon oxynitride film with a thickness of 600 nm was formed as an insulating fi lm to cover the oxide sem iconductor film, the source electrode layer, and the drain electrode layer by a plasma CVD method.
• the si l icon oxyn itride film of Example Transistor was formed under the fol lowing deposition conditions: the flow rate of S1H4 gas was 30 seem and the flow rate of N 2 0 gas was 4000 seem; the pressure was 200 Pa; the RF power (power supply output) was 1 50 W; and the substrate temperature was 220 °C.
• the si l icon oxynitride film of Comparative Transistor was formed under the fol lowing deposition conditions: the flow rate of S1H4 gas was 30 seem and the flow rate of 2O gas was 4000 seem; the pressure was 40 Pa; the RF power (power supply output) was 1 50 W; and the substrate temperature was 220 °C.
• Example Transistor and Comparative Transistor a sil icon oxide film was formed over the silicon oxynitride film by a sputtering method, and heat treatment was performed under an atmosphere of nitrogen and oxygen at 300 °C for one hour. Then, an acrylic resin layer was formed over the silicon oxide film and an indium tin oxide film containing silicon oxide was formed as a pixel electrode layer, and after that, heat treatment was performed under a nitrogen atmosphere at 250 °C for one hour.
• Example Transistor and Comparative Transistor were formed.
• the channel length (Z) was 6 ⁇ and the channel width ( W) was 50 ⁇ .
• Example Transistor and Comparative Transistor were evaluated.
• FIG. 1 1 shows gate voltage ( g )-drain current (IS) characteristics and field-effect mobi l ity of Example Transistor.
• FIG. 12 shows gate voltage ( Fg)-drain current (7 d ) characteristics of Comparative Transistor.
• the measurement conditions were as fol lows: the drain voltage ( Vi) was I V and 10 V, and the gate voltage ( V s ) was in the range of -20 V to 1 5 V.
• Example Transistor exhibited favorable e lectrical characteristics as a switching element and was a normal ly-off transistor.
• Comparative Transistor d id not exhibit electrical characteristics as a switching element, as shown in F IG. 12.
• the cond itions for forming the oxide semiconductor film and the silicon oxynitride film of Example Transistor are sim ilar to those of Example Sample in Example 1 , and the conditions for forming the oxide sem iconductor film and the silicon oxynitride fi lm of Comparative Transistor are similar to those of Comparative Sample in Example 1 .
• Example Transistor is lower than or equal to 1 .0 ⁇ 10 spins/cm and that the spin density of the oxide semiconductor film of Comparative Sample is higher than 1 .0 x 10 18 spins/cm 3 .
• the oxide semiconductor film of Example Transistor has a low spin density, few defects, and a low conductivity. It was therefore found that the use of such an oxide semiconductor film can provide a normally-off transistor having favorable electrical characteristics.

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• Thin Film Transistor (AREA)
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