WO2013033926A1 - Lcd驱动系统中的切角电路及lcd驱动系统 - Google Patents

Lcd驱动系统中的切角电路及lcd驱动系统 Download PDF

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Publication number
WO2013033926A1
WO2013033926A1 PCT/CN2011/079793 CN2011079793W WO2013033926A1 WO 2013033926 A1 WO2013033926 A1 WO 2013033926A1 CN 2011079793 W CN2011079793 W CN 2011079793W WO 2013033926 A1 WO2013033926 A1 WO 2013033926A1
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WIPO (PCT)
Prior art keywords
discharge
mos transistor
voltage
module
circuit
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PCT/CN2011/079793
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English (en)
French (fr)
Inventor
林柏伸
谭小平
符俭泳
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深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US13/380,892 priority Critical patent/US8854288B2/en
Publication of WO2013033926A1 publication Critical patent/WO2013033926A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing

Definitions

  • the invention relates to the field of LCD driving, in particular to a chamfering circuit and an LCD driving system in an LCD driving system.
  • the driving structure of the LCD in order to reduce the feedback voltage and the line-varying effect, it is necessary to add a chamfering circuit to the driving system of the LCD, and adjust the slope of the driving voltage waveform by the chamfering circuit to generate the chamfer angle.
  • the chamfering circuit has been widely used in each type of machine.
  • the components of the chamfering circuit are mounted on the control board of the LCD driving system, and the MOS tube is used as a switching component to control the turn-on voltage to charge the scanning line driving circuit.
  • the discharge module is connected in parallel to the output end of the discharge voltage of the scan line drive circuit.
  • the control signal controls the MOS tube to be turned on, the scan line drive circuit discharges through the discharge module to conduct the charge at the load end of the scan line drive circuit to the ground.
  • the discharge module is required to bear a large amount of electric charge, causing the temperature of the discharge module to gradually rise, which may cause high temperature or cause the discharge module to burn.
  • the main object of the present invention is to provide a chamfering circuit and an LCD driving system in an LCD driving system with good heat dissipation effect and small occupied area.
  • the invention provides a chamfering circuit in an LCD driving system, which is connected to a plurality of scanning line driving circuits, and includes:
  • a charging module integrated on the control board, receiving an input of a DC driving voltage, and outputting an opening voltage to charge the scanning line driving circuit;
  • a plurality of discharge modules are respectively integrated on the respective scan line drive circuits to control discharge of the corresponding scan line drive circuit.
  • the discharge module comprises:
  • a discharge control sub-module for controlling communication or blocking of the discharge module to control discharge of a corresponding scan line driving circuit
  • the electron discharging module is configured to receive a discharge voltage of the corresponding scan line driving circuit and control a discharge speed of the discharge voltage.
  • the discharge control sub-module includes a first MOS transistor
  • the discharge module includes a discharge resistor
  • a gate of the first MOS transistor receives a first control signal that controls its turn-on or turn-off, the first MOS
  • the source of the tube is grounded, and the drain of the first MOS transistor receives the input of the discharge voltage via the discharge resistor.
  • the discharge control sub-module further includes a pull-up resistor, and a gate of the first MOS transistor is connected to the power source via the pull-up resistor.
  • the charging module comprises:
  • a switch submodule for receiving an input of a DC driving voltage and outputting an ON voltage to charge the scan line driving circuit
  • a switch control submodule configured to control the switch submodule to communicate or block to control a charging time of the scan line driving circuit.
  • the switch control submodule includes a second MOS transistor
  • the switch submodule includes a third MOS transistor
  • a source of the second MOS transistor is grounded, and a gate of the second MOS transistor receives control to conduct Or a second control signal that is turned off
  • a drain of the second MOS transistor is connected to a gate of the third MOS transistor via a first resistor, and the third MOS transistor is controlled to be turned on or off
  • the third MOS transistor receives an input of the DC driving voltage, and the DC driving voltage is input to a gate of the third MOS transistor via a second resistor, and the DC driving voltage is further input to a drain of the third MOS transistor via a third resistor
  • the drain output turn-on voltage of the third MOS transistor charges the scan line driving circuit.
  • the switch control sub-module further includes a pull-down resistor, and a gate of the second MOS transistor is grounded via the pull-down resistor.
  • the second control signal and the first control signal are high/low level rectangular waves of the same period and opposite amplitudes.
  • the present invention also provides a chamfering circuit in another LCD driving system, which is connected to a plurality of scanning line driving circuits, and includes:
  • a charging module integrated on the control board, receiving an input of a DC driving voltage, and outputting an opening voltage to charge the scanning line driving circuit;
  • a plurality of discharge modules are respectively integrated on the respective scan line driving circuits to control discharge of the corresponding scan line driving circuit;
  • a voltage stabilizing module connected to the discharge module for controlling a discharge lower limit value of the scan line driving circuit.
  • the discharge module comprises:
  • a discharge control sub-module for controlling communication or blocking of the discharge module to control discharge of a corresponding scan line driving circuit
  • the electron discharging module is configured to receive a discharge voltage of the corresponding scan line driving circuit and control a discharge speed of the discharge voltage.
  • the discharge control sub-module includes a first MOS transistor
  • the discharge module includes a discharge resistor
  • a gate of the first MOS transistor receives a first control signal that controls its turn-on or turn-off, the first MOS
  • the source of the tube is grounded, and the drain of the first MOS transistor receives the input of the discharge voltage via the discharge resistor.
  • the discharge control sub-module further includes a pull-up resistor, and a gate of the first MOS transistor is connected to the power source via the pull-up resistor.
  • the voltage stabilizing module includes a voltage stabilizing tube, the voltage stabilizing tube is connected in series with the discharge resistor, and a positive pole of the voltage stabilizing tube is connected to a drain of the first MOS tube, and a negative pole of the voltage stabilizing tube is A discharge resistor receives an input of the discharge voltage.
  • the present invention also provides an LCD driving system including a control board and a plurality of scan line driving circuits, and further comprising:
  • the chamfering circuit specifically includes:
  • a charging module integrated on the control board, receiving an input of a DC driving voltage, and outputting an opening voltage to charge the scanning line driving circuit;
  • a plurality of discharge modules are respectively integrated on the respective scan line drive circuits to control discharge of the corresponding scan line drive circuit.
  • the discharge module comprises:
  • a discharge control sub-module for controlling communication or blocking of the discharge module to control discharge of a corresponding scan line driving circuit
  • the electron discharging module is configured to receive a discharge voltage of the corresponding scan line driving circuit and control a discharge speed of the discharge voltage.
  • the discharge control sub-module includes a first MOS transistor
  • the discharge module includes a discharge resistor
  • a gate of the first MOS transistor receives a first control signal that controls its turn-on or turn-off, the first MOS
  • the source of the tube is grounded, and the drain of the first MOS transistor receives the input of the discharge voltage via the discharge resistor.
  • the discharge control sub-module further includes a pull-up resistor, and a gate of the first MOS transistor is connected to the power source via the pull-up resistor.
  • the charging module comprises:
  • a switch submodule for receiving an input of a DC driving voltage and outputting an ON voltage to charge the scan line driving circuit
  • a switch control submodule configured to control the switch submodule to communicate or block to control a charging time of the scan line driving circuit.
  • the switch control submodule includes a second MOS transistor
  • the switch submodule includes a third MOS transistor
  • a source of the second MOS transistor is grounded, and a gate of the second MOS transistor receives control to conduct Or a second control signal that is turned off
  • a drain of the second MOS transistor is connected to a gate of the third MOS transistor via a first resistor, and the third MOS transistor is controlled to be turned on or off
  • the third MOS transistor receives an input of the DC driving voltage, and the DC driving voltage is input to a gate of the third MOS transistor via a second resistor, and the DC driving voltage is further input to a drain of the third MOS transistor via a third resistor
  • the drain output turn-on voltage of the third MOS transistor charges the scan line driving circuit.
  • the switch control sub-module further includes a pull-down resistor, and a gate of the second MOS transistor is grounded via the pull-down resistor.
  • the invention disperses the discharge modules respectively on each scan line drive circuit, reduces the load discharge charge of the discharge module, and avoids the generation of high temperature; the spatial position of each discharge module is separated, avoiding crowding between components, and does not occupy control
  • the space of the board is more conducive to lowering the temperature, releasing the space of the control panel and reducing the area of the control panel.
  • FIG. 1 is a schematic structural view of a chamfering circuit in an LCD driving system of the present invention
  • FIG. 2 is a schematic structural view of a charging module of a chamfering circuit in an LCD driving system of the present invention
  • FIG. 3 is a circuit diagram of a charging module of a chamfering circuit in the LCD driving system of the present invention
  • FIG. 4 is a circuit diagram of a charging module (with a pull-down resistor) of a chamfering circuit in the LCD driving system of the present invention
  • FIG. 5 is a schematic structural view of a discharge module of a chamfering circuit in an LCD driving system of the present invention
  • FIG. 6 is a circuit diagram of a discharge module of a chamfering circuit in an LCD driving system of the present invention
  • FIG. 7 is a circuit diagram of a discharge module (with pull-up resistor) of a chamfering circuit in the LCD driving system of the present invention.
  • FIG. 8 is a schematic structural view of a chamfering circuit (with a voltage stabilizing module) in an LCD driving system of the present invention
  • FIG. 9 is a circuit diagram of a discharge module (connected with a voltage stabilizing module) of a chamfering circuit in the LCD driving system of the present invention.
  • Figure 10 is a schematic view showing the structure of an LCD driving system (with a chamfering circuit) of the present invention.
  • a chamfering circuit 10 in an LCD driving system is connected to a plurality of scanning line driving circuits 30, and includes:
  • the charging module 11 is integrated on the control board 20, receives an input of a DC driving voltage, and outputs an opening voltage to charge the scanning line driving circuit 30;
  • a plurality of discharge modules 12 are respectively integrated on the respective scan line drive circuits 30 to control the discharge of the corresponding scan line drive circuit 30.
  • only one discharge module 12 is taken as an example, and each of the discharge modules 12 is respectively connected to each scan line drive circuit 30, so that each The load discharged on one discharge module 12 is reduced, and only the load charge on the scanning line drive circuit 30 is burdened, and the high temperature problem caused by the discharge charge of the discharge module 12 under all loads is avoided, and in a large-sized panel or When there is a faster update frequency, the high temperature problem can be significantly improved.
  • the discharge modules 12 are respectively distributed to the respective scan lines, and the spatial positions of the discharge modules 12 are separated to avoid crowding between the components, and the space of the control board 20 is not occupied, which is more favorable for lowering the temperature and releasing the space of the control board 20 , reducing the area of the control board 20.
  • FIG. 2 is a schematic structural view of a charging module of a chamfering circuit in the LCD driving system shown in FIG. 1;
  • FIG. 3 is a circuit diagram of a charging module of the chamfering circuit in the LCD driving system shown in FIG. 2; It is a circuit diagram of a charging module with a pull-down resistor in a chamfering circuit in the LCD driving system shown in FIG.
  • the charging module 11 includes:
  • the switch sub-module 111 is configured to receive an input of a DC driving voltage, and output an ON voltage to charge the scan line driving circuit 30;
  • the switch control sub-module 112 is configured to control the switch sub-module 111 to communicate or block to control the charging time of the scan line driving circuit.
  • the switch sub-module 111 when the switch control sub-module 112 controls the switch sub-module 111 to communicate, the switch sub-module 111 outputs the same turn-on voltage as the DC drive voltage amplitude to charge the scan line drive circuit 30; when the switch control sub-module 112 controls the switch When the sub-module 111 is blocked, the turn-on voltage no longer charges the scan line driving circuit 30. At this time, when the discharge module 12 is connected, the scan line driving circuit 30 discharges through the discharge module 12, and the cut-off slope of the discharge voltage and the discharge module The size of the discharge resistor of 12 is related.
  • the switch sub-module 111 and the switch control sub-module 112 are both mounted on the control board 20, and the discharge module 12 is mounted on the scan line drive circuit 30, which is separated from the installation position of the charging module 11, and is a switch sub-module 111 and a switch controller.
  • the installation of the module 112 releases the space, so that the components of the switch sub-module 111 and the switch control sub-module 112 are not crowded, which is advantageous for heat dissipation, and the area of the control board 20 can be saved.
  • the switch control sub-module 112 includes a second MOS transistor Q2
  • the switch sub-module 111 includes a third MOS transistor Q3, the source of the second MOS transistor Q2 is grounded, and the gate of the second MOS transistor Q2 is received and controlled.
  • the second control signal GVOFF is turned on or off; the drain of the second MOS transistor Q2 is connected to the gate of the third MOS transistor Q3 via the first resistor R1, and the third MOS transistor Q3 is controlled to be turned on or off; the third MOS transistor
  • the source of Q3 receives a DC driving voltage VGHP, and the DC driving voltage VGHP is input to the gate of the third MOS transistor Q3 via the second resistor R2, and the DC driving voltage VGHP is also input to the drain of the third MOS transistor Q3 via the third resistor R3.
  • the drain of the third MOS transistor Q3 outputs a turn-on voltage VGH1 having a constant value to charge the scan line driving circuit 30.
  • the second MOS transistor Q2 is an N-channel MOS transistor
  • the third MOS transistor Q3 is a P-channel MOS transistor
  • the second control signal GVOFF is a rectangular wave
  • the DC driving voltage VGHP is a DC voltage having a constant amplitude.
  • the gate voltage of the second MOS transistor Q2 is higher than the source voltage, the second MOS transistor Q2 is turned on, and the gate of the third MOS transistor Q3 is grounded via the first resistor R1, the source The DC drive voltage VGHP is received, so that the gate voltage of the third MOS transistor Q3 is lower than the source voltage, the third MOS transistor Q3 is also turned on, and the DC drive voltage VGHP is output through the source and the drain of the third MOS transistor Q3.
  • the turn-on voltage VGH1 is charged, the turn-on voltage VGH1 charges the scan line driving circuit 30, and its amplitude is the same as the amplitude of the DC drive voltage VGHP; when the second control signal GVOFF is low, the gate of the second MOS transistor Q2 The voltage and the source voltage are both zero, the second MOS transistor Q2 is turned off, the third MOS transistor Q3 is also turned off, and the DC driving voltage VGHP stops outputting to the load, that is, the turn-on voltage VGH1 stops charging the scan line driving circuit 30, at this time, when When the discharge module 12 is connected, the scan line driving circuit 30 is discharged through the discharge module 12, and the discharge voltage amplitude of the scan line drive circuit 30 is decreased.
  • the waveform of the discharge voltage VGH2 is a bevel angle, the chamfer slope and the discharge of the discharge module 12.
  • the magnitude of the resistor is related.
  • the MOS transistor is used as the switch component, and the second MOS transistor Q2 and the third MOS transistor Q3 are controlled to be turned on or off by the second control signal GVOFF, thereby controlling the turn-on voltage VGH1 to charge the scan line driving circuit 30, and second.
  • the time interval between the previous turn-on of the MOS transistor Q2 and the third MOS transistor Q3 to the next turn-off is the charging time, which is the same as the high-level duration of the second control signal GVOFF.
  • the second MOS transistor Q2, the third MOS transistor Q3, the first resistor R1, the second resistor R2, and the third resistor R3 are all mounted on the control board 20, and the discharge module 12 is mounted on the scan line driving circuit 30 as a charging module.
  • the mounting position of each component of 11 releases the space, so that the components are not crowded, which is advantageous for heat dissipation, and the area of the control board 20 can be saved.
  • the switch control sub-module 112 further includes a pull-down resistor R4, and the gate of the second MOS transistor Q2 is grounded via a pull-down resistor R4.
  • the gate of the second MOS transistor Q2 is quickly introduced to the ground via the pull-down resistor R4, so that the gate voltage of the second MOS transistor Q2 is rapidly reduced to zero value.
  • the cut-off speed of the second MOS transistor Q2 is increased, and the reaction time for the turn-on voltage VGH1 to stop charging is shortened, which is advantageous for the discharge of the scan line driving circuit 30.
  • FIG. 5 is a schematic structural view of a discharge module of a chamfering circuit in the LCD driving system of FIG. 1;
  • FIG. 6 is a circuit diagram of a discharge module of the chamfering circuit of the LCD driving system shown in FIG. 5; It is a circuit diagram of a discharge module provided with a pull-up resistor in a chamfering circuit in the LCD driving system shown in FIG.
  • the discharge module 12 includes:
  • the discharge control sub-module 122 is configured to control the communication or blocking of the discharge module 12 to control the discharge of the corresponding scan line driving circuit 30;
  • the discharge module 121 receives the discharge voltage VGH2 of the corresponding scan line drive circuit 30 and controls the discharge speed of the discharge voltage VGH2.
  • the scan line drive circuit 30 when the discharge control sub-module 122 controls the discharge module 12 to communicate, the scan line drive circuit 30 is discharged through the discharge module 121, and the slope of the ramp angle of the discharge voltage discharge is related to the discharge resistance of the discharge module 121; When the discharge control sub-module 122 controls the discharge module 12 to block, the scan line drive circuit 30 stops discharging. In this embodiment, the time interval between the previous discharge module 12 being connected to the next discharge module 12 being blocked is the discharge duration of the scan line drive circuit 30.
  • the electronic discharge module 121 and the discharge control sub-module 122 are both mounted on the scan line driving circuit 30, and are separated from the mounting position of the charging module 11, and the space for the installation of the charging module 11 is released, so that the components are not crowded.
  • the discharge control sub-module 122 can also be mounted on the control board 20, only the discharge module 121 is mounted on the scan line drive circuit 30, and the control terminals of the respective discharge modules 121 are connected to the discharge control sub-module 122 for use.
  • a discharge control sub-module 122 simultaneously controls the discharge path of the plurality of scan line drive circuits 30 to communicate or block, reducing the number of components of the discharge control sub-module 122 and saving space for the scan line drive circuit 30.
  • the discharge control sub-module 122 includes a first MOS transistor Q1, and the discharge module 121 includes a discharge resistor Rf.
  • the gate of the first MOS transistor Q1 receives a first control signal GVON that controls its turn-on or turn-off.
  • the source of the first MOS transistor Q1 is grounded, and the drain of the first MOS transistor Q1 receives the discharge voltage VGH2 via the discharge resistor Rf.
  • the first MOS transistor Q1 is an N-channel MOS transistor, and the first control signal GVON is a rectangular wave.
  • the first control signal GVON is at a high level, the gate voltage of the first MOS transistor Q1 is higher than the source voltage, the first MOS transistor Q1 is turned on, the scan line driving circuit 30 is discharged through the discharge resistor Rf, and the discharge amount and the discharge resistor are discharged.
  • the magnitude of the resistance of Rf is related; when the first control signal GVON is at a low level, the gate voltage and the source voltage of the first MOS transistor Q1 are both zero, the first MOS transistor Q1 is turned off, and the scanning line driving circuit 30 stops discharging.
  • the first MOS transistor Q1 is controlled to be turned on or off by the first control signal GVON, thereby controlling the discharge time of the scan line driving circuit 30, and the time interval between the previous MOS transistor Q1 and the next turn-off, That is, the discharge time, that is, the duration of the waveform of the discharge voltage VGH2, which is the same as the high level duration of the first control signal GVON.
  • the first MOS transistor Q1 and the discharge resistor Rf are all mounted on the scan line driving circuit 30, which releases a space for the mounting positions of the components of the charging module 11, so that the components are not crowded, which is advantageous for heat dissipation. The area of the control board 20 is saved.
  • the respective scanning line driving circuits 30 respectively correspond to the respective first MOS transistors Q1 and the discharging resistors Rf, the positions between the respective discharging modules 12 are separated, which is more advantageous for heat dissipation.
  • the first MOS transistor Q1 may be mounted on the control board 20, only the discharge resistor Rf is mounted on the scan line drive circuit 30, and each discharge resistor Rf is connected in parallel to the drain of the first MOS transistor Q1, using a first A MOS transistor Q1 simultaneously controls the discharge path of the plurality of scanning line driving circuits 30 to be connected or blocked, so that the number of the first MOS transistors Q1 is reduced, and space is saved for the scanning line driving circuit 30.
  • the discharge control sub-module 122 further includes a pull-up resistor R5, and the gate of the first MOS transistor Q1 is connected to the power supply VDD via a pull-up resistor R5.
  • the pull-up resistor R5 can be one, and is mounted on the control board 20.
  • the gates of the first MOS transistors Q1 are all connected in parallel on the same pull-up resistor R5, which can save the number of components and reduce the scanning line driving circuit 30.
  • the occupied space of the pull-up resistor R5 may be integrated into each of the scan line driving circuits 30 and connected to the gate of the corresponding first MOS transistor Q1 to reduce the occupied space of the control board 20.
  • FIG. 8 is a schematic structural view of a chamfering circuit provided with a voltage stabilizing module in the LCD driving system of FIG. 1;
  • FIG. 9 is a chamfering circuit of the LCD driving system shown in FIG. Circuit diagram of the discharge module to which the voltage regulator module is connected.
  • the chamfering circuit 10 further includes:
  • the voltage stabilizing module 13 is connected to the discharging module 12 for controlling the discharge lower limit value of the scanning line driving circuit 30.
  • the voltage regulator module 13 is used to control the lowest point voltage value of the discharge voltage discharge cutoff waveform, and then the slope of the discharge voltage discharge cutoff waveform is adjusted according to the actual situation, so that the effect of reducing the feedback voltage and the line change effect is better.
  • the voltage regulator module 13 can be integrated on the control board 20, and a voltage regulator module 13 can simultaneously control the lower limit value of the discharge voltage of each discharge module 12, thereby saving the number of components of the voltage regulator module 13; the voltage regulator module 13 can also be separately integrated.
  • one voltage stabilizing module 13 corresponds to one discharging module 12, reducing the space occupied by the control board 20.
  • the voltage stabilizing module 13 includes a Zener diode D, which is connected in series with a discharge resistor Rf.
  • the anode of the Zener diode D is connected to the drain of the first MOS transistor Q1.
  • the negative electrode receives the discharge voltage VGH2 via the discharge resistor Rf.
  • the voltage point of the discharge cutoff waveform of the discharge voltage VGH2 is controlled by the Zener diode D, and the slope of the discharge cutoff waveform of the discharge voltage VGH2 is adjusted according to the actual situation, so that the effect of reducing the feedback voltage and the line change effect is further improved. it is good.
  • the voltage regulator tube D can be mounted on the control board 20, and is connected in series with a plurality of discharge resistors Rf connected in parallel, and simultaneously adjusts the lower limit value of the discharge voltage VGH2 of each scan line drive circuit 30 by using one voltage regulator tube D, thereby saving the voltage regulator tube D
  • the number of voltage regulators D is mounted on the scan line drive circuit 30, and a Zener diode D is connected in series with a discharge resistor Rf to reduce the space occupied by the control board 20.
  • FIG. 10 is a schematic structural view of an LCD driving system (with a chamfering circuit) according to the present invention.
  • the LCD driving system includes a control board 20, a scanning line driving circuit 30, and a chamfering circuit 10, and a chamfering angle.
  • the charging module 11 of the circuit 10 is integrated on the control board 20, and the plurality of discharge modules 12 of the chamfering circuit 10 are integrated on the respective scanning line driving circuits 30, respectively.
  • the turn-on voltage generated by the charging module 11 integrated on the control board 20 reaches the respective scanning line driving circuits 30 on the left and right sides, respectively, and charges the scanning line driving circuit 30.
  • the respective scanning line driving circuits 30 are discharged through the discharging module 12 to reduce the influence of the feedback voltage and the line-varying effect.
  • the discharge module 12 is distributed and integrated into each of the scan line drive circuits 30.
  • Each of the scan line drive circuits 30 corresponds to one discharge module 12.
  • the discharge module 12 only bears the scan line drive. The load charge on the circuit 30 avoids the high temperature problem caused by the discharge charge of all loads.
  • the chamfering circuit 10 can significantly improve the high temperature problem in the large-sized panel or when there is a faster update frequency.
  • the distributed integration of the discharge modules 12 separates the spatial positions of the discharge modules 12, avoids crowding between components, and does not occupy the space of the control board 20, which is more favorable for lowering the temperature, releasing the space of the control board 20, and reducing the control. Board 20 area.

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Abstract

一种LCD驱动系统中的切角电路（10），与多个扫描线驱动电路（30）连接，包括：充电模块（11），集成在控制板（20）上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路（30）充电；多个放电模块（12），分别集成在所述各个扫描线驱动电路（30）上，控制对应的扫描线驱动电路（30）放电。本发明将放电模块（12）分别分散到每一个扫描线驱动电路（30）上，减少放电模块（12）负担的负载放电电荷，避免高温的产生；各放电模块（12）的空间位置分离，避免元器件之间排列拥挤，且不占用控制板的空间，更加有利于降低温度，释放控制板空间，减小控制板面积。

Description

LCD驱动系统中的切角电路及LCD驱动系统
技术领域
本发明涉及到LCD驱动领域，特别涉及到LCD驱动系统中的切角电路及LCD驱动系统。
背景技术
在LCD的驱动架构中，为降低回馈电压与线变效应，需要在LCD的驱动系统中加入切角电路，通过切角电路调整驱动电压波形的斜率，即产生切角。目前，切角电路已经广泛应用在每一个机种上面，通常切角电路的各个组件均安装在LCD驱动系统的控制板上，采用MOS管作开关组件，控制开启电压对扫描线驱动电路充电，同时，将放电模块并联到扫描线驱动电路的放电电压的输出端，当控制信号控制MOS管导通时，扫描线驱动电路会经由放电模块放电，将扫描线驱动电路负载端的电荷导到大地。
但是，当扫描线驱动电路放电时，由于所有电流都流经放电模块，放电模块需承受大量的电荷，导致放电模块的温度逐渐上升，将会有高温产生，或导致放电模块烧毁。
发明内容
本发明的主要目的为提供一种散热效果好、占用面积少的LCD驱动系统中的切角电路及LCD驱动系统。
本发明提出一种LCD驱动系统中的切角电路，与多个扫描线驱动电路连接，包括：
充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电。
优选地，所述放电模块包括：
放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
优选地，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
优选地，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
优选地，所述充电模块包括：
开关子模块，用于接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
开关控制子模块，用于控制所述开关子模块连通或阻断，以控制所述扫描线驱动电路的充电时间。
优选地，所述开关控制子模块包括第二MOS管，所述开关子模块包括第三MOS管，所述第二MOS管的源极接地，该第二MOS管的栅极接收控制其导通或截止的第二控制信号；所述第二MOS管的漏极经第一电阻连接所述第三MOS管的栅极，控制所述第三MOS管导通或截止；所述第三MOS管的源极接受所述直流驱动电压的输入，该直流驱动电压经第二电阻输入所述第三MOS管的栅极，该直流驱动电压还经第三电阻输入所述第三MOS管的漏极，该第三MOS管的漏极输出开启电压对所述扫描线驱动电路充电。
优选地，所述开关控制子模块还包括下拉电阻，所述第二MOS管的栅极经所述下拉电阻接地。
优选地，所述第二控制信号与第一控制信号为周期相同、幅值相反的高/低电平矩形波。
本发明还提出另一种LCD驱动系统中的切角电路，与多个扫描线驱动电路连接，包括：
充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电；
稳压模块，与所述放电模块连接，用于控制所述扫描线驱动电路的放电下限值。
优选地，所述放电模块包括：
放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
优选地，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
优选地，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
优选地，所述稳压模块包括稳压管，该稳压管与所述放电电阻串联，该稳压管的正极连接所述第一MOS管的漏极，该稳压管的负极经所述放电电阻接受所述放电电压的输入。
本发明还提出一种LCD驱动系统，包括控制板和多个扫描线驱动电路，还包括：
切角电路，该切角电路具体包括：
充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电。
优选地，所述放电模块包括：
放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
优选地，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
优选地，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
优选地，所述充电模块包括：
开关子模块，用于接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
开关控制子模块，用于控制所述开关子模块连通或阻断，以控制所述扫描线驱动电路的充电时间。
优选地，所述开关控制子模块包括第二MOS管，所述开关子模块包括第三MOS管，所述第二MOS管的源极接地，该第二MOS管的栅极接收控制其导通或截止的第二控制信号；所述第二MOS管的漏极经第一电阻连接所述第三MOS管的栅极，控制所述第三MOS管导通或截止；所述第三MOS管的源极接受所述直流驱动电压的输入，该直流驱动电压经第二电阻输入所述第三MOS管的栅极，该直流驱动电压还经第三电阻输入所述第三MOS管的漏极，该第三MOS管的漏极输出开启电压对所述扫描线驱动电路充电。
优选地，所述开关控制子模块还包括下拉电阻，所述第二MOS管的栅极经所述下拉电阻接地。
本发明将放电模块分别分散到每一个扫描线驱动电路上，减少放电模块负担的负载放电电荷，避免高温的产生；各放电模块的空间位置分离，避免元器件之间排列拥挤，且不占用控制板的空间，更加有利于降低温度，释放控制板空间，减小控制板面积。
附图说明
图1是本发明LCD驱动系统中切角电路的结构示意图；
图2是本发明LCD驱动系统中切角电路之充电模块的结构示意图；
图3是本发明LCD驱动系统中切角电路之充电模块的电路图；
图4是本发明LCD驱动系统中切角电路之充电模块（设有下拉电阻）的电路图；
图5是本发明LCD驱动系统中切角电路之放电模块的结构示意图；
图6是本发明LCD驱动系统中切角电路之放电模块的电路图；
图7是本发明LCD驱动系统中切角电路之放电模块（设有上拉电阻）的电路图；
图8是本发明LCD驱动系统中切角电路（设有稳压模块）的结构示意图；
图9是本发明LCD驱动系统中切角电路之放电模块（连接有稳压模块）的电路图；
图10是本发明LCD驱动系统（设有切角电路）的结构示意图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
如图1所示，本发明实施例提到的LCD驱动系统中的切角电路10，与多个扫描线驱动电路30连接，包括：
充电模块11，集成在控制板20上，接受直流驱动电压的输入，输出开启电压对扫描线驱动电路30充电；
多个放电模块12，分别集成在各个扫描线驱动电路30上，控制对应的扫描线驱动电路30放电。
本实施例中，控制扫描线驱动电路30放电的放电模块12可以为多个，本实施例仅以一个放电模块12为例，每一个放电模块12分别与各个扫描线驱动电路30连接，使得每一个放电模块12上负担的负载放电电荷变少，仅负担所在扫描线驱动电路30上的负载电荷，避免因放电模块12负担所有负载的放电电荷而造成的高温问题，且在大尺寸面板或是有较快的更新频率时，其高温问题可获得显著改善。此外，放电模块12分别分散到各个扫描线上，各放电模块12的空间位置分离，避免元器件之间排列拥挤，且不占用控制板20的空间，更加有利于降低温度，释放控制板20空间，减小控制板20面积。
参照图2至图4，图2为图1所示LCD驱动系统中切角电路之充电模块的结构示意图；图3为图2所示LCD驱动系统中切角电路之充电模块的电路图；图4为图3所示LCD驱动系统中切角电路之设有下拉电阻的充电模块的电路图。
如图2所示，充电模块11包括：
开关子模块111，用于接受直流驱动电压的输入，输出开启电压对扫描线驱动电路30充电；
开关控制子模块112，用于控制开关子模块111连通或阻断，以控制扫描线驱动电路的充电时间。
本实施例中，当开关控制子模块112控制开关子模块111连通时，开关子模块111输出与直流驱动电压幅值相同的开启电压对扫描线驱动电路30充电；当开关控制子模块112控制开关子模块111阻断时，开启电压不再对扫描线驱动电路30充电，此时，当放电模块12连通时，扫描线驱动电路30通过放电模块12进行放电，放电电压的切角斜率与放电模块12的放电电阻的大小有关。本实施例通过控制开关子模块111的连通与阻断，进而控制开启电压对扫描线驱动电路30充电，开关子模块111由前一次连通到下一次阻断之间的时间间隔，即为开启电压充电时间。此外，开关子模块111与开关控制子模块112均安装于控制板20上，放电模块12安装在扫描线驱动电路30上，与充电模块11的安装位置分开，为开关子模块111与开关控制子模块112的安装释放了空间，使开关子模块111和开关控制子模块112的元器件排列不拥挤，有利于散热，且可节约控制板20的面积。
如图3所示，开关控制子模块112包括第二MOS管Q2，开关子模块111包括第三MOS管Q3，第二MOS管Q2的源极接地，该第二MOS管Q2的栅极接收控制其导通或截止的第二控制信号GVOFF；第二MOS管Q2的漏极经第一电阻R1连接第三MOS管Q3的栅极，控制第三MOS管Q3导通或截止；第三MOS管Q3的源极接受直流驱动电压VGHP，该直流驱动电压VGHP经第二电阻R2输入第三MOS管Q3的栅极，该直流驱动电压VGHP还经第三电阻R3输入第三MOS管Q3的漏极，该第三MOS管Q3的漏极输出具有恒定值的开启电压VGH1对扫描线驱动电路30充电。
本实施例中，第二MOS管Q2为N沟道MOS管，第三MOS管Q3为P沟道MOS管，第二控制信号GVOFF为矩形波，直流驱动电压VGHP为幅值恒定的直流电压。当第二控制信号GVOFF为高电平时，第二MOS管Q2的栅极电压高于源极电压，第二MOS管Q2导通，第三MOS管Q3的栅极经第一电阻R1接地，源极接受直流驱动电压VGHP，故第三MOS管Q3的栅极电压低于源极电压，第三MOS管Q3也导通，直流驱动电压VGHP经第三MOS管Q3的源极和漏极输出，即为开启电压VGH1，该开启电压VGH1对扫描线驱动电路30充电，其幅值与直流驱动电压VGHP的幅值相同；当第二控制信号GVOFF为低电平时，第二MOS管Q2的栅极电压与源极电压都为零，第二MOS管Q2截止，第三MOS管Q3也截止，直流驱动电压VGHP停止输出到负载，即开启电压VGH1停止对扫描线驱动电路30充电，此时，当放电模块12连通时，扫描线驱动电路30经放电模块12放电，扫描线驱动电路30的放电电压幅值减小，放电电压VGH2的波形为一斜切角，切角斜率与放电模块12的放电电阻的大小值有关。本实施例利用MOS管作为开关组件，通过第二控制信号GVOFF控制第二MOS管Q2和第三MOS管Q3的导通或截止，进而控制开启电压VGH1对扫描线驱动电路30充电时间，第二MOS管Q2和第三MOS管Q3前一次导通到下一次截止之间的时间间隔，即为充电时间，此充电时间与第二控制信号GVOFF的高电平持续时间相同。此外，第二MOS管Q2、第三MOS管Q3、第一电阻R1、第二电阻R2和第三电阻R3均安装于控制板20，放电模块12安装在扫描线驱动电路30上，为充电模块11的各元器件的安装位置释放了空间，使各元器件排列不拥挤，有利于散热，且可节约控制板20的面积。
如图4所示，开关控制子模块112还包括下拉电阻R4，第二MOS管Q2的栅极经下拉电阻R4接地。
本实施例中，当第二控制信号GVOFF为低电平时，第二MOS管Q2的栅极经下拉电阻R4被迅速导入到地，使第二MOS管Q2的栅极电压快速降为零值，提高了第二MOS管Q2的截止速度，缩短了开启电压VGH1停止充电的反应时间，有利于扫描线驱动电路30放电。
参照图5至图7，图5为图1所示LCD驱动系统中切角电路之放电模块的结构示意图；图6为图5所示LCD驱动系统中切角电路之放电模块的电路图；图7为图6所示LCD驱动系统中切角电路之设有上拉电阻的放电模块的电路图。
如图5所示，放电模块12包括：
放电控制子模块122，用于控制放电模块12的连通或阻断，以控制对应的扫描线驱动电路30放电；
放电子模块121，用于接受对应的扫描线驱动电路30的放电电压VGH2，并控制放电电压VGH2的放电速度。
本实施例中，当放电控制子模块122控制放电模块12连通时，扫描线驱动电路30经放电子模块121放电，放电电压放电的斜切角斜率与放电子模块121的放电电阻的大小有关；当放电控制子模块122控制放电模块12阻断时，扫描线驱动电路30停止放电。本实施例中，前一次放电模块12连通到下一次放电模块12阻断之间的时间间隔即为扫描线驱动电路30放电持续时间。此外，放电子模块121和放电控制子模块122均安装在扫描线驱动电路30上，与充电模块11的安装位置分开，为充电模块11的安装释放了空间，使各元器件排列不拥挤，有利于散热，且可节约控制板20的面积。同时，由于各个扫描线驱动电路30上分别对应于各自的放电子模块121和放电控制子模块122，使各个放电模块12之间位置分离，也更加有利于散热。此外，还可将放电控制子模块122安装在控制板20上，只安装放电子模块121在扫描线驱动电路30上，并将各个放电子模块121的控制端连接到放电控制子模块122，利用一个放电控制子模块122同时控制多个扫描线驱动电路30上的放电通路连通或阻断，减少了放电控制子模块122的元器件数量，且为扫描线驱动电路30节约了空间。
如图6所示，放电控制子模块122包括第一MOS管Q1，放电子模块121包括放电电阻Rf，第一MOS管Q1的栅极接收控制其导通或截止的第一控制信号GVON，该第一MOS管Q1的源极接地，该第一MOS管Q1的漏极经放电电阻Rf接受放电电压VGH2。
本实施例中，第一MOS管Q1为N沟道MOS管，第一控制信号GVON为矩形波。当第一控制信号GVON为高电平时，第一MOS管Q1的栅极电压高于源极电压，第一MOS管Q1导通，扫描线驱动电路30经放电电阻Rf放电，放电量与放电电阻Rf的阻值大小有关；当第一控制信号GVON为低电平时，第一MOS管Q1的栅极电压与源极电压都为零，第一MOS管Q1截止，扫描线驱动电路30停止放电。本实施例通过第一控制信号GVON控制第一MOS管Q1导通或截止，进而控制扫描线驱动电路30的放电时间，第一MOS管Q1前一次导通到下一次截止之间的时间间隔，即为放电时间，即放电电压VGH2的波形斜切的持续时间，此持续时间与第一控制信号GVON的高电平持续时间相同。此外，第一MOS管Q1和放电电阻Rf均安装在扫描线驱动电路30上，为充电模块11的各元器件的安装位置释放了空间，使各元器件排列不拥挤，有利于散热，且可节约控制板20的面积；同时，由于各个扫描线驱动电路30上分别对应于各自的第一MOS管Q1和放电电阻Rf，使各个放电模块12之间位置分离，也更加有利于散热。此外，还可将第一MOS管Q1安装在控制板20上，只安装放电电阻Rf在扫描线驱动电路30上，并将各个放电电阻Rf并联到第一MOS管Q1的漏极，利用一个第一MOS管Q1同时控制多个扫描线驱动电路30的放电通路连通或阻断，使减少了第一MOS管Q1的数量，且为扫描线驱动电路30节约了空间。
如图7所示，放电控制子模块122还包括上拉电阻R5，第一MOS管Q1的栅极经上拉电阻R5连接电源VDD。
本实施例中，当第一控制信号GVON为高电平时，第一MOS管Q1的栅极经上拉电阻R5被迅速拉高，使第一MOS管Q1的栅极电压快速高于源极电压，提高了第一MOS管Q1的导通速度，缩短了扫描线驱动电路30放电的反应时间，有利于的切角形成。此外，上拉电阻R5可以为一个，安装于控制板20上，各第一MOS管Q1的栅极均并联在同一个上拉电阻R5上，可节约元器件数量，减少对扫描线驱动电路30的占用空间；上拉电阻R5也可以为多个，分别集成在各个扫描线驱动电路30上，与对应的第一MOS管Q1的栅极连接，减少对控制板20的占用空间。
参照图8和图9，图8为图1所示LCD驱动系统中切角电路之设有稳压模块的切角电路的结构示意图；图9为图8所示LCD驱动系统中切角电路之连接有稳压模块的放电模块的电路图。
如图8所示，切角电路10还包括：
稳压模块13，与放电模块12连接，用于控制扫描线驱动电路30的放电下限值。
本实施例中，利用稳压模块13控制放电电压放电切角波形的最低点电压值，进而根据实际情况调节放电电压放电切角波形的斜率，使降低回馈电压和线变效应的效果更好。稳压模块13可集成在控制板20上，利用一个稳压模块13同时控制各个放电模块12的放电电压下限值，可节约稳压模块13的元器件数量；稳压模块13也可以分别集成在各个扫描线驱动电路30上，一个稳压模块13对应于一个放电模块12，减少对控制板20的占用空间。
如图9所示，稳压模块13包括稳压管D，该稳压管D与放电电阻Rf串联，该稳压管D的正极连接该第一MOS管Q1的漏极，该稳压管D的负极经放电电阻Rf接受放电电压VGH2。
本实施例中，利用稳压管D控制放电电压VGH2放电切角波形的最低点电压值，进而根据实际情况调节放电电压VGH2放电切角波形的斜率，使降低回馈电压和线变效应的效果更好。稳压管D可安装在控制板20上，与并联的多个放电电阻Rf串联，利用一个稳压管D同时调节各个扫描线驱动电路30的放电电压VGH2下限值，可节约稳压管D的数量；或者将稳压管D安装在扫描线驱动电路30上，一个稳压管D串联一个放电电阻Rf，减少对控制板20的占用空间。
如图10所示，图10为本发明LCD驱动系统（设有切角电路）的结构示意图，该实施例中LCD驱动系统包括控制板20、扫描线驱动电路30和切角电路10，切角电路10的充电模块11集成在控制板20上，切角电路10的多个放电模块12分别集成在各个扫描线驱动电路30上。
本实施例中，集成在控制板20上的充电模块11产生的开启电压分别达到左右两边各个扫描线驱动电路30上，对扫描线驱动电路30进行充电。充电完成后，各个扫描线驱动电路30经放电模块12进行放电，以降低回馈电压和线变效应的影响。本实施例将放电模块12分散集成到各个扫描线驱动电路30上，每一个扫描线驱动电路30都对应一个放电模块12，当扫描线驱动电路30放电时，放电模块12仅负担所在扫描线驱动电路30上的负载电荷，避免因负担所有负载的放电电荷而造成的高温问题，该切角电路10在大尺寸面板或是有较快的更新频率时，其高温问题可获得显著改善。此外，放电模块12的分散集成使各放电模块12的空间位置分离，避免元器件之间排列拥挤，且不占用控制板20的空间，更加有利于降低温度，释放控制板20空间，减小控制板20面积。
以上所述仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种LCD驱动系统中的切角电路，与多个扫描线驱动电路连接，其特征在于，包括：
    充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
    多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电。
  2. 根据权利要求1所述的LCD驱动系统中的切角电路，其特征在于，所述放电模块包括：
    放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
    放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
  3. 根据权利要求2所述的LCD驱动系统中的切角电路，其特征在于，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
  4. 根据权利要求3所述的LCD驱动系统中的切角电路，其特征在于，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
  5. 根据权利要求3所述的LCD驱动系统中的切角电路，其特征在于，所述充电模块包括：
    开关子模块，用于接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
    开关控制子模块，用于控制所述开关子模块连通或阻断，以控制所述扫描线驱动电路的充电时间。
  6. 根据权利要求5所述的LCD驱动系统中的切角电路，其特征在于，所述开关控制子模块包括第二MOS管，所述开关子模块包括第三MOS管，所述第二MOS管的源极接地，该第二MOS管的栅极接收控制其导通或截止的第二控制信号；所述第二MOS管的漏极经第一电阻连接所述第三MOS管的栅极，控制所述第三MOS管导通或截止；所述第三MOS管的源极接受所述直流驱动电压的输入，该直流驱动电压经第二电阻输入所述第三MOS管的栅极，该直流驱动电压还经第三电阻输入所述第三MOS管的漏极，该第三MOS管的漏极输出开启电压对所述扫描线驱动电路充电。
  7. 根据权利要求6所述的LCD驱动系统中的切角电路，其特征在于，所述开关控制子模块还包括下拉电阻，所述第二MOS管的栅极经所述下拉电阻接地。
  8. 根据权利要求6所述的LCD驱动系统中的切角电路，其特征在于，所述第二控制信号与第一控制信号为周期相同、幅值相反的高/低电平矩形波。
  9. 一种LCD驱动系统中的切角电路，与多个扫描线驱动电路连接，其特征在于，包括：
    充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
    多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电；
    稳压模块，与所述放电模块连接，用于控制所述扫描线驱动电路的放电下限值。
  10. 根据权利要求9所述的LCD驱动系统中的切角电路，其特征在于，所述放电模块包括：
    放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
    放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
  11. 根据权利要求10所述的LCD驱动系统中的切角电路，其特征在于，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
  12. 根据权利要求11所述的LCD驱动系统中的切角电路，其特征在于，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
  13. 根据权利要求12所述的LCD驱动系统中的切角电路，其特征在于，所述稳压模块包括稳压管，该稳压管与所述放电电阻串联，该稳压管的正极连接所述第一MOS管的漏极，该稳压管的负极经所述放电电阻接受所述放电电压的输入。
  14. 一种LCD驱动系统，包括控制板和多个扫描线驱动电路，其特征在于，还包括：
    切角电路，该切角电路具体包括：
    充电模块，集成在控制板上，接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
    多个放电模块，分别集成在所述各个扫描线驱动电路上，控制对应的扫描线驱动电路放电。
  15. 根据权利要求14所述的LCD驱动系统，其特征在于，所述放电模块包括：
    放电控制子模块，用于控制所述放电模块的连通或阻断，以控制对应的扫描线驱动电路放电；
    放电子模块，用于接受对应的扫描线驱动电路的放电电压，并控制所述放电电压的放电速度。
  16. 根据权利要求15所述的LCD驱动系统，其特征在于，所述放电控制子模块包括第一MOS管，所述放电子模块包括放电电阻，所述第一MOS管的栅极接收控制其导通或截止的第一控制信号，该第一MOS管的源极接地，该第一MOS管的漏极经所述放电电阻接受所述放电电压的输入。
  17. 根据权利要求16所述的LCD驱动系统，其特征在于，所述放电控制子模块还包括上拉电阻，所述第一MOS管的栅极经所述上拉电阻连接电源。
  18. 根据权利要求16所述的LCD驱动系统，其特征在于，所述充电模块包括：
    开关子模块，用于接受直流驱动电压的输入，并输出开启电压对所述扫描线驱动电路充电；
    开关控制子模块，用于控制所述开关子模块连通或阻断，以控制所述扫描线驱动电路的充电时间。
  19. 根据权利要求18所述的LCD驱动系统，其特征在于，所述开关控制子模块包括第二MOS管，所述开关子模块包括第三MOS管，所述第二MOS管的源极接地，该第二MOS管的栅极接收控制其导通或截止的第二控制信号；所述第二MOS管的漏极经第一电阻连接所述第三MOS管的栅极，控制所述第三MOS管导通或截止；所述第三MOS管的源极接受所述直流驱动电压的输入，该直流驱动电压经第二电阻输入所述第三MOS管的栅极，该直流驱动电压还经第三电阻输入所述第三MOS管的漏极，该第三MOS管的漏极输出开启电压对所述扫描线驱动电路充电。
  20. 根据权利要求19所述的LCD驱动系统，其特征在于，所述开关控制子模块还包括下拉电阻，所述第二MOS管的栅极经所述下拉电阻接地。
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