WO2020098064A1 - 控制电路、显示装置及控制电路的控制方法 - Google Patents

控制电路、显示装置及控制电路的控制方法 Download PDF

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Publication number
WO2020098064A1
WO2020098064A1 PCT/CN2018/122163 CN2018122163W WO2020098064A1 WO 2020098064 A1 WO2020098064 A1 WO 2020098064A1 CN 2018122163 W CN2018122163 W CN 2018122163W WO 2020098064 A1 WO2020098064 A1 WO 2020098064A1
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WIPO (PCT)
Prior art keywords
circuit
voltage
control circuit
input terminal
voltage detection
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PCT/CN2018/122163
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English (en)
French (fr)
Inventor
纪飞林
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惠科股份有限公司
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Priority to US17/043,103 priority Critical patent/US11074848B2/en
Publication of WO2020098064A1 publication Critical patent/WO2020098064A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display

Definitions

  • the present application relates to the field of display technology, in particular to a control circuit, a display device, and a control method of the control circuit.
  • the power chip Power IC receives an input voltage of 12V, and the Power The IC outputs a main voltage VAA to the source driver circuit Source driver and a gamma correction circuit P-Gamma IC, and outputs a digital logic voltage VDD to the source driver circuit Source
  • the driver, the gamma correction circuit P-Gamma IC and the timing control circuit T-CON output a turn-on voltage VGH and a turn-off voltage VGL to the gate drive circuit Gate driver.
  • the discharge speed of VAA has a great relationship with the afterimage phenomenon of shutdown.
  • the faster the discharge speed of VAA the less obvious the phenomenon of afterimage shutdown.
  • the resistance to ground will be added at each power node to speed up the discharge rate of the charge in the display panel during shutdown. The smaller the resistance value, the faster the discharge speed.
  • increasing the resistance will increase the power consumption of the entire system.
  • the embodiments of the present application provide a control circuit, a display device, and a control method of the control circuit, so as to achieve the purpose of improving the afterimage phenomenon that occurs when the display device is turned off.
  • control circuit includes:
  • a voltage control circuit the input terminal of the voltage control circuit is connected to the first power input terminal;
  • a voltage detection circuit the first input terminal of the voltage detection circuit is connected to the output terminal of the voltage control circuit, and the second input terminal of the voltage detection circuit is connected to the second power input terminal;
  • a switch circuit the controlled end of the switch circuit is connected to the output end of the voltage detection circuit, and the input end of the switch circuit is connected to the first power input end;
  • a discharge circuit the input end of the discharge circuit is connected to the output end of the switch circuit;
  • the voltage control circuit is configured to output a corresponding reference voltage signal to the voltage detection circuit according to the voltage signal input from the first power input terminal;
  • the voltage detection circuit is configured to output a corresponding voltage detection signal to the switching circuit when receiving the voltage signal input from the second power input end to the reference voltage signal;
  • the switch circuit is configured to be turned on according to the voltage detection signal
  • the discharge circuit is configured to discharge when the switch circuit is turned on.
  • the present application also provides a display device, including a display panel, a circuit board, and a control circuit, the circuit board is connected to the display panel, and the control circuit is arranged on the circuit board;
  • the control circuit includes:
  • a voltage control circuit the input terminal of the voltage control circuit is connected to the first power input terminal;
  • a voltage detection circuit the first input terminal of the voltage detection circuit is connected to the output terminal of the voltage control circuit, and the second input terminal of the voltage detection circuit is connected to the second power input terminal;
  • a switch circuit the controlled end of the switch circuit is connected to the output end of the voltage detection circuit, and the input end of the switch circuit is connected to the first power input end;
  • a discharge circuit the input end of the discharge circuit is connected to the output end of the switch circuit;
  • the voltage control circuit is configured to output a corresponding reference voltage signal to the voltage detection circuit according to the voltage signal input from the first power input terminal;
  • the voltage detection circuit is configured to output a corresponding voltage detection signal to the switching circuit when receiving the voltage signal input from the second power input end to the reference voltage signal;
  • the switch circuit is configured to be turned on according to the voltage detection signal
  • the discharge circuit is configured to discharge when the switch circuit is turned on.
  • the present application also provides a control method for a control circuit
  • the control circuit includes a first power input terminal and a second power input terminal connected to a power supply, a voltage control circuit, a voltage detection circuit, a switch circuit and Discharge circuit
  • the control method of the control circuit includes:
  • Step S1 the voltage control circuit outputs a corresponding reference voltage signal to the voltage detection circuit according to the voltage signal input from the first power input terminal;
  • Step S2 the voltage detection circuit outputs a corresponding voltage detection signal to the switch circuit when receiving the voltage signal input from the second power input end to the reference voltage signal;
  • Step S3 the switch circuit is turned on according to the voltage detection signal to drive the discharge circuit to discharge.
  • the reference voltage signal is generated by the voltage control circuit and input to the first input terminal of the voltage detection circuit, and the voltage signal input from the second power input terminal is input to the second input terminal of the voltage detection circuit; the voltage The detection circuit outputs the corresponding voltage detection signal to the switch circuit to control the switch circuit to be turned on or off. Since the switch circuit and the discharge circuit are connected in series, when the switch circuit is in the on state, the discharge circuit performs a discharge operation to improve the shutdown residual Shadow problem; when the switch circuit is off, the discharge circuit does not perform discharge operation to reduce system power consumption.
  • FIG. 1 is a block diagram of a circuit structure of an embodiment of a control circuit of the present application.
  • FIG. 2 is a schematic diagram of a circuit structure of an embodiment of a control circuit of the present application.
  • FIG. 3 is a schematic flowchart of an embodiment of a control method of a control circuit of the present application
  • FIG. 4 is a detailed flowchart of step S2 in an embodiment of the present application.
  • the directional indications are only configured to be interpreted in a specific posture (as shown in the drawings (Shown) the relative positional relationship between the various components, the movement, etc., if the specific posture changes, the directional indication will change accordingly.
  • the source driving circuit can be used
  • the driver integrates the control circuit of the present application, and may also integrate the control circuit of the present application in the gamma correction circuit P-Gamma IC.
  • Source driver circuit The driver and / or the gamma correction circuit P-Gamma IC integrates the control circuit of the present application, which can effectively solve the problem of shutdown residual image when the display device is shut down.
  • control circuit includes:
  • the input terminal of the voltage control circuit 10 is connected to the first power input terminal, the output terminal of the voltage control circuit 10 is connected to the first input terminal of the voltage detection circuit 20, and the first Two input terminals are connected to the second power input terminal; the output terminal of the voltage detection circuit 20 is connected to the controlled terminal of the switch circuit 30, and the input terminal of the switch circuit 30 is connected to the first power input terminal The output terminal of the switch circuit 30 is connected to the input terminal of the discharge circuit 40.
  • the voltage control circuit 10 outputs a corresponding reference voltage signal to the voltage detection circuit 20 according to the received voltage signal input from the input terminal of the first power supply; the voltage control circuit 10 may be implemented using a voltage regulator, A variety of different circuit designs in the prior art can also be used, which is not limited here.
  • the voltage detection circuit 20 outputs a corresponding voltage detection signal to the switch circuit 30 when receiving the voltage signal input from the second power input terminal to the reference voltage signal to control the switch circuit 30 turned on.
  • the voltage detection circuit 20 can be implemented by sampling resistance voltage division detection, voltage comparator or Hall sensor circuit, which is not limited here;
  • the switch circuit 30 has two states of off and on, and can be implemented by using various transistors to form a circuit, such as an insulating field effect transistor, a transistor, and other composite switching circuits composed of multiple transistors , Not limited here.
  • the discharge circuit 40 is used to discharge when the switch circuit 30 is turned on.
  • the discharge circuit 40 may be implemented by a single resistor, a single diode, or a combined discharge circuit of a resistor and a diode.
  • the voltage control circuit 10 generates a corresponding reference voltage signal according to the received main voltage VAA input from the first power input terminal.
  • the main voltage VAA needs to be boosted before being input to the source
  • the input voltage to the source driver circuit can be 15V ⁇ 18V; the reference voltage signal is input to the first input terminal of the voltage detection circuit 20, and the digital logic voltage VDD input to the second power input terminal is input to The second input terminal of the voltage detection circuit 20; the digital logic voltage VDD may be 3.3V, or may be set according to actual needs.
  • the main voltage VAA input from the first power input terminal and the digital logic voltage VDD input from the second power input terminal start to drop.
  • the voltage detection circuit 20 outputs The corresponding voltage detection signal, such as a high-level voltage detection signal, acts on the switch circuit 30 to control the switch circuit 30 to conduct.
  • the switch circuit 30 and the discharge circuit 40 are connected in series, and the switch circuit 30 is in the conductive state At this time, the discharge circuit 40 and the first power input terminal are in a conducting state, and at this time, the main voltage VAA is rapidly discharged through the discharge circuit 40.
  • the voltage control circuit 10 includes a first resistor R1 and a zener diode D1.
  • the first end of the first resistor R1 is the input end of the voltage control circuit 10, and the first The second terminal of a resistor R1 is the output terminal of the voltage control circuit 10, and is connected to the cathode of the zener diode D1, and the anode of the zener diode D1 is grounded.
  • the voltage control circuit 10 receives the voltage signal input from the first power input terminal, that is, the main voltage VAA, and outputs a corresponding reference voltage signal to the voltage detection circuit 20. Before the main voltage VAA input from the first power input terminal is greater than the regulated voltage of the Zener diode D1, the voltage control circuit 10 outputs a fixed reference voltage signal to the voltage detection circuit 20.
  • the voltage signal input from the second power input terminal that is, the digital logic voltage VDD may be 3.3V, and the size of the reference voltage signal is determined by the voltage regulation value of the selected voltage regulator diode D1.
  • Zener diode When selecting a Zener diode, you can select a Zener diode whose voltage value is 3/5 to 4/5 of the digital logic voltage VDD, or other Zener diodes that are lower than the digital logic voltage VDD, such as a 2.7V Zener diode.
  • the voltage stabilizing value of the voltage stabilizing diode cannot be too low to ensure that the main voltage VAA has sufficient time to be discharged through the discharge circuit 40 when the display device is turned off.
  • the main voltage VAA input from the first power input end can be prevented from being directly regulated by the voltage stabilizing diode D1 to the voltage stabilizing value of the voltage stabilizing diode D1. .
  • the voltage detection circuit 20 may use a voltage comparator U1, the non-inverting input terminal of the voltage comparator U1 is the first input terminal of the voltage detection circuit 20, and the voltage comparator The inverting input terminal of U1 is the second input terminal of the voltage detection circuit 20, and the output terminal of the voltage comparator U1 is the output terminal of the voltage detection circuit 20.
  • the non-inverting input terminal of the voltage comparator U1 receives the reference voltage signal output by the voltage control circuit 10, and the inverting input terminal of the voltage comparator U1 receives the digital logic voltage VDD input from the second power input terminal.
  • the characteristic of the voltage comparator U1 is: if the voltage input at the non-inverting input terminal is greater than the voltage input at the inverting input terminal, the voltage comparator U1 outputs a high level, otherwise it outputs a low level.
  • the digital logic voltage VDD is higher than the reference voltage signal.
  • the voltage comparator U1 outputs a low-level voltage detection signal and acts on the switch circuit 30, so that the switch circuit 30 is turned off; the display device is turned off At this time, the digital logic voltage VDD starts to drop.
  • the voltage comparator U1 outputs a high-level voltage detection signal to control the switch circuit 30 to turn on. Therefore, the voltage detection signal output from the voltage detection circuit 20 can be used to control the switching circuit to be turned on or off.
  • the switching circuit 30 may use an N-type insulating field effect transistor Q1, that is, an N-MOS transistor, and the gate of the N-MOS transistor is the controlled end of the switching circuit 30.
  • the drain of the N-MOS tube is the input end of the switch circuit 30, and the source of the N-MOS tube is the output end of the switch circuit 30.
  • the switch circuit 30 may also use a triode and other compound switch circuits composed of multiple transistors, which is not limited herein.
  • the digital logic voltage VDD input to the voltage detection circuit 20 is greater than the reference voltage signal, and the voltage detection circuit 20 outputs a low-level voltage detection signal to the gate of the N-MOS tube to control N -
  • the MOS tube is turned off, because the discharge circuit 40 is connected in series with the switch circuit 30, and the discharge circuit 40 is disconnected from the first power input terminal at this time;
  • the digital logic voltage VDD starts to drop, when the digital logic voltage VDD
  • the voltage detection circuit 20 outputs a high-level voltage detection signal to the gate of the N-MOS tube to control the conduction of the N-MOS tube.
  • the first power input terminal and the discharge circuit 40 are On state.
  • the discharge circuit 40 includes a second resistor R2, a first end of the second resistor R2 is an input end of the discharge circuit 40, and a second end of the second resistor R2 Ground.
  • the second resistor R2 is connected in series with the switch circuit 30.
  • the switch circuit 30 When the display device is operating normally, the switch circuit 30 is in a closed state, and at this time, the second resistor R2 is disconnected from the first power input terminal, and the second resistor R2 No current flows. Therefore, when the display device is working normally, the second resistor R2 does not discharge and does not add extra power consumption to the system; when the display device is turned off, the switch circuit 30 changes from the off state to the on state At this time, the second resistor R2 and the first power input terminal are in an on-state, and the main voltage VAA is quickly discharged through the second resistor R2.
  • This setting can effectively solve the problem of shutdown afterimage when the display device is turned off. It is also possible to avoid an increase in system power consumption due to the addition of the control circuit.
  • the present application also proposes a display device including a display panel, a circuit board, and the above-mentioned control circuit, the circuit board is connected to the display panel, and the control circuit is arranged on the circuit board.
  • the control circuit is arranged on the circuit board.
  • the display device may be a display device having a display panel, such as a television, a tablet computer, and a mobile phone.
  • control method of the control circuit includes:
  • Step S1 the voltage control circuit 10 outputs a corresponding reference voltage signal to the voltage detection circuit 20 according to the voltage signal input from the first power input terminal;
  • Step S2 the voltage detection circuit 20 outputs a corresponding voltage detection signal to the switch circuit 30 when receiving the voltage signal input from the second power input end to the reference voltage signal;
  • step S3 the switch circuit 30 is turned on according to the voltage detection signal to drive the discharge circuit 40 to discharge.
  • step S2 includes:
  • Step S20 receiving the voltage signal input from the second power input terminal and the reference voltage signal
  • Step S21 Determine whether the voltage signal input from the second power input terminal is greater than the reference voltage signal
  • Step S22 if the voltage signal input from the second power input terminal is greater than the reference voltage signal, the voltage detection circuit 20 outputs a low-level voltage detection signal to control the switching circuit 30 to close;
  • Step S23 if the voltage signal input from the second power input terminal is less than the reference voltage signal, the voltage detection circuit 20 outputs a high-level voltage detection signal to control the switch circuit 30 to be turned on.
  • the circuit structure of the control circuit is shown in FIG. 2.
  • the first power input terminal is connected to the cathode of the zener diode D1 through the first resistor R1, and the anode of the zener diode D1 is grounded.
  • the non-inverting input terminal of the voltage comparator U1 is connected to the cathode of the Zener diode D1
  • the inverting input terminal of the voltage comparator U1 is connected to the second power input terminal
  • the output terminal of the voltage comparator U1 is connected to N-
  • the gate of the MOS tube is connected, the drain of the N-MOS tube is connected to the first power input terminal, and the source of the N-MOS tube is connected to the ground terminal via the second resistor R2.
  • the main voltage VAA input from the first power input terminal is stabilized by the Zener diode D1 after the first resistor R1 to obtain a reference voltage signal, and the reference voltage signal is input to the non-inverting input terminal of the voltage comparator U1, and The digital logic voltage VDD input from the second power input terminal is input to the inverting input terminal of the voltage comparator U1.
  • the digital logic voltage VDD is greater than the reference voltage signal, and the voltage comparator U1 outputs a low-level voltage detection signal to the gate of the N-MOS tube. At this time, the N-MOS tube is turned off, and the second resistor R2 has no Current flows.
  • the main voltage VAA and the digital logic voltage VDD start to drop. Since the digital logic voltage VDD falls faster than the main voltage VAA, when the digital logic voltage VDD falls below the reference voltage signal, the voltage comparator U1 The high-level voltage detection signal is output to the gate of the N-MOS tube. At this time, the N-MOS tube is turned on, and the main voltage VAA is discharged through the second resistor R2.
  • the technical solution of this embodiment can effectively improve the phenomenon of shutdown afterimage by accelerating the discharge speed of the main voltage VAA.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种控制电路、显示装置及控制电路的控制方法，其中，电压控制电路（10）的输入端与第一电源输入端（VAA）连接，电压控制电路（10）的输出端与电压检测电路（20）的第一输入端连接，电压检测电路（20）的第二输入端与第二电源输入端(VDD)连接；电压检测电路(20)的输出端与开关电路(30)的受控端连接，开关电路(30)的输入端与第一电源输入端(VAA)连接，开关电路(30)的输出端与放电电路(40)的输入端连接。

Description

控制电路、显示装置及控制电路的控制方法
相关申请
本申请要求2018年11月12日申请的，申请号201811342325.2，名称为“控制电路、显示装置及控制电路的控制方法”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及显示技术领域，特别涉及一种控制电路、显示装置及控制电路的控制方法。
背景技术
在显示装置关机时，需要将显示面板内存储的电荷进行释放，而显示装置的尺寸越大，显示面板内电荷的放电所需要的时间就越长。而放电时间越长，关机残影现象越明显。为了解决关机残影问题，需要在显示装置关机时加快显示面板内存储的电荷的释放速度。
在显示装置的电源架构中，电源芯片Power IC接收12V的输入电压，该Power IC输出一路主电压VAA至源极驱动电路Source driver、伽马校正电路P-Gamma IC，输出一路数字逻辑电压VDD至源极驱动电路Source driver、伽马校正电路P-Gamma IC及时序控制电路T-CON，输出一路开启电压VGH及一路关闭电压VGL至栅极驱动电路Gate driver。
在显示装置关机时，当输入至电源芯片Power IC的电压12V降低到电源芯片的低压保护电平时，电源芯片停止工作，VAA、VDD、VGH、VGL会同时掉电，其中，VDD放电速度最快，VAA与VGH放电速度最慢。
而经反复试验发现，VAA的放电快慢与关机残影现象有极大关系，VAA放电速度越快，关机残影现象越不明显。为了改善关机残影现象，在电源电路设计时，会在各个电源节点增加对地电阻，以加快关机时显示面板内电荷的释放速度，电阻阻值越小，放电速度越快。但是，增加电阻会导致整个系统的功耗增加。
申请内容
本申请实施例通过提供一种控制电路、显示装置及控制电路的控制方法，旨在实现改善显示装置关机时出现的关机残影现象的目的。
为实现上述目的，本申请提供一种控制电路，该控制电路包括：
连接供电电源的第一电源输入端及第二电源输入端；
电压控制电路，所述电压控制电路的输入端与所述第一电源输入端连接；
电压检测电路，所述电压检测电路的第一输入端与所述电压控制电路的输出端连接，所述电压检测电路的第二输入端与所述第二电源输入端连接；
开关电路，所述开关电路的受控端与所述电压检测电路的输出端连接，所述开关电路的输入端与所述第一电源输入端连接；
放电电路，所述放电电路的输入端与所述开关电路的输出端连接；其中，
所述电压控制电路，被配置为根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
所述电压检测电路，被配置为在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；
所述开关电路，被配置为根据所述电压检测信号导通；
所述放电电路，被配置为在所述开关电路导通时，进行放电。
为实现上述目的，本申请还提供一种显示装置，包括显示面板、电路板及控制电路，所述电路板与所述显示面板连接，所述控制电路布置在所述电路板上；
所述控制电路，包括：
连接供电电源的第一电源输入端及第二电源输入端；
电压控制电路，所述电压控制电路的输入端与所述第一电源输入端连接；
电压检测电路，所述电压检测电路的第一输入端与所述电压控制电路的输出端连接，所述电压检测电路的第二输入端与所述第二电源输入端连接；
开关电路，所述开关电路的受控端与所述电压检测电路的输出端连接，所述开关电路的输入端与所述第一电源输入端连接；
放电电路，所述放电电路的输入端与所述开关电路的输出端连接；其中，
所述电压控制电路，被配置为根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
所述电压检测电路，被配置为在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；
所述开关电路，被配置为根据所述电压检测信号导通；
所述放电电路，被配置为在所述开关电路导通时，进行放电。
为实现上述目的，本申请还提供出一种控制电路的控制方法，所述控制电路包括连接供电电源的第一电源输入端及第二电源输入端、电压控制电路、电压检测电路、开关电路及放电电路，所述控制电路的控制方法包括：
步骤S1，所述电压控制电路根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
步骤S2，所述电压检测电路在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；以及
步骤S3，所述开关电路根据所述电压检测信号导通，以驱动所述放电电路进行放电。
本申请的技术方案，通过电压控制电路产生参考电压信号，并输入至电压检测电路的第一输入端，而第二电源输入端输入的电压信号输入至电压检测电路的第二输入端；该电压检测电路输出对应的电压检测信号至开关电路，以控制开关电路导通或关闭，由于开关电路与放电电路为串联连接，在开关电路为导通状态时，放电电路进行放电操作，以改善关机残影问题；在开关电路为关闭状态时，放电电路不进行放电操作，以降低系统功耗。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请控制电路一实施例的电路结构框图；
图2为本申请控制电路一实施例的电路结构示意图；
图3为本申请控制电路的控制方法一实施例的流程示意图；
图4为本申请一实施例中步骤S2的一细化流程示意图。
附图标号说明：
VAA 主电压 VDD 数字逻辑电压
10 电压控制电路 20 电压检测电路
30 开关电路 40 放电电路
U1 电压比较器 D1 稳压二极管
Q1 N型绝缘性场效应管 GND 接地端
R1 第一电阻 R2 第二电阻
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，若本申请实施例中有涉及方向性指示（诸如上、下、左、右、前、后……），则该方向性指示仅被配置为解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，若本申请实施例中有涉及“第一”、“第二”等的描述，则该“第一”、“第二”等的描述仅被配置为描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
为了解决显示装置在关机时出现的关机残影问题，可以在源极驱动电路Source driver内部集成本申请的控制电路，也可以在伽马校正电路P-Gamma IC内集成本申请的控制电路。通过在源极驱动电路Source driver和/或伽马校正电路P-Gamma IC内集成本申请的控制电路，在显示装置关机时，可以有效的解决关机残影问题。
参照图1，在本申请一实施例中，该控制电路包括：
连接供电电源的第一电源输入端（未标示）及第二电源输入端（未标示）、电压控制电路10、电压检测电路20、开关电路30及放电电路40；其中，
所述电压控制电路10的输入端与所述第一电源输入端连接，所述电压控制电路10的输出端与所述电压检测电路20的第一输入端连接，所述电压检测电路20的第二输入端与所述第二电源输入端连接；所述电压检测电路20的输出端与所述开关电路30的受控端连接，所述开关电路30的输入端与所述第一电源输入端连接，所述开关电路30的输出端与所述放电电路40的输入端连接。
本实施例中，所述电压控制电路10，根据所接收的第一电源输入端输入的电压信号，输出对应的参考电压信号至电压检测电路20；该电压控制电路10可以采用稳压器实现，也可以采用现有技术中的多种不同的电路设计，此处不限。
本实施例中，所述电压检测电路20，在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至开关电路30，以控制开关电路30导通。该电压检测电路20可以采用采样电阻分压检测、电压比较器或者霍尔传感器等电路实现，此处不限；
本实施例中，所述开关电路30，具有关闭和导通两种状态，可以采用各种晶体管组成电路实现，例如绝缘性场效应管、三极管、以及其他由多个晶体管组成的复合型开关电路，此处不限。
本实施例中，所述放电电路40，用于在所述开关电路30导通时，进行放电，该电放电路40可以为单个电阻、单个二极管或者电阻与二极管的组合型放电电路实现。
以该控制电路集成于源极驱动电路中为例。本申请的技术方案，电压控制电路10根据所接收到的第一电源输入端输入的主电压VAA，产生对应的参考电压信号，在实际应用中，该主电压VAA需要先升压再输入至源极驱动电路，其输入至源极驱动电路的电压大小可以为15V~18V；该参考电压信号输入至电压检测电路20的第一输入端，而第二电源输入端输入的数字逻辑电压VDD输入至电压检测电路20的第二输入端；该数字逻辑电压VDD可以为3.3V，也可以根据实际需要进行设置。在显示装置关机时，第一电源输入端输入的主电压VAA与第二电源输入端输入的数字逻辑电压VDD开始下降，当数字逻辑电压VDD下降至小于参考电压信号时，该电压检测电路20输出对应的电压检测信号，如高电平的电压检测信号，并作用于开关电路30，以控制开关电路30导通，该开关电路30与放电电路40为串联连接，在开关电路30为导通状态时，放电电路40与第一电源输入端为导通状态，此时主电压VAA通过放电电路40进行快速放电。且在显示装置正常工作时，由于输入至电压检测电路20的参考电压信号小于数字逻辑电压VDD，此时开关电路30为关闭状态，放电电路40与第一电源输入端为断开状态，此时主电压VAA无法通过放电电路40进行放电。如此设置，既能改善关机残影现象，也可以避免由于增加该控制电路而导致显示装置在正常工作时系统的功耗增加。
在一实施例中，参照图2，该电压控制电路10包括第一电阻R1及稳压二极管D1，所述第一电阻R1的第一端为所述电压控制电路10的输入端，所述第一电阻R1的第二端为所述电压控制电路10的输出端，并与所述稳压二极管D1的阴极连接，所述稳压二极管D1的阳极接地。
具体的，该电压控制电路10，接收第一电源输入端输入的电压信号，即主电压VAA，并输出对应的参考电压信号至电压检测电路20。在第一电源输入端输入的主电压VAA大于稳压二极管D1的稳压值之前，电压控制电路10输出固定的参考电压信号至电压检测电路20。在实际应用中，第二电源输入端输入的电压信号，即数字逻辑电压VDD可以为3.3V，而参考电压信号的大小由所选取的稳压二极管D1的稳压值决定。在进行稳压二极管的选取时，可以选取稳压值为数字逻辑电压VDD的3/5~4/5、或者其他的比数字逻辑电压VDD低的稳压二极管，如2.7V的稳压二极管。其中，稳压二极管的稳压值不能过低，以确保显示装置在关机时，主电压VAA有充足的时间可以通过放电电路40进行放电。而在稳压二极管D1与第一电源输入端之间设置第一电阻R1，可以避免第一电源输入端输入的主电压VAA被稳压二极管D1直接稳压至稳压二极管D1的稳压值大小。
在一实施例中，参照图2，该电压检测电路20可以采用电压比较器U1，所述电压比较器U1的同相输入端为所述电压检测电路20的第一输入端，所述电压比较器U1的反相输入端为所述电压检测电路20的第二输入端，所述电压比较器U1的输出端为所述电压检测电路20的输出端。
具体的，该电压比较器U1的同相输入端接收电压控制电路10输出的参考电压信号，该电压比较器U1的反相输入端接收第二电源输入端输入的数字逻辑电压VDD。电压比较器U1的特性为：若同相输入端输入的电压大于反相输入端输入的电压，电压比较器U1则输出高电平，否则输出低电平。在显示装置正常工作时，数字逻辑电压VDD高于参考电压信号，此时电压比较器U1输出低电平的电压检测信号，并作用于开关电路30，以使得开关电路30关闭；在显示装置关机时，数字逻辑电压VDD开始下降，当数字逻辑电压下降至低于参考电压信号时，电压比较器U1输出高电平的电压检测信号，以控制开关电路30导通。因此，可以通过电压检测电路20输出的电压检测信号，以控制开关电路的导通或关闭。
在一实施例中，参照图2，该开关电路30可以采用N型绝缘性场效应管Q1，即N-MOS管，所述N-MOS管的栅极为所述开关电路30的受控端，所述N-MOS管的漏极为所述开关电路30的输入端，所述N-MOS管的源极为所述开关电路30的输出端。在其他实施例中，所述开关电路30还可以采用三极管、以及其他由多个晶体管组成的复合型开关电路，此处不限。
具体的，在显示装置正常工作时，输入至电压检测电路20的数字逻辑电压VDD大于参考电压信号，电压检测电路20输出低电平的电压检测信号至N-MOS管的栅极，以控制N-MOS管关闭，由于放电电路40与开关电路30串联连接，此时放电电路40与第一电源输入端为断开状态；在显示装置关机时，数字逻辑电压VDD开始下降，当数字逻辑电压VDD低于参考电压信号时，电压检测电路20输出高电平的电压检测信号至N-MOS管的栅极，以控制N-MOS管导通，此时，第一电源输入端与放电电路40为导通状态。通过控制开关电路30的导通或关闭，可以控制放电电路40是否接入第一电源输入端进行放电操作。
在一实施例中，参照图2，该放电电路40包括第二电阻R2，所述第二电阻R2的第一端为所述放电电路40的输入端，所述第二电阻R2的第二端接地。
具体的，该第二电阻R2与开关电路30串联连接，在显示装置正常工作时，开关电路30为关闭状态，此时第二电阻R2与第一电源输入端为断开状态，第二电阻R2无电流流过，因此，在显示装置正常工作时，第二电阻R2不起放电作用，不会给系统增加额外的功耗；在显示装置关机时，开关电路30由关闭状态变为导通状态，此时，第二电阻R2与第一电源输入端为导通状态，主电压VAA通过第二电阻R2进行快速放电，如此设置，既能实现在显示装置关机时有效的解决关机残影问题，也可以避免由于增加该控制电路而导致系统功耗增加。
本申请还提出一种显示装置，包括显示面板、电路板及如上所述的控制电路，所述电路板与所述显示面板连接，所述控制电路布置在所述电路板上。该控制电路的详细结构可参照上述实施例，此处不再赘述；可以理解的是，由于在本申请显示装置中使用了上述控制电路，因此，本申请显示装置的实施例包括上述控制电路全部实施例的全部技术方案，且所达到的技术效果也完全相同，在此不再赘述。
本实施例中，显示装置可以是电视机、平板电脑、手机等具有显示面板的显示装置。
本申请还提出一种控制电路的控制方法，参照图3和图4，所述控制电路的控制方法包括：
步骤S1，所述电压控制电路10根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路20；
步骤S2，所述电压检测电路20在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路30；
步骤S3，所述开关电路30根据所述电压检测信号导通，以驱动所述放电电路40进行放电。
可选的，步骤S2包括：
步骤S20，接收所述第二电源输入端输入的电压信号及所述参考电压信号；
步骤S21，判断所述第二电源输入端输入的电压信号是否大于所述参考电压信号；
步骤S22，若所述第二电源输入端输入的电压信号大于所述参考电压信号，电压检测电路20输出低电平的电压检测信号，以控制所述开关电路30关闭；
步骤S23，若所述第二电源输入端输入的电压信号小于所述参考电压信号，电压检测电路20输出高电平的电压检测信号，以控制所述开关电路30导通。
其中，该控制电路的电路结构如图2所示，第一电源输入端经第一电阻R1连接至稳压二极管D1的阴极，所述稳压二极管D1的阳极接地。所述电压比较器U1的同相输入端与稳压二极管D1的阴极连接，所述电压比较器U1的反相输入端与第二电源输入端连接，所述电压比较器U1的输出端与N-MOS管的栅极连接，所述N-MOS管的漏极与第一电源输入端连接，所述N-MOS管的源极经第二电阻R2与地端连接。
具体的，第一电源输入端输入的主电压VAA经第一电阻R1后，被稳压二极管D1进行稳压，得到参考电压信号，该参考电压信号输入至电压比较器U1的同相输入端，而第二电源输入端输入的数字逻辑电压VDD输入至电压比较器U1的反相输入端。在显示装置正常工作时，数字逻辑电压VDD大于参考电压信号，电压比较器U1输出低电平的电压检测信号至N-MOS管的栅极，此时N-MOS管关闭，第二电阻R2无电流流过。在显示装置关机时，主电压VAA与数字逻辑电压VDD开始下降，由于数字逻辑电压VDD下降速度比主电压VAA下降速度更快，当数字逻辑电压VDD下降至小于参考电压信号时，电压比较器U1输出高电平的电压检测信号至N-MOS管的栅极，此时N-MOS管导通，主电压VAA经第二电阻R2进行放电。本实施例的技术方案，通过加快主电压VAA的放电速度，能够有效改善关机残影现象。
以上所述仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是在本申请的构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (1)

  1. 1、一种控制电路，其中，所述控制电路，包括：
    连接供电电源的第一电源输入端及第二电源输入端；
    电压控制电路，所述电压控制电路的输入端与所述第一电源输入端连接；
    电压检测电路，所述电压检测电路的第一输入端与所述电压控制电路的输出端连接，所述电压检测电路的第二输入端与所述第二电源输入端连接；
    开关电路，所述开关电路的受控端与所述电压检测电路的输出端连接，所述开关电路的输入端与所述第一电源输入端连接；
    放电电路，所述放电电路的输入端与所述开关电路的输出端连接；其中，
    所述电压控制电路，被配置为根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
    所述电压检测电路，被配置为在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；
    所述开关电路，被配置为根据所述电压检测信号导通；
    所述放电电路，被配置为在所述开关电路导通时，进行放电。
    2、如权利要求1所述的控制电路，其中，所述电压控制电路包括第一电阻及稳压二极管，所述第一电阻的第一端为所述电压控制电路的输入端；所述第一电阻的第二端为所述电压控制电路的输出端，并与所述稳压二极管的阴极连接，所述稳压二极管的阳极接地。
    3、如权利要求1所述的控制电路，其中，所述电压检测电路为电压比较器，所述电压比较器的同相输入端为所述电压检测电路的第一输入端，所述电压比较器的反相输入端为所述电压检测电路的第二输入端，所述电压比较器的输出端为所述电压检测电路的输出端。
    4、如权利要求1所述的控制电路，其中，所述开关电路包括N型绝缘性场效应管，所述N型绝缘性场效应管的栅极为所述开关电路的受控端，所述N型绝缘性场效应管的漏极为所述开关电路的输入端，所述N型绝缘性场效应管的源极为所述开关电路的输出端。
    5、如权利要求1所述的控制电路，其中，所述放电电路包括第二电阻，所述第二电阻的第一端为所述放电电路的输入端，所述第二电阻的第二端接地。
    6、如权利要求1所述的控制电路，其中，所述开关电路与所述放电电路为串联连接。
    7、如权利要求1所述的控制电路，其中，所述控制电路集成于源极驱动电路内。
    8、如权利要求1所述的控制电路，其中，所述控制电路集成于伽马校正电路内。
    9、一种显示装置，其中，所述显示装置包括：显示面板、电路板及控制电路，所述电路板与所述显示面板连接，所述控制电路布置在所述电路板上；
    所述控制电路，包括：
    连接供电电源的第一电源输入端及第二电源输入端；
    电压控制电路，所述电压控制电路的输入端与所述第一电源输入端连接；
    电压检测电路，所述电压检测电路的第一输入端与所述电压控制电路的输出端连接，所述电压检测电路的第二输入端与所述第二电源输入端连接；
    开关电路，所述开关电路的受控端与所述电压检测电路的输出端连接，所述开关电路的输入端与所述第一电源输入端连接；
    放电电路，所述放电电路的输入端与所述开关电路的输出端连接；其中，
    所述电压控制电路，被配置为根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
    所述电压检测电路，被配置为在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；
    所述开关电路，被配置为根据所述电压检测信号导通；
    所述放电电路，被配置为在所述开关电路导通时，进行放电。
    10、如权利要求9所述的显示装置，其中，所述电压控制电路包括第一电阻及稳压二极管，所述第一电阻的第一端为所述电压控制电路的输入端；所述第一电阻的第二端为所述电压控制电路的输出端，并与所述稳压二极管的阴极连接，所述稳压二极管的阳极接地。
    11、如权利要求9所述的显示装置，其中，所述电压检测电路为电压比较器，所述电压比较器的同相输入端为所述电压检测电路的第一输入端，所述电压比较器的反相输入端为所述电压检测电路的第二输入端，所述电压比较器的输出端为所述电压检测电路的输出端。
    12、如权利要求9所述的显示装置，其中，所述开关电路包括N型绝缘性场效应管，所述N型绝缘性场效应管的栅极为所述开关电路的受控端，所述N型绝缘性场效应管的漏极为所述开关电路的输入端，所述N型绝缘性场效应管的源极为所述开关电路的输出端。
    13、如权利要求9所述的显示装置，其中，所述放电电路包括第二电阻，所述第二电阻的第一端为所述放电电路的输入端，所述第二电阻的第二端接地。
    14、如权利要求9所述的显示装置，其中，所述开关电路与所述放电电路为串联连接。
    15、如权利要求9所述的显示装置，其中，所述控制电路集成于源极驱动电路内。
    16、如权利要求9所述的显示装置，其中，所述控制电路集成于伽马校正电路内。
    17、一种控制电路的控制方法，所述控制电路包括连接供电电源的第一电源输入端及第二电源输入端、电压控制电路、电压检测电路、开关电路及放电电路；其中，所述控制电路的控制方法包括：
    步骤S1，所述电压控制电路根据所述第一电源输入端输入的电压信号，输出对应的参考电压信号至所述电压检测电路；
    步骤S2，所述电压检测电路在接收到所述第二电源输入端输入的电压信号降低到所述参考电压信号时，输出对应的电压检测信号至所述开关电路；以及，
    步骤S3，所述开关电路根据所述电压检测信号导通，以驱动所述放电电路进行放电。
    18、如权利要求17所述的控制电路的控制方法，其中，所述步骤S2包括：
    步骤S20，接收所述第二电源输入端输入的电压信号及所述参考电压信号；
    步骤S21，判断所述第二电源输入端输入的电压信号是否大于所述参考电压信号；
    步骤S22，若所述第二电源输入端输入的电压信号大于所述参考电压信号，电压检测电路输出低电平的电压检测信号，以控制所述开关电路关闭；以及，
    步骤S23，若所述第二电源输入端输入的电压信号小于所述参考电压信号，电压检测电路输出高电平的电压检测信号，以控制所述开关电路导通。
    19、如权利要求17所述的控制电路的控制方法，其中，所述控制电路集成于源极驱动电路内。
    20、如权利要求17所述的控制电路的控制方法，其中，所述控制电路集成于伽马校正电路内。
PCT/CN2018/122163 2018-11-12 2018-12-19 控制电路、显示装置及控制电路的控制方法 WO2020098064A1 (zh)

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109243398A (zh) * 2018-11-12 2019-01-18 惠科股份有限公司 显示面板的驱动电路及显示装置
CN109147710A (zh) * 2018-11-12 2019-01-04 惠科股份有限公司 显示面板的驱动电路及显示装置
CN110379384A (zh) * 2019-06-06 2019-10-25 惠科股份有限公司 显示面板的驱动方法、驱动电路及显示装置
KR102687945B1 (ko) * 2020-02-12 2024-07-25 삼성디스플레이 주식회사 전원 전압 생성 장치, 이의 제어 방법 및 이를 포함하는 표시 장치
CN112599107A (zh) * 2020-12-11 2021-04-02 昆山国显光电有限公司 电源放电电路、显示模组和显示装置
CN112967692B (zh) * 2021-02-26 2022-01-04 惠科股份有限公司 一种残影消除电路及显示装置
CN114362509B (zh) * 2022-01-21 2024-05-14 珠海慧联科技有限公司 动态电压切换装置、tws芯片及tws设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1780081A (zh) * 2004-11-26 2006-05-31 鸿富锦精密工业（深圳）有限公司 避免误接不当交流电源的保护电路
CN101534587A (zh) * 2009-03-27 2009-09-16 陕西科技大学 一种市电led恒流驱动器
CN101742801A (zh) * 2009-12-11 2010-06-16 东南大学 用于电子镇流器的cmos功率因数校正控制电路
CN103391016A (zh) * 2013-07-29 2013-11-13 魏其萃 与输出电容直接并联的mosfet同步整流电路及方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4888994B2 (ja) * 2005-08-31 2012-02-29 株式会社山武 電流モニタ装置
KR101361877B1 (ko) * 2009-09-18 2014-02-13 엘지디스플레이 주식회사 레귤레이터와 이를 이용한 유기발광다이오드 표시장치
US8610368B2 (en) * 2009-12-21 2013-12-17 Top Victory Investments Ltd. Serial-type light-emitting diode (LED) device
CN102842292A (zh) * 2011-06-24 2012-12-26 鸿富锦精密工业（深圳）有限公司 电源管理电路及使用该电路的显示装置
CN204558001U (zh) * 2015-04-16 2015-08-12 昆山龙腾光电有限公司 关机残影消除电路及栅极驱动电路
CN106558289B (zh) * 2015-09-30 2019-06-18 鸿富锦精密工业（深圳）有限公司 液晶显示装置及放电控制方法
CN106952628B (zh) * 2017-05-05 2018-05-08 惠科股份有限公司 一种残影消除电路及显示装置
CN108231030B (zh) * 2018-01-29 2020-04-21 京东方科技集团股份有限公司 放电电路、放电方法以及显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1780081A (zh) * 2004-11-26 2006-05-31 鸿富锦精密工业（深圳）有限公司 避免误接不当交流电源的保护电路
CN101534587A (zh) * 2009-03-27 2009-09-16 陕西科技大学 一种市电led恒流驱动器
CN101742801A (zh) * 2009-12-11 2010-06-16 东南大学 用于电子镇流器的cmos功率因数校正控制电路
CN103391016A (zh) * 2013-07-29 2013-11-13 魏其萃 与输出电容直接并联的mosfet同步整流电路及方法

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