WO2013027322A1 - 通信装置、信号重畳回路、信号重畳方法 - Google Patents
通信装置、信号重畳回路、信号重畳方法 Download PDFInfo
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- WO2013027322A1 WO2013027322A1 PCT/JP2012/004372 JP2012004372W WO2013027322A1 WO 2013027322 A1 WO2013027322 A1 WO 2013027322A1 JP 2012004372 W JP2012004372 W JP 2012004372W WO 2013027322 A1 WO2013027322 A1 WO 2013027322A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/04—Control of transmission; Equalising
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
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- the present invention relates to a communication device that transmits signals using a plurality of wiring pairs, a signal superimposing circuit that superimposes a plurality of signals, and a signal superimposing method thereof.
- inter-device communication in accordance with a communication standard called 100BASE-TX or 1000BASE-T has been widely used.
- a configuration in which a control input / output terminal is provided and a configuration in which a control signal is transmitted through a main line are known.
- Patent Document 1 There is a transmission system described in Patent Document 1 as a technique for solving such a problem.
- a common mode signal is transmitted to each wire constituting an Ethernet (registered trademark) pair, so that control is not provided and a main line capacity is not reduced without providing a control input / output terminal.
- a configuration for transmitting a signal is disclosed. According to this configuration, it is possible to increase the communication capacity by superimposing a common mode signal on each twisted pair wiring.
- an object of the present invention is to provide a communication device, a signal superimposing circuit, and a signal superimposing method that are less susceptible to noise and enable signal transmission with reduced unnecessary radiation.
- the communication device transmits a first information with a differential signal to the first wire pair and a second information with a differential signal to the second wire pair. And a third communication for transmitting third information by superimposing one of the differential signals on the first wiring pair and superimposing the other of the differential signals on the second wiring pair. A portion.
- the signal superimposing circuit includes a first superimposing circuit that superimposes one of the other differential signals on the first wiring pair and a differential signal on the second wiring pair. And a second superimposing circuit that superimposes the other of the other differential signals.
- the first differential signal is placed on the first wiring pair
- the second differential signal is placed on the second wiring pair
- the first wiring pair is placed on the first wiring pair.
- One of the third differential signals is superimposed and the other of the third differential signals is superimposed on the second wiring pair.
- FIG. 1 is a diagram showing a configuration of a transmission system according to a first exemplary embodiment.
- FIG. 3 is a conceptual diagram illustrating a state of signal transmission in the transmission system according to the first exemplary embodiment;
- FIG. 3 is a conceptual diagram illustrating a state of signal transmission in the transmission system according to the first exemplary embodiment;
- FIG. 3 is a diagram illustrating an example of signal waveforms of signals at a stage of input to the communication device 10 in the transmission system according to the first exemplary embodiment.
- FIG. 4 is a diagram illustrating an example of signal waveforms of signals at a stage after passing through a phase adjustment circuit 12A in the transmission system according to the first exemplary embodiment;
- FIG. 6 is a diagram illustrating another example of signal waveforms of signals at a stage during passing through the twisted pair wiring in the transmission system according to the first exemplary embodiment;
- FIG. 6 is a diagram illustrating another example of signal waveforms of respective signals at the output stage in the superposition coils 21A and 21B in the transmission system according to the first exemplary embodiment.
- 1 is a diagram showing a configuration of a transmission system according to a first exemplary embodiment.
- 1 is a block diagram showing a configuration of a signal superposition circuit according to a first exemplary embodiment;
- FIG. 6 is a block diagram showing another configuration of the signal superposition circuit according to the first exemplary embodiment;
- 1 is a diagram showing a configuration of a communication device according to a first exemplary embodiment. It is a figure which shows the structure of the modification of the communication apparatus concerning Embodiment 1.
- the communication device 10 includes superimposing coils 11A, 11B, 11C, and 11D, and phase adjustment circuits 12A and 12B.
- the communication device 10 outputs inputs from the four main lines and the two control lines to the twisted pair wirings 30A, 30B, 30C, and 30D.
- the communication device 10 outputs the input from the twisted pair wirings 30A, 30B, 30C, and 30D to the four main lines and the two control lines.
- the communication device 20 includes superimposing coils 21A, 21B, 21C, and 21D, and phase adjustment circuits 22A and 22B.
- the communication device 20 outputs inputs from the four main lines and the two control lines to the twisted pair wirings 30A, 30B, 30C, and 30D. Further, the communication device 20 outputs inputs from the twisted pair wirings 30A, 30B, 30C, and 30D to the four main lines and the two control lines.
- the phase adjustment circuits 12A and 12B built in the communication device 10 have 2 to 4 input / output terminals, and when a differential signal is input to one pair of terminals, a difference that is delayed by 1/2 phase to the other pair of terminals. A dynamic signal is output. That is, the phase adjustment circuits 12A and 12B delay the phase of the input differential signal by 1 ⁇ 2 phase and output the differential signal that has been phase delayed.
- the phase adjustment circuit 12A connects a pair of input / output terminals to the control line 1, and connects one of the other pair of input / output terminals to the superimposing coil 11A and the other to the superimposing coil 11B.
- the phase adjustment circuit 12B connects a pair of input / output terminals to the control line 2, and connects one of the other pair of input / output terminals to the superposition coil 11C and the other to the superposition coil 11D.
- the common mode input / output terminal outputs a signal having the same waveform when a common mode signal is input to the connected differential input / output terminal. Further, when a signal is input, the common mode input / output terminal outputs a common mode signal having the same waveform to the differential input / output terminal on the connected side.
- the number of differential signals to be input can be an arbitrary number of three or more pairs. Therefore, in the following description, the control line 1 and the main lines 1 and 2 will be described.
- FIG. 2 shows a state in which the differential signal input to the main line 1 of the communication device 10 is output to the main line 1 of the communication device 20 through the twisted pair wiring 30A.
- the differential signal input from the main line 1 to the communication device 10 is input to the superimposing coil 11A, and the differential signal having the same waveform is output to the twisted pair wiring 30A.
- the differential signal input to the communication device 20 through the twisted pair wiring 30A is input to the superposition coil 21A, and the differential signal having the same waveform is output to the main line.
- signal transmission from each main line of the communication device 20 to each main line of the communication device 10 is performed.
- the common mode signal that has passed through the twisted pair wiring 30A is input to the superimposing coil 21A of the communication device 20, and the superimposing coil 21A adjusts the phase from the common mode input / output terminal using the input common mode signal of the same waveform as one of the differential signals. Output to the circuit 22A.
- the common mode signal that has passed through the twisted pair wiring 30B is input to the superimposing coil 21B of the communication device 20, and the superimposing coil 21B uses the input common mode signal having the same waveform as the other differential signal from the common mode input / output terminal. Output to the adjustment circuit 22A. In this way, two common mode signals satisfying the antiphase relationship respectively transmitted through the twisted pair wiring 30A and the twisted pair wiring 30B are taken out as signals constituting the differential signal and become differential signals.
- the differential signal input to the phase adjustment circuit 22A from the superimposing coil 21A and the superimposing coil 21B is delayed by 1 ⁇ 2 phase by the phase adjusting circuit 22A, and is synchronized with the differential signal between the main lines. Is output. In this way, transmission of the control line from the communication device 10 to the communication device 20 is performed. Similarly, signal transmission from the control line of the communication device 20 to the control line of the communication device 10 is performed.
- FIG. 4A shows signal waveforms of signals input from the control line 1, the main line 1, and the main line 2 to the communication device 10.
- the differential signals input from the control line 1, the main line 1, and the main line 2 are synchronized with each other.
- the signal that has passed through the phase adjustment circuit 12A is shown in FIG. 4B.
- the phase adjustment circuit 12A By passing through the phase adjustment circuit 12A, the waveform of the control line is delayed by 1/2 phase, and the timing of the transition of the signal on the control line and the signal on the main lines 1 and 2 is separated. The necessity of separating the timing of signal transition will be described later.
- Waveforms on the twisted pair wirings 30A and 30B after passing through the superimposing coils 11A and 11B are shown in FIG. 4C. At this time, the vector sum of all waveforms is zero.
- the outputs of the superimposing coils 21A and 21B are shown in FIG. 4D. At this time, the waveform of each line is restored, but the waveform of the control line 1 is delayed by 1/2 phase.
- the output of the phase adjustment circuit 22A is shown in FIG. 4E.
- the signal on the control line 1 is delayed by 1/2 phase by the phase adjustment circuit 22A, and is delayed by 1 phase from the main lines 1 and 2 to be synchronized.
- FIG. 5A shows signal waveforms of signals input from the control line 1, the main line 1, and the main line 2 to the communication device 10, and is the same waveform as FIG. 4A.
- the signals on the twisted pair wirings 30A and 30B output from the superposition coils have the waveforms shown in FIG. 5B.
- the signal of this waveform is input to the superposition coils 21A and 21B via the twisted pair wirings 30A and 30B, a portion that cannot be separated into the main line waveform and the control line waveform is generated as shown in FIG. 5C.
- the signal can be separated by the superposition coil, and the phase adjustment circuit is not required.
- the signal can be superimposed without performing phase adjustment by the phase adjustment circuit. That is, the superimposing coil 11A as the first superimposing circuit places the differential signal input from the main line 1 on the twisted pair wiring 30A serving as the first wiring pair and superimposes one of the other differential signals input from the control line. To do.
- the superimposing coil 11B which is the second superimposing circuit, places the differential signal input from the main line 2 on the twisted pair wiring 30B serving as the second wiring pair, and the other differential signal input from the control line. Is superimposed.
- the superimposing coil 11A as the first superimposing circuit superimposes one of the other differential signals input from the control line so as to be in the common mode in both transmission lines constituting the twisted pair wiring 30A.
- Superimposing coil 11B which is a superimposing circuit, superimposes the other of the other differential signals so as to be in a common mode in both transmission lines constituting twisted pair wiring 30B.
- a signal having a predetermined phase is superimposed on the wire pair that transmits the first differential signal
- the second A signal having an opposite phase is superimposed on a pair of wires that transmit a differential signal. That is, the signal superimposed on the first wiring pair and the signal superimposed on the second wiring pair are superimposed so as to satisfy the relationship of opposite phases as in one of the differential signals and the other.
- a signal input from the control line as a differential signal is transmitted as a common mode signal on the twisted pair wiring, it is extracted as a differential signal on the receiving side, so that it is possible to improve resistance to noise. That is, noise applied from the wiring is output from the control line in the common mode, so that the differential signal and noise on the control line can be easily separated and removed. Further, in this configuration, it is possible to increase the communication capacity without modifying the existing wiring, so that the wiring cost for increasing the communication capacity can be reduced.
- the phase adjustment circuit 12A on the transmission side performs a 1 ⁇ 2 phase delay
- the phase adjustment circuit 22A on the reception side further performs a 1 ⁇ 2 phase delay to perform a total of one phase delay.
- the phase adjustment circuit 12A may perform 1/4 phase delay
- the phase adjustment circuit 22A may perform 3/4 phase delay to perform a total phase delay of 1 phase to separate the signals.
- FIG. 7 is a block diagram of a signal superimposing circuit that superimposes the signal inside the communication apparatus described above.
- the signal superimposing circuit 100 includes a phase adjustment circuit 12A, input / output terminals 13A to 13C, input / output terminals 14A and 14B, and superimposing circuits 110A and 110B.
- the input / output terminals 13A to 13C input the first to third differential signals from the lines 1 to 3, which are wire pairs composed of two transmission lines.
- the differential signals input at the input / output terminals 13A to 13C are output to the superimposing circuits 110A and 110B and the phase adjusting circuit 12A as they are.
- the input / output terminals 13A to 13C output the differential signals respectively input from the superimposing circuits 110A and 110B and the phase adjusting circuit 12A to the lines 1 to 3 as they are.
- the phase adjustment circuit 12A performs a phase delay of a predetermined phase amount on the differential signal input from the input / output terminal 13C, and outputs one signal component of the differential signal subjected to the phase delay to the superimposing circuit 110A.
- the other signal component is output to the superimposing circuit 110B. Since the signals output to the superimposing circuits 110A and 110B are one and the other of the differential signals input to the phase adjustment circuit 12A and subjected to phase delay, they satisfy the relationship of opposite phases.
- phase adjustment circuit 12A delays the signal input from the superimposing circuit 110A and the signal input from the superimposing circuit 110B by the same phase delay amount, and inputs and outputs these two signals as respective components of the differential signal.
- a differential signal is output to the terminal 13C. Since the two signals input to the phase adjustment circuit 12A from the superimposing circuit 110A and the superimposing circuit 110B satisfy the relationship of opposite phases to each other, these two signals can be combined to form a differential signal.
- the superimposing circuit 110A superimposes the signal input from the phase adjustment circuit 12A on the differential signal input from the input / output terminal 13A and outputs it to the input / output terminal 14A. Accordingly, the superimposing circuit 110A outputs the differential signal input from the input / output terminal 13A as a differential signal as it is, while the signal input from the phase adjustment circuit 12A is used as a common mode signal in phase with the transmission line constituting the wiring pair. Output. Therefore, the superimposing circuit 110A outputs a signal in which the common mode signal is superimposed on the differential signal.
- the superimposing circuit 110A separates the signal input from the input / output terminal 14A into the in-phase component and the differential component, outputs the differential signal to the input / output terminal 13A, and outputs the common mode signal component to the phase adjustment circuit 12A. To do.
- the superimposing circuit 110B superimposes the signal input from the phase adjustment circuit 12A on the differential signal input from the input / output terminal 13B and outputs it to the input / output terminal 14B. Accordingly, the superimposing circuit 110B outputs the differential signal input from the input / output terminal 13B as it is as a differential signal, while the signal input from the phase adjustment circuit 12A is used as a common mode signal in phase with the transmission line constituting the wiring pair. Output to the input / output terminal 14B. Therefore, the superimposing circuit 110B outputs a signal in which the common mode signal is superimposed on the differential signal.
- the superimposing circuit 110B separates the signal input from the input / output terminal 14B into the in-phase component and the differential component, outputs the differential signal to the input / output terminal 13B, and outputs the common mode signal component to the phase adjustment circuit 12A. To do.
- the superposition circuit 110A and the superposition circuit 110B correspond to the superposition coils 11A and 11B in FIG.
- the common mode signals input / output from each of the superimposing circuits 110A and 110B satisfy the opposite phase relationship as described above, and are respectively input to the differential input terminals of the phase adjustment circuit 11A to become differential signals. .
- the input / output terminal 14A outputs a signal input from the superimposing circuit 110A to the first twisted pair wiring, and outputs a signal input from the twisted pair wiring to the superimposing circuit 110A.
- the input / output terminal 14B outputs the signal input from the superimposing circuit 110B to the second twisted pair wiring, and outputs the signal input from the twisted pair wiring to the superimposing circuit 110B.
- a differential signal and a common mode signal are superimposed on each twisted pair wiring and transmitted.
- the signal superimposing circuit 100 can be configured as shown in FIG.
- the phase adjustment circuits 12A and 12B are disposed between the input / output terminals 13A and 13B and the superimposing circuits 110A and 110B, respectively. That is, the phase adjustment circuit 12A performs a phase delay of a predetermined phase amount on the differential signal input from the input / output terminal 13A, and outputs the differential signal after the phase delay to the superimposing circuit 110A.
- the phase adjustment circuit 12B performs a phase delay of a predetermined phase amount on the differential signal input from the input / output terminal 13B, and outputs the differential signal after the phase delay to the superimposing circuit 110B.
- each superposition circuit can superimpose a differential signal and a common mode signal with a phase difference, so that signal separation can be appropriately performed on the receiving side.
- the communication apparatus of the present invention can be configured as shown in FIG.
- the communication device 40 includes a first communication unit 41A, a second communication unit 41B, and a third communication unit 41C.
- the first communication unit 41A transmits the first information by putting a differential signal on the twisted pair wiring 30A that is the first wiring pair.
- the second communication unit 41B transmits the second information by putting a differential signal on the twisted pair wiring 30B that is the second wiring pair.
- the third communication unit 41C transmits the third information by superimposing one side of the differential signal on the twisted pair wiring 30A and superimposing the other side of the differential signal on the twisted pair wiring 30B.
- the third communication unit 41C transmits one of the differential signals in the same phase to both transmission lines constituting the twisted pair wiring 30A, and each of the differential signals is transmitted to both transmission lines constituting the twisted pair wiring 30B.
- the third information is transmitted by transmitting the other in phase.
- the third communication unit 41C transmits the third information with a transmission timing shifted. Specifically, transmission is performed after the phase of a signal to be transmitted is adjusted by a predetermined phase amount using a phase adjustment unit provided inside. Therefore, the signal transmitted from the first communication unit 41A and the signal transmitted from the second communication unit 41B have the same transmission timing, but the signal transmitted from the third communication unit 41C is shifted in transmission timing. . Therefore, it is possible to appropriately perform signal separation in the communication device on the receiving side.
- phase adjustment part 42 which adjusts the phase of the signal to transmit may be provided outside the 3rd communication part 41C.
- the present invention is not limited to this.
- the number of input differential signals can be any number of three or more pairs.
- a first communication unit that transmits first information with a differential signal to a first wiring pair; a second communication unit that transmits second information with a differential signal to a second wiring pair; And a third communication unit that transmits third information by superimposing one side of the differential signal on the wiring pair and superimposing the other side of the differential signal on the second wiring pair.
- the third communication unit superimposes one of the differential signals so as to be in phase in both transmission lines constituting the first wiring pair, and the other of the differential signals is connected to the second wiring.
- the first communication unit receives fourth information transmitted as a differential signal to the first wiring pair, and the second communication unit is transmitted as a differential signal to the second wiring pair.
- the third communication unit receives one of the differential signals transmitted through the first wire pair and the other of the differential signals transmitted through the second wire pair;
- the communication device according to (1) or (2), wherein the sixth information is received by receiving.
- a first superimposing circuit that places a differential signal on the first wiring pair and superimposes one of the other differential signals; and another side of the other differential signal that places the differential signal on the second wiring pair.
- a signal superimposing circuit comprising: a second superimposing circuit that superimposes.
- the first superimposing circuit superimposes one of the different differential signals so as to be in phase in both transmission lines constituting the first wiring pair, and the second superimposing circuit The signal superimposing circuit according to (4), wherein the other of the differential signals is superposed so as to be in phase in both transmission lines constituting the second wiring pair.
- a first input unit that inputs a first differential signal, a second input unit that inputs a second differential signal, and a third input unit that inputs a third differential signal.
- the first superimposing circuit places the first differential signal input from the first input unit on the first wiring pair and outputs the third differential signal input from the third input unit.
- the signal superimposing circuit according to (4) or (5).
- a phase delay circuit that delays the phase of the third differential signal is further included, and the first superposition circuit receives one of the third differential signals delayed in phase by the phase delay circuit.
- the first superimposing circuit and the second superimposing circuit multiplex signals so that a vector sum of signals flowing through the first wiring pair and the second wiring pair becomes 0, (4) to (7
- the first differential signal is placed on the first wiring pair, the second differential signal is placed on the second wiring pair, and one side of the third differential signal is superimposed on the first wiring pair, and A signal superimposing method of superimposing the other of the third differential signals on the second wiring pair.
- the first superimposing circuit separates the signal input from the first wiring pair into a differential signal component and a common mode signal component, and the differential signal component is input to the first input unit, and the common mode signal Components are respectively output to the third input unit, and the second superimposing circuit separates the signal input from the second wiring pair into a differential signal component and a common mode signal component, and the differential signal component is converted into the first input signal.
- the common mode signal component is output to the third input unit to each of the two input units, and the first input unit outputs the differential signal component input from the first superimposing circuit as a fourth differential signal.
- the second input unit outputs a differential signal component input from the second superimposing circuit as a fifth differential signal
- the third input unit is a common mode signal component input from the first superimposing circuit.
- the common input from the second superposition circuit And outputs as a sixth differential signal by combining the over de signal component, the signal superimposing circuit according to (6).
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Abstract
Description
以下、図面を参照して本発明の実施の形態について説明する。図1は、本発明の伝送システムの構成を示す図である。本発明の伝送システムは、通信装置10と通信装置20とが4つのツイストペア配線30A~30Dで接続されている。各ツイストペア配線は、2本の伝送配線をより合わせた撚り芯線である。
(2)前記第3通信部は、前記差動信号の片方を前記第1配線対を構成する両方の伝送路で同相となるように重畳し、前記差動信号のもう片方を前記第2配線対を構成する両方の伝送路で同相となるように重畳することで前記第3の情報をコモンモードで送信する、(1)に記載の通信装置。
(3)前記第1通信部は、前記第1配線対に差動信号で送信された第4の情報を受信し、前記第2通信部は、前記第2配線対に差動信号で送信された第5の情報を受信し、前記第3通信部は、前記第1配線対で送信された差動信号の片方と、前記第2配線対で送信された前記差動信号のもう片方と、を受信することで第6の情報を受信する、(1)又は(2)に記載の通信装置。
(4)第1配線対に差動信号を乗せると共に別の差動信号の片方を重畳する第1重畳回路と、第2配線対に差動信号を乗せると共に前記別の差動信号のもう片方を重畳する第2重畳回路と、を備える信号重畳回路。
(5)前記第1重畳回路は、前記別の差動信号の片方を前記第1配線対を構成する両方の伝送路で同相となるように重畳し、前記第2重畳回路は、前記別の差動信号のもう片方を前記第2配線対を構成する両方の伝送路で同相となるように重畳する、(4)に記載の信号重畳回路。
(6)第1の差動信号を入力する第1入力部と、第2の差動信号を入力する第2入力部と、第3の差動信号を入力する第3入力部と、を備え、前記第1重畳回路は、前記第1配線対に前記第1入力部で入力された前記第1の差動信号を乗せると共に前記第3入力部で入力された前記第3の差動信号の片方を重畳し、前記第2重畳回路は、第2配線対に前記第2入力部で入力された前記第2の差動信号を乗せると共に前記第3の差動信号のもう片方を重畳する、(4)又は(5)に記載の信号重畳回路。
(7)前記第3の差動信号の位相を遅延させる位相遅延回路を更に備え、前記第1重畳回路は、前記位相遅延回路で位相を遅延させた第3の差動信号の片方を前記第1配線対に重畳し、前記第2重畳回路は、前記位相遅延回路で位相を遅延させた第3の差動信号のもう片方を前記第2配線対に重畳する、(6)に記載の信号重畳回路。
(8)前記第1重畳回路及び前記第2重畳回路は、前記第1配線対及び前記第2配線対を流れる信号のベクトル和が0となるように信号を多重する、(4)乃至(7)のいずれか1項に記載の信号重畳回路。
(9)第1配線対に第1の差動信号を乗せ、第2配線対に第2の差動信号を乗せ、前記第1配線対に第3の差動信号の片方を重畳すると共に前記第2配線対に前記第3の差動信号のもう片方を重畳する、信号重畳方法。
(10)前記第1重畳回路は、前記第1配線対より入力した信号を差動信号成分とコモンモード信号成分に分離して前記差動信号成分を前記第1入力部に、前記コモンモード信号成分を前記第3入力部にそれぞれ出力し、前記第2重畳回路は、前記第2配線対より入力した信号を差動信号成分とコモンモード信号成分に分離して前記差動信号成分を前記第2入力部に、前記コモンモード信号成分を前記第3入力部にそれぞれ出力し、前記第1入力部は、前記第1重畳回路より入力した差動信号成分を第4の差動信号として出力し、前記第2入力部は、前記第2重畳回路より入力した差動信号成分を第5の差動信号として出力し、前記第3入力部は、前記第1重畳回路より入力したコモンモード信号成分と前記第2重畳回路より入力したコモンモード信号成分とを組み合わせて第6の差動信号として出力する、(6)に記載の信号重畳回路。
12A、B 位相調整回路 13A-C 入出力端子
14A、B 入出力端子
20 通信装置 21A-D 重畳コイル
22A、B 位相調整回路
30A-D ツイストペア配線
40 通信装置 41A-C 通信部
42 位相調整部
100 信号重畳回路 110A、B 重畳回路
Claims (9)
- 第1配線対に差動信号で第1の情報を送信する第1通信手段と、
第2配線対に差動信号で第2の情報を送信する第2通信手段と、
前記第1配線対に差動信号の片方を重畳し、前記第2配線対に前記差動信号のもう片方を重畳することで第3の情報を送信する第3通信手段と、
を具備する通信装置。 - 前記第3通信手段は、前記差動信号の片方を前記第1配線対を構成する両方の伝送路で同相となるように重畳し、前記差動信号のもう片方を前記第2配線対を構成する両方の伝送路で同相となるように重畳することで前記第3の情報をコモンモードで送信する、
請求項1に記載の通信装置。 - 前記第1通信手段は、前記第1配線対に差動信号で送信された第4の情報を受信し、
前記第2通信手段は、前記第2配線対に差動信号で送信された第5の情報を受信し、
前記第3通信手段は、前記第1配線対で送信された差動信号の片方と、前記第2配線対で送信された前記差動信号のもう片方と、を受信することで第6の情報を受信する、
請求項1又は2に記載の通信装置。 - 第1配線対に差動信号を乗せると共に別の差動信号の片方を重畳する第1重畳回路と、
第2配線対に差動信号を乗せると共に前記別の差動信号のもう片方を重畳する第2重畳回路と、
を備える信号重畳回路。 - 前記第1重畳回路は、前記別の差動信号の片方を前記第1配線対を構成する両方の伝送路で同相となるように重畳し、
前記第2重畳回路は、前記別の差動信号のもう片方を前記第2配線対を構成する両方の伝送路で同相となるように重畳する、
請求項4に記載の信号重畳回路。 - 第1の差動信号を入力する第1入力手段と、
第2の差動信号を入力する第2入力手段と、
第3の差動信号を入力する第3入力手段と、
を備え、
前記第1重畳回路は、前記第1配線対に前記第1入力手段で入力された前記第1の差動信号を乗せると共に前記第3入力手段で入力された前記第3の差動信号の片方を重畳し、
前記第2重畳回路は、第2配線対に前記第2入力手段で入力された前記第2の差動信号を乗せると共に前記第3の差動信号のもう片方を重畳する、
請求項4又は5に記載の信号重畳回路。 - 前記第3の差動信号の位相を遅延させる位相遅延回路を更に備え、
前記第1重畳回路は、前記位相遅延回路で位相を遅延させた第3の差動信号の片方を前記第1配線対に重畳し、
前記第2重畳回路は、前記位相遅延回路で位相を遅延させた第3の差動信号のもう片方を前記第2配線対に重畳する、
請求項6に記載の信号重畳回路。 - 前記第1重畳回路及び前記第2重畳回路は、前記第1配線対及び前記第2配線対を流れる信号のベクトル和が0となるように信号を多重する、
請求項4乃至7のいずれか1項に記載の信号重畳回路。 - 第1配線対に第1の差動信号を乗せ、
第2配線対に第2の差動信号を乗せ、
前記第1配線対に第3の差動信号の片方を重畳すると共に前記第2配線対に前記第3の差動信号のもう片方を重畳する、
信号重畳方法。
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JP2021184595A (ja) * | 2020-05-22 | 2021-12-02 | ベイカー ヒューズ オイルフィールド オペレーションズ エルエルシーBaker Hughes Oilfield Operations, LLC | 2つの電力供給チャネルによる通信 |
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CN105068818B (zh) * | 2015-08-26 | 2019-02-12 | 网易(杭州)网络有限公司 | 生成渠道包的方法、装置与批量生成渠道包的方法、系统 |
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